Method of performing surround motion compensation

Abstract

The present disclosure provides a method for performing surround motion compensation. The method may include receiving a first surround motion compensation flag, wherein the first surround motion compensation flag is associated with an image of a set of images; determining whether the first surround motion compensation flag is enabled; receiving a surround motion compensation offset in response to determining that the first surround motion compensation flag is enabled, where the surround motion compensation offset is associated with the image; and performing motion compensation on the image according to the first surround motion compensation flag and the surround motion compensation offset.

Description

Cross - Reference to Related Applications

[0001] This disclosure claims the priority of U.S. Provisional Patent Application No. 62 / 949,396, filed on December 17, 2019. The entire content thereof is incorporated herein by reference. Technical Field

[0002] This disclosure generally relates to video processing, and more particularly, to methods and systems for performing circular motion compensation. Background Art

[0003] Video is a set of static images (or "frames") that capture visual information. To reduce storage memory and transmission bandwidth, video can be compressed before storage or transmission and then decompressed before display. The compression process is generally referred to as encoding, and the decompression process is generally referred to as decoding. There are various video coding formats using standardized video coding techniques, most commonly based on prediction, transformation, quantization, entropy coding, and in - loop filtering. Video coding standards, such as the High Efficiency Video Coding (e.g., HEVC / H.265) standard, the Versatile Video Coding (e.g., VVC / H.266) standard, and the AVS standard, specify specific video coding formats developed by standardization organizations. As more and more advanced video coding techniques are adopted in video standards, the coding efficiency of new video coding standards is getting higher and higher. Summary of the Invention

[0004] Embodiments of this disclosure provide a method for performing motion compensation. The method includes: Receiving a first circular motion compensation flag, where the first circular motion compensation flag is associated with an image in a set of images; determining whether the first circular motion compensation flag is enabled; in response to determining that the first circular motion compensation flag is enabled, receiving a circular motion compensation offset, where the circular motion compensation offset is associated with the image; and performing motion compensation on the image according to the first circular motion compensation flag and the circular motion compensation offset..

[0005] Embodiments of this disclosure also provide a system for performing motion compensation. The system includes a memory storing a set of instructions, and a processor configured to execute the set of instructions to cause the system to perform: receiving a first circular motion compensation flag, where the first circular motion compensation flag is associated with an image in a set of images; determining whether the first circular motion compensation flag is enabled; in response to determining that the first circular motion compensation flag is enabled, receiving a circular motion compensation offset, where the circular motion compensation offset is associated with the image; and performing motion compensation on the image according to the first circular motion compensation flag and the circular motion compensation offset..

[0006] Embodiments of the present disclosure also provide a non - transitory computer - readable medium that stores a set of instructions executable by one or more processors of a device to cause the device to initiate a method for performing motion compensation. The method includes: receiving a first wrap - around motion compensation flag, where the first wrap - around motion compensation flag is associated with an image in a set of images; determining whether the first wrap - around motion compensation flag is enabled; in response to determining that the first wrap - around motion compensation flag is enabled, receiving a wrap - around motion compensation offset, where the wrap - around motion compensation offset is associated with the image; and performing motion compensation on the image based on the first wrap - around motion compensation flag and the wrap - around motion compensation offset. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Embodiments and aspects of the present disclosure are shown in the following detailed description and the drawings. The various features shown in the drawings are not drawn to scale.

[0008] Figure 1 The structure of an example video sequence according to some embodiments of the present disclosure is shown.

[0009] Figure 2A A schematic diagram of an exemplary encoding process according to some embodiments of the present disclosure is shown.

[0010] Figure 2B A schematic diagram of another example encoding process according to some embodiments of the present disclosure is shown.

[0011] Figure 3A A schematic diagram of an exemplary decoding process according to some embodiments of the present disclosure is shown.

[0012] Figure 3B A schematic diagram of another example decoding process according to some embodiments of the present disclosure is shown.

[0013] Figure 4 A block diagram of an exemplary apparatus for encoding or decoding video according to some embodiments of the present disclosure is shown.

[0014] Figure 5A A schematic diagram of an example hybrid operation for generating a reconstructed equirectangular projection according to some embodiments of the present disclosure is shown.

[0015] Figure 5B A schematic diagram of an example cropping operation for generating a reconstructed equirectangular projection according to some embodiments of the present disclosure is shown.

[0016] Figure 6A A schematic diagram of an example horizontal wrap - around motion compensation process for equirectangular projection according to some embodiments of the present disclosure is shown.

[0017] Figure 6B A schematic diagram showing an exemplary horizontal wraparound motion compensation process for filling an isorectangular projection according to some embodiments of the present disclosure.

[0018] Figure 7 The syntax of an example sequence parameter set for wraparound motion compensation according to some embodiments of the present disclosure is shown.

[0019] Figure 8 The semantics of an example sequence parameter set for wraparound motion compensation according to some embodiments of the present disclosure are shown.

[0020] Figure 9 The syntax of an example sequence parameter set for improved wraparound motion compensation according to some embodiments of the present disclosure is shown.

[0021] Figure 10 The semantics of an example sequence parameter set for improved wraparound motion compensation according to some embodiments of the present disclosure are shown.

[0022] Figure 11 The semantics of an example sequence parameter set for improved wraparound motion compensation with a maximum image width according to some embodiments of the present disclosure are shown.

[0023] Figure 12 An example derivation of the variables "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset" according to some embodiments of the present disclosure is shown.

[0024] Figure 13 An example derivation of the sample positions for motion compensation according to some embodiments of the present disclosure is shown.

[0025] Figure 14 The syntax of an example sequence parameter set and an image parameter set for wraparound motion compensation with a wraparound motion compensation offset in the image parameter set according to some embodiments of the present disclosure is shown.

[0026] Figure 15 The semantics of an example sequence parameter set and an image parameter set for wraparound motion compensation with a wraparound motion compensation offset in the image parameter set according to some embodiments of the present disclosure are shown.

[0027] Figure 16 The syntax of an example sequence parameter set for improved wraparound motion compensation without a wraparound motion compensation offset according to some embodiments of the present disclosure is shown.

[0028] Figure 17Shows the syntax of an example picture parameter set for improved wraparound motion compensation with wraparound motion compensation offset according to some embodiments of the present disclosure.

[0029] Figure 18 Shows the semantics of an example sequence parameter set and picture parameter set for improved wraparound motion compensation with wraparound motion compensation offset in the picture parameter set according to some embodiments of the present disclosure.

[0030] Figure 19 Shows an example derivation of the variables "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset" according to some embodiments of the present disclosure.

[0031] Figure 20 Shows the syntax of an example sequence parameter set for improved wraparound motion compensation without wraparound motion compensation offset in the sequence parameter set according to some embodiments of the present disclosure.

[0032] Figure 21 Shows the syntax of an example picture parameter set for improved wraparound motion compensation with wraparound control flag according to some embodiments of the present disclosure.

[0033] Figure 22 Shows the semantics of an example sequence parameter set and picture parameter set for improved wraparound motion compensation with wraparound control flag in the picture parameter set according to some embodiments of the present disclosure.

[0034] Figure 23 Shows the semantics of an example sequence parameter set and picture parameter set for improved wraparound motion compensation with wraparound control flag in the picture parameter set according to some embodiments of the present disclosure.

[0035] Figure 24 Shows an example derivation of the variable "PicRefWraparoundOffset" according to some embodiments of the present disclosure.

[0036] Figure 25 Shows the semantics of an example sequence parameter set and picture parameter set for improved wraparound motion compensation with a limitation on the picture size according to some embodiments of the present disclosure.

[0037] Figure 26 Shows the semantics of an example sequence parameter set for improved wraparound motion compensation with limitations imposed on the variables "pic_width_max_in_luma_samples", "CtbSizeY", and "MinCbSizeY" according to some embodiments of the present disclosure.

[0038] Figure 27 Illustrates the semantics of an example set of image parameters for improved loop filter motion compensation according to some embodiments of the present disclosure, the loop filter motion compensation having a restriction imposed on the variable "pic_width_max_in_luma_sample".

[0039] Figure 28 Illustrates a flowchart of an example method for performing motion compensation according to some embodiments of the present disclosure.

[0040] Figure 29 Illustrates a flowchart of an example method for performing motion compensation with a restricted range of sequence loop filter motion compensation offsets according to some embodiments of the present disclosure.

[0041] Figure 30 Illustrates a flowchart of an example method for performing motion compensation using an image associated with a sequence loop filter motion compensation offset according to some embodiments of the present disclosure.

[0042] Figure 31 Illustrates a flowchart of an example method for performing motion compensation using a restricted maximum image size according to some embodiments of the present disclosure. DETAILED DESCRIPTION

[0043] Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings, unless otherwise noted, where like numerals in different drawings represent the same or similar elements. The embodiments set forth in the following description of the exemplary embodiments do not represent all embodiments consistent with the present disclosure. Instead, they are merely examples of apparatus and methods consistent with aspects related to the present disclosure as set forth in the appended claims. Specific aspects of the present disclosure are described in more detail below. In case of conflict with the terms and / or definitions incorporated by reference, the terms and definitions provided herein shall prevail.

[0044] The Joint Video Exploration Team (JVET) of the ITU-T Video Coding Experts Group (ITU-T VCEG) and the ISO / IEC Moving Picture Experts Group (ISO / IEC MPEG) is currently developing the Versatile Video Coding (VVC / H.266) standard. The VVC standard aims to double the compression efficiency of its predecessor, the High Efficiency Video Coding (HEVC / H.265) standard. In other words, the goal of VVC is to achieve the same subjective quality as HEVC / H.265 using half the bandwidth.

[0045] To achieve the same subjective quality as HEVC / H.265 using half the bandwidth, JVET has been using the Joint Exploration Model (JEM) reference software to explore technologies beyond HEVC. As coding techniques are incorporated into JEM, JEM has achieved higher coding performance than HEVC. VCEG and MPEG have officially started developing the next-generation video compression standard beyond HEVC.

[0046] The VVC standard has been recently developed and continues to include more coding techniques that provide better compression performance. VVC is based on the hybrid video coding system that has been used in modern video compression standards such as HEVC, H.264 / AVC, MPEG2, H.263, etc.

[0047] Video is a set of static images (or "frames") arranged in chronological order to store visual information. These images can be acquired and stored in chronological order using a video acquisition device (e.g., a camera), and such images in the time series can be displayed using a video playback device (e.g., a television, computer, smartphone, tablet computer, video player, or any end-user terminal with a display function). In addition, in some applications, the video acquisition device can send the acquired video to the video playback device (e.g., a computer with a monitor) in real time, such as for surveillance, conferencing, or live broadcasting.

[0048] To reduce the storage space and transmission bandwidth required for such applications, the video can be compressed before storage and transmission and decompressed before display. Compression and decompression can be implemented by software executed by a processor (e.g., the processor of a general-purpose computer) or dedicated hardware. The module for compression is usually referred to as an "encoder", and the module for decompression is usually referred to as a "decoder". Encoders and decoders can be collectively referred to as "codecs". Encoders and decoders can be implemented as any of a variety of suitable hardware, software, or combinations thereof. For example, the hardware implementation of an encoder and decoder can include circuits such as one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, or any combination thereof. The software implementation of an encoder and decoder can include program code fixed in a computer-readable medium, computer-executable instructions, firmware, or any suitable computer-implemented algorithm or process. Video compression and decompression can be achieved through various algorithms or standards, such as MPEG-1, MPEG-2, MPEG-4, the H.26x series, etc. In some applications, a codec can decompress a video from a first coding standard and recompress the decompressed video using a second coding standard, in which case the codec can be referred to as a "transcoder".

[0049] The video encoding process can identify and retain useful information for reconstructing an image and ignore unimportant reconstruction information. If the unimportant information cannot be completely reconstructed when ignored, such an encoding process can be called "lossy". Otherwise, it can be called "lossless". Most encoding processes are lossy, which is a trade-off to reduce the required storage space and transmission bandwidth.

[0050] In many cases, the useful information of the encoded image (referred to as the "current image") includes changes relative to a reference image (e.g., a previously encoded and reconstructed image). Such changes can include changes in the position of pixels, changes in brightness, or changes in color, with the change in position being of the most concern. The change in the position of a group of pixels representing an object can reflect the movement of the object between the reference image and the current image.

[0051] An image encoded without referring to another image (i.e., it is its own reference image) is called an "I-image". An image encoded using a previous image as a reference image is called a "P-image", and an image encoded using a previous image and a future image as reference images is called a "B-image" (the reference is "bidirectional").

[0052] Figure 1 The structure of an example video sequence 100 according to some embodiments of the present disclosure is shown. The video sequence 100 can be a live video or a video that has been captured and archived. The video 100 can be a real-life video, a computer-generated video (e.g., a computer game video), or a combination of both (e.g., a real video with augmented reality effects). The video sequence 100 can come from a video capture device (e.g., a camera), include a video archive of previously captured videos (e.g., a video file stored in a storage device), or a video feed interface (e.g., a video broadcast transceiver) that receives videos from a video content provider.

[0053] As Figure 1 shown, the video sequence 100 can include a series of images arranged in time along a timeline, including images 102, 104, 106, and 108. Images 102 - 106 are consecutive, and there are more images between images 106 and 108. In Figure 1 this case, image 102 is an I-image, and its reference image is image 102 itself. Image 104 is a P-image, and its reference image is image 102, as indicated by the arrow. Image 106 is a B-image, and its reference images are images 104 and 108, as indicated by the arrows. In some embodiments, the reference image of an image (e.g., image 104) may not be immediately before or after the image. For example, the reference image of image 104 can be an image before image 102. It should be noted that the reference images of images 102 - 106 are merely examples, and the present disclosure does not limit as Figure 1Embodiments of the reference image shown.

[0054] Typically, due to the computational complexity of the encoding and decoding tasks, video codecs do not encode or decode an entire image at once. Instead, they can divide the image into basic segments and encode or decode the image segments segment by segment. In the present disclosure, such a basic segment is referred to as a basic processing unit (“BPU”). For example, Figure 1 Structure 110 in [reference] shows an example structure of an image (e.g., any of images 102-108) of video sequence 100. In structure 110, the image is divided into 4×4 basic processing units, the boundaries of which are shown as dashed lines. In some embodiments, the basic processing unit may be referred to as a “macroblock” in some video coding standards (e.g., the MPEG family, H.261, H.263, or H.264 / AVC), or as a “coding tree unit” (“CTU”) in some other video coding standards (e.g., H.265 / HEVC or H.266 / VVC). The basic processing unit may have a variable size in the image, such as 128×128, 64×64, 32×32, 16×16, 4×8, 16×32, or pixels of any shape and size. The size and shape of the basic processing unit can be selected for the image based on a balance between coding efficiency and the level of detail to be maintained in the basic processing unit.

[0055] The basic processing unit can be a logical unit that can include a set of different types of video data stored in a computer memory (e.g., in a video frame buffer). For example, a basic processing unit of a color image can include a luminance component (Y) representing achromatic luminance information, one or more chrominance components (e.g., Cb and Cr) representing color information, and associated syntax elements, where the luminance and chrominance components can have the same size as the basic processing unit. In some video coding standards (e.g., H.265 / HEVC or H.266 / VVC), the luminance and chrominance components can be referred to as “coding tree blocks” (“CTB”). Any operation performed on the basic processing unit can be repeated for each of its luminance and chrominance components.

[0056] Video encoding has multiple operation stages, examples of which are shown in Figures 2A - 2B and Figures 3A - 3BAs shown. For each stage, the size of the basic processing unit may still be too large for processing, so it can be further divided into segments called "basic processing subunits" in the present disclosure. In some embodiments, the basic processing subunit may be called a "block" in some video coding standards (e.g., the MPEG family, H.261, H.263, or H.264 / AVC), or an "encoding unit" ("CU") in some other video coding standards (e.g., H.265 / HEVC or H.266 / VVC). The basic processing subunit may have the same size as the basic processing unit or a smaller size than the basic processing unit. Similar to the basic processing unit, the basic processing subunit is also a logical unit, which may include a set of different types of video data (e.g., Y, Cb, Cr, and associated syntax elements) stored in a computer memory (e.g., in a video frame buffer). Any operation performed on the basic processing subunit can be repeated for each of its luminance and chrominance components. It should be noted that this division can be performed to a further level according to processing needs. It should also be noted that different stages may use different schemes to divide the basic processing unit.

[0057] For example, in the mode decision stage (an example of which is shown in Figure 2A ), the encoder can decide what prediction mode (e.g., intra prediction or inter prediction) to use for the basic processing unit, which may be too large to make such a decision. The encoder can divide the basic processing unit into multiple basic processing subunits (e.g., CUs in H.265 / HEVC or H.266 / VVC), and decide the prediction type for each individual basic processing subunit.

[0058] For another example, in the prediction stage (an example of which is shown in Figures 2A - 2B ), the encoder can perform prediction operations at the level of the basic processing subunit (e.g., CU). However, in some cases, the basic processing subunit may still be too large to process. The encoder can further divide the basic processing subunit into smaller segments (e.g., called "prediction blocks" or "PBs" in H.265 / HEVC or H.266 / VVC), at which level the prediction operations can be performed.

[0059] For another example, in the transform stage (an example of which is shown in Figures 2A - 2BAs shown (in [reference]), the encoder may perform a transformation operation on a residual basic processing unit (e.g., a CU). However, in some cases, the basic processing unit may still be too large to process. The encoder may further divide the basic processing unit into smaller segments (e.g., called "transformation blocks" or "TBs" in H.265 / HEVC or H.266 / VVC), at which level the transformation operation can be performed. It should be noted that the partitioning scheme for the same basic processing unit can be different in the prediction stage and the transformation stage. For example, in H.265 / HEVC or H.266 / VVC, the prediction blocks and transformation blocks of the same CU can have different sizes and numbers.

[0060] In Figure 1 the structure 110, the basic processing unit 112 is further divided into 3×3 basic processing subunits, the boundaries of which are shown as dashed lines. Different basic processing units of the same image can be divided into basic processing subunits in different schemes.

[0061] In some embodiments, to provide the ability for parallel processing and fault tolerance for video encoding and decoding, an image can be divided into regions for processing such that for a region of the image, the encoding or decoding process can be independent of information from any other region of the image. In other words, each region of the image can be processed independently. By doing so, the codec can process different regions of the image in parallel, thereby improving the encoding efficiency. Additionally, when the data of a region is corrupted during processing or lost during network transmission, the codec can correctly encode or decode other regions of the same image without relying on the corrupted or lost data, thereby providing fault tolerance. In some video coding standards, an image can be divided into different types of regions. For example, H.265 / HEVC and H.266 / VVC provide two types of regions: "slices" and "tiles". It should also be noted that different images of the video sequence 100 can have different partitioning schemes for dividing the image into regions.

[0062] For example, in Figure 1 the structure 110 is divided into three regions 114, 116, and 118, the boundaries of which are shown as solid lines inside the structure 110. Region 114 includes four basic processing units. Regions 116 and 118 each include six basic processing units. It should be noted that Figure 1 the basic processing units, basic processing subunits, and structural regions in 110 are only examples, and the present disclosure does not limit its embodiments.

[0063] Figure 2A shows a schematic diagram of an exemplary encoding process 200A according to an embodiment of the present disclosure. For example, the encoding process 200A can be performed by an encoder. As Figure 2AAs shown, the encoder may encode video sequence 202 into video bitstream 228 according to process 200A. Similar to Figure 1 the video sequence 100 in Figure 1 , the video sequence 202 may include a set of images arranged in chronological order (referred to as "original images"). Similar to

[0064] the structure 110 in Figure 2A , each original image of the video sequence 202 may be divided by the encoder into basic processing units, basic processing subunits, or regions for processing. In some embodiments, the encoder may perform process 200A at the level of basic processing units for each original image of the video sequence 202. For example, the encoder may perform process 200A iteratively, where the encoder may encode a basic processing unit in one iteration of process 200A. In some embodiments, the encoder may perform process 200A in parallel for regions (e.g., regions 114-118) of each original image of the video sequence 202.

[0065] Referring to , the encoder may feed a basic processing unit of an original image of the video sequence 202 (referred to as "original BPU") to prediction stage 204 to generate prediction data 206 and prediction BPU 208. The encoder may subtract the predicted BPU 208 from the original BPU to generate residual BPU 210. The encoder may feed the residual BPU 210 to transform stage 212 and quantization stage 214 to 216 generate quantized transform coefficients 216. The encoder may feed the prediction data 206 and the quantized transform coefficients 216 to binary coding stage 226 to generate video bitstream 228. Components 202, 204, 206, 208, 210, 212, 214, 216, 226, and 228 may be referred to as the "forward path". During process 200A, after quantization stage 214, the encoder may feed the quantized transform coefficients 216 to inverse quantization stage 218 and inverse transform stage 220 to generate reconstructed residual BPU 222. The encoder may add the reconstructed residual BPU 222 to the predicted BPU 208 to generate prediction reference 224, which is used in prediction stage 204 for the next iteration of process 200A. Components 218, 220, 222, and 224 of process 200A may be referred to as the "reconstruction path". The reconstruction path may be used to ensure that both the encoder and the decoder use the same reference data for prediction. The encoder may iteratively perform process 200A to encode each original BPU of the original image (in the forward path) and generate prediction reference 224 for encoding the next original BPU of the original image (in the reconstruction path). After encoding all the original BPUs of the original image, the encoder may continue to encode the next image in the video sequence 202.

[0066] Referring to process 200A, an encoder may receive a video sequence 202 generated by a video capture device (e.g., a camera). As used herein, the term "receive" may refer to any action of receiving, inputting, obtaining, retrieving, acquiring, reading, accessing, or using for inputting data in any way.

[0067] In the prediction stage 204, at the current iteration, the encoder may receive the original BPU and the prediction reference 224, and perform a prediction operation to generate prediction data 206 and a predicted BPU 208. The prediction reference 224 may be generated from the reconstruction path of a previous iteration of process 200A. The purpose of the prediction stage 204 is to reduce information redundancy by extracting prediction data 206 from the prediction data 206 and the prediction reference 224 that can be used to reconstruct the original BPU into the predicted BPU 208.

[0068] Ideally, the predicted BPU 208 may be the same as the original BPU. However, due to non-ideal prediction and reconstruction operations, the predicted BPU 208 is usually slightly different from the original BPU. To record these differences, when generating the predicted BPU 208, the encoder may subtract it from the original BPU to generate a residual BPU 210. For example, the encoder may subtract the value of the corresponding pixel of the predicted BPU 208 from the value of the pixel of the original BPU (e.g., grayscale value or RGB value). Each pixel of the residual BPU 210 may have a residual value as a result of this subtraction between the corresponding pixels of the original BPU and the predicted BPU 208. Compared with the original BPU, the prediction data 206 and the residual BPU 210 may have fewer bits, but they can be used to reconstruct the original BPU without significant quality degradation. Thus, the original BPU is compressed.

[0069] To further compress the residual BPU 210, in the transform stage 212, the encoder may reduce its spatial redundancy by decomposing the residual BPU 210 into a set of two-dimensional "base patterns". Each base pattern is associated with a "transformation coefficient". The base patterns may have the same size (e.g., the size of the residual BPU 210), and each base pattern may represent a component of the change frequency (e.g., the frequency of brightness change) of the residual BPU 210. None of the base patterns can be reproduced from any combination (e.g., linear combination) of any other base patterns. In other words, the decomposition can decompose the change of the residual BPU 210 into the frequency domain. This decomposition is similar to the discrete Fourier transform of a function, where the base image is similar to the basic function of the discrete Fourier transform (e.g., trigonometric function), and the transformation coefficient is similar to the coefficient associated with the basic function..

[0070] Different transformation algorithms can use different basic patterns. Various transformation algorithms can be used at the transformation stage 212, for example, discrete cosine transform, discrete sine transform, etc. The transformation at the transformation stage 212 is reversible. That is, the encoder can recover the residual BPU 210 through the inverse operation of the transformation (referred to as "inverse transformation"). For example, to recover the pixels of the residual BPU 210, the inverse transformation can be to multiply the values of the corresponding pixels of the basic pattern by the corresponding correlation coefficients and sum the products to produce a weighted sum. For video coding standards, both the encoder and the decoder can use the same transformation algorithm (and thus have the same basic pattern). Therefore, the encoder can record only the transformation coefficients, and the decoder can reconstruct the residual BPU 210 from them without receiving the basic pattern from the encoder. Compared with the residual BPU 210, the transformation coefficients can have fewer bits, but they can be used to reconstruct the residual BPU 210 without significant quality degradation. Thus, the residual BPU 210 is further compressed.

[0071] The encoder can further compress the transformation coefficients at the quantization stage 214. During the transformation process, different basic patterns can represent different change frequencies (e.g., luminance change frequencies). Since the human eye is generally better at recognizing low-frequency changes, the encoder can ignore the information of high-frequency changes without causing significant quality degradation in decoding. For example, at the quantization stage 214, the encoder can generate the quantized transformation coefficients 216 by dividing each transformation coefficient by an integer value (referred to as "quantization parameter") and rounding the quotient to its nearest integer. After such an operation, some transformation coefficients of the high-frequency basic pattern can be converted to zero, and the transformation coefficients of the low-frequency basic pattern can be converted to smaller integers. The encoder can ignore the quantized transformation coefficients 216 with zero values, whereby the transformation coefficients are further compressed. This quantization process is also reversible, where the quantized transformation coefficients 216 can be reconstructed as transformation coefficients in the inverse operation of quantization (referred to as "inverse quantization").

[0072] Since the encoder ignores the remainder of this division in the rounding operation, the quantization stage 214 can be lossy. Generally, the quantization stage 214 can contribute the most information loss in the process 200A. The greater the information loss, the fewer bits required for the quantized transformation coefficients 216. To obtain different levels of information loss, the encoder can use different quantization parameter values or any other parameters of the quantization process.

[0073] In the binary coding stage 226, the encoder can use binary coding techniques to code the prediction data 206 and the quantized transform coefficients 216. The binary coding can be, for example, entropy coding, variable length coding, arithmetic coding, Huffman coding, context - adaptive binary arithmetic coding, or any other lossless or lossy compression algorithm. In some embodiments, in addition to the prediction data 206 and the quantized transform coefficients 216, the encoder can code other information in the binary coding stage 226, such as the prediction mode used in the prediction stage 204, the parameters of the prediction operation, the type of transform at the transform stage 212, the parameters of the quantization process (e.g., quantization parameters), the encoder control parameters (e.g., bit - rate control parameters), etc. The encoder can use the output data of the binary coding stage 226 to generate the video bitstream 228. In some embodiments, the video bitstream 228 can be further packed for network transmission..

[0074] Referring to the reconstruction path of process 200A, in the inverse quantization stage 218, the encoder can perform inverse quantization on the quantized transform coefficients 216 to generate the reconstructed transform coefficients. In the inverse transform stage 220, the encoder can generate the reconstructed residual BPU 222 based on the reconstructed transform coefficients. The encoder can add the reconstructed residual BPU 222 to the prediction BPU 208 to generate the prediction reference 224 that will be used in the next iteration of process 200A.

[0075] It should be noted that other variants of process 200A can be used to code the video sequence 202. In some embodiments, the stages of process 200A can be executed by the encoder in a different order. In some embodiments, one or more stages of process 200A can be combined into a single stage. In some embodiments, a single stage of process 200A can be divided into multiple stages. For example, the transform stage 212 and the quantization stage 214 can be combined into a single stage. In some embodiments, process 200A can include additional stages. In some embodiments, process 200A can omit Figure 2A one or more of the stages.

[0076] Figure 2B FIG. shows a schematic diagram of another example coding process 200B according to an embodiment of the present disclosure. Process 200B can be modified from process 200A. For example, process 200B can be used by an encoder that complies with a hybrid video coding standard (e.g., H.26x series). Compared with process 200A, the forward path of process 200B further includes a mode decision stage 230 and divides the prediction stage 204 into a spatial prediction stage 2042 and a temporal prediction stage 2044. The reconstruction path of process 200B further includes a loop filter stage 232 and a buffer 234.

[0077] Generally, prediction techniques can be classified into two types: spatial prediction and temporal prediction. Spatial prediction (e.g., intra-image prediction or "intra prediction") can use pixels from one or more already-encoded adjacent BPUs in the same image to predict the current BPU. That is, the prediction reference 224 in spatial prediction can include adjacent BPUs. Spatial prediction can reduce the spatial redundancy inherent in the image. Temporal prediction (e.g., inter-image prediction or "inter prediction") can use regions from one or more already-encoded images to predict the current BPU. That is, the prediction reference 224 in temporal prediction can include encoded images. Temporal prediction can reduce the temporal redundancy inherent in the image.

[0078] Referring to process 200B, in the forward path, the encoder performs prediction operations in the spatial prediction stage 2042 and the temporal prediction stage 2044. For example, in the spatial prediction stage 2042, the encoder can perform intra prediction. For the original BPU of the encoded image, the prediction reference 224 can include one or more adjacent BPUs that have been encoded (in the forward path) and reconstructed (in the reconstruction path) in the same image. The encoder can generate a predicted BPU 208 by interpolating the adjacent BPUs. The interpolation technique can include, for example, linear interpolation or interpolation, polynomial interpolation or interpolation, etc. In some embodiments, the encoder can perform interpolation at the pixel level, e.g., by interpolating the values of the corresponding pixels of each pixel of the predicted BPU 208. The adjacent BPUs used for interpolation can be located in various directions relative to the original BPU, e.g., in the vertical direction (e.g., on top of the original BPU), horizontal direction (e.g., to the left of the original BPU), diagonal direction (e.g., bottom left, bottom right, top left, or top right of the original BPU), or any direction defined in the video coding standard being used. For intra prediction, the prediction data 206 can include, for example, the positions (e.g., coordinates) of the adjacent BPUs used, the sizes of the adjacent BPUs used, the parameters of the interpolation, the direction of the adjacent BPUs relative to the original BPU, etc.

[0079] For another example, at the time prediction stage 2044, the encoder may perform inter-frame prediction. For the original BPU of the current image, the prediction reference 224 may include one or more images (referred to as "reference images") that have been encoded (in the forward path) and reconstructed (in the reconstruction path). In some embodiments, the reference images may be encoded and reconstructed on a per-BPU basis. For example, the encoder may add the reconstructed residual BPU 222 to the prediction BPU 208 to generate a reconstructed BPU. When all the reconstructed BPUs of the same image have been generated, the encoder may generate a reconstructed image as a reference image. The encoder may perform an operation of "motion estimation" to search for a matching region within the range of the reference image (referred to as the "search window"). The position of the search window in the reference image may be determined based on the position of the original BPU in the current image. For example, the search window may be centered at a position in the reference image that has the same coordinates as the original BPU in the current image and may extend outward a predetermined distance. When the encoder identifies (e.g., by using a pel recursive algorithm, a block matching algorithm, etc.) a region in the search window that is similar to the original BPU, the encoder may determine such a region as the matching region. The matching region may have a different size (e.g., smaller, equal to, larger, or a different shape) than the original BPU. Since the reference image and the current image are temporally separated on the timeline (e.g., as Figure 1 shown), the matching region may be considered to "move" over time to the position of the original BPU. The encoder may record the direction and distance of this motion as a "motion vector". When multiple reference images are used (e.g., as in the image 06 in Figure 1 ), the encoder may search for the matching region and determine its associated motion vector for each reference image. In some embodiments, the encoder may assign weights to the pixel values of the matching regions of the respective matching reference images.

[0080] Motion estimation can be used to identify various types of motion, such as translation, rotation, scaling, etc. For inter-frame prediction, the prediction data 206 may include, for example, the position (e.g., coordinates) of the matching region, the motion vector associated with the matching region, the number of reference images, the weights associated with the reference images, etc.

[0081] To generate the predicted BPU 208, the encoder may perform an operation of "motion compensation". Motion compensation can be used to reconstruct the predicted BPU 208 based on the prediction data 206 (e.g., the motion vector) and the prediction reference 224. For example, the encoder may move the matching region of the reference image according to the motion vector, where the encoder may predict the original BPU of the current image. When multiple reference images are used (e.g., as in Figure 1In the image 06), the encoder can move the matching region of the reference image based on the respective motion vectors and average pixel values of the matching regions. In some embodiments, if the encoder has assigned weights to the pixel values of the matching regions of the respective matching reference images, the encoder can sum the weighted sums of the pixel values of the moved matching regions.

[0082] In some embodiments, the inter-frame prediction can be unidirectional or bidirectional. Unidirectional inter-frame prediction can use one or more reference images in the same temporal direction relative to the current image. For example, Figure 1 Image 104 in is an unidirectional inter-frame prediction image, where the reference image (i.e., image 102) is before image 04. Bidirectional inter-frame prediction can use one or more reference images in two temporal directions relative to the current image. For example, Figure 1 Image 106 in is a bidirectional inter-frame prediction image, where the reference images (i.e., images 104 and 08) are in two temporal directions relative to image 104.

[0083] Still referring to the forward path of process 200B, after the spatial prediction 2042 and the temporal prediction stage 2044, at the mode decision stage 230, the encoder can select a prediction mode (e.g., one of the intra-frame prediction or the inter-frame prediction) for the current iteration of process 200B. For example, the encoder can perform a rate-distortion optimization technique, where the encoder can select a prediction mode to minimize the value of a cost function based on the bit rate of the candidate prediction modes and the distortion of the reconstructed reference images under the candidate prediction modes. According to the selected prediction mode, the encoder can generate the corresponding prediction BPU 208 and prediction data 206.

[0084] In the reconstruction path of process 200B, if an intra prediction mode has been selected in the forward path, after generating the prediction reference 224 (e.g., the current BPU that has been encoded and reconstructed in the current image), the encoder can directly feed the prediction reference 224 to the spatial prediction stage 2042 for later use (e.g., for interpolating the next BPU of the current image). If an inter prediction mode has been selected in the forward path, after generating the prediction reference 224 (e.g., the current image in which all BPUs have been encoded and reconstructed), the encoder can feed the prediction reference 224 to the loop filter stage 232. At this stage, the encoder can apply a loop filter to the prediction reference 224 to reduce or eliminate the distortion introduced by inter prediction (e.g., blocking artifacts). The encoder can apply various loop filter techniques at the loop filter stage 232, such as deblocking, sample adaptive compensation, adaptive loop filter, etc. The loop-filtered reference image can be stored in the buffer 234 (or "decoded image buffer") for later use (e.g., as an inter prediction reference image for future images of the video sequence 202). The encoder can store one or more reference images in the buffer 234 for use at the temporal prediction stage 2044. In some embodiments, the encoder can encode the parameters of the loop filter (e.g., loop filter strength) as well as the quantized transform coefficients 216, prediction data 206, and other information at the binary encoding stage 226.

[0085] Figure 3A FIG. shows a schematic diagram of an exemplary decoding process 300A according to an embodiment of the present disclosure. Process 300A may be a decompression process corresponding to Figure 2A the compression process 200A therein. In some embodiments, process 300A may be similar to the reconstruction path of process 200A. The decoder can decode the video bitstream 228 into a video stream 304 according to process 300A. The video stream 304 may be very similar to the video sequence 202. However, due to information loss during the compression and decompression processes (e.g., Figures 2A - 2B the quantization stage 214 therein), generally, the video stream 304 is different from the video sequence 202. Similar to Figures 2A - 2B processes 200A and 200B therein, the decoder can perform process 300A on each image encoded in the video bitstream 228 at the basic processing unit (BPU) level. For example, the decoder can perform process 300A in an iterative manner, where the decoder can decode the basic processing unit in one iteration of process 300A. In some embodiments, the decoder can perform process 300A in parallel for each region (e.g., regions 114-118) of each image encoded in the video bitstream 228.

[0086] As Figure 3AAs shown, the decoder may feed a portion of the video bitstream 228 associated with a basic processing unit of the encoded image (referred to as an "encoded BPU") into the binary decoding stage 302, where the decoder may decode the portion into prediction data 206 and quantized transform coefficients 216. The decoder may feed the quantized transform coefficients 216 into the inverse quantization stage 218 and the inverse transform stage 220 to generate a reconstructed residual BPU 222. The decoder may feed the prediction data 206 into the prediction stage 204 to generate a predicted BPU 208. The decoder may add the reconstructed residual BPU 222 to the predicted BPU 208 to generate a prediction reference 224. In some embodiments, the prediction reference 224 may be stored in a buffer (e.g., a decoded image buffer in a computer memory). The decoder may feed the prediction reference 224 into the prediction stage 204 for performing prediction operations in the next iteration of process 300A.

[0087] The decoder may iteratively execute process 300A to decode each encoded BPU of the encoded image and generate a prediction reference 224 for the next encoded BPU of the encoded image. After decoding all the encoded BPUs of the encoded image, the decoder may output the image to the video stream 304 for display and continue to decode the next encoded image in the video bitstream 228.

[0088] In the binary decoding stage 302, the decoder may perform the inverse operations of the binary encoding techniques used by the encoder (e.g., entropy encoding, variable length encoding, arithmetic encoding, Huffman encoding, context adaptive binary arithmetic encoding, or any other lossless compression algorithm). In some embodiments, in addition to the prediction data 206 and the quantized transform coefficients 216, the decoder may decode other information in the binary decoding stage 302, such as prediction mode, parameters of the prediction operation, transform type, parameters of the quantization process (e.g., quantization parameter), encoder control parameters (e.g., bitrate control parameter), etc. In some embodiments, if the video bitstream 228 is transmitted in packets over a network, the decoder may unpack the video bitstream 228 before feeding it into the binary decoding stage 302.

[0089] Figure 3B A schematic diagram of another example decoding process 300B according to an embodiment of the present disclosure is shown. Process 300B may be modified from process 300A. For example, process 300B may be used by a decoder compliant with a hybrid video coding standard (e.g., the H.26x series). Compared with process 300A, process 300B additionally divides the prediction stage 204 into a spatial prediction stage 2042 and a temporal prediction stage 2044, and additionally includes a loop filtering stage 232 and a buffer 234.

[0090] In process 300B, for the encoded basic processing unit (referred to as the "current BPU") of the decoded encoded image (referred to as the "current image"), the prediction data 206 decoded by the decoder from the binary decoding stage 302 can include various types of data, depending on what prediction mode the encoder uses to encode the current BPU. For example, if the encoder uses intra prediction to encode the current BPU, the prediction data 206 can include a prediction mode indicator (e.g., a flag value) indicating intra prediction, parameters of the intra prediction operation, etc. The parameters of the intra prediction operation can include, for example, the positions (e.g., coordinates) of one or more adjacent BPUs used as references, the sizes of the adjacent BPUs, interpolation parameters, the directions of the adjacent BPUs relative to the original BPU, etc. For another example, if the encoder uses inter prediction to encode the current BPU, the prediction data 206 can include a prediction mode indicator (e.g., a flag value) indicating inter prediction, parameters of the inter prediction operation, etc. The parameters of the inter prediction operation can include, for example, the number of reference images associated with the current BPU, the weights respectively associated with the reference images, the positions (e.g., coordinates) of one or more matching regions in the respective reference images, one or more motion vectors respectively associated with the matching regions, etc.

[0091] Based on the prediction mode indicator, the decoder can decide whether to perform spatial prediction (e.g., intra prediction) in the spatial prediction stage 2042 or temporal prediction (e.g., inter prediction) in the temporal prediction stage 2044. The details of performing such spatial prediction or temporal prediction are described in Figure 2B and will not be repeated hereinafter. After performing such spatial prediction or temporal prediction, the decoder can generate a predicted BPU 208. The decoder can add the predicted BPU 208 and the reconstructed residual BPU 222 to generate a prediction reference 224, as described in Figure 3A

[0092] In process 300B, the decoder can feed the prediction reference 224 to the spatial prediction stage 2042 or the temporal prediction stage 2044 for performing prediction operations in the next iteration of process 300B. For example, if the current BPU is decoded using intra prediction in the spatial prediction stage 2042, after generating the prediction reference 224 (e.g., the decoded current BPU), the decoder can directly feed the prediction reference 224 to the spatial prediction stage 2042 for later use (e.g., for interpolating the next BPU of the current image). If the current BPU is decoded using inter prediction in the temporal prediction stage 2044, after generating the prediction reference 224 (e.g., the reference image in which all BPUs are decoded), the encoder can feed the prediction reference 224 to the loop filter stage 232 to reduce or eliminate distortion (e.g., blocking artifacts). The decoder can, as Figure 2B ​Apply the loop filter to the prediction reference 224 in the manner shown. The reference image for loop filtering can be stored in buffer 234 (e.g., the decoded picture buffer in a computer memory) for later use (e.g., as an inter-prediction reference image for future coded pictures of the video bitstream 228). The decoder can store one or more reference images in buffer 234 for use at the temporal prediction stage 2044. In some embodiments, when the prediction mode indicator of the prediction data 206 indicates that inter-prediction is used to encode the current BPU, the prediction data may further include parameters of the loop filter (e.g., loop filter strength).

[0093] Figure 4 is a block diagram of an example apparatus 400 for encoding or decoding video according to an embodiment of the present disclosure. As Figure 4 shown, the apparatus 400 may include a processor 402. When the processor 402 executes the instructions described herein, the apparatus 400 may become a dedicated machine for video encoding or decoding. The processor 402 may be any type of circuit capable of manipulating or processing information. For example, the processor 402 may include any number of central processing units (or "CPUs"), graphics processing units (or "GPUs"), neural processing units ("NPUs"), microcontroller units ("MCUs"), optical processors, programmable logic controllers, microprocessors, digital signal processors, intellectual property (IP) cores, programmable logic arrays (PLAs), programmable array logic (PALs), generic array logic (GALs), complex programmable logic devices (CPLDs), a field programmable gate array (FPGA), a system on a chip (SoC), an application specific integrated circuit (ASIC), etc., in any combination. In some embodiments, the processor 402 may also be a group of processors grouped as a single logic component. For example, as Figure 4 shown, the processor 402 may include multiple processors, including processor 402a, processor 402b, and processor 402n.

[0094] The apparatus 400 may also include a memory 404 configured to store data (e.g., instruction sets, computer code, intermediate data, etc.). For example, as Figure 4As shown, the stored data may include program instructions (e.g., for implementing the stages in processes 200A, 200B, 300A, or 300B) and data for processing (e.g., video sequence 202, video bitstream 228, or video stream 304). The processor 402 may access the program instructions and data for processing (e.g., via bus 410) and execute the program instructions to perform operations or manipulations on the data for processing. The memory 404 may include high-speed random access storage devices or non-volatile storage devices. In some embodiments, the memory 404 may include any combination of any number of random access memories (RAMs), read-only memories (ROMs), optical discs, magnetic disks, hard disk drives, solid state drives, flash drives, secure digital (SD) cards, memory sticks, compact flash (CF) cards, etc. The memory 404 may also be a set of memories grouped as a single logical component ( Figure 4 not shown).

[0095] The bus 410 may be a communication device for transferring data between components inside the device 400, such as an internal bus (e.g., CPU-memory bus), an external bus (e.g., universal serial bus port, peripheral component interconnect express port), or the like.

[0096] For ease of explanation without ambiguity, in this disclosure, the processor 402 and other data processing circuits are collectively referred to as "data processing circuits". The data processing circuits may be implemented entirely in hardware or as a combination of software, hardware, or firmware. In addition, the data processing circuits may be a single stand-alone module or may be fully or partially incorporated into any other component of the device 400.

[0097] The device 400 may also include a network interface 406 to provide wired or wireless communication with a network (e.g., the Internet, an intranet, a local area network, a mobile communication network, etc.). In some embodiments, the network interface 406 may include any combination of any number of network interface controllers (NICs), radio frequency (RF) modules, transponders, transceivers, modems, routers, gateways, wired network adapters, wireless network adapters, Bluetooth adapters, infrared adapters, near field communication ("NFC") adapters, cellular network chips, etc.

[0098] In some embodiments, optionally, the device 400 may further include a peripheral interface 408 to provide connections to one or more peripheral devices. As Figure 4 shown, the peripheral devices may include, but are not limited to, cursor control devices (e.g., a mouse, a touchpad, or a touchscreen), a keyboard, a display (e.g., a cathode ray tube display, a liquid crystal display, or a light emitting diode display), a video input device (e.g., a camera or an input interface coupled to a video archive), etc.

[0099] It should be noted that a video codec (e.g., the codec that executes processes 200A, 200B, 300A, or 300B) can be implemented as any combination of any software or hardware modules in device 400. For example, some or all stages of processes 200A, 200B, 300A, or 300B can be implemented as one or more software modules of device 400, such as program instances that can be loaded into memory 404. For another example, some or all stages of processes 200A, 200B, 300A, or 300B can be implemented as one or more hardware modules of device 400, such as dedicated data processing circuits (e.g., FPGA, ASIC, NPU, etc.).

[0100] In the quantization and inverse quantization functional blocks (e.g., Figure 2A or Figure 2B the quantization 214 and inverse quantization 218 of Figure 3A or Figure 3B the inverse quantization 218 of ), the quantization parameter (QP) is used to determine the amount of quantization (and inverse quantization) applied to the prediction residual. The initial QP value used to encode an image or a slice can be signaled at a higher level, e.g., using the init_qp_minus26 syntax element in the picture parameter set (PPS) and using the slic_qp_delta syntax element in the slice header. In addition, the delta QP values sent in the granularity of quantization groups can be used to adapt the QP value for each CU at the local level.

[0101] Equirectangular projection (“ERP”) formats such as etc. are common projection formats for representing 360-degree videos and images. This projection maps the meridians to vertical lines with a constant spacing and the latitude circles to horizontal lines with a constant spacing. Since the relationship between the position of an image pixel on the map and its corresponding geographical location on the sphere is particularly simple, ERP is one of the most common projections for 360-degree videos and images.

[0102] The algorithm descriptions of the projection format conversion and video quality metrics output by JVET give the coordinate conversion between ERP and the sphere and an introduction. For the 2D to 3D coordinate conversion, given a sampling position (m, n), (u, v) can be calculated according to the following formulae. u = (m + 0.5) / W, 0 ≤ m < W Formula (1) v = (n + 0.5) / H, 0 ≤ n < H Formula (2)

[0103] Then, the longitude and latitude (φ, θ) on the sphere can be calculated from (u, v) according to the following formulae. φ = (u - 0.5) × (2 × π) Formula (3) θ = (0.5 - v) × π Equation (4)

[0104] The coordinates (X, Y, Z) can be calculated according to the following formulas. X = cos(θ)cos(φ) Equation (5) Y = sin(θ) Equation (6) Z = -cos(θ)sin(φ) Equation (7)

[0105] For the 3D to 2D coordinate conversion starting from (X, Y, Z), (φ, θ), it can be calculated according to the following equations. Then, (u, v) are calculated according to Equations (3) and (4). Finally, (m, n) can be calculated according to Equations (1) and (2). Φ = tan -1 (-Z / X) Equation (8) θ = sin -1 (Y / (X 2 + Y 2 + Z 2 ) 1 / 2 ) Equation (9)

[0106] To reduce the seam artifacts in the reconstructed viewport that includes the left and right boundaries of the ERP image, a new format called Padding Equirectangular Projection ("PERP") is provided by padding samples on both the left and right sides of the ERP image.

[0107] When representing a 360 - degree video using PERP, the PERP image is encoded. After decoding, the reconstructed PERP is converted back to the reconstructed ERP by blending the replicated samples or cropping the padded regions.

[0108] Figure 5A A schematic diagram showing an example blending operation for generating a reconstructed equirectangular projection according to some embodiments of the present disclosure is shown. Unless otherwise specified, "recPERP" is used to represent the reconstructed PERP before post - processing, and "recERP" is used to represent the reconstructed ERP after post - processing. As Figure 5A shown, the replicated samples of recPERP can be blended by applying a distance - based weighted average operation. For example, region A can be generated by blending region A1 and A2, while region B can be generated by blending region B1 and B2.

[0109] In the following description, the width and height of the unfilled recERP are respectively represented as "W" and "H". The left and right padding widths are respectively represented as "P L " and "P R ". The total padding width is represented as "P w ", which can be P L and PR The sum. In some embodiments, recPERP can be converted to recERP through a mixing operation. For example, for the sample recERP(j, i) in A where i = [0, P R-1 and j = [0, H - 1], recERP(j, i) can be determined according to the following formula. A = w × A1 + (1 - w) × A2, where w ranges from P L / P W to 1 Formula (10) recERP(j, i) in A = (recPERP(j, i + P L ) × (i + P L ) + recPERP(j, i + P L+W ) × (P R-i )(P w ) / P w Formula (11)

[0110] In some embodiments, for the sample recERP(j, i) in B, where i = [W - P L , W - 1] and j = [0, H - 1], recERP(j, i) can be generated according to the following formula. B = k × B1(1 - k) × B2, where k ranges from 0 to P L / P W Formula (12) recERP(j, i) in B = (recPERP(j, i + P L ) x (P R-i + W) + recPERP(j, i + P L-W ) × (i – W + P L )(P w ) / P w Formula (13)

[0111] Figure 5B FIG. shows a schematic diagram of an example cropping operation for generating a reconstructed equirectangular projection according to some embodiments of the present disclosure. As Figure 5B shown, during the cropping process, the padding samples in recPERP can be directly discarded to obtain recERP. For example, the padding samples B1 and A2 can be discarded, and the padding area A is equal to A1, while the padding area B is equal to b2.

[0112] In some embodiments, horizontal wrap-around motion compensation can be used to improve the ERP coding performance. For example, horizontal wrap-around motion compensation can be used as a 360-specific coding tool in the VVC standard, which is designed to improve the visual quality of the reconstructed 360-degree video in the ERP format or the PERP format. In traditional motion compensation, when the motion vector references samples outside the image boundary of the reference image, repeated padding is applied to derive the values of the out-of-boundary samples by copying from those nearest neighbors on the corresponding image boundary. For 360-degree video, this method of repeated padding is not appropriate and may result in visual artifacts called "seam artifacts" in the reconstructed viewport video. Since 360-degree video is captured on a sphere and inherently has no "boundary", the reference samples outside the reference image boundary in the projection domain can be obtained from adjacent samples in the spherical domain. For a general projection format, it may be difficult to derive the corresponding adjacent samples in the spherical domain because it involves 2D-to-3D and 3D-to-2D coordinate conversions, as well as sample interpolation at fractional sample positions. This problem can be solved for the ERP or PERP projection format of the left and right boundaries because the spherical neighbors outside the left image boundary can be obtained from the samples within the right image boundary and vice versa. Given the wide use of the ERF or PERP projection format and the relatively easy implementation, the VVC adopts horizontal wrap-around motion compensation to improve the visual quality of 360-degree video encoded in the ERP or PERP projection format.

[0113] Figure 6A FIG. shows a schematic diagram of an exemplary horizontal wrap-around motion compensation process for equirectangular projection according to some embodiments of the present disclosure. As Figure 6A shown, when a part of the reference block is outside the left (or right) boundary of the reference image in the projection domain, the "out-of-boundary" part can be obtained from the corresponding spherical neighbors within the reference image to the right (or left) boundary in the projection domain, instead of repeated padding. In some embodiments, repeated padding is only used for the top and bottom image boundaries.

[0114] Figure 6B FIG. shows a schematic diagram of an exemplary horizontal wrap-around motion compensation process for filling equirectangular projection according to some embodiments of the present disclosure. As Figure 6BAs shown, horizontal wrap-around motion compensation can be combined with non-normative padding methods commonly used in 360-degree video coding. In some embodiments, this is achieved by signaling high-level syntax elements to indicate a wrap-around motion compensation offset, which can be set to the ERP image width before padding. The syntax can accordingly be used to adjust the position of the horizontal wrap-around. In some embodiments, the syntax is not affected by a specific amount of padding on the left or right image boundaries. As a result, this syntax can naturally support asymmetric padding of EIRE images. In asymmetric padding of ERP images, the padding on the left and right is different. In some embodiments, the wrap-around motion compensation can be determined according to the following equation: where the offset can be the wrap-around motion compensation offset signaled in the bitstream, picW can be the image width including the padding area before encoding, pos x can be the reference position determined by the current block position and the motion vector, and the output of the formula pos x _wrap can be the actual reference position from which the reference block comes for wrap-around motion compensation. To save the overhead of signaling the wrap-around motion compensation offset, it can be in units of the minimum luminance coded block. Therefore, the offset can be replaced by offset w ×MinCbSizeY, where the offset offset w is the wrap-around motion compensation offset in units of the minimum luminance coded block signaled in the bitstream, and MinCbSizeY is the size of the minimum luminance coded block. In contrast, in traditional motion compensation, the actual reference position where the reference block is located can be directly derived by clipping pos x within 0 to picW - 1.

[0115] When the reference samples are outside the left and right boundaries of the reference image, horizontal wrap-around motion compensation can provide more meaningful information for motion compensation. Under common test conditions for 360-degree video, this tool can improve the compression performance not only in terms of rate distortion but also in terms of reducing seam artifacts and the subjective quality of the reconstructed 360-degree video. Horizontal wrap-around motion compensation can also be used in other single-sided projection formats with a constant sampling density in the horizontal direction, such as the adjusted equal-area projection.

[0116] In some embodiments, restrictions are imposed on the wrap-around motion compensation offset. The value of the offset can be derived from the range of (CtbSizeY / MinCbSizeY + 2) to (pic_width_in_luma_samples / MinCbSizeY). Here, the variable "CtbSizeY" refers to the luma size of the coding tree block ("CTB"), the variable "MinCbSizeY" refers to the minimum size of the luma coding block, and the variable "pic_width_in_luma_sampies" refers to the image width in luma samples, to avoid unnecessary repeated wrap-around in practical applications, thus imposing a burden on hardware implementation.

[0117] Figure 7 The syntax of an example sequence parameter set for wrap-around motion compensation according to some embodiments of the present disclosure is shown. As Figure 7 shown, in VVC (e.g., VVC Draft 7), for wrap-around motion compensation, the enable flag "sps_ref_wraparound_enabled_flag" and the offset "sps_ref_wraparound_offset_minus1" can be signaled in the sequence parameter set ("SPS").

[0118] Figure 8 The semantics of an example sequence parameter set for wrap-around motion compensation according to some embodiments of the present disclosure are shown. It should be understood that Figure 8 the semantics shown in Figure 7 can correspond to Figure 8 the syntax shown in

[0119] In some embodiments, as Figure 8 shown, Adding 1 to “sps_ref_wraparound_offset_minus1” can represent the offset for calculating the horizontal wraparound position in units of “MinCbSizeY” luma samples. In some embodiments, the value of ref_wraparound_offset_minus1 is in the range of (CtbSizeY / MinCbSizeY)1 to (“pic_width_in_luma_samples / MinCbSize - Y)-1, inclusive, where pic_width_in_luma_samples refers to the value of pic_width_in_luma_samples in any PPS of the reference SPS.

[0120] Figure 7 The syntax shown and Figure 8 The semantics shown have many problems. In particular, “sps_ref_wraparound_enabled_flag” and “sps_ref_wraparound_offset_minus1” are syntax elements signaled in the SPS, but there is a consistency constraint that depends on all “pic_width_in_luma_samples” signaled on the PPS. Limiting the values of SPS syntax element values by syntax elements in all associated PPSs can be problematic because the SPS is a higher-level syntax than the PPS, and generally a higher-level syntax should not refer to a lower-level syntax. Additionally, in some embodiments, wraparound motion compensation is controlled at the sequence level, but changing the image size is allowed in the VVC draft (e.g., VVC draft 7). Also, “sps_ref_wraparound_enabled_flag” can only be true when the widths of all images in the sequence referring to the SPS satisfy the constraint conditions. Therefore, even if only one frame does not meet the size condition, wraparound motion compensation cannot be used, which means the benefits of wraparound motion compensation for the entire sequence may be lost due to one frame.

[0121] In addition, in some embodiments, the range of "sps_ref_wraparound_offset_minus1" is from (CtbSizeY / MinCbSizeY)+1 to (pic_width_in_luma_samples / MinCbSizeY)–1. Thus, the minimum value of sps_ref_wraparound_offset_minus1 signaled in the bitstream is (CtbSizeY / MinCbSizeY)+1, which may not be a zero value. Generally, larger values rather than smaller values occupy more bits in signaling. Therefore, signaling a syntax element with a range value not starting from zero is inefficient.

[0122] Embodiments of the present disclosure provide an improved method for solving the above problems. Figure 9 Shown is the syntax of an example sequence parameter set for improved wrap-around motion compensation according to some embodiments of the present disclosure. In some embodiments, the signaling overhead of the wrap-around motion compensation ("MC") offset can be saved. To save the amount of bits dedicated to the wrap-around motion compensation offset, (CtbSizeY / MinCbSizeY)+2 can be subtracted from the wrap-around motion compensation offset before signaling the wrap-around motion compensation offset. Thus, the minimum value of this syntax element can be 0.

[0123] Figure 10 Shown is the semantics of an example sequence parameter set for improved wrap-around motion compensation according to some embodiments of the present disclosure. As Figure 10 shown, changes to the previous VVC are shown in italics. It should be understood that Figure 10 the semantics shown in Figure 9 can correspond to the syntax shown in

[0124] In some embodiments, as Figure 10 shown, "sps_ref_wraparound_enabled_flag" can indicate whether horizontal wrap-around motion compensation is applied in inter prediction. For example, a value of 1 indicates that horizontal wrap-around motion compensation is applied, and a value of 0 can indicate that horizontal wrap-around motion compensation is not applied. In some embodiments, when the value of (CtbSizeY / MinCbSizeY+1) is greater than (pic_width_in_luma_samples / MinCbSizeY-1), the value of "sps_ref_wraparound_enabled_flag" is equal to 0.

[0125] In some embodiments, as Figure 10As shown, adding "(CtbSizeY / MinCbSizeY)+2" to "sps_ref_wraparound_offset" can indicate an offset used to calculate the horizontal wrap-around position in units of "MinCbSizeY" luma samples. The range of the "sps_ref_wraparound_offset" value can be from 0 to (pic_width_in_luma_samples / MinCbSizeY)-(CtbSizeY / MinCbSizeY)–2, inclusive, where pic_width_in_luma_samples refers to the value of pic_width_in_luma_samples in any PPS of the reference SPS.

[0126] As described above, another problem with traditional designs is that even if an image in a video sequence has dimensions that violate the consistency requirements, wrap-around MC is disabled for all images in the video sequence. In some embodiments, the constraints on the syntax element values are removed. First, a control flag for wrap-around motion compensation sps_ref_wraparound_enabied_flag is signaled in the SPS. In some embodiments, if the sps_ref_wraparound_enabled_flag is true, the offset amount sps_ref_wraparound_offset_minus1 is signaled.

[0127] Figure 11 The semantics of an example sequence parameter set for improved wrap-around motion compensation with a maximum image width according to some embodiments of the present disclosure are shown. As Figure 11 shown, changes to the previous VVC are shown in italics, and the proposed deletion semantics are further shown in strikethrough.

[0128] In some embodiments, as Figure 11 shown, the "sps_ref_wraparound_enabled_flag" can indicate whether horizontal wrap-around motion compensation is applied in inter prediction. For example, a value of 1 can indicate that horizontal wrap-around motion compensation is applied in inter prediction, and a value of 0 indicates that it is not applied.

[0129] In some embodiments, as Figure 11As shown, adding 1 to "sps_ref_wraparound_offset_minus1" can indicate the maximum value of the offset used to calculate the horizontal wraparound position in units of "MinCbSizeY" luma samples. In some embodiments, the value of "sps_ref_wraparound_offset_minus1" is in the range from (CtbSizeY / MinCbSizeY)+1 to (pic_width_max_in_luma_samples / MinCbSizeY)–1, inclusive.

[0130] In some embodiments, "pic_width_max_in_luma_samples" refers to the maximum width in luma samples of each decoded picture with reference to the SPS.

[0131] In some embodiments, for each picture of a sequence, two variables "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset" can be defined. Figure 12 The derivation of the variables "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset" according to some embodiments of the present disclosure is shown. As Figure 12 As shown, "pic_width_in_luma_samples" refers to the width of the picture that references the PPS in which "pic_width_in_luma_samples" is signaled.

[0132] In some embodiments, as Figure 12 shown, the variable "PicRefWraparoundEnableFlag" can be used to determine whether wraparound MC can be enabled for the current picture. For example, if the value of "PicRefWrapraoundEnableFlag" indicates that wraparound MC can be enabled for the current picture, the offset "PicRefWraparoundOffset" is used during the motion compensation process.

[0133] Figure 13 An example derivation of sample positions for motion compensation according to some embodiments of the present disclosure is shown. As Figure 13 shown, the sample position (xlnt i , ylnt i ) is the sample position before wraparound, and the sample position (xlnt i , ylnt i)。In some embodiments, the variable "picW" is equal to the variable "pic_width_in_luma_samples". In some embodiments, the functions "ClipH" and "Clip3" can be performed according to Figure 13 the formulas shown.

[0134] In some embodiments, the loop motion compensation control flag can still be signaled in the SPS, but the loop motion compensation offset is signaled in the PPS instead of the SPS. Figure 14 shows the syntax of an example sequence parameter set and picture parameter set for loop motion compensation with a loop motion compensation offset in the picture parameter set according to some embodiments of the present disclosure. As Figure 14 shown, changes to the previous VVC are shown in italics, and syntax proposed for deletion is further shown with a strike-through. In some embodiments, as Figure 14 shown, "sps_ref_wraparound_enabled_flag" is signaled in the SPS and "pps_ref_wraparound_offset_minus1" is signaled in the PPS.

[0135] Figure 15 shows the semantics of an example sequence parameter set and picture parameter set for loop motion compensation with a loop motion compensation offset in the picture parameter set according to some embodiments of the present disclosure. As Figure 15 shown, changes to the previous VVC are shown in italics, and semantics proposed for deletion are further shown with a strike-through. It should be understood that Figure 15 the syntax shown in Figure 14 corresponds to the syntax shown in

[0136] In some embodiments, as Figure 15 shown, "sps_ref_wraparound_enabled_flag" indicates whether horizontal loop motion compensation is applied in inter prediction. For example, a value of 1 indicates that horizontal loop motion compensation can be applied, and a value of 0 can indicate that horizontal loop motion compensation is not applied.

[0137] In some embodiments, as Figure 15As shown, "pps_ref_wraparound_offset_minus1 plus 1 represents the offset used to calculate the horizontal wraparound position in units of 'MinCbSizeY' luma samples. In some embodiments, when'sps_ref_wraparound_enabled_flag' is equal to 0 or the value of CtbSizeY / MinCbSizeY + 1 is greater than (pic_width_in_luma_samples / MinCbSizeY - 1), 'pps_ref_wraparound_offset_minus1' is equal to 0. Otherwise, The range of "pps_ref_wraparound_offset_minus1" is from (CtbSizeY / MinCbSizeY) + 1 to (pic_width_in_luma_samples / MinCbSizeY) – 1, inclusive.

[0138] In some embodiments, for each picture of a sequence, two variables "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset" can be defined. In some embodiments, "PicRefWraparoundEnableFlag" can be determined as shown in Figure 12 In some embodiments, "PicRefWraparoundOffset" can be determined as "pps_ref_wraparound_offset_minus1" plus 1.

[0139] In some embodiments, during the decoding process, "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset" can be used for wraparound motion compensation. For example, the sample position (xint i , ylnt i ) for motion compensation can be derived in the manner shown in Figure 13 As shown in Figure 13 In some embodiments, the variable "picW" can be equal to "pic_width_in_luma_samples".

[0140] In some embodiments, the wraparound motion compensation control flag can still be signaled, but the wraparound motion compensation offset is signaled in the PPS instead of the SPS. Additionally, "pps_ref_wraparound_offset" can also indicate the use of the picture referring to the PPS for wraparound motion compensation. Figure 16Shows the syntax of an example sequence parameter set for improved wrap-around motion compensation without wrap-around motion compensation offset according to some embodiments of the present disclosure. As Figure 16 shown, changes to the previous VVC are shown in italics, and the proposed deletion syntax is further shown with a strikethrough. As Figure 14 shown, the "sps_ref_wraparound_enabled_flag" can be signaled in the SPS.

[0141] Figure 17 Shows the syntax of an example picture parameter set for improved wrap-around motion compensation with wrap-around motion compensation offset according to some embodiments of the present disclosure. As Figure 17 shown, changes to the previous VVC are shown in italics, and it can be understood that Figure 17 the PPS shown in Figure 16 corresponds to the SPS shown in Figure 17 shown, the "pps_ref_wraparound_offset" can be signaled in the PPS. In some embodiments, the "pps_ref_wraparound_offset" signaled in the PPS can also indicate the use of wrap-around motion compensation for the picture referencing the PPS. In other words, the encoder can disable wrap-around motion compensation at the PPS level by setting pps_ref_wraparound_offset to a special value.

[0142] Figure 18 Shows the semantics of an example sequence parameter set and picture parameter set for improved wrap-around motion compensation with wrap-around motion compensation offset in the picture parameter set according to some embodiments of the present disclosure. As Figure 18 shown, changes to the previous VVC are shown in italics, and the proposed deletion semantics are further shown with a strikethrough. It should be understood that Figure 18 the semantics shown in Figure 18 can correspond to the syntax shown in

[0143] In some embodiments, as Figure 18 shown, the "sps_ref_wraparound_enabled_flag" can indicate whether horizontal wrap-around motion compensation is applied in inter prediction. For example, a value of 1 can indicate that horizontal wrap-around motion compensation is applied in inter prediction, and a value of 0 can indicate that horizontal wrap-around motion compensation is not applied.

[0144] In some embodiments, as Figure 18As shown, adding 1 to "pps_ref_wraparound_offset" can represent the value of the offset used to calculate the horizontal wraparound position in units of MinCbSizeY luma samples. For example, when "pps_ref_wraparound_offset" is equal to 0, wraparound motion compensation is disabled. When "sps_ref_wraparound_enabled_flag" is equal to 0 or the value of (CtbSizeY / MinCbSizeY + 1) is greater than (pic_width_in_luma_samples / MinCbSizeY - 1), "pps_ref_wraparound_offset" is equal to 0. Otherwise, the value of "pps_ref_wraparound_offset" ranges from (CtbSizeY / MinCbSizeY) + 1 to (pic_width_in_luma_samples / MinCbSizeY) – 1, inclusive.

[0145] In some embodiments, for each picture of a sequence, two variables, "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset", may be defined. Figure 19 An example derivation of the variables "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset" according to some embodiments of the present disclosure is shown.

[0146] In some embodiments, during the decoding process, "PicRefWraparoundEnableFlag" and "PicRefWraparoundOfFsef" can be used for wraparound motion compensation. For example, the sample position (xlnti, ylnti) used for motion compensation can be derived in the Figure 11 way shown. As Figure 11 shown, in some embodiments, the variable "picW" can be equal to "pic_width_in_luma_samples"

[0147] In some embodiments, the syntax is changed. The wraparound motion compensation control flag can still be signaled in the SPS, but the wraparound motion compensation offset is signaled in the PPS instead of the SPS. Additionally, a PPS-level wraparound motion compensation control flag can also be signaled. Figure 20 The syntax of an example sequence parameter set for improved wraparound motion compensation without a wraparound motion compensation offset in the sequence parameter set according to some embodiments of the present disclosure is shown. As Figure 20As shown, changes to the previous VVC are shown in italics, and the proposed deletion syntax is further shown with a strikethrough. As Figure 20 shown, "sps_ref_wraparound_enabled_flag" can be signaled in the SPS.

[0148] Figure 21 The syntax of an example picture parameter set for improved wrap-around motion compensation with a wrap-around control flag according to some embodiments of the present disclosure is shown. As Figure 21 shown, changes to the previous VVC are shown in italics. As Figure 21 shown, "pps_ref_wraparound_enabled_flag" can be signaled in the PPS. In some embodiments, if "pps_ref_wraparound_enabled_flag" is true (e.g., the value is equal to 1), then "pps_ref_wraparound_oflfsef" can be signaled.

[0149] Figure 22 The semantics of an example sequence parameter set and picture parameter set for improved wrap-around motion compensation with a wrap-around motion compensation flag in the picture parameter set are shown. As Figure 22 shown, changes to the previous VVC are shown in italics, and the proposed deletion semantics are further shown with a strikethrough. It can be understood that Figure 22 the semantics shown in Figure 21 correspond to the syntax shown in

[0150] In some embodiments, as Figure 22 shown, "sps_ref_wraparpund_enabled_flag" can indicate whether horizontal wrap-around motion compensation is applied in inter prediction. For example, a value of 1 indicates that horizontal wrap-around motion compensation can be applied in inter prediction, and a value of 0 indicates that no horizontal wrap-around motion compensation is applied.

[0151] In some embodiments, as Figure 22 shown, "pps_ref_wraparound_enabled_flag" equal to 1 indicates that horizontal wrap-around motion compensation is applied in inter prediction. "pps_ref_wraparound_enabled_flag" equal to 0 indicates that no horizontal wrap-around motion compensation is applied. In some embodiments, when "sps_ref_wrapound_enabled_flag is equal to 0 or the value of (CthSizeY / MinCbSizeY + 1) is greater than (pic_width_in_luma_samples / MinCbSizeY - 1), "pps_ref_wraparound_enabled_flag" is equal to 0.

[0152] In some embodiments, Figure 22 and Figure 23 show alternative semantics for the sequence parameter set and the picture parameter set. Figure 23 Shows the semantics of an exemplary sequence parameter set and picture parameter set for improved wraparound motion compensation with a wraparound control flag in the picture parameter set according to some embodiments of the present disclosure. As Figure 23 shown, changes to the previous VVC are shown in italics, and the proposed deleted semantics are further shown with a strikethrough. It should be understood that Figure 23 the semantics shown in Figure 20 and Figure 20 correspond to the syntax shown in

[0153] In some embodiments, as Figure 23 shown, "pps_ref_wraparound_enabled_flag" being equal to 1 may indicate that horizontal wraparound motion compensation is applied in inter prediction. "pps_ref_wraparound_enabled_flag" being equal to 0 may indicate that horizontal wraparound motion compensation is not applied. In some embodiments, when "sps_ref_wraparound_enabled_flag" is equal to 0 or the value of (CtbSizeY / MinCbSizeY + 1) is greater than (pic_width_in_luma_samples / MinCbSizeY - 1), "pps_ref_wraparound_enabled_flag" is 0. Otherwise, "pps_ref_wraparound_enabled_flag" is equal to 1.

[0154] In some embodiments, as Figure 23 shown, "pps_ref_wraparound_offset" plus (CtbSizeY / MinCbSizeY) + 2 may specify the value of the offset used to calculate the horizontal wraparound position in units of MinCbSizeY luma samples. In some embodiments, when present, the value of "pps_ref_wraparound_offset" may be in the range from 0 to (pic_width_in_luma_samples / MinCbSizeY) – (CtbSizeY / MinCbSizeY) – 2, including the end values.

[0155] In some embodiments, for each picture of a sequence, a variable "PicRefWraparoundOffset" can be defined. For example, "PicRefWraparoundOffset" can be derived as pps_ref_wraparound_offset_minus1 + 1.

[0156] In some embodiments, during the decoding process, the variables "pps_ref_wraparound_enabled_flag" and "PicRefWraparoundOffset" can be used for wraparound motion compensation. Figure 24 An example derivation of the variable "PicRefWraparoundoffset" according to some embodiments of the present disclosure is shown. As Figure 24 shown, the variable "PicRefWraparoundOffset" can be derived based on the variables "pps_ref_wraparound_offset", "CtbSizeY", and "MinCbSizeY". In some embodiments, the variable "PicRefWraparoundOffset" can also be used to determine the sample positions (xlnt i , ylnt i ) for motion compensation, similar to the sample positions shown in Figure 13 . As Figure 13 shown, the variable "picW" can be equal to "pic_width_in_luma_samples".

[0157] In some embodiments, the "sps_ref_wraparound_enabled_flag" can be removed, and the "pps_ref_wraparound_enabled_flag" and "pps_ref_wraparound_offset" can be retained.

[0158] In some embodiments, the restrictions on the value ranges of the "sps_ref_wraparound_enabled_flag" and "sps_ref_wraparound_offset_minus1" can be removed, and restrictions can be added to the value ranges of the picture sizes signaled in the SPS and PPS. Additionally, there is no syntax modification here. Figure 25 An example sequence parameter set and picture parameter set semantics for improved wraparound motion compensation with restrictions on the picture size according to some embodiments of the present disclosure are shown. As Figure 25 shown, the changes to the previous VVC are shown in italics, and the proposed deletion semantics are shown with a strikethrough.

[0159] In some embodiments, as Figure 25 shown, "pic_width_max_in_luma_samples" may indicate the maximum width in luma samples of each decoded picture with reference to the SPS. In some embodiments, "pic_width_max_in_luma_samples" may not be equal to 0 and may be an integer multiple of max(8, MinCbSizeY).

[0160] In some embodiments, as Figure 25 shown, "pic_height_max_in_luma_samples" may indicate the maximum height in luma samples of each decoded picture with reference to the SPS. In some embodiments, "pic_height_max_in_luma_samples" may not be equal to 0 and may be an integer multiple of max(8, MinCbSizeY).

[0161] In some embodiments, as Figure 25 shown, "sps_ref_wraparound_enabled_flag" being equal to 1 indicates that horizontal wraparound motion compensation can be applied in inter prediction, and "sps_ref_wraparound_enabled_flag" being equal to 0 indicates that horizontal wraparound motion compensation is not applied.

[0162] In some embodiments, "sps_ref_wraparound_offset_minus1" plus 1 may indicate the offset used to calculate the horizontal wraparound position in units of "MinChSizeY" luma samples. In some embodiments, "sps_ref_wraparound_offset_minus1" is greater than or equal to (CtbSizeY / MinChSizeY)+1.

[0163] In some embodiments, restrictions may be imposed on "pic_width_max_in_luma_samples", "CtbSizeY", and "MinCbSizeY". Figure 26 The semantics of an example sequence parameter set for improved wraparound motion compensation according to some embodiments of the present disclosure are shown, where the improved wraparound motion compensation has restrictions imposed on the variables "pic_width_max_in_luma_samples", "CtbSizeY", and "MinCbSizeY". As Figure 26 shown, changes to the previous VVC are shown in italics, and the proposed deletion semantics are further shown with strikethrough.

[0164] In some embodiments, restrictions may be imposed on the "pic_width_in_luma_samples" signaled in the PPS. Figure 27 The semantics of an example picture parameter set for improved loop motion compensation according to some embodiments of the present disclosure are shown, the improved loop motion compensation having restrictions imposed on the variable "pic_width_in_luma_samples". As Figure 27 shown, changes to the previous VVC are shown in italics, and proposed deleted semantics are further shown with a strike-through.

[0165] In some embodiments, as Figures 9 to 11 shown, the method can be combined with Figures 11 - 27 any method shown therein. Since a specified value (e.g., Figures 9 - 10 the method shown therein) has been subtracted from the loop motion compensation offset before signaling the loop motion compensation offset to reduce the signaling cost, when combining these methods, the range limits of the loop motion compensation offset signaled in the bitstream can also be changed. For example, the same specified value can be subtracted from the upper and lower limits. Additionally, if the lower limit after subtraction is zero, it can be removed because it can be guaranteed that the offset signaled in the bitstream is a non-negative value in the VVC standard (e.g., VVC draft 7).

[0166] Embodiments of the present disclosure also provide other methods for performing motion compensation. Figure 28 A flowchart of an example method for performing motion compensation according to some embodiments of the present disclosure is shown. It should be understood that Figure 28 the method 28000 shown therein can be performed according to Figure 9 and Figure 10 the syntax and semantics shown.

[0167] In step S28010, a sequence of images is received. The sequence is associated with a sequence of loop motion compensation flags and a sequence of loop motion compensation offsets. The minimum value of the sequence motion compensation loop motion compensation offset is 0. For example, as Figure 9 shown, to save the number of bits dedicated to the loop motion compensation offset, (CtbSizeY / MinCbSizeY)+2 can be subtracted from the loop motion compensation offset before signaling the loop motion compensation offset. Thus, the minimum value of this syntax element can be 0.

[0168] In step S28020, it is determined whether the sequence of loop motion compensation flags is enabled.

[0169] In step S28030, in response to enabling the sequence wraparound motion compensation flag, perform wraparound motion compensation on the images in the image sequence according to the sequence wraparound motion compensation offset. In some embodiments, perform the motion compensation according to the VVC standard.

[0170] Embodiments of the present disclosure further disclose a method for performing motion compensation with a limited range for the sequence wraparound motion compensation offset. Figure 29 A flowchart showing an example method for performing motion compensation with a limited range for the sequence wraparound motion compensation offset according to some embodiments of the present disclosure is shown. It should be understood that Figure 29 the method 29000 shown in Figure 11 can be executed according to the semantics shown.

[0171] In step S29010, receive a sequence of images. The sequence is associated with a sequence wraparound motion compensation flag and a sequence wraparound motion compensation offset. Limit the range of the sequence wraparound motion compensation offset according to the maximum width of the images in the image sequence. For example, as Figure 11 shown, "pic_width_max_m_luma_samples" can represent the maximum width in luma samples of each decoded image with reference to the SPS. The value range of "sps_ref_wraparound_offset_minus1" can be from (CtbSizeY / MinCbSizeY)1 to (pic_width_max_in_luma_samples / MinCbSizeY)-1, inclusive of the end values.

[0172] In step S29020, determine whether the sequence wraparound motion compensation flag is enabled.

[0173] In step S29030, in response to enabling the sequence wraparound motion compensation flag, perform wraparound motion compensation on the images in the image sequence according to the sequence wraparound motion compensation offset. In some embodiments, perform the motion compensation according to the VVC standard. In some embodiments, wraparound motion compensation can be performed on multiple images in the image sequence, and the multiple images can have different sizes. In some embodiments, in response to enabling the image wraparound enable flag, perform wraparound motion compensation on the image according to the sequence wraparound motion compensation offset. The image wraparound enable flag can be determined according to the sequence wraparound motion compensation flag. For example, as Figure 12 shown, the image wraparound enable flag can be determined from a formula including the variable "sps_ref_wraparound_enabled_flag".

[0174] Embodiments of the present disclosure are also used for a method of performing motion compensation on an image associated with a sequence wrap-around motion compensation offset. Figure 30 FIG. shows a flowchart of an example method for performing motion compensation on an image associated with a sequence wrap-around motion compensation offset according to some embodiments of the present disclosure. It should be understood that Figure 30 the method 30000 shown in Figure 14 and Figure 15 can be performed according to the syntax and semantics shown in

[0175] In step S30010, an image sequence is received. The sequence is associated with a sequence wrap-around motion compensation flag, and the images in the sequence are associated with an image wrap-around motion compensation offset. For example, as Figure 14 shown, a new variable "pps_ref_wraparound_offset" can be included in the picture parameter set.

[0176] In step S30020, it is determined whether the sequence wrap-around motion compensation flag is enabled.

[0177] In step S30030, in response to enabling the sequence wrap-around motion compensation flag, wrap-around motion compensation is performed on the images in the image sequence according to the sequence wrap-around motion compensation offset. In some embodiments, motion compensation is performed according to the VVC standard. In some embodiments, wrap-around motion compensation can be performed on multiple images in the image sequence, and the multiple images can have different sizes.

[0178] In some embodiments, in response to enabling the image wrap-around enable flag, wrap-around motion compensation of the image is performed according to the sequence wrap-around motion compensation offset. The image wrap-around enable flag can be determined according to the sequence wrap-around motion compensation flag. For example, as Figure 12 shown, the image wrap-around enable flag can be determined according to a formula including the variable "sps_ref_wraparound_enabled_flag". In some embodiments, the minimum value of the image wrap-around motion compensation offset is 0. For example, as Figure 18 shown. As Figure 18 shown, the minimum value of the variable "pps_ref_wraparound_offset" can be 0.

[0179] In some embodiments, the image is associated with an image wrap-around motion compensation flag. In response to enabling the image wrap-around motion compensation flag, wrap-around motion compensation can be performed on the image according to the image wrap-around motion compensation offset. For example, as Figure 21 shown, a new variable "pps_ref_wraparound_enabled_flag" can be added to the picture parameter set. As Figure 22As shown, the variable "pps_ref_wraparound_enabled_flag" can indicate whether horizontal wraparound motion compensation is applied at the picture level. In some embodiments, in response to enabling the picture wraparound motion compensation flag, the picture wraparound motion compensation offset can be signaled.

[0180] Embodiments of the present disclosure also provide a method for performing motion compensation with a limited maximum picture size. Figure 31 A flowchart of an example method for performing motion compensation with a limited maximum picture size according to some embodiments of the present disclosure is shown. It should be understood that Figure 31 the method 31000 shown in can be executed according to Figure 25 the semantics shown.

[0181] In step S31010, a picture sequence is received. The pictures are associated with a sequence wraparound motion compensation flag, and the pictures in the sequence are associated with a picture wraparound motion compensation offset.

[0182] In step S31020, it is determined whether the sequence wraparound motion compensation flag is enabled.

[0183] In step S31030, in response to enabling the sequence wraparound motion compensation flag, wraparound motion compensation is performed on the pictures in the picture sequence according to the sequence wraparound motion compensation offset. According to the sequence wraparound motion compensation offset, the maximum size of the pictures is limited to a minimum value. For example, as Figure 26 shown, the maximum picture width can be determined according to a formula including "sps_ref_wraparound_offset_minusl". In some embodiments, motion compensation is performed according to the VVC standard. In some embodiments, wraparound motion compensation can be performed on multiple pictures in the picture sequence, and the multiple pictures can have different sizes. In some embodiments, according to the sequence wraparound motion compensation offset, the size of the pictures is limited to a minimum value. For example, as Figure 27 shown, the picture width can be determined according to a formula including "sps_ref_wraparound_offset_minus1".

[0184] In some embodiments, a non-transitory computer-readable storage medium including instructions is also provided, and the instructions can be executed by a device (such as the disclosed encoder and decoder) to perform the above-described method. Common forms of non-transitory media include, for example, floppy disks, hard disks, solid state drives, magnetic tapes, or any other magnetic data storage medium, CD-ROMs, any other optical data storage medium, any physical medium with holes, RAM, PROM, and EPROM, FLASH-EPROM, or any other flash memory, NVRAM, caches, registers, any other storage chip or cartridge, and networked versions thereof. The device may include one or more processors (CPUs), input / output interfaces, network interfaces, and / or memories.

[0185] It should be noted that relational terms such as "first" and "second" herein are only used to distinguish one entity or operation from another entity or operation, and do not require or imply any actual relationship or order between these entities or operations. Additionally, the words "comprise", "have", "include", and "contain" and other similar forms are equivalent in meaning and are open-ended, because one or more items following any of these words do not mean an exhaustive list of such one or more items or are limited to the listed one or more items.

[0186] As used herein, unless otherwise specifically stated, the term "or" includes all possible combinations, unless infeasible. For example, if it is stated that a database may include A or B, then unless otherwise explicitly stated or infeasible, the database may include A, or B, or A and B. As a second example, if a predetermined database may include A, B, or C, then unless otherwise explicitly stated or infeasible, the database may include A, or B, or C, or A and B, or A and C, or B and C, or A, B, and C.

[0187] It should be understood that the above embodiments can be implemented by hardware, or software (program code), or a combination of hardware and software. If implemented by software, it can be stored in the above computer-readable medium. The software can perform the disclosed method when executed by a processor. The computing units and other functional units described in the present disclosure can be implemented by hardware, or software, or a combination of hardware and software. Those of ordinary skill in the art will also understand that multiple of the above modules / units can be combined into one module / unit, and each of the above modules / units can be further divided into multiple sub-modules / sub-units.

[0188] In the foregoing specification, embodiments have been described with reference to numerous specific details, which may vary with implementation. Certain modifications and variations of the described embodiments can be made. Other embodiments will be apparent to those skilled in the art upon considering the specification and practice of the invention disclosed herein. The specification and embodiments are to be considered exemplary only, and the true scope and spirit of the invention are indicated by the appended claims. The sequence of steps shown in the figures is also intended for illustrative purposes only and is not intended to be limited to any particular sequence of steps. Accordingly, those skilled in the art will appreciate that these steps can be performed in a different order while implementing the same method.

[0189] The embodiments can be further described using the following clauses: 1. A method for performing motion compensation, comprising: Receiving a first wrap-around motion compensation flag, wherein the first wrap-around motion compensation flag is associated with an image; Determining whether to enable the first wrap-around motion compensation flag; in response to determining that the first wrap-around motion compensation flag is enabled, receiving a wrap-around motion compensation offset, wherein the wrap-around motion compensation offset is associated with the image; and Performing motion compensation on the image based on the first wrap-around motion compensation flag and the wrap-around motion compensation offset. 2. The method according to clause 1, further comprising: Receiving a second wrap-around motion compensation flag, wherein the second wrap-around motion compensation flag is associated with a set of images, the set of images including the image associated with the first wrap-around motion compensation flag; Determining whether to disable the second wrap-around motion compensation flag; and In response to determining that the second wrap-around motion compensation flag is disabled, determining that the first wrap-around motion compensation flag is also disabled. 3. The method according to clause 2, wherein determining whether to enable the first wrap-around motion compensation flag further comprises: Determining the image width of the image associated with the first wrap-around motion compensation flag; and Based on the image width, determining whether to enable the first wrap-around motion compensation flag. 4. The method according to clause 3, further comprising: Determining whether the luminance coding tree block size in units of the minimum coding block plus 1 is greater than the image width of the image in units of the minimum coding block minus 1; and In response to determining that the luminance coding tree block size in units of the minimum coding block plus 1 is greater than the image width of the image in units of the minimum coding block minus 1, determining that the first motion compensation flag is disabled. 5. The method according to any one of clauses 2-4 further comprises: determining whether the second wrap-around motion compensation flag is enabled; and in response to determining that the second wrap-around motion compensation flag is enabled, determining that the image width of the image is greater than or equal to the luminance coding tree block size plus an offset. 6. The method according to clause 5 further comprises: in response to determining that the second wrap-around motion compensation flag is enabled, determining that the luminance coding tree block size in units of the minimum coding block plus 1 is less than or equal to the image width in units of the minimum coding block minus 1. 7. The method according to any one of clauses 2-6, wherein: the second wrap-around motion compensation flag is signaled in the sequence parameter set, and the first wrap-around motion compensation flag and the wrap-around motion compensation offset are signaled in the picture parameter set. 8. The method according to any one of clauses 1-7, wherein the motion compensation is performed according to the general video coding standard. 9. The method according to any one of clauses 1-8 further comprises: performing motion compensation on a plurality of images, wherein the plurality of images have different sizes. 10. The method according to any one of clauses 1-9, wherein performing motion compensation on the image according to the wrap-around motion compensation offset further comprises: determining a second wrap-around motion compensation offset by adding an offset to the wrap-around motion compensation offset received from the bitstream; and performing motion compensation on the image according to the second wrap-around motion compensation offset. 11. A system for performing motion compensation, the system comprising: a memory storing a set of instructions; and a processor configured to execute the set of instructions to cause the system to perform the following operations: receiving a first wrap-around motion compensation flag, wherein the first wrap-around motion compensation flag is associated with an image; determining whether the first wrap-around motion compensation flag is enabled; in response to determining that the first wrap-around motion compensation flag is enabled, receiving a wrap-around motion compensation offset, wherein the wrap-around motion compensation offset is associated with the image; and performing motion compensation on the image according to the first wrap-around motion compensation flag and the wrap-around motion compensation offset. 12. The system according to clause 11, wherein the processor is further configured to execute the set of instructions to cause the system to perform: Receive a second loop motion compensation flag, where the second loop motion compensation flag is associated with a set of images, and the set of images includes the images associated with the first loop motion compensation flag; Determine whether to disable the second loop motion compensation flag; and In response to determining that the second loop motion compensation flag is disabled, determine that the first loop motion compensation flag is also disabled. 13. The system according to clause 12, wherein the processor is further configured to execute the set of instructions to cause the system to perform: Determine the image width of the images associated with the first loop motion compensation flag; and Based on the image width, determine whether to enable the first loop motion compensation flag. 14. The system according to clause 13, wherein the processor is further configured to execute the set of instructions to cause the system to perform: Determine whether the luminance coding tree block size in units of the minimum coding block plus 1 is greater than the image width of the image in units of the minimum coding block minus 1; and In response to determining that the luminance coding tree block size in units of the minimum coding block plus 1 is greater than the image width of the image in units of the minimum coding block minus 1, determine that the first motion compensation flag is disabled. 15. The system according to any one of clauses 12-14, wherein the processor is further configured to execute the set of instructions to cause the system to perform: Determine whether to enable the second loop motion compensation flag; and In response to determining that the second loop motion compensation flag is enabled, determine that the image width of the image is greater than or equal to the luminance coding tree block size plus an offset. 16. The system according to clause 15, wherein the processor is further configured to execute the set of instructions to cause the system to perform: In response to determining that the second loop motion compensation flag is enabled, determine that the luminance coding tree block size in units of the minimum coding block plus 1 is less than or equal to the image width of the image in units of the minimum coding block minus 1. 17. The system according to any one of clauses 12-16, wherein: The second loop motion compensation flag is signaled in the sequence parameter set, and the first loop motion compensation flag and the loop motion compensation offset are signaled in the picture parameter set. 18. The system according to any one of clauses 11-17, wherein the processor is further configured to execute the set of instructions to cause the system to perform: Perform motion compensation on multiple images, where the multiple images have different sizes. 19. The system according to any one of clauses 11 - 18, wherein the processor is further configured to execute the set of instructions to cause the system to perform: Determine a second loop motion compensation offset by adding an offset to the loop motion compensation offset received from the bitstream; and Perform motion compensation on the image according to the second loop motion compensation offset. 20. A non - transitory computer - readable medium storing a set of instructions that can be executed by one or more processors of a device to cause the device to initiate a method for performing motion compensation, the method comprising: Receive a first loop motion compensation flag, where the first loop motion compensation flag is associated with an image in a set of images; Determine whether the first loop motion compensation flag is enabled; In response to determining that the first loop motion compensation flag is enabled, receive a loop motion compensation offset, where the loop motion compensation offset is associated with the image; and Perform motion compensation on the image according to the first loop motion compensation flag and the loop motion compensation offset. 21. The non - transitory computer - readable medium according to clause 20, wherein the set of instructions can be executed by the at least one processor of the computer system to cause the computer system to further perform: Determine the image width of the image associated with the first loop motion compensation flag; and Determine whether the first loop motion compensation flag is enabled based on the image width.

[0190] In the drawings and the specification, exemplary embodiments have been disclosed. However, many variations and modifications can be made to these embodiments. Therefore, although specific terms are used, they are used only in a general and descriptive sense and not for purposes of limitation.

Claims

1. A method for decoding video, comprising: Receiving a first wrap-around motion compensation flag associated with one or more pictures, the first wrap-around motion compensation flag indicating whether horizontal wrap-around motion compensation is enabled or disabled for the one or more pictures; and Determine whether the first loop motion compensation flag is equal to a first value or a second value based on the luminance coding tree block size, where Determining whether the first wrap-around motion compensation flag is equal to the first value or the second value based on the luma coding tree block size further comprises: When the luma coding tree block size in units of the smallest coding block plus 1 is greater than the picture width in units of the smallest coding block minus 1, determining that the first wrap-around motion compensation flag is equal to the second value; Wherein, the first wrap-around motion compensation flag being equal to the first value indicates that horizontal wrap-around motion compensation is enabled, and the first wrap-around motion compensation flag being equal to the second value indicates that the horizontal wrap-around motion compensation is disabled.

2. The method according to claim 1, further comprising: Receiving a second wrap-around motion compensation flag associated with a picture sequence, the second wrap-around motion compensation flag indicating whether horizontal wrap-around is enabled or disabled for the picture sequence; And Determining whether the first wrap-around motion compensation flag is equal to the first value or the second value based on the second wrap-around motion compensation flag, wherein determining whether the first wrap-around motion compensation flag is equal to the first value or the second value based on the second wrap-around motion compensation flag further comprises: When the second wrap-around motion compensation flag is equal to the second value, determining that the first wrap-around motion compensation flag is equal to the second value; When the second wrap-around motion compensation flag is equal to the first value, and the luma coding tree block size in units of the smallest coding block plus 1 is equal to or less than the picture width in units of the smallest coding block minus 1, determining that the first wrap-around motion compensation flag is equal to the first value; Wherein, the second wrap-around motion compensation flag being equal to the first value indicates that the horizontal wrap-around motion compensation is enabled, and the second wrap-around motion compensation flag being equal to the second value indicates that the horizontal wrap-around motion compensation is disabled.

3. The method according to claim 2, wherein the first wrap-around motion compensation flag is signaled in the picture parameter set, and the second wrap-around motion compensation flag is signaled in the sequence parameter set.

4. The method according to claim 2, further comprising: In response to determining that the first wrap-around motion compensation flag is equal to the first value, receiving parameters associated with a wrap-around motion compensation offset, the wrap-around motion compensation offset being associated with the one or more pictures.

5. The method according to claim 4, wherein The value of the parameter associated with the wrap-around motion compensation offset is less than or equal to a difference minus 2, the difference being obtained by subtracting the luma coding tree block size in units of the smallest coding block from the picture width in units of the smallest coding block.

6. The method according to claim 4, wherein Receiving, in the picture parameter set, parameters associated with the wrap-around motion compensation offset.

7. The method according to claim 4, further comprising: Determining a second parameter associated with the second loop motion compensation offset by adding an offset value to a parameter associated with the loop motion compensation offset received from the bitstream; and Performing motion compensation on the one or more images according to the second parameter associated with the second loop motion compensation offset.

8. A method for encoding video, comprising: Signaling a first loop motion compensation flag associated with one or more images, the first loop motion compensation flag indicating whether horizontal loop motion compensation is enabled or disabled for the one or more images; and Determine whether the first loop motion compensation flag is equal to a first value or a second value based on the luminance coded tree block size, where Determining whether the first loop motion compensation flag is equal to the first value or the second value based on the luma coding tree block size further includes: Determining that the first loop motion compensation flag is equal to the second value when the luma coding tree block size in units of the smallest coding block plus 1 is greater than the image width in units of the smallest coding block minus 1; wherein the first loop motion compensation flag being equal to the first value indicates that horizontal loop motion compensation is enabled, and the first loop motion compensation flag being equal to the second value indicates that the horizontal loop motion compensation is disabled.

9. The method according to claim 8, further comprising: Signaling a second loop motion compensation flag associated with an image sequence, the second loop motion compensation flag indicating whether horizontal loop is enabled or disabled for the image sequence; and Determining whether the first loop motion compensation flag is equal to the first value or the second value based on the second loop motion compensation flag, wherein determining whether the first loop motion compensation flag is equal to the first value or the second value based on the second loop motion compensation flag further includes: Determining that the first loop motion compensation flag is equal to the second value when the second loop motion compensation flag is equal to the second value; Determining that the first loop motion compensation flag is equal to the first value when the second loop motion compensation flag is equal to the first value and the luma coding tree block size in units of the smallest coding block plus 1 is equal to or less than the image width in units of the smallest coding block minus 1; wherein the second loop motion compensation flag being equal to the first value indicates that the horizontal loop motion compensation is enabled, and the second loop motion compensation flag being equal to the second value indicates that the horizontal loop motion compensation is disabled.

10. The method according to claim 9, wherein The first loop motion compensation flag is signaled in the picture parameter set, and the second loop motion compensation flag is signaled in the sequence parameter set.

11. The method according to claim 9, wherein Further comprising: In response to determining that the first loop motion compensation flag is equal to the first value, signaling a parameter associated with a loop motion compensation offset, the loop motion compensation offset being associated with the one or more images.

12. The method according to claim 11, wherein The value of the parameter associated with the loop motion compensation offset is less than or equal to a difference minus 2, the difference being obtained by subtracting the luma coding tree block size in units of the smallest coding block from the image width in units of the smallest coding block.

13. The method according to claim 11, wherein parameters associated with the loop motion compensation offset are signaled in the picture parameter set.

14. The method according to claim 11, further comprising: determining a second parameter associated with the second loop motion compensation offset by adding an offset value to a parameter associated with the loop motion compensation offset received from the bitstream; and performing motion compensation on the one or more pictures according to the second parameter associated with the second loop motion compensation offset.

15. A method for storing a bitstream in a non-transitory computer-readable storage medium, wherein, The bitstream is generated by an encoder, and the method comprises: signaling a first loop motion compensation flag associated with one or more pictures, the first loop motion compensation flag indicating whether horizontal loop motion compensation is enabled or disabled for the one or more pictures; and determining whether the first loop motion compensation flag is equal to a first value or a second value based on the luma coding tree block size, wherein determining whether the first loop motion compensation flag is equal to the first value or the second value based on the luma coding tree block size further comprises: when the luma coding tree block size in terms of the smallest coding unit plus 1 is greater than the picture width in terms of the smallest coding unit minus 1, determining that the first loop motion compensation flag is equal to the second value; wherein the first loop motion compensation flag being equal to the first value indicates that horizontal loop motion compensation is enabled, and the first loop motion compensation flag being equal to the second value indicates that the horizontal loop motion compensation is disabled.

16. The method according to claim 15, further comprising: signaling a second loop motion compensation flag associated with a picture sequence, the second loop motion compensation flag indicating whether horizontal loop is enabled or disabled for the picture sequence; and and determining whether the first loop motion compensation flag is equal to the first value or the second value based on the second loop motion compensation flag, wherein determining whether the first loop motion compensation flag is equal to the first value or the second value based on the second loop motion compensation flag further comprises: when the second loop motion compensation flag is equal to the second value, determining that the first loop motion compensation flag is equal to the second value; when the second loop motion compensation flag is equal to the first value and the luma coding tree block size in terms of the smallest coding unit plus 1 is equal to or less than the picture width in terms of the smallest coding unit minus 1, determining that the first loop motion compensation flag is equal to the first value; wherein the second loop motion compensation flag being equal to the first value indicates that the horizontal loop motion compensation is enabled, and the second loop motion compensation flag being equal to the second value indicates that the horizontal loop motion compensation is disabled.

17. The method according to claim 16, wherein the first loop motion compensation flag is signaled in the picture parameter set, and the second loop motion compensation flag is signaled in the sequence parameter set.

18. The method according to claim 16, wherein The operation further comprises: In response to determining that the first loop motion compensation flag is equal to the first value, signal parameters associated with a loop motion compensation offset, the loop motion compensation offset being associated with the one or more pictures.

19. The method according to claim 18, wherein the value of the parameter associated with the loop motion compensation offset is less than or equal to a difference minus 2, the difference being obtained by subtracting the luma coding tree block size in units of the smallest coding block from the picture width in units of the smallest coding block.

20. The method according to claim 18, wherein signal the parameter associated with the loop motion compensation offset in the picture parameter set.

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