Hybrid dimming method and device, display equipment and storage medium

Abstract

The invention relates to a hybrid dimming method and device, display equipment and a storage medium. The hybrid dimming method comprises the following steps: acquiring original dimming data corresponding to target brightness, taking the first N-bit continuous data in the original dimming data as DC dimming data, taking the last M-bit continuous data in the original dimming data as PWM dimming data, splitting the DC dimming data and / or the PWM dimming data into a true value part and a jitter value part, and generating a dimming instruction according to the true value part and the jitter value part. According to the method, original dimming data are decomposed to form PWM and DC mixed dimming, the PWM and DC dimming data are split into a true value part and a jitter part, so that the number of digits of a true value in the corresponding dimming data is reduced to adapt to a dimming chip with low data bits, meanwhile, a jitter value is reserved, the true value is expanded to equivalent data bit precision, and the accuracy of the dimming chip with low data bits is improved. Therefore, the cost and the precision performance are both considered.

Description

Technical Field

[0001] The present application is applicable to the field of display technology, and in particular, relates to a hybrid dimming method, device, display equipment and storage medium. Background Art

[0002] Due to the popularization of High Dynamic Range Imaging (HDR) standards, the increasing complexity of new display technologies, the balancing of multi-scenario energy efficiency, and the advancement of manufacturing and testing technologies, the demand for display brightness accuracy is also increasing. The brightness control of traditional display systems usually adopts a single dimming mode, such as direct current (DC) dimming, pulse width modulation (PWM) dimming, or DC combined with PWM dimming. DC dimming achieves brightness control by adjusting current / voltage, but is limited by the accuracy and noise interference of digital-to-analog converters (such as DAC, IDAC). High precision requires high-bit hardware, resulting in increased chip area and cost. PWM dimming adjusts brightness through duty cycle, but high-frequency PWM requires high-resolution counters, which also increases hardware complexity. In the existing technology, high precision (such as 32-bit brightness) requires complex circuits or large-size DACs, which are costly and cannot be used in scenarios where both cost and performance are taken into account.

[0003] At present, the dimming is carried out by mixing PWM dimming and DC dimming. X The X in the level dimming brightness coding level is split into M+N, where M corresponds to the number of bits of precision of DC dimming, that is, 2 M Unit current, N corresponds to the number of digits of PWM dimming precision, corresponding to 2 N Unit pulse width. Different from the single reflection of brightness information through current or pulse width value, the hybrid dimming algorithm reflects the brightness through the product of current value and pulse width value. The product of unit current and unit pulse width represents one unit brightness. However, when dealing with high-precision data, for example, 32-bit precision dimming data, after splitting, DC dimming or PWM dimming is required to execute 16-bit data control, and it is still necessary to configure a more complex chip circuit, and it is still impossible to fully take into account the cost and precision performance.

[0004] Therefore, how to optimize the splitting design of DC dimming and PWM dimming to reduce the data bits of dimming processing while ensuring the high precision requirements of the original data, so as to achieve a balance between cost and precision performance has become an urgent problem to be solved. Summary of the Invention

[0005] In view of this, embodiments of the present application provide a hybrid dimming method, apparatus, display device, and storage medium to solve the problem of how to optimize the light splitting design of DC dimming and PWM dimming to ensure the high-precision requirements of the original data while reducing the data bit positions for dimming processing, so as to achieve a balance between cost and precision performance.

[0006] In a first aspect, embodiments of the present application provide a hybrid dimming method, and the hybrid dimming method includes: Obtain the original dimming data corresponding to the target brightness; Use the first N consecutive bits of the original dimming data as DC dimming data, and use the last M consecutive bits of the original dimming data as PWM dimming data, where the sum of N and M is the total number of bits of the original dimming data; Split the DC dimming data and / or the PWM dimming data into a true value part and a dither value part, and generate a dimming instruction according to the true value part and the dither value part. The dimming instruction is used to control the corresponding device to generate the target brightness within the target time period.

[0007] In a second aspect, embodiments of the present application provide a hybrid dimming apparatus, and the hybrid dimming apparatus includes: A data acquisition module, configured to obtain the original dimming data corresponding to the target brightness; A data splitting module, configured to use the first N consecutive bits of the original dimming data as DC dimming data, and use the last M consecutive bits of the original dimming data as PWM dimming data, where the sum of N and M is the total number of bits of the original dimming data; A dimming instruction module, configured to split the DC dimming data and / or the PWM dimming data into a true value part and a dither value part, and generate a dimming instruction according to the true value part and the dither value part. The dimming instruction is used to control the corresponding device to generate the target brightness within the target time period.

[0008] In a third aspect, embodiments of the present application provide a display device, which includes a display, a processor, a memory, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the hybrid dimming method described in the first aspect is implemented for the display.

[0009] In a fourth aspect, embodiments of the present application provide a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the hybrid dimming method described in the first aspect is implemented.

[0010] The beneficial effects of the embodiments of the present application compared with the prior art are as follows: The present application obtains the original dimming data corresponding to the target brightness, uses the first N consecutive data in the original dimming data as the DC dimming data, and uses the last M consecutive data in the original dimming data as the PWM dimming data, where the sum of N and M is the total number of bits of the original dimming data. The DC dimming data and / or the PWM dimming data are split into a true value part and a dither value part, and a dimming instruction is generated according to the true value part and the dither value part. The dimming instruction is used to control the corresponding device to generate the target brightness within the target time period. By decomposing the original dimming data to form a hybrid dimming of PWM and DC, and splitting the PWM and DC dimming data into a true value part and a dither part, the number of bits of the true value in the corresponding dimming data is reduced to adapt to a dimming chip with low data bits, while retaining the dither value to expand the true value to the equivalent data bit accuracy, thus achieving a balance between cost and accuracy performance. Brief Description of the Drawings

[0011] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the accompanying drawings required for use in the embodiments or the description of the prior art. Obviously, the accompanying drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0012] Figure 1 It is a schematic flowchart of a hybrid dimming method provided in Embodiment 1 of the present application; Figure 2 It is a schematic diagram of a dimming instruction of a hybrid dimming method provided in Embodiment 1 of the present application; Figure 3 It is a schematic flowchart of a hybrid dimming method provided in Embodiment 2 of the present application; Figure 4 It is a schematic flowchart of a hybrid dimming method provided in Embodiment 3 of the present application; Figure 5 It is a schematic structural diagram of a hybrid dimming device provided in Embodiment 4 of the present application; Figure 6 It is a schematic structural diagram of a display device provided in Embodiment 5 of the present application. Detailed Description of the Invention

[0013] In order to make the technical problems, technical solutions, and beneficial effects solved by the present application clearer, the following further details the present application in combination with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0014] As shown Figure 1 in the figure, it is a schematic flowchart of a hybrid dimming method provided by Embodiment 1 of the present application. The hybrid dimming method includes the following steps: Step S101, obtain the original dimming data corresponding to the target brightness.

[0015] Among them, the hybrid dimming method can be used to control a display device, specifically for the control of a display in the display device. The display can be a miniLED display, an OLED display, a liquid crystal display, etc. Taking a miniLED display as an example, for any LED lamp bead, a driver is used to drive the LED lamp bead to adjust the brightness, lighting duration, etc. In the display device, by analyzing the content to be displayed, the target brightness of the corresponding lamp bead is determined, so as to generate binary dimming data corresponding to the target brightness. The dimming chip processes the binary dimming data to generate a dimming instruction, and the dimming instruction is given to the driver to drive the corresponding lamp bead to light up.

[0016] In a display device using binary control, the original dimming data is binary data. In devices of other number systems, it can be adjusted to the corresponding data accordingly.

[0017] Step S102, use the first N consecutive bits of the original dimming data as DC dimming data, and use the last M consecutive bits of the original dimming data as PWM dimming data.

[0018] Among them, the sum of N and M is the total number of bits of the original dimming data, that is, the original dimming data is split into two parts, and each part is consecutive data retrieved from the sequence of the original dimming data.

[0019] For example, for the 16-bit binary data 1100101010110101, it can be split into 110010101 and 0110101, that is, the first 9 consecutive bits of data are used as DC dimming data, and the last 7 consecutive bits of data are used as PWM dimming data. It can be seen that N is 9 and M is 7. At this time, a dimming chip capable of processing 9-bit and 7-bit binary data can be used to achieve hybrid dimming.

[0020] The above example is still not suitable for hybrid dimming using a dimming chip with a lower number of bits. And only using the above decomposition method, if dimming data with a bit number reaching 32 bits or even higher is received, even if the two parts of the decomposed data still have the possibility of exceeding 16 bits, a dimming chip for processing higher-bit data is required. Therefore, it is necessary to execute the subsequent step S103.

[0021] Step S103: Split the DC dimming data and the PWM dimming data into a true value part and a dither value part, and generate a dimming instruction according to the true value part and the dither value part.

[0022] Among them, the dimming instruction is used to control the corresponding device to generate the target brightness within the target time period. The target time period can be a control cycle, and this control cycle can correspond to the unit time for controlling the LED and can be designed according to requirements.

[0023] Since the DC dimming data and the PWM dimming data may still contain data with a relatively large number of bits, at this time, the two dimming data, namely the DC dimming data and the PWM dimming data, are split to obtain data information that can represent the true value and data information of the dither value that ensures accuracy.

[0024] To generate the target brightness within the target time period, correspondingly, the time-domain average value of the brightness within the target time period is fixed. The corresponding original dimming data in the above step S101 is the time-domain average value for controlling the brightness. The original dimming data is divided into DC dimming data and PWM dimming data. The DC dimming data is used to control the current or voltage, and the PWM dimming data is used to control the duty cycle of the current or voltage. Thus, the combination of the two realizes the adjustment of the time-domain average value of the current or voltage, so that the corresponding control reaches the target time-domain average value of the brightness.

[0025] The true value part of the DC dimming data can give the basic current value or voltage value of the DAC output, the dither value part of the DC dimming data can adjust the time-domain average value of the current or voltage, the true value part of the PWM dimming data can give the basic duty cycle, and the PWM dimming data can adjust the pulse width within the period. Thus, combined with the dither value part of the DC dimming data, the time-domain average value of the current or voltage reaches the target.

[0026] For example, when inputting a 16-bit brightness value, the high 9 bits are allocated to the DC channel (6-bit true value + 3-bit dither value), and the low 7 bits are allocated to the PWM channel (5-bit true value + 2-bit dither value). Among them, the DC dither adjusts the time-domain average value of the output current or voltage through the 3-bit dither value on the basis of the 6-bit true value for DAC output, and the PWM dither fine-tunes the pulse width within the period through the 2-bit dither value on the basis of the 5-bit true value duty cycle control to achieve the time-domain average value of the output current or voltage.

[0027] DC dimming realizes brightness adjustment by controlling the current or voltage, and it can be considered that the current value and the voltage value are the dimming values corresponding to the dimming.

[0028] Such as Figure 2As shown in the figure, it is a schematic diagram of a dimming instruction for a hybrid dimming method provided in the first embodiment of the present application. Among them, the original dimming data is 1100101010110101. The dimming value corresponding to DC dimming is the current value. The PWM dimming data includes: 5-bit real value + 2-bit dither value. The DC dimming data includes: 6-bit real value + 3-bit dither value. Specifically, the PWM dimming data: 01101-01 in binary, and the DC dimming data: 110010-101 in binary. Correspondingly, the PWM count is 0-31, that is, 32 times corresponding to the 5-bit binary of the real value. The PWM dither count is 0-3, that is, 4 times corresponding to the 2-bit binary of the dither value. The dither value defines 4 cycles of PWM, and the real value defines the number of bits where the pulse is turned on in each cycle. The DC real value is 50 mA. Among them, the full scale of DC is 63 mA, the dither step is 1 mA, and the DC dither count is 0-7, which defines the number of bits of the dither cycle. The binary 101 indicates that the DC value corresponding to these three bits of 0-2 is 50 mA, and the rest are adjusted according to the target current time-domain average value. The DC values corresponding to the five bits of 3-7 shown in the figure are 51 mA.

[0029] Using 4 PWM pulses can implement a 2-bit PWM dither algorithm to achieve the time-domain average value of the output brightness. Using 3-bit internal clock counting to achieve the dither of the DC current. This counter only counts when the PWM signal is turned on and holds the calculator data when the PWM signal is turned off. By using this method, the time-domain average value of the output brightness can be achieved. Through the PWM and DC dither algorithms, the time-domain average value of the output current of 7 + 9, a total of 16 bits, is achieved.

[0030] In one embodiment, the splitting the DC dimming data and the PWM dimming data into a real value part and a dither value part, and generating a dimming instruction according to the real value part and the dither value part includes: According to the hardware parameters of the dimming chip, filtering out the PWM real value and the PWM dither value from the PWM dimming data, taking the PWM real value as a set of data in the real value part, and taking the PWM dither value as a set of data in the dither value part; According to the hardware parameters, filtering out the DC real value and the DC dither value from the DC dimming data, taking the DC real value as another set of data in the real value part, and taking the DC dither value as another set of data in the dither value part; Determining the period distribution of PWM according to the PWM dither value and the PWM real value; Determining the numerical distribution of the corresponding dimming value in the period distribution according to the DC real value and the DC dither value; Generating a dimming instruction according to the period distribution and the numerical distribution.

[0031] Among them, according to the hardware parameters of the dimming chip, that is, parameters such as the counter bits of PWM and the bits of the shift register, the number of bits of the true value, the number of bits of the jitter value in the PWM dimming data, and the number of bits of the jitter value in the DC dimming data are limited.

[0032] In one embodiment, the determining the period distribution of PWM according to the PWM jitter value and the PWM true value includes: Determining the number of PWM periods according to the PWM jitter value; Determining the number of pulse starts in each PWM period according to the PWM true value; Determining the period distribution of PWM according to the number of PWM periods and the number of pulse starts in each PWM period.

[0033] Among them, the PWM jitter value and the PWM true value determine the period distribution of PWM, that is, the number of periods and the number of pulse starts in each period, so as to form the period distribution of PWM. When the pulse starts, DC dimming is turned on to realize the conduction and light emission of the LED.

[0034] In one embodiment, the determining the numerical distribution of the corresponding dimming value in the period distribution according to the DC true value and the DC jitter value includes: Determining the true position and the jitter position from all the pulse start positions according to the DC jitter value; Determining a first dimming value corresponding to the true position and a second dimming value corresponding to the jitter position according to the DC true value, the true position, and the jitter position; Determining the numerical distribution of the corresponding dimming value in the period distribution according to the true position, the jitter position, the first dimming value, and the second dimming value.

[0035] Among them, the DC jitter value determines the true position and the jitter position among the pulse start positions, the DC true value determines the magnitude of the output dimming value, the DC true value is output at the true position, the DC jitter value is output at the jitter position, and the true value and the jitter value output by DC, combined with the PWM period and the number of pulse starts, can obtain the time-domain average value of the output dimming value.

[0036] In one embodiment, the determining the true position and the jitter position from all the pulse start positions according to the DC jitter value includes: Determining the total count value, the first group of count values corresponding to the true value, and the second group of count values corresponding to the jitter value according to the DC jitter value; With the condition that cyclic counting is performed with the total count value at the pulse turn-on in each PWM cycle, and the count value corresponding to the previous pulse turn-on is kept unchanged at the pulse turn-off, determine the true positions among all the pulse turn-on positions according to the first set of count values, and determine the jitter positions among all the pulse turn-on positions according to the second set of count values.

[0037] Among them, cyclic counting is performed with the total count value at the pulse turn-on in each PWM cycle, and the count value corresponding to the previous pulse turn-on is kept unchanged at the pulse turn-off. For example, in the above Figure 2 in the first PWM cycle, when the number of bits is 5, the pulse turns off, and then the number of bits 5 is maintained until the next pulse turn-on.

[0038] The embodiment of the present application forms a hybrid dimming of PWM and DC by decomposing the original dimming data, and splits the PWM and DC dimming data into a true value part and a jitter part to reduce the number of bits of the true value in the corresponding dimming data to adapt to a dimming chip with low data bits, while retaining the jitter value to expand the true value to the equivalent data bit accuracy, thereby achieving a balance between cost and accuracy performance.

[0039] As Figure 3 shown, it is a schematic flowchart of a hybrid dimming method provided by the second aspect of the present application. Among them, the hybrid dimming method may include the following steps: Step S301, obtain the original dimming data corresponding to the target brightness.

[0040] Step S302, use the first N consecutive bits of the original dimming data as the DC dimming data, and use the last M consecutive bits of the original dimming data as the PWM dimming data.

[0041] Among them, the contents of step S301 and step S302 are the same as the contents of the above step S101 and step S102, and the description of the above steps can be referred to and will not be elaborated here.

[0042] Step S303, according to the hardware parameters of the dimming chip, screen out the PWM true value and the PWM jitter value from the PWM dimming data, use the PWM true value as the true value part, and use the PWM jitter value as the jitter value part.

[0043] Step S304, generate a dimming instruction according to the PWM true value and the PWM jitter value, in combination with the DC dimming data.

[0044] In this embodiment, only the true value and the dither value are set for the PWM dimming data. Of course, the true value and the dither value of the PWM dimming data have the same function as the true value and the dither value of the PWM in the above step S103, and are used to adjust the period and the duty cycle within the fine-tuning period. The duty cycle is expressed by the number of pulse openings.

[0045] The DC dimming data only contains the true value at this time, and the target average current value or average voltage value in the time domain is achieved by adjusting the PWM period and the duty cycle.

[0046] According to the PWM dither value and the PWM true value, determine the period distribution of the PWM. The way to determine the period distribution of the PWM is the same as that in the above steps, and will not be elaborated here. The dimming value at each pulse opening is determined to be the true value of the DC dimming data.

[0047] The embodiment of the present application adjusts with the dither value of the PWM, without adjusting the DC dither, and can also achieve hybrid dimming, which can ensure the accuracy while reducing the manufacturing cost of the chip.

[0048] As Figure 4 shown, it is a schematic flowchart of a hybrid dimming method provided by the third part of the present application. Among them, the hybrid dimming method may include the following steps: Step S401, obtain the original dimming data corresponding to the target brightness.

[0049] Step S402, use the first N consecutive data in the original dimming data as the DC dimming data, and use the last M consecutive data in the original dimming data as the PWM dimming data.

[0050] Among them, the content of step S401 and step S402 is the same as the content of step S101 and step S102 above. For reference, please refer to the description of the above steps and will not be elaborated here.

[0051] Step S403, according to the hardware parameters of the dimming chip, screen out the DC true value and the DC dither value from the DC dimming data, use the DC true value as the true value part, and use the DC dither value as the dither value part.

[0052] Step S404, generate a dimming instruction according to the DC true value and the DC dither value, in combination with the PWM dimming data.

[0053] In this embodiment, only the true value and the dither value are set for the DC dimming data. Of course, the true value and the dither value of the DC dimming data have the same function as the true value and the dither value of the DC in the above step S103, and are used to adjust the current value or the voltage value.

[0054] The PWM dimming data only contains real values at this time, and the target average current value or average voltage value in the time domain is achieved by adjusting the PWM period and duty cycle.

[0055] According to the DC dither value and the DC real value, the numerical distribution of DC is determined. The method for determining the numerical distribution of DC is the same as that in the above steps and will not be elaborated here. The dimming value at the start of each pulse is determined as the real value and the dither value of the DC dimming data.

[0056] In the embodiment of the present application, the adjustment is made with the dither value of DC. Without adjusting the PWM dither, hybrid dimming can also be achieved, which can reduce the manufacturing cost of the chip while ensuring accuracy.

[0057] It should be understood that the magnitudes of the sequence numbers of the steps in the above embodiments do not mean the order of execution. The order of execution of each process should be determined according to its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.

[0058] In one embodiment, a hybrid dimming device is provided, which corresponds to the hybrid dimming method in the above embodiment one by one. As Figure 5 shown, the hybrid dimming device includes a data acquisition module, a data splitting module, and a dimming instruction module. The detailed description of each functional module is as follows: The data acquisition module 51 is used to acquire the original dimming data corresponding to the target brightness; The data splitting module 52 is used to use the first N consecutive bits of data in the original dimming data as the DC dimming data, and use the last M consecutive bits of data in the original dimming data as the PWM dimming data, where the sum of N and M is the total number of bits of the original dimming data; The dimming instruction module 53 is used to split the DC dimming data and / or the PWM dimming data into a real value part and a dither value part, and generate a dimming instruction according to the real value part and the dither value part. The dimming instruction is used to control the corresponding device to generate the target brightness within the target time period.

[0059] In one implementation manner, the dimming instruction module 53 includes: The first PWM splitting unit is used to screen out the PWM real value and the PWM dither value from the PWM dimming data according to the hardware parameters of the dimming chip, use the PWM real value as the real value part, and use the PWM dither value as the dither value part; The first dimming instruction unit is used to generate a dimming instruction according to the PWM real value and the PWM dither value in combination with the DC dimming data.

[0060] In one embodiment, the dimming instruction module 53 includes: A first DC splitting unit, configured to screen out a DC true value and a DC jitter value from the DC dimming data according to the hardware parameters of the dimming chip, use the DC true value as the true value part, and use the DC jitter value as the jitter value part; A second dimming instruction unit, configured to generate a dimming instruction according to the DC true value and the DC jitter value in combination with the PWM dimming data.

[0061] In one embodiment, the dimming instruction module 53 includes: A second PWM splitting unit, configured to screen out a PWM true value and a PWM jitter value from the PWM dimming data according to the hardware parameters of the dimming chip, use the PWM true value as a set of data in the true value part, and use the PWM jitter value as a set of data in the jitter value part; A second DC splitting unit, configured to screen out a DC true value and a DC jitter value from the DC dimming data according to the hardware parameters, use the DC true value as another set of data in the true value part, and use the DC jitter value as another set of data in the jitter value part; A PWM data unit, configured to determine the period distribution of PWM according to the PWM jitter value and the PWM true value; A DC data unit, configured to determine the numerical distribution of the corresponding dimming value in the period distribution according to the DC true value and the DC jitter value; A third dimming instruction unit, configured to generate a dimming instruction according to the period distribution and the numerical distribution.

[0062] In one embodiment, the PWM data unit includes: A period number determination subunit, configured to determine the PWM period number according to the PWM jitter value; A pulse start determination subunit, configured to determine the number of pulse starts in each PWM period according to the PWM true value; A period distribution subunit, configured to determine the period distribution of PWM according to the PWM period number and the number of pulse starts in each PWM period.

[0063] In one embodiment, the DC data unit includes: A position determination subunit, configured to determine a true position and a jitter position from all pulse start positions according to the DC jitter value; A dimming value subunit, configured to determine a first dimming value corresponding to the true position and a second dimming value corresponding to the jitter position according to the DC true value, the true position, and the jitter position; A numerical distribution subunit, configured to determine the numerical distribution of corresponding dimming values in the periodic distribution according to the true position, the jitter position, the first dimming value, and the second dimming value.

[0064] In one embodiment, the position determination subunit is specifically configured to: Determine a total count value, a first set of count values corresponding to the true value, and a second set of count values corresponding to the jitter value according to the DC jitter value; With the condition that cyclic counting is performed with the total count value at the pulse start in each PWM cycle and the count value corresponding to the previous pulse start is kept unchanged at the pulse end, determine the true position among all pulse start positions according to the first set of count values, and determine the jitter position among all pulse start positions according to the second set of count values.

[0065] For the specific limitations of the hybrid dimming device, reference can be made to the limitations of the hybrid dimming method in the above text, which will not be elaborated here. Each module in the above hybrid dimming device can be implemented in whole or in part by software, hardware, and their combination. The above modules can be embedded in the processor of the computer device in hardware form or independent of it, or stored in the memory of the computer device in software form, so that the processor can call and execute the operations corresponding to each of the above modules.

[0066] In one embodiment, a display device is provided, and its internal structure diagram can be as Figure 6 shown. The display device includes a display, a processor, a memory, a network interface, and a database connected through a system bus. Among them, the processor of the display device is used to provide computing and control capabilities. The memory of the display device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a readable storage medium, and a database. The internal memory provides an environment for the operation of the operating system and the readable storage medium in the non-volatile storage medium. The database of the display device is used to store user original data. The network interface of the display device is used to communicate with an external terminal through a network connection. The readable storage medium, when executed by the processor, implements a hybrid dimming method.

[0067] In one embodiment, a display device is provided. The display device includes a display, a processor, a memory, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, it implements the hybrid dimming method in the above embodiment, such as Figure 1 the steps S101 - S103 shown, or Figures 2 to 3 as shown in, to avoid repetition, it will not be elaborated here. Alternatively, when the processor executes the computer program, it implements the functions of each module / unit in this embodiment of the hybrid dimming device, such asFigure 5 The functions of the hybrid dimming device shown are not described herein again to avoid repetition.

[0068] In one embodiment, a computer-readable storage medium is provided. A computer program is stored on the computer-readable storage medium. When the computer program is executed by a processor, it implements the hybrid dimming method in the above embodiment. For example Figure 1 the steps S101 - S103 shown, or Figures 2 to 3 as shown, not described herein again to avoid repetition. Alternatively, when the computer program is executed by a processor, it implements the functions of each module / unit in this embodiment of the above hybrid dimming device. For example Figure 5 the functions of the hybrid dimming device shown are not described herein again to avoid repetition.

[0069] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a readable storage medium. The readable storage medium can be stored in a non-volatile computer-readable storage medium. When the readable storage medium is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, storage, database, or other medium used in the various embodiments provided in this application can include non-volatile and / or volatile memories. Non-volatile memories can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memories can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM), etc.

[0070] Those skilled in the art can clearly understand that for the convenience and brevity of description, only the above division of each functional unit and module is used as an example. In practical applications, the above functions can be allocated to different functional units and modules as needed, that is, the internal structure of the device is divided into different functional units or modules to complete all or part of the functions described above.

[0071] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included within the protection scope of the present application.

Claims

1. A hybrid dimming method, characterized in that, The hybrid dimming method includes: Obtaining original dimming data corresponding to a target brightness; Taking the first N consecutive data bits in the original dimming data as DC dimming data, and taking the last M consecutive data bits in the original dimming data as PWM dimming data, where the sum of N and M is the total number of bits of the original dimming data; Splitting the DC dimming data and / or the PWM dimming data into a true value part and a dither value part, and generating a dimming instruction according to the true value part and the dither value part, where the dimming instruction is used to control a corresponding device to generate the target brightness within a target time period.

2. The hybrid dimming method according to claim 1, wherein The step of splitting the DC dimming data and / or the PWM dimming data into a true value part and a dither value part, and generating a dimming instruction according to the true value part and the dither value part includes: According to the hardware parameters of a dimming chip, screening out a PWM true value and a PWM dither value from the PWM dimming data, taking the PWM true value as the true value part, and taking the PWM dither value as the dither value part; Generating a dimming instruction according to the PWM true value and the PWM dither value, in combination with the DC dimming data.

3. The hybrid dimming method according to claim 1, wherein The step of splitting the DC dimming data and / or the PWM dimming data into a true value part and a dither value part, and generating a dimming instruction according to the true value part and the dither value part includes: According to the hardware parameters of a dimming chip, screening out a DC true value and a DC dither value from the DC dimming data, taking the DC true value as the true value part, and taking the DC dither value as the dither value part; Generating a dimming instruction according to the DC true value and the DC dither value, in combination with the PWM dimming data.

4. The hybrid dimming method according to claim 1, characterized in that, The step of splitting the DC dimming data and / or the PWM dimming data into a true value part and a dither value part, and generating a dimming instruction according to the true value part and the dither value part includes: According to the hardware parameters of a dimming chip, screening out a PWM true value and a PWM dither value from the PWM dimming data, taking the PWM true value as a set of data in the true value part, and taking the PWM dither value as a set of data in the dither value part; According to the hardware parameters, screening out a DC true value and a DC dither value from the DC dimming data, taking the DC true value as another set of data in the true value part, and taking the DC dither value as another set of data in the dither value part; Determining the period distribution of PWM according to the PWM dither value and the PWM true value; Determining the numerical distribution of corresponding dimming values in the period distribution according to the DC true value and the DC dither value; Generating a dimming instruction according to the period distribution and the numerical distribution.

5. The hybrid dimming method according to claim 4, wherein The step of determining the period distribution of PWM according to the PWM dither value and the PWM true value includes: Determining the number of PWM periods according to the PWM dither value; Determining the number of pulse openings in each PWM period according to the PWM true value; Determine the cycle distribution of PWM according to the number of PWM cycle times and the number of pulse turn - ons in each PWM cycle.

6. The hybrid dimming method according to claim 4, characterized in that, The determining the numerical distribution of the corresponding dimming value in the cycle distribution according to the DC true value and the DC jitter value includes: Determine the true position and the jitter position from all the positions where the pulses are turned on according to the DC jitter value; Determine the first dimming value corresponding to the true position and the second dimming value corresponding to the jitter position according to the DC true value, the true position, and the jitter position; Determine the numerical distribution of the corresponding dimming value in the cycle distribution according to the true position, the jitter position, the first dimming value, and the second dimming value.

7. The hybrid dimming method according to claim 5, wherein The determining the true position and the jitter position from all the positions where the pulses are turned on according to the DC jitter value includes: Determine the total count value, the first set of count values corresponding to the true value, and the second set of count values corresponding to the jitter value according to the DC jitter value; With the condition that when the pulse is turned on in each PWM cycle, a cyclic count is performed with the total count value, and when the pulse is turned off, the count value corresponding to the previous pulse turn - on remains unchanged, determine the true position among all the positions where the pulses are turned on according to the first set of count values, and determine the jitter position among all the positions where the pulses are turned on according to the second set of count values.

8. A hybrid dimming device, characterized in that, The said hybrid dimming device appropriation: A data acquisition module, configured to acquire the original dimming data corresponding to the target brightness; A data splitting module, configured to use the first N consecutive bits of the original dimming data as the DC dimming data, and use the last M consecutive bits of the original dimming data as the PWM dimming data, where the sum of N and M is the total number of bits of the original dimming data; A dimming instruction module, configured to split the DC dimming data and / or the PWM dimming data into a true value part and a jitter value part, and generate a dimming instruction according to the true value part and the jitter value part, where the dimming instruction is used to control the corresponding device to generate the target brightness within the target time period.

9. A display device, characterized in that, The said display device includes a display, a processor, a memory, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the hybrid dimming method described in any one of claims 1 to 7 is implemented for the display.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, the hybrid dimming method described in any one of claims 1 to 7 is implemented.

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