Display control method, device, medium and program product

Through the processor, the display output during the server startup process is managed uniformly, the black screen problem caused by control switching is solved, seamless update of the displayed content and instant visual feedback are achieved, and the efficiency and user experience of server management are improved.

CN120353532BActive Publication Date: 2025-08-29INSPUR SUZHOU INTELLIGENT TECH CO LTD
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Patent Information

Application Number
CN202510848412.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-06-24
Publication Date
2025-08-29
Estimated Expiration
2045-06-24

AI Technical Summary

Technical Problem

During the server startup process, the black screen problem caused by switching the video graphics array interface control rights affects the user experience and fault diagnosis efficiency.

Method used

Through the processor as the central coordination unit, the initialization status of the first controller and the second controller is detected and managed in real time, the displayed content is dynamically updated, and the black screen period during the control rights switching is eliminated, so as to achieve seamless update of the displayed content.

Benefits of technology

Improves management efficiency and user experience during server startup, provides low latency and high reliability display control solutions, ensuring the rapidity of instant visual feedback and fault location.

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Abstract

The present application provides a display control method that can be applied to the field of display technology. The display control method includes: in response to detecting that a server has been booted up, controlling the display to display first information; the first information is used to indicate the first interface content of the processor responding to the boot operation; after the processor is booted up, in response to detecting that the first controller and / or the second controller has performed an initialization operation, using second information to update the first information, and controlling the display to display second information; wherein the second information is used to indicate the second interface content of the initialization state of the first controller and / or the second controller. The present application also provides a display control device, medium, and program product.
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Description

Technical Field

[0001] The present application relates to the field of display technology, specifically to the field of server display control technology, and more specifically to a display control method, device, medium and program product. Background Art

[0002] In today's data center operations, servers, as core computing resources, undertake multiple tasks, including data processing, storage, and network services. Therefore, ensuring that servers can complete the startup process quickly, efficiently, and reliably is extremely important in data center operations and system management.

[0003] After the server completes self-test and initializes the hardware configuration, the video graphics array interface will output a prompt message. However, when the controller switches, the video graphics array hardware registers must be reinitialized, causing the display to appear black for a period of time, affecting the user experience and troubleshooting efficiency. Summary of the Invention

[0004] In view of the above problems, the present application provides a display control method, device, medium and program product that improve user experience and fault diagnosis efficiency.

[0005] According to the first aspect of the present application, a display control method is provided, comprising: in response to detecting that the server has been started up, controlling the display to display first information; the first information is used to indicate the first interface content of the processor having responded to the start-up operation; after the processor is started up, in response to detecting that the first controller and / or the second controller has been started up, updating the first information with second information, and controlling the display to display second information; wherein the second information is used to indicate the second interface content of the initialization state of the first controller and / or the second controller.

[0006] According to a second aspect of the present application, a display control device is provided, comprising: a first controller, a second controller, a processor, and a display deployed in a server; the processor is communicatively connected to the first controller, the second controller, and the display, respectively; the processor is configured to control the display to display first information in response to detecting a startup operation executed on the server; the first information is configured to indicate that the processor has responded to the first interface content of the startup operation; the first controller is configured to perform a first initialization operation after the processor is started and send a first detection signal to the processor; the second controller is configured to perform a second initialization operation after the processor is started and send a second detection signal to the processor; the processor is further configured to receive the first detection signal and / or the second detection signal from the first controller and / or the second controller after the processor is started, replace the first information with the second information, and control the display to display the second information; wherein the second information is configured to indicate the second interface content of the initialization state of the first controller and / or the second controller; the display displays the first information when the server is started and displays the second information when the first controller and / or the second controller perform the initialization operation.

[0007] The third aspect of the present application provides an electronic device, comprising: one or more processors; a memory for storing one or more computer programs, wherein the one or more processors execute the one or more computer programs to implement the steps of the above method.

[0008] The fourth aspect of the present application further provides a computer-readable storage medium having a computer program or instructions stored thereon, which implements the steps of the above method when the computer program or instructions are executed by a processor.

[0009] The fifth aspect of the present application further provides a computer program product, comprising a computer program or instructions, which implement the steps of the above method when executed by a processor. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The above contents and other objects, features and advantages of the present application will become more apparent through the following description of the embodiments of the present application with reference to the accompanying drawings, in which:

[0011] Figure 1 The hardware architecture diagram of the server display control system in the relevant example is shown.

[0012] Figure 2 The figure shows the hardware architecture of the server display control system according to an embodiment of the present application.

[0013] Figure 3 A flow chart of a display control method according to an embodiment of the present application is shown.

[0014] Figure 4 A schematic diagram of a display control method according to a specific embodiment of the present application is shown.

[0015] Figure 5 A schematic structural diagram of a display control device according to an embodiment of the present application is shown.

[0016] Figure 6 A structural schematic diagram of a display control device according to a specific embodiment of the present application is shown.

[0017] Figure 7 A communication structure diagram of a display control device according to a specific embodiment of the present application is shown.

[0018] Figure 8 A block diagram of an electronic device suitable for implementing a display control method according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0019] Hereinafter, embodiments of the present application will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present application. In the detailed description below, for ease of explanation, many specific details are set forth to provide a comprehensive understanding of the embodiments of the present application. However, it is apparent that one or more embodiments may also be implemented without these specific details. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessarily confusing the concepts of the present application.

[0020] The terms used herein are only for describing specific embodiments and are not intended to limit this application. The terms "comprise," "include," etc. used herein indicate the presence of the features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0021] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0022] When expressions such as "at least one of A, B, and C, etc." are used, they should generally be interpreted in accordance with the meaning commonly understood by those skilled in the art (for example, "a system having at least one of A, B, and C" should include but is not limited to a system having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, C, etc.).

[0023] In modern enterprise and data center operations, servers serve as core computing resources, undertaking multiple tasks including data processing, storage, and network services. Therefore, ensuring that servers can complete their startup process quickly, efficiently, and reliably is crucial in data center operations and system management.

[0024] When a server is connected to a stable power supply unit (PSU), the system enters standby mode. The user or management system initiates the server's boot sequence by pressing the front panel power button or sending a boot command via a remote management interface. The initial stage of this process is called the Power-On Self-Test (POST). During this stage, the server's mainboard firmware, such as the Basic Input / Output System (BIOS) or Unified Extensible Firmware Interface (UEFI), initializes, tests, and verifies the functionality of hardware components such as memory, hard drives, graphics cards, and other key components.

[0025] After the server completes its self-test and initializes its hardware configuration, the Video Graphics Array (VGA) interface displays prompt information. This information typically includes basic device configuration, BIOS version, available memory, and connected hard drive status. If a hardware fault is detected during the self-test, the server will also display a corresponding error code or warning message through the VGA interface.

[0026] In the existing server VGA display control architecture, the control subject types include the host operating system (Host OS) control mode, the basic input and output system (BIOS) control mode, and the baseboard management controller (BMC) control mode.

[0027] In Host OS control mode, VGA control is directly managed by the server's central processing unit (CPU) and operating system, relying on the operating system's kernel driver for display output. Its technical advantages lie in its support for diverse display requirements and its mature and stable driver technology. However, if the operating system crashes or fails to boot, debugging via the local display is impossible. Furthermore, due to the significant differences in driver interfaces between different operating systems, unified and compatible management is difficult.

[0028] In BIOS control mode, the BIOS intervenes in VGA control before the host operating system is initialized. This is primarily responsible for outputting key self-test information during the early stages of system startup, including hardware parameters such as the CPU model, memory capacity, and hard drive configuration. This mode's technical value lies in visualizing hardware status before the operating system boots, supporting early fault diagnosis. However, due to limitations in the BIOS boot process, its display function only covers the early stages of system initialization, and its coordination with subsequent control entities is time-dependent.

[0029] In BMC control mode, the BMC, acting as a management unit independent of the host system, enables direct control of the VGA display throughout the server's boot cycle. The BMC can take over display output even before the BIOS has completed initialization, supporting out-of-band display control in remote management scenarios. It can also interact with other control entities through management protocols such as the Intelligent Platform Management Interface (IPMI).

[0030] Figure 1 A related example server display control system hardware architecture diagram is shown.

[0031] like Figure 1 As shown, the core components of the existing server display control system hardware architecture include a power management module 101, a baseboard management controller 102 (BMC), a basic input and output system 103 (BIOS), a VGA controller 104 and a display 105. Each component forms a hierarchical interactive relationship with the data bus through control signals.

[0032] The data sources include BMC and BIOS / Host. When the BMC drives the display, it is the full controller of the VGA controller. Similarly, when the BIOS is driving, it is the full controller.

[0033] In this architecture, the power on / off signal from the power management module triggers BMC / BIOS initialization, and the control subject obtains VGA control rights to drive the VGA controller to output to the display.

[0034] Based on the hardware architecture of the server display control system, the prior art proposes two VGA control right transfer strategies: an automatic switching mechanism and a manual switching mechanism, to form a switching system that combines automatic and manual switching.

[0035] Under the automatic switching mechanism, a "BMC priority" strategy is adopted. When the server boots up, the BMC controls the VGA output by default. After the BIOS completes initialization and establishes display capabilities, the BMC proactively releases control and hands it over to the BIOS. Once the host operating system boots up, control is automatically transferred to the host graphics driver, which then manages display output. However, if an abnormal state occurs, such as an operating system freeze or a driver crash, the BMC cannot automatically reassume control using existing logic, requiring manual intervention to restore the state.

[0036] Under the manual switchover mechanism, control can be forcibly transferred through the BMC management interface or IPMI commands, forcing the current controller to release VGA controller resources, such as clearing register configurations and disabling display output channels. The target controller then reinitializes and assumes exclusive control. However, while this mechanism provides flexible management, each switchover requires a complete reset of the VGA controller hardware state, and the operation relies on manual intervention, failing to meet the real-time response requirements of automated O&M scenarios.

[0037] However, when the BMC transfers control to the BIOS, due to differences in their driving logic, the VGA controller hardware registers, such as the video memory base address, display timing parameters, and color space configuration, need to be reinitialized. This process causes the monitor to display black for a period of time, affecting the user experience and troubleshooting efficiency.

[0038] In view of this, an embodiment of the present application provides a display control method that uses a processor as a central coordination unit to immediately respond and display a first message when the server starts up, thereby filling the display gap before the first controller and / or second controller are started, thereby achieving instant visual feedback in the early stages of startup. After the processor is started up, by detecting the initialization status of the first controller and the second controller, the multi-source data is dynamically integrated to generate the second message and update the display content, thereby eliminating the black screen period caused by the hardware register reset when the control is switched, and achieving seamless update of the display content.

[0039] Specifically, an embodiment of the present application provides a display control method, in which a first controller, a second controller, a processor and a display are deployed in a server, and the processor is communicatively connected to the first controller, the second controller and the display, respectively; it is characterized in that the method is applied to the processor, and the method includes: in response to detecting that the server is started up, controlling the display to display first information; the first information is used to indicate the first interface content that the processor has responded to the start-up operation; after the processor startup is completed, in response to detecting that the first controller and / or the second controller performs an initialization operation, using the second information to update the first information, and controlling the display to display the second information; wherein the second information is used to indicate the second interface content of the initialization state of the first controller and / or the second controller.

[0040] Figure 2 The figure shows the hardware architecture of the server display control system according to an embodiment of the present application.

[0041] like Figure 2 As shown, the server display control system hardware architecture diagram 200 may include: a power management module 101 , a baseboard management controller 102 (BMC), a basic input and output system 103 (BIOS), a VGA controller 104 , a processor 210 and a display 105 .

[0042] In the architecture, the VGA controller 104 is controlled by the processor 210 throughout the entire process of server startup.

[0043] Therefore, during the server startup process, once the processor 210 is initialized, the processor 210 retains control over the VGA controller 104 throughout the entire process. Furthermore, the processor 210 can detect the initialization status of the baseboard management controller 102 and the basic input and output system 103 and control the VGA controller 104 to drive the display 105 to display the initialization status information of the baseboard management controller 102 or the basic input and output system 103.

[0044] Figure 3 A flow chart of a display control method according to an embodiment of the present application is shown.

[0045] like Figure 3 As shown, the display control method of this embodiment includes operations S310 to S320.

[0046] In operation S310, in response to detecting that a boot operation is performed on the server, a display is controlled to display first information.

[0047] In operation S320 , after the processor booting is completed, in response to detecting that the first controller and / or the second controller performs an initialization operation, the first information is updated with the second information, and the display is controlled to display the second information.

[0048] In this embodiment, the server may represent a server hardware system deployed with a first controller, a second controller, a processor, and a display, and supports unified management of display output through the processor.

[0049] The first controller may represent an independent control unit in the server responsible for out-of-band management, such as a baseboard management controller (BMC), for implementing functions such as hardware monitoring, remote management, and interaction with the processor.

[0050] The second controller may represent a control unit in the server responsible for system startup and hardware initialization, such as a basic input and output system (BIOS), for implementing functions such as system startup, hardware configuration, and interaction with a processor.

[0051] The processor may include a microcontroller unit (MCU) for controlling display output, serving as an intermediate coordination unit between the BMC, BIOS, and the display.

[0052] In this embodiment, the startup operation may represent a triggering action for the server to enter a startup process from a shutdown state, such as pressing a server power button, sending a startup instruction via IPMI, automatically triggering startup according to a preset time, etc.

[0053] In this embodiment, the processor detects that the server is being started through a hardware signal such as a level change of a general purpose input / output (GPIO) port of a power switch or a management protocol such as an IPMI command, and immediately responds to the display request and controls the display to display the first information.

[0054] The first information may represent the first interface content that the processor controls the display to output after detecting the startup operation, so as to indicate that the processor has responded to the startup operation.

[0055] The first interface content is not limited to including: text information, such as "System startup, please wait..."; graphic information, such as manufacturer logo, startup animation, etc.; and status prompt information, such as power on logo, initialization progress bar, etc.

[0056] In this embodiment, after the startup is completed, the processor generates second information according to the initialization state of the first controller and / or the second controller, dynamically updates the first information using the second information, and controls the display to display the second information.

[0057] The second information may represent second interface content generated by the processor according to the initialization state of the first controller and / or the second controller after the processor is started.

[0058] The second interface is not limited to hardware monitoring data such as "CPU temperature: 45°C" and memory voltage, self-test progress such as "Memory test completed," and hardware configuration information such as "CPU model: ABC." It can also include BMC temperature warnings and BIOS boot progress.

[0059] Based on this, the embodiment of the present application uses the processor as a central coordination unit to immediately respond and display the first information when the server starts up, filling the display gap before the first controller and / or second controller are started, and realizing instant visual feedback in the early stage of startup. After the processor is started up, by detecting the initialization status of the first controller and the second controller, it dynamically integrates multi-source data to generate the second information and update the display content, so as to eliminate the black screen period caused by the hardware register reset when the control right is switched, and realize seamless update of the display content.

[0060] In addition, the processor is used to uniformly manage display output, eliminating the need to switch control of the VGA from the first controller to the second controller after the second controller is initialized. This significantly improves management efficiency and user experience, providing a low-latency, high-reliability solution for server display control.

[0061] According to an embodiment of the present application, after the processor is started, in response to detecting that the first controller and / or the second controller performs an initialization operation, the first information is updated using the second information, and the display is controlled to display the second information, including: in response to receiving a first detection signal from the first controller and not receiving a second detection signal from the second controller, the first information is updated using the third information; and the display is controlled to display the third information.

[0062] The first detection signal may be a signal sent by a first controller, such as a BMC, to the processor. The first detection signal may be used to indicate that the first controller has completed initialization and is capable of outputting data. When the processor detects the first detection signal, it may confirm that the first controller is ready to output second information, such as hardware monitoring data or remote management interface content, thereby triggering the display update logic.

[0063] The second detection signal may be a signal sent by a second controller, such as a BIOS, to the processor. The second detection signal may be used to indicate that the second controller has completed initialization and is capable of outputting data. Upon detecting the second detection signal, the processor may confirm that the second controller has completed hardware self-tests, such as memory testing and CPU initialization, and is ready to output second information, such as self-test information.

[0064] In this embodiment, the second information includes the third information.

[0065] The third information may represent display content generated by the processor based on the initialization state data of the first controller, used to describe the operating status and output information of the first controller. The third information is not limited to hardware monitoring data and status indicators, such as sensor readings transmitted by the first controller via shared memory, the firmware version number of the first controller, and network connection status.

[0066] In this embodiment, when the processor only receives a first detection signal, such as an initialization completion signal of the first controller, but does not detect a second detection signal, the operating status and output information read by the processor from the first controller are displayed first, and the first information displayed in the display interface is updated based on the third information to achieve real-time visualization of out-of-band management information.

[0067] Based on this, in the embodiment of the present application, through the collaborative mechanism of the first detection signal, the second detection signal and the third information, the processor can accurately perceive the initialization status of the first controller, and preferentially display the management information of the first controller when the second controller has not yet completed startup, so as to avoid the display delay caused by the first controller waiting for the second controller to start, and at the same time eliminate the black screen problem caused by the control switching, thereby realizing real-time and efficient display of server status information.

[0068] According to an embodiment of the present application, updating the first information using the third information also includes: obtaining a first initialization progress identifier for describing the first controller performing an initialization operation; determining the execution status of the first initialization operation corresponding to the first initialization progress identifier; and generating the third information based on the execution status of the first initialization operation.

[0069] In this embodiment, the first initialization progress indicator may represent a status flag generated by a first controller, such as a BMC, and sent to the processor to describe the specific stage or degree of completion of the first controller's initialization operation. The first initialization progress indicator may be displayed as a number, an enumeration value, or a status code. For example, the indicator 0x01 indicates "Sensor initialization completed," and the indicator 0x02 indicates "Network module initialization completed."

[0070] The execution status of the first initialization operation may indicate a specific execution status of the first controller initialization operation obtained by the processor according to the first initialization progress identifier, for example, may include whether it is started, in progress, completed, or failed to execute.

[0071] In this embodiment, after completing an initialization operation, the first controller writes a corresponding first initialization progress indicator to a shared memory or status register. The processor can retrieve and parse this indicator through interrupt triggering or polling to determine the execution status of the corresponding first initialization operation. Combined with a status description of the execution status, such as "Sensor initialization completed," the processor generates corresponding display text or a graphical progress bar, such as "Sensor system is ready."

[0072] Based on this, the embodiment of the present application obtains and parses the first initialization progress identifier and the execution status, and the processor can obtain the initialization status of the first controller initialization operation in real time to convert the progress identifier into natural language information that can be used for display, thereby realizing dynamic visualization of the first controller initialization process, which not only improves the observability of server management, but also can quickly locate the fault link when the first controller initialization is abnormal.

[0073] According to an embodiment of the present application, generating third information according to the execution status of the first initialization operation includes: determining first operation information for describing the first initialization operation; and generating third information according to the execution status of the first initialization operation and the first operation information.

[0074] In this embodiment, the first operation information may represent information used to describe the initialization state of the first controller, and may include, for example, an operation name, involved components, parameter configuration, real-time data, and the like.

[0075] In this embodiment, the processor reads operation information from the shared memory of the first controller or through IPMI commands, such as information such as "sensor type," "network IP address," and "error code," and combines the first controller's operation information with the parsed natural language description of the executed state to generate third information. In one specific embodiment, the parsed natural language description of the executed state and the obtained first operation information can be concatenated using a preset template to generate the third information.

[0076] Based on this, the embodiment of the present application combines the first operation information of the first controller with the executed status, so that the third information generated by the processor is upgraded from a single status notification to a complete description containing operation details, and converts the underlying operation status into visual information in natural language form, thereby improving the observability of server management.

[0077] According to an embodiment of the present application, after the processor is started, in response to detecting that the first controller and / or the second controller performs an initialization operation, the first information is updated using the second information, and the display is controlled to display the second information, including: in response to receiving a first detection signal from the second controller and not receiving a second detection signal from the first controller, the first information is updated using the fourth information; and the display is controlled to display the fourth information.

[0078] In this embodiment, the second information includes fourth information.

[0079] The fourth information may represent display content generated by the processor based on the initialization state of the second controller, used to describe the operating status and output information of the second controller. The fourth information may include, but is not limited to, self-test results, such as memory capacity, hard drive model, and CPU parameters; error information, such as hardware fault codes; and boot information, such as operating system loading progress and the boot options menu.

[0080] In this embodiment, when the processor only receives the first detection signal sent by the second controller but does not receive the second detection signal sent from the first controller, the operating status and output information read by the processor from the second controller are displayed first, and the first information displayed in the display interface is updated based on the fourth information.

[0081] Based on this, the embodiments of the present application support independent display of the initialization status of the second controller. Even if the first controller fails, the processor can directly respond to the initialization completion signal of the second controller to display self-test information, thereby realizing the flexibility and reliability of multi-controller display during server startup, and providing users with continuous and complete system status feedback.

[0082] According to an embodiment of the present application, updating the first information using the fourth information also includes: obtaining a second initialization progress identifier for describing the execution of an initialization operation by the second controller; determining the execution status of the second initialization operation corresponding to the second initialization progress identifier; and generating the fourth information based on the execution status of the second initialization operation.

[0083] In this embodiment, the second initialization progress indicator may represent a status flag generated by a second controller, such as a BIOS, and sent to the processor to describe the specific stage or completion level of the second controller initialization operation. The second initialization progress indicator may also be displayed as a number, an enumeration value, or a status code. For example, the indicator 0x01 indicates the "hardware self-test stage," and 0x02 indicates the "driver loading stage."

[0084] The execution status of the second initialization operation may indicate the specific execution status of the second controller initialization operation obtained by the processor according to the second initialization progress identifier, and may include, for example, not executed, executing, completed, or failed execution.

[0085] In this embodiment, after the processor is booted, it continuously monitors the initialization status of the first and second controllers. If it detects that only the second controller has sent the first detection signal, while the first controller has not sent the second detection signal, the processor can obtain and analyze the second initialization progress indicator through interrupt triggering or polling to determine the execution status of the corresponding second initialization operation. Combined with the status description of the execution status, information describing the initialization status of the second controller, such as text or an icon, is generated for updating the displayed content.

[0086] Based on this, the embodiment of the present application obtains and parses the second initialization progress identifier and the execution status, and the processor can obtain the initialization status of the second controller initialization operation in real time to convert the progress identifier into natural language information that can be used for display, thereby realizing dynamic visualization of the second controller initialization process, which not only improves the observability of server management, but also can quickly locate the fault link when the second controller initialization is abnormal.

[0087] According to an embodiment of the present application, generating fourth information according to the execution status of the second initialization operation includes: determining second operation information for describing the second initialization operation; and generating fourth information according to the execution status of the second initialization operation and the second operation information.

[0088] In this embodiment, the second operation information may represent information used to describe the initialization status of the second controller, for example, it may include operation names such as "BIOS loading" and "peripheral interface scanning", operation types such as "hardware detection" and "driver installation", parameter configuration, operation sequence, etc.

[0089] In this embodiment, the processor reads operation information from the shared memory of the second controller or through IPMI commands to obtain specific content describing the initialization operation of the second controller, such as "memory controller initialization" and "interface detection." The processor then integrates the execution status of the second controller initialization operation, such as "completed," with the operation information to form a natural language or graphical display. In one specific embodiment, if the operation information is "hard disk initialization" and the status is "completed," the fourth information may be displayed as "hard disk initialization completed."

[0090] Based on this, the embodiment of the present application combines the second operation information of the second controller with the executed status, so that the fourth information generated by the processor is upgraded from a single status notification to a complete description containing operation details, and the underlying operation status is converted into visual information in natural language form, thereby improving the observability of server management.

[0091] According to an embodiment of the present application, controlling the display to display the second information includes: when determining that the second information is in image format, writing the second information into the frame buffer area of ​​the display, so that the display obtains the second information from the frame buffer area of ​​the display and displays the second information.

[0092] In this embodiment, the frame buffer area is used to store pixel data to be displayed. The processor can write image data into the frame buffer area, and the display hardware reads the area at a fixed frequency and renders it to the screen.

[0093] In a specific embodiment, after receiving the initialization status of the first controller or the second controller, the processor determines the format of the second information by determining the data type. If the second information is in image format, the processor parses the second information and converts the pixels into a format supported by the frame buffer. The processor calculates the starting address of the image in the frame buffer area and writes the image data to the frame buffer area of ​​the VGA display. The VGA display continuously scans the frame buffer area and immediately renders the data to the screen upon detecting an update, without requiring additional control signals.

[0094] Based on this, the embodiment of the present application directly operates the frame buffer area through the processor, and writes the second information to be displayed into the frame buffer area of ​​the VGA to achieve efficient display of image format information, providing an intuitive and real-time visual interface for server management.

[0095] According to an embodiment of the present application, the second information includes at least one of the following: information used to indicate the initialization progress of the first controller or the second controller; information used to indicate the hardware operation status result detected during the initialization operation performed by the first controller or the second controller; remote management interface information used to indicate the operation interface layout and interface loading progress of the remote maintenance server.

[0096] In this embodiment, the second information includes at least initialization progress information of the first controller such as the BMC and / or the second controller such as the BIOS, hardware detection results during initialization, and remote management interface information.

[0097] The initialization progress information may represent a status code generated by the first controller, such as a BMC, and / or the second controller, such as a BIOS, during the initialization process. The initialization progress information may include, for example, text progress, a graphical progress bar, such as "CPU Initializing (95%)," or a progress percentage converted to a rectangular fill area in the frame buffer.

[0098] The hardware detection results during initialization may include sensor data of the first controller, such as the BMC, hardware fault logs, etc., and may also include hardware self-test results of the second controller, such as the BIOS, etc., such as "CPU temperature: 45°C" and "hard disk warning".

[0099] The remote management interface information can be derived from the page or image data of the remote maintenance server's operation interface layout and interface loading progress. Examples of remote management interface information include operation interface layout, loading progress, and the like, such as the remote console login page, system configuration menu, and interface element loading percentage.

[0100] In a specific embodiment, the initialization status progress bar of the second controller, such as BIOS, and memory test results can be displayed at the beginning of the startup. After the first controller, such as BMC, is ready, a CPU temperature monitoring chart is superimposed and displayed. When the remote management interface is loaded, the loading progress can be displayed.

[0101] Based on this, in the embodiment of the present application, since the second information includes at least the initialization progress information of the first controller such as BMC and / or the second controller such as BIOS, the hardware detection results during initialization, and the remote management interface information, the multi-source information of the server during the startup process is integrated into a unified visual interface, which significantly improves the system observability and operation and maintenance efficiency.

[0102] According to an embodiment of the present application, after the processor is started, in response to detecting that the first controller and the second controller perform an initialization operation, the first information is updated using the second information, and the display is controlled to display the second information. It also includes: in response to receiving a first detection signal from the first controller and a second detection signal from the second controller, obtaining third information for describing the initialization state of the first controller and fourth information for describing the initialization state of the second controller respectively; and determining the second information from the third information and the fourth information.

[0103] In this embodiment, after the processor is started up, upon simultaneously receiving a first detection signal from a first controller such as a BMC and a second detection signal from a second controller such as a BIOS, and confirming that both have completed initialization, the processor obtains the third information from the shared memory of the first controller and the fourth information from the shared memory of the second controller.

[0104] The processor may select the second information to be displayed from the third information and the fourth information or combine them to generate the second information to avoid display conflicts.

[0105] In a specific embodiment, a partitioned display mode may be used to divide the screen into two parts, with the third information displayed on the left side and the fourth information displayed on the right side.

[0106] In another specific embodiment, a dynamic scrolling display mode may be adopted to display the two parts of information in a polling manner according to time slices.

[0107] According to an embodiment of the present application, determining the second information from the third information and the fourth information includes: determining the second information from the third information and the fourth information according to a predetermined priority.

[0108] In another specific embodiment, a priority strategy may be used to select high-priority information for display based on preset priority rules. Specifically, after obtaining the third and fourth information, the processor performs type analysis on each information, assigns a priority level to each information according to a priority configuration table, and determines the display order of the third and fourth information based on the priority levels.

[0109] In this embodiment, when a hardware alarm such as temperature exceeding a threshold is detected, the third information of the first controller may be displayed first. When the second controller such as BIOS performs critical initialization such as system booting, the fourth information of the second controller may be displayed first.

[0110] In another embodiment, at the initial startup, the hardware self-test progress of the second controller, such as the BIOS, may be displayed first. After the system stabilizes, the real-time monitoring data of the first controller, such as the BMC, may be displayed first.

[0111] Based on this, the embodiment of the present application solves the display decision problem when dual controller information conflicts based on predetermined priority, so as to ensure that key information is displayed first and improve system maintainability.

[0112] According to an embodiment of the present application, determining the second information from the third information and the fourth information includes: in response to receiving a selection operation for a target data source, determining information corresponding to the target data source from the third information and the fourth information as the second information; wherein the target data source includes any one of the following: a first controller and a second controller.

[0113] In this embodiment, the target data source may represent an information source specified by a user or an operation object through a selection operation, such as a first controller such as a BMC and a second controller such as a BIOS.

[0114] The selection operation may be a data source switching instruction initiated by a user or an operation object, wherein the selection operation may be implemented through hardware or software interaction, such as a server front-end button, an external keyboard shortcut, or a click on a web management interface.

[0115] In this embodiment, upon receiving a selection operation, the processor parses the operation parameters to determine the target data source. If the target data source is the first controller, the processor may read the third information from the shared memory of the first controller and determine the third information as the second information to be displayed. If the target data source is the second controller, the processor may read the fourth information from the shared memory of the second controller and determine the fourth information as the second information to be displayed.

[0116] During the switching process between the first and second controllers, the processor can continuously control the screen to display the first information. For example, during the initial startup phase, the processor can drive the display to display the manufacturer's logo; as the startup process progresses, the startup progress bar can be updated and displayed in real time.

[0117] In addition, the processor acts as a unified manager for the control switch between the first controller and the second controller. When the first controller completes initialization and prepares to transfer control, the processor rechecks the initialization conditions of the second controller. The processor allows the control to switch only when the second controller meets the preset initialization conditions, such as normal hardware status and correct firmware configuration. During the switching process, the processor monitors the startup status of the second controller in real time. If the second controller encounters abnormal conditions such as initialization failure, configuration error, etc., resulting in display interruption or content loss, the processor immediately intervenes to handle it, such as re-triggering the second controller initialization process or displaying a fault prompt message, thereby achieving a smooth transition of the device from the first controller management mode to the second controller startup process, significantly improving the user operation experience and system reliability.

[0118] Based on this, in an embodiment of the present application, when the system displays a high-priority alarm message by default, the user can manually switch the display source to quickly view hardware parameters or adjust startup options without waiting for the alarm to be cleared or restarting the system. In addition, operation and maintenance personnel can switch data sources in real time according to scenario requirements, or the processor can dynamically adjust the display content by continuously reading the initialization status information of the first controller and the second controller in the shared memory to ensure that the screen always maintains a coherent and stable display during the control switching phase, thereby solving the problem of black screen or display disorder during the switching phase, and effectively improving the brand recognition and user-friendliness of the device.

[0119] According to an embodiment of the present application, the display control method also includes: after the processor is started, in response to not receiving a second detection signal from the second controller and not receiving a first detection signal from the first controller within a first predetermined time period, detecting a cause of signal abnormality; generating abnormality information based on the cause of the signal abnormality; and using the abnormality information to update the first information, and controlling the display to display the abnormality information.

[0120] In this embodiment, the first predetermined time period may represent a preset time threshold for waiting for the first controller and the second controller to send an initialization completion signal after the processor is started.

[0121] The signal anomaly reason may indicate the type of failure that caused the signal not to be received on time, such as hardware damage, firmware crash, communication line interruption, etc.

[0122] In this embodiment, the processor starts timing after startup. If no initialization completion signals are received from the first controller and the second controller within a first predetermined time period, there may be initialization abnormalities in the first controller and the second controller, and the abnormality handling process is triggered.

[0123] The processor can detect the cause of the signal abnormality by reading the hardware status or executing the self-test program, generate abnormal information according to the detection result, such as "BMC firmware loading failed", and write the abnormal information into the frame buffer area for display to overwrite the initial first information.

[0124] According to an embodiment of the present application, generating abnormality information based on the cause of the detection signal abnormality includes: determining a target code and prompt information associated with the cause of the signal abnormality; and generating abnormality information based on the target code and prompt information.

[0125] In this embodiment, the target code associated with the cause of the signal anomaly may be, for example, an executable code, such as ERR_001 indicating "BMC firmware loading failed." The prompt message associated with the cause of the signal anomaly may be, for example, a pre-configured natural language description for guiding troubleshooting, such as "Please try reloading the BMC firmware."

[0126] In this embodiment, the execution code associated with the hardware and the pre-configured prompt information are combined into abnormal information and displayed to the user, for example, in a red highlighted, full-screen covering manner, to ensure that operation and maintenance personnel can quickly identify and perform maintenance in a timely manner.

[0127] According to an embodiment of the present application, the display control method also includes: in response to determining that the first controller has not completed the initialization operation within a second predetermined time period, controlling the display to display fifth information; wherein the fifth information indicates abnormal information of the first controller and a first prompt information for troubleshooting the abnormality of the first controller.

[0128] The second predetermined time period may represent a time threshold for the processor to wait for the first controller, such as the BMC, to complete initialization. In a specific embodiment, since the BMC needs to load firmware and start services, the second predetermined time period may be configured to be greater than the first predetermined time period.

[0129] The fifth information may represent prompt information regarding the initialization abnormality of the first controller, and the fifth information may include abnormality information of the first controller and first prompt information for troubleshooting the abnormality of the first controller.

[0130] In this embodiment, upon startup, the processor begins monitoring the initialization status of a first controller, such as a BMC. If the processor fails to receive an initialization completion signal from the first controller after a second predetermined period of time, a processing flow is triggered. The processor can determine the specific fault by reading the BMC status register and, based on the fault type and a preset template, generate an exception message and a first prompt message, which are continuously displayed to remind the user to troubleshoot the fault.

[0131] According to an embodiment of the present application, the display control method also includes: in response to determining that the initialization operation of the second controller has not been completed within a third predetermined time period, controlling the display to display sixth information; wherein the sixth information indicates abnormal information of the second controller and a second prompt information for troubleshooting abnormalities of the first controller.

[0132] The third predetermined duration may represent a time threshold for the processor to wait for the second controller, such as the BIOS, to complete initialization. In a specific embodiment, since the BIOS needs to complete a hardware self-test and load a driver, the third predetermined duration may be configured to be greater than the first predetermined duration and greater than the second predetermined duration.

[0133] The sixth information may indicate prompt information regarding the initialization abnormality of the second controller, and the fifth information may include abnormality information of the second controller and second prompt information for troubleshooting the abnormality of the second controller.

[0134] In this embodiment, the processor monitors the initialization status of a second controller, such as a BIOS, and triggers a processing flow if it fails to receive an initialization completion signal from the second controller after a third predetermined period of time. The processor can determine the specific fault by reading the POST code left in the BIOS and, based on the fault type and a preset template, generate an exception message and a second prompt message, which are continuously displayed to remind the user to troubleshoot the fault.

[0135] Based on this, in an embodiment of the present application, if the processor fails to receive initialization signals from the BMC and BIOS within a first predetermined time period after startup, an abnormality cause detection is automatically triggered, and the fault type is mapped to a standardized target code and related fault description. This eliminates the need for users to rely on the traditional "black screen" phenomenon to identify faults, allowing them to intuitively understand problems during the startup process and shorten troubleshooting time. Furthermore, for BMC and BIOS timeout scenarios, fifth and sixth messages are generated and continuously displayed, respectively, to help operations personnel quickly locate hardware faults, significantly shortening troubleshooting time and improving the maintainability and reliability of servers in unattended or remote operations.

[0136] According to an embodiment of the present application, the display control method also includes: in response to detecting that the server is powered on, dividing the first controller and the second controller into respective independent storage areas; and configuring respective general input and output detection signal detection interfaces for the first controller and the second controller, so as to detect the initialization status of the first controller and the second controller.

[0137] The independent storage areas of the first controller and the second controller can be used to store their respective initialization state data and display information to avoid data conflicts.

[0138] The detection interfaces of the general input and output detection signals of the first controller and the second controller can be used to receive the initialization status signals of the first controller and the second controller, so as to realize real-time monitoring of the initialization status.

[0139] In this embodiment, the processor can detect that the server has been powered on through a hardware circuit or software protocol, and allocate two independent storage areas in the system memory for the first controller and the second controller. The storage area of ​​the first controller can be used to store the initialization status of the first controller, such as the BMC, sensor data, etc. The storage area of ​​the second controller can be used to store the initialization status of the second controller, such as the BIOS, POST code, hardware configuration information, etc.

[0140] In this embodiment, the processor also includes setting access rights and data storage formats to avoid conflicts when different components read and write at the same time, thereby ensuring the integrity and accuracy of the displayed data.

[0141] In this embodiment, the processor can also configure the first controller and the second controller with their own general input and output detection signal detection interfaces respectively, so that the first controller and the second controller can send detection signals to the processor through their respective corresponding interfaces, and the processor determines whether the first controller and the second controller have completed initialization by reading the first detection signal and the second detection signal.

[0142] For example, during server startup, after the second controller completes hardware enumeration and basic configuration, it sends a signal to the processor via a general-purpose input / output (GPIO) interrupt. Similarly, after the first controller completes network connection and management module initialization, it notifies the processor in a similar manner. Based on these interrupt signals, the processor accurately detects the operating status of each component and determines subsequent display logic and operations.

[0143] In this embodiment, the processor can also initialize the server display output signal, temporarily disabling the display output during the initial system power-up. Because the server may generate momentary unstable electrical signals during startup, direct output to the display can cause display anomalies such as flickering and screen distortion. Temporarily disabling the display output reduces the probability of display anomalies and lays the foundation for subsequent stable display output.

[0144] At the same time, the processor can also check and configure the initial state of the VGA controller to ensure that it is in a normal working state.

[0145] Figure 4 A schematic diagram of a display control method according to a specific embodiment of the present application is shown.

[0146] like Figure 4 As shown, in a specific embodiment, the display control method includes operations S401 to S410.

[0147] In operation S401 , a server is powered on.

[0148] In operation S402 , the processor starts an initialization process.

[0149] Specifically, the processor can initialize shared memory to ensure efficient and stable data transfer between multiple components. For example, independent storage areas can be allocated for the first controller and the second controller. The processor can also configure detection interfaces, such as configuring detection interfaces for general-purpose input and output detection signals for the first controller and the second controller, respectively, to receive initialization signals from the first controller and the second controller. In addition, the processor can also perform initialization operations on the VGA controller, such as setting the frame buffer address, pixel format, and turning off the initial display output.

[0150] In operation S403, it is determined whether the server has been powered on. If so, operation S404 is executed to drive the display to display the first information. If not, operation S402 is executed again.

[0151] In operation S405, it is determined whether the second controller has completed the initialization operation and has content to be displayed. If so, operation S406 is executed to display the fourth information. If not, operation S407 is executed.

[0152] Specifically, the processor can check, based on previously received interrupt information, whether the secondary controller has completed initialization and has content to display. During server startup, the secondary controller's initialization includes several key steps, such as CPU self-test, memory test, and hardware device enumeration. Display conditions are met only when all these steps are complete and the secondary controller is ready to display relevant information, such as the system startup progress and hardware configuration list.

[0153] If the second controller meets the display conditions, the processor can read the relevant display data from the second controller. This data is usually stored in a specific graphic or text format in shared memory or a dedicated storage area of ​​the second controller. The processor converts the data into a format that the VGA controller can understand and drives the screen to display the host content. For example, when the second controller detects a memory error, it will generate a corresponding error code and prompt information. The processor displays this information through VGA control, allowing operation and maintenance personnel to promptly understand server hardware failures and provide direct clues for troubleshooting.

[0154] In operation S407, it is determined whether the first controller has completed the initialization operation and has content to be displayed. If so, operation S408 is executed to display the third information. If not, operation S409 is executed.

[0155] Specifically, if the second controller does not meet the display requirements, the processor can check whether the first controller has completed initialization and has content to display based on the previously received interrupt information. Because the first controller server plays a critical role in remote management and hardware monitoring, its initialization includes configuring network interfaces and activating sensor data acquisition modules. When the first controller completes initialization and has display requirements, such as loading the remote management interface or hardware status alarms, the third information is displayed.

[0156] The processor accesses the contents of the first controller's frame buffer. The frame buffer is a memory area used by the first controller to store display images and contains multiple management interface elements and monitoring data graphs. The processor outputs the data in the frame buffer to the screen via the VGA controller to display information related to the first controller.

[0157] For example, in a remote server management scenario, the administrator connects to the first controller through the network. The first controller writes the data to be displayed on the desktop interface into the frame buffer area. The processor perceives it and drives the VGA display, allowing the administrator to manage the server like a local operation, achieving efficient remote operation and maintenance.

[0158] In operation S409, the processor drives the display to display the first information and re-enters operation S405.

[0159] Specifically, if the first controller and the second controller do not meet the display conditions, the processor drives the screen to display customized content. The processor customized content may include the manufacturer's LOGO, the default prompt interface, or a concise status prompt message.

[0160] For example, the processor reads the manufacturer's logo image data from the internal storage area, converts and processes it, and then outputs it to the display via the VGA controller. This not only avoids screen blanking, improves the user experience, but also enhances brand recognition to a certain extent. In server maintenance scenarios, if the secondary controller fails to initialize, the processor displays a prompt message such as "Second controller initialization error, please check the hardware or firmware version," providing maintenance personnel with preliminary guidance on the fault direction.

[0161] In operation S410, display is completed.

[0162] In another embodiment, after the server is powered on, the processor begins to monitor the initialization process of the first controller in real time. If the initialization of the first controller is not completed after the timeout, and the second controller has not yet started to output display data, the processor immediately prompts the user through the screen that "the initialization completion signal of the first controller cannot be detected at present". After detecting the power-on signal, the processor continues to monitor the initialization status of the second controller. If the initialization of the second controller is still not completed after the timeout, or the second controller does not send display data to the processor after the timeout, the processor will display "Power-on timeout, failed to display data, check whether there is a problem with important components such as the CPU or memory bar and fan" on the screen, and provide users with detailed diagnostic information and solution suggestions in combination with the component information recorded in the monitoring and management of the first controller to help users quickly locate and solve device startup problems.

[0163] Based on this, the embodiments of the present application configure independent storage areas for the first and second controllers to avoid memory access conflicts between the first and second controllers, improve system stability, and prevent display anomalies or system crashes caused by data contention. In addition, by configuring detection interfaces for general-purpose input and output detection signals for the first and second controllers, the processor can respond and update the display content in a timely manner, avoiding the black screen waiting during the startup process.

[0164] Based on the above-mentioned display control method, the present application also provides a display control device, including: a first controller, a second controller, a processor and a display deployed in a server; the processor is communicatively connected to the first controller, the second controller and the display respectively; the processor is used to control the display to display first information in response to detecting a startup operation being executed on the server; the first information is used to indicate that the processor has responded to the first interface content of the startup operation; the first controller is used to perform a first initialization operation after the processor startup is completed, and send a first detection signal to the processor; the second controller is used to perform a second initialization operation after the processor startup is completed, and send a second detection signal to the processor; the processor is also used to receive the first detection signal and / or the second detection signal from the first controller and / or the second controller after the processor startup is completed, replace the first information with the second information, and control the display to display the second information; wherein the second information is used to indicate the second interface content of the initialization state of the first controller and / or the second controller; the display displays the first information when the startup operation is executed on the server; and displays the second information when the first controller and / or the second controller performs the initialization operation.

[0165] The following will be combined Figure 5 The device is described in detail.

[0166] Figure 5 A schematic structural diagram of a display control device according to an embodiment of the present application is shown.

[0167] like Figure 5 As shown, the display control device includes a first controller 510, a second controller 520, a processor 210 and a display 105, wherein the processor 210 is respectively connected to the first controller 510, the second controller 520 and the display 105. The display 105 may include a VGA controller and a display panel.

[0168] The first controller 510 may include an out-of-band management chip independent of the main system, such as a baseboard management controller (BMC). The first controller 510 may interact with the processor 210 via a two-wire serial bus (Inter-Integrated Circuit, I2C) or a system management bus (System Management Bus, SMBus).

[0169] The second controller 520 may include a basic input and output system (BIOS) or UEFI firmware. The second controller 520 may interact with the processor 210 via a low pin count (LPC) bus.

[0170] The processor 210 may represent a system main controller, such as an MCU. The processor may integrate a VGA controller or a High-Definition Multimedia Interface (HDMI) controller to directly drive the display 105 to display content.

[0171] The display 105 may include a physical display device such as a liquid crystal display (LCD). The display 105 may be connected to the processor 210 via a VGA / HDMI interface.

[0172] According to an embodiment of the present application, during the startup phase, the processor 210 can detect a startup operation performed on the server, such as pressing the power button, through the general input and output interface, and control the display 105 to display the first interface content, such as the manufacturer's LOGO, "System startup", etc. After the processor 210 is started, the first controller 510 performs a first initialization operation and can send a first detection signal to the processor 210 through the I2C bus. The second controller 520 performs a second initialization operation and can send a second detection signal to the processor 210 through the LPC bus. After receiving any detection signal, the processor 210 reads the initialization status data from the shared memory of the corresponding controller to generate second information to overwrite the first information, and controls the display 105 to display the second interface content.

[0173] Figure 6 A structural schematic diagram of a display control device according to a specific embodiment of the present application is shown.

[0174] like Figure 6 As shown, the display control device is deployed inside the server, and the server's power on / off status can be simultaneously input to the first controller 510, the second controller 520 and the processor 210 through the GPIO bus. Among them, the processor 210 can capture the server's power on / off status in real time through GPIO interrupts.

[0175] When a power-on signal is detected, the processor 210 initializes the VGA controller 104 to drive the display 105 . If a power-off signal is detected, all display outputs are cut off.

[0176] The processor 210 establishes a shared memory area with the first controller 510 and the second controller 520 respectively for storing the controller initialization status data. The first controller 510 and the second controller 520 can send an initialization completion signal to the processor 210 via a general input and output detection signal detection interface such as a GPIO pin.

[0177] Figure 7A communication structure diagram of a display control device according to a specific embodiment of the present application is shown.

[0178] like Figure 7 As shown, the processor 210 divides independent storage areas for the first controller 510 and the second controller 520 as shared memory areas. The shared memory with the first controller 510 can be used to store hardware monitoring data, and the shared memory with the second controller 520 can be used to store hardware configuration information.

[0179] The processor 210 may also set read and write permissions for each storage area through the memory management unit to avoid data conflicts.

[0180] like Figure 7 As shown, the processor 210 also has a built-in interrupt processing middleware, which monitors the initialization signals of the first controller 510 and the second controller 520 through the GPIO pins respectively. When the interrupt is triggered, the processor 210 can read data from the corresponding shared memory and update the display according to the signal type and priority.

[0181] For example, if the processor 210 monitors the server's power-on operation, it will immediately light up the screen. If the first controller 510 and the second controller 520 have not completed initialization, they will output characters such as "Powering on, please wait" to give customers a better experience.

[0182] If the processor 210 receives an interrupt signal from the first controller 510, it displays pixels based on the data in the shared memory of the first controller 510. If it receives an interrupt signal from the second controller 520, it displays pixels based on the data in the shared memory of the second controller 520. At this point, the interrupt signal from the first controller 510 is blocked, and the data from the first controller 510 is no longer displayed. The processor 210 assumes that the second controller 520 has been initialized and is ready for display output. The processor 210 can then display self-test information from the second controller 520.

[0183] If the processor 210 detects a shutdown operation of the server, it may turn off all display outputs after displaying “Shutdown” on the screen.

[0184] like Figure 7 As shown, the processor 210 is also configured with a frame buffer area for the VGA controller. The processor 210 converts the second information of the first controller 510 and the second controller 520 into pixel data and writes it into the frame buffer area, and drives the display 105 to display the corresponding content through the horizontal / vertical synchronization signal of the VGA controller.

[0185] Based on this, the embodiment of the present application solves the problem of blank display in the initial startup by using the processor as a central coordination unit to immediately respond and control the display to display the first information when the server starts. When the first controller and the second controller complete the initialization, the processor receives the detection signal in real time and dynamically generates the second information to update the display to eliminate the black screen delay caused by the controller switching, thereby achieving seamless connection of the displayed content. In addition, the processor uniformly manages multi-source data and supports the collaborative display of the first controller and the second controller, which improves the integrity and observability of the server status, while decoupling the direct dependence between the controller and the display and enhancing system compatibility.

[0186] According to an embodiment of the present application, the display control device also includes: a first controller, used to send a first detection signal to the processor during the execution of a first initialization operation; the processor, used to update the first information using third information for describing the initialization state of the first controller when the first detection signal is received and the second detection signal is not received; controlling the display to display the third information; and the display, used to display the third information.

[0187] In this embodiment, the first controller 510 sends a first detection signal to the processor 210 during the process of performing initialization operations such as sensor calibration and firmware loading. The processor 210 triggers the display update of the first controller status information only when it receives the detection signal from the first controller 510 but does not receive the detection signal from the second controller 520, and controls the display 105 to display the third information of the first controller 510 such as initialization progress or status data in real time, and overwrites the first information of the startup phase.

[0188] Based on this, the embodiment of the present application realizes real-time monitoring and dynamic display of its working status by sending a detection signal by the first controller during initialization. When the processor receives the detection signal of the first controller and the second controller is not yet ready, the initialization progress of the first controller is converted into third information and updated for display, avoiding the black screen waiting during the startup process. At the same time, when the second controller is not ready, the first controller information is displayed first, making full use of display resources, which is suitable for scenarios where the initialization of the second controller takes a long time, and realizing dynamic optimization allocation of display resources and visualization of system status.

[0189] According to an embodiment of the present application, the display control device also includes: a second controller, used to send a second detection signal to the processor during the execution of the second initialization operation; the processor, used to update the first information using fourth information used to describe the initialization state of the second controller when the second detection signal is received and the first detection signal is not received; controlling the display to display the fourth information; and the display, used to display the fourth information.

[0190] In this embodiment, the second controller 520 sends a second detection signal to the processor 210 during the process of performing initialization operations such as POST self-test and hardware driver loading. The processor 210 triggers the display update of the second controller status information only when it receives the detection signal from the second controller 520 but does not receive the detection signal from the first controller 510, and controls the display 105 to display the fourth information of the second controller 520 such as initialization progress or self-test results in real time, and covers the first information of the startup phase.

[0191] Based on this, the embodiment of the present application realizes real-time visualization of the system self-check process through the detection signal sent by the second controller during initialization, solving the problem of a black screen or only displaying a static LOGO during the self-check phase of the second controller when the traditional server is started. When the processor receives the detection signal from the second controller and the first controller is not yet ready, the self-check progress of the second controller is converted into fourth information and updated for display, so that the user can intuitively understand the startup status. In addition, the second controller information is displayed preferentially when the first controller is not ready, ensuring the efficient use of display resources. It is suitable for servers where the initialization of the first controller takes a long time, and realizes dynamic optimization of the display content during the startup phase and visualization of the system status.

[0192] According to an embodiment of the present application, the processor is also used to, after the processor startup is completed, in response to not receiving a second detection signal from the second controller and not receiving a first detection signal from the first controller within a first predetermined time period, detect the cause of the signal abnormality; generate abnormality information based on the cause of the signal abnormality; and use the abnormality information to update the first information, and control the display to display the abnormality information; the display is used to display the abnormality information.

[0193] In this embodiment, after the processor 210 is started, the processor 210 starts timing. If the processor 210 does not receive the second detection signal from the second controller 520 and the first detection signal from the first controller 510 within a first predetermined time period, an exception process is triggered, and the cause of the signal abnormality of the first controller 510 and the second controller 520 is detected respectively through the communication link. For example, the hardware connection, power supply status, and firmware loading status can be detected. Based on the cause of the signal abnormality, the target code and prompt information associated with it are determined, and the abnormality information is generated based on the target code and prompt information. The processor 210 controls the display 105 to display the abnormality information in real time, and overwrites the first information of the startup phase.

[0194] Based on this, in an embodiment of the present application, when the processor fails to receive initialization signals from the first and second controllers within a predetermined time period, it immediately triggers an anomaly detection process. Based on the detection results, anomaly information is generated and displayed on the screen, transforming the underlying hardware failure into a visual problem that can be solved by operations and maintenance personnel, significantly improving the maintainability and availability of the server.

[0195] According to an embodiment of the present application, the processor is also used to: in response to determining that the first controller has not completed the initialization operation within a second predetermined time period, control the display to display fifth information; wherein the fifth information indicates abnormal information of the first controller and a first prompt information for troubleshooting the abnormality of the first controller; the display is used to display the fifth information.

[0196] In this embodiment, after the processor 210 is started, the processor 210 starts timing. If the first detection signal is not received from the first controller 510 within the second predetermined time period, it is determined that the first controller 510 has not completed the initialization operation within the second predetermined time period, and the cause of the signal abnormality of the first controller 510 is detected, and the abnormal information of the first controller 510 and the first prompt information for troubleshooting the abnormality of the first controller 510 are determined, and the display 105 is controlled to display the abnormal information of the first controller 510 and the first prompt information for troubleshooting the abnormality of the first controller 510 in real time.

[0197] Based on this, in an embodiment of the present application, when the processor detects that the first controller has not completed initialization within the second predetermined time period, it immediately triggers the exception detection process. Based on the detection results, an exception message is generated and displayed on the screen, transforming the original underlying hardware failure into a visual problem that can be solved by operations and maintenance personnel, significantly improving the maintainability and availability of the server.

[0198] According to an embodiment of the present application, the processor is also used to: in response to determining that the initialization operation of the second controller has not been completed within a third predetermined time period, control the display to display sixth information; wherein the sixth information indicates abnormal information of the second controller and a second prompt information for troubleshooting the abnormality of the first controller; the display is used to display the sixth information.

[0199] In this embodiment, after the processor 210 is started, the processor 210 starts timing. If the second detection signal is not received from the second controller 520 within the third predetermined time period, it is determined that the second controller 520 has not completed the initialization operation within the third predetermined time period, the cause of the signal abnormality of the second controller 520 is detected, the abnormal information of the second controller 520 and the second prompt information for troubleshooting the abnormality of the second controller 520 are determined, and the display 105 is controlled to display the abnormal information of the second controller 520 and the second prompt information for troubleshooting the abnormality of the second controller 520 in real time.

[0200] Based on this, in an embodiment of the present application, if the processor detects that the second controller has not completed self-testing within the third predetermined time period, it immediately triggers an anomaly detection process. Based on the detection results, an anomaly message is generated and displayed on the screen, allowing operations and maintenance personnel to quickly locate and resolve the issue without complex tools, effectively reducing server downtime caused by an anomaly in the second controller.

[0201] Figure 8 A block diagram of an electronic device suitable for implementing a display control method according to an embodiment of the present application is shown.

[0202] like Figure 8 As shown, the electronic device 800 according to an embodiment of the present application includes a processor 801, which can perform various appropriate actions and processes based on programs stored in a read-only memory (ROM) 802 or programs loaded from a storage unit 808 into a random access memory (RAM) 803. The processor 801 may include, for example, a general-purpose microprocessor (e.g., a CPU), an instruction set processor and / or related chipsets and / or a dedicated microprocessor (e.g., an application-specific integrated circuit (ASIC)), etc. The processor 801 may also include onboard memory for caching purposes. The processor 801 may include a single processing unit or multiple processing units for performing different actions of the method flow according to the embodiment of the present application.

[0203] Various programs and data required for the operation of the electronic device 800 are stored in the RAM 803. The processor 801, ROM 802, and RAM 803 are connected to each other via a bus 804. The processor 801 performs various operations of the method flow according to the embodiment of the present application by executing the programs in the ROM 802 and / or RAM 803. It should be noted that the programs may also be stored in one or more memories other than the ROM 802 and the RAM 803. The processor 801 may also perform various operations of the method flow according to the embodiment of the present application by executing the programs stored in the one or more memories.

[0204] According to an embodiment of the present application, electronic device 800 may further include an input / output (I / O) interface 805, which is also connected to bus 804. Electronic device 800 may also include one or more of the following components connected to I / O interface 805: an input section 806 including a keyboard, mouse, etc.; an output section 807 including devices such as a cathode ray tube (CRT), liquid crystal display (LCD), and speakers; a storage section 808 including a hard disk; and a communication section 809 including a network interface card such as a LAN card or modem. Communication section 809 performs communication processing via a network such as the Internet. A drive 810 is also connected to I / O interface 805 as needed. Removable media 811, such as a magnetic disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed in drive 810 as needed, so that computer programs read from the removable media can be installed into storage section 808 as needed.

[0205] This application also provides a computer-readable storage medium, which may be included in the device / apparatus / system described in the above embodiments, or may exist independently and not be incorporated into the device / apparatus / system. The computer-readable storage medium carries one or more programs, and when the one or more programs are executed, the method according to the embodiments of this application is implemented.

[0206] According to an embodiment of the present application, a computer-readable storage medium may be a non-volatile computer-readable storage medium, and may include, for example, but not limited to: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In the present application, a computer-readable storage medium may be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. For example, according to an embodiment of the present application, a computer-readable storage medium may include the ROM 802 and / or RAM 803 described above and / or one or more memories other than ROM 802 and RAM 803.

[0207] The embodiments of the present application also include a computer program product, which includes a computer program containing program code for executing the method shown in the flowchart. When the computer program product is run in a computer system, the program code is used to enable the computer system to implement the display control method provided in the embodiments of the present application.

[0208] The computer program executes the above functions defined in the system / device of the embodiment of the present application when the processor 801 executes the computer program. According to the embodiment of the present application, the system, device, module, unit, etc. described above can be implemented by a computer program module.

[0209] In one embodiment, the computer program may be stored on a tangible storage medium such as an optical storage device or a magnetic storage device. In another embodiment, the computer program may be transmitted and distributed in the form of a signal on a network medium, downloaded and installed via the communication portion 809, and / or installed from a removable medium 811. The program code contained in the computer program may be transmitted using any appropriate network medium, including but not limited to wireless, wired, or any suitable combination thereof.

[0210] In such an embodiment, the computer program can be downloaded and installed from the network via the communication section 809, and / or installed from the removable medium 811. When the computer program is executed by the processor 801, the above-mentioned functions defined in the system of the embodiment of the present application are performed. According to the embodiment of the present application, the systems, devices, means, modules, units, etc. described above can be implemented by computer program modules.

[0211] According to an embodiment of the present application, the program code for executing the computer program provided by the embodiment of the present application can be written in any combination of one or more programming languages. Specifically, these computer programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, languages ​​such as Java, C++, Python, "C" or similar programming languages. The program code can be executed entirely on the user computing device, partially on the user device, partially on a remote computing device, or entirely on a remote computing device or server. In the case of a remote computing device, the remote computing device can be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computing device (for example, using an Internet service provider to connect via the Internet).

[0212] The flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, program segment, or a part of code, and the above-mentioned module, program segment, or a part of code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in an order different from that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flowchart, and the combination of the boxes in the block diagram or flowchart, can be implemented with a dedicated hardware-based system that performs the specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0213] It will be understood by those skilled in the art that the features described in the various embodiments of this application may be combined and / or coupled in various ways, even if such combinations or couplings are not explicitly described in this application. In particular, the features described in the various embodiments of this application may be combined and / or coupled in various ways without departing from the spirit and teachings of this application. All such combinations and / or couplings fall within the scope of this application.

[0214] The embodiments of the present application have been described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present application. Although each embodiment has been described separately above, this does not mean that the measures in each embodiment cannot be advantageously used in combination. Without departing from the scope of the present application, those skilled in the art may make various substitutions and modifications, and these substitutions and modifications should all fall within the scope of the present application.

Claims

1. A display control method, characterized in that: The method is applied to a processor, and the method includes: In response to detecting that a startup operation has been executed on the server, controlling the display to display first information; the first information is used to indicate that the processor has responded to the first interface content of the startup operation; After the processor is started up, in response to detecting that the first controller and / or the second controller performs an initialization operation, the first information is updated using the second information, and the display is controlled to display the second information; wherein the second information is used to indicate the second interface content of the initialization state of the first controller and / or the second controller; the processor continues to control the display output without switching the control of the display by the first controller to the second controller after the initialization of the second controller is completed.

2. The method according to claim 1, characterized in that The second information includes third information for describing an initialization state of the first controller; After the processor is started, in response to detecting that the first controller and / or the second controller performs an initialization operation, updating the first information using second information, and controlling the display to display the second information, includes: in response to receiving a first detection signal from the first controller and not receiving a second detection signal from the second controller, updating the first information with the third information; The display is controlled to display the third information.

3. The method according to claim 2, characterized in that The updating of the first information by using the third information further includes: Acquire a first initialization progress identifier for describing an initialization operation performed by the first controller; determining an execution status of a first initialization operation corresponding to the first initialization progress indicator; and The third information is generated according to an execution state of the first initialization operation.

4. The method according to claim 3, characterized in that The generating the third information according to the execution status of the first initialization operation includes: determining first operation information for describing the first initialization operation; and The third information is generated according to an execution state of the first initialization operation and the first operation information.

5. The method according to claim 1, wherein The second information includes fourth information for describing an initialization state of the second controller; After the processor is started, in response to detecting that the first controller and / or the second controller performs an initialization operation, updating the first information using second information, and controlling the display to display the second information, includes: in response to receiving a first detection signal from the first controller and not receiving a second detection signal from the second controller, updating the first information using the fourth information; The display is controlled to display the fourth information.

6. The method according to claim 5, characterized in that Updating the first information using the fourth information further includes: Acquire a second initialization progress identifier for describing the execution of an initialization operation by the second controller; determining an execution status of a second initialization operation corresponding to the second initialization progress indicator; and The fourth information is generated according to an execution state of the second initialization operation.

7. The method according to claim 6, characterized in that The generating of the fourth information according to the execution status of the second initialization operation includes: determining second operation information for describing the second initialization operation; and The fourth information is generated according to the execution state of the second initialization operation and the second operation information.

8. The method according to any one of claims 1 to 7, characterized in that The controlling the display to display the second information includes: When it is determined that the second information is in an image format, the second information is written into a frame buffer area of ​​the display, so that the display obtains the second information from the frame buffer area of ​​the display and displays the second information.

9. The method according to claim 8, characterized in that The second information includes at least one of the following: information indicating the initialization progress of the first controller or the second controller; Used to indicate hardware operating status result information detected during the execution of the initialization operation by the first controller or the second controller; Remote management interface information for indicating the operation interface layout and interface loading progress of remotely maintaining the server.

10. The method according to claim 1, characterized in that After the processor is started, in response to detecting that the first controller and the second controller perform an initialization operation, the first information is updated using the second information, and the display is controlled to display the second information, further comprising: In response to receiving a first detection signal from a first controller and a second detection signal from a second controller, respectively acquiring third information describing an initialization state of the first controller and fourth information describing an initialization state of the second controller; The second information is determined from the third information and the fourth information.

11. The method according to claim 10, characterized in that The determining the second information from the third information and the fourth information includes: The second information is determined from the third information and the fourth information according to a predetermined priority.

12. The method according to claim 11, characterized in that The determining the second information from the third information and the fourth information includes: In response to receiving a selection operation for a target data source, determining information corresponding to the target data source from the third information and the fourth information as the second information; The target data source includes any one of the following: the first controller and the second controller.

13. The method according to claim 1, wherein The method further comprises: After the processor is started, in response to not receiving a second detection signal from the second controller and not receiving a first detection signal from the first controller within a first predetermined time period, detecting a cause of signal abnormality; generating abnormality information according to the cause of the abnormal signal; and The first information is updated using the abnormal information, and the display is controlled to display the abnormal information.

14. The method according to claim 13, characterized in that The generating of abnormality information according to the abnormality cause of the detection signal includes: Determining a target code and prompt information associated with the cause of the signal abnormality; and The exception information is generated according to the target code and the prompt information.

15. The method according to claim 14, characterized in that The method further comprises: In response to determining that the first controller has not completed the initialization operation within the second predetermined time period, the display is controlled to display fifth information; wherein, the fifth information indicates abnormal information of the first controller and first prompt information for troubleshooting the abnormality of the first controller.

16. The method according to claim 15, characterized in that The method further comprises: In response to determining that the second controller has not completed the initialization operation within the third predetermined time period, the display is controlled to display sixth information; wherein, the sixth information indicates abnormal information of the second controller and second prompt information for troubleshooting abnormalities of the first controller.

17. The method according to claim 1, wherein The method further comprises: In response to detecting that the server is powered on, dividing the first controller and the second controller into independent storage areas; and The first controller and the second controller are respectively configured with respective universal input and output detection signal detection interfaces so as to detect the initialization status of the first controller and the second controller.

18. A display control device, comprising: A first controller, a second controller, a processor, and a display deployed in a server; The processor is communicatively connected to the first controller, the second controller and the display respectively; The processor is configured to control the display to display first information in response to detecting a startup operation executed on the server; the first information is configured to indicate that the processor has responded to first interface content of the startup operation; The first controller is configured to perform a first initialization operation and send a first detection signal to the processor after the processor is started; The second controller is configured to perform a second initialization operation and send a second detection signal to the processor after the processor is started; The processor is further configured to, after the processor is started up, receive a first detection signal and / or a second detection signal from the first controller and / or the second controller, replace the first information with second information, and control the display to display the second information; wherein the second information is used to indicate a second interface content of an initialization state of the first controller and / or the second controller; and the processor is configured to continuously control the display output without switching control of the display from the first controller to the second controller after the second controller is initialized. The display displays the first information when the server is started; and displays the second information when the first controller and / or the second controller performs an initialization operation.

19. The display control device according to claim 18, comprising: The first controller is configured to send a first detection signal to the processor during execution of the first initialization operation; The processor is configured to, when receiving the first detection signal and not receiving the second detection signal, update the first information using third information describing an initialization state of the first controller; and control the display to display the third information; The display is used to display the third information.

20. The display control device according to claim 18, comprising: The second controller is configured to send a second detection signal to the processor during execution of the second initialization operation; The processor is configured to, when receiving the second detection signal and not receiving the first detection signal, update the first information using fourth information describing an initialization state of the second controller; and control the display to display the fourth information; The display is used to display the fourth information.

21. The display control device according to claim 18, wherein the processor is further configured to: After the processor is started, in response to not receiving a second detection signal from the second controller and not receiving a first detection signal from the first controller within a first predetermined time period, detecting a cause of signal abnormality; Generate abnormal information according to the cause of the signal abnormality; as well as updating the first information using the abnormal information, and controlling the display to display the abnormal information; The display is used to display the abnormal information.

22. The display control device according to claim 18, wherein: The processor is further configured to: In response to determining that the first controller has not completed the initialization operation within the second predetermined time period, controlling the display to display fifth information; wherein the fifth information indicates abnormal information of the first controller and first prompt information for troubleshooting the abnormality of the first controller; The display is used to display the fifth information.

23. The display control device according to claim 18, wherein: The processor is further configured to: In response to determining that the second controller has not completed the initialization operation within the third predetermined time period, controlling the display to display sixth information; wherein the sixth information indicates abnormal information of the second controller and second prompt information for troubleshooting abnormalities of the first controller; The display is used to display the sixth information.

24. A computer-readable storage medium having a computer program or instruction stored thereon, characterized in that: When the computer program or instructions are executed by a processor, the steps of the method according to any one of claims 1 to 17 are implemented.

25. A computer program product comprising a computer program, which, when executed by a processor, implements the method according to any one of claims 1 to 17.

Citation Information

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