Power-on and power-off time sequence detection method and device

Abstract

The invention discloses a power-on and power-off time sequence detection method, and the method comprises the steps: collecting first voltage signals of a plurality of channels of a circuit board through a dual-threshold hysteresis comparator circuit in response to the power-on and power-off of the circuit board, and collecting second voltage signals of the plurality of channels of the circuit board through a voltage following circuit, a rising edge threshold value and a falling edge threshold value are arranged in the dual-threshold hysteresis comparator circuit; based on the first voltage signal of each channel and a rising edge threshold value or a falling edge threshold value, recording rising edge triggering time information or falling edge triggering time information of each channel; and recording time information corresponding to the second voltage signal of each channel. According to the technical scheme, through the characteristics of multi-channel acquisition, threshold setting, time information recording and the like, the problems of an existing oscilloscope in time sequence measurement can be effectively solved, the accuracy and efficiency of measurement are improved, and the stability and reliability of a system are ensured.

Description

Technical Field

[0001] This application relates to the field of printed circuit board (PCB) detection, and particularly to a power-on and power-off timing detection method and device. Background Art

[0002] In the design of electronic systems, the power-on and power-off timing of a printed circuit board is crucial for the stability and reliability of the system. A reliable system requires strict power-on and power-off timing logic to ensure the correct operating sequence of each component. Currently, in order to measure the timing of a printed circuit board and detect timing problems, an oscilloscope is usually used for measurement. However, existing oscilloscopes have certain limitations in measuring the timing of a printed circuit board and detecting timing problems. Therefore, a more efficient and simple method is needed for timing measurement and problem location. Summary of the Invention

[0003] An embodiment of this application provides a power-on and power-off timing detection method, including: in response to the power-on and power-off of a printed circuit board, collecting first voltage signals of multiple channels of the printed circuit board through a dual-threshold hysteresis comparator circuit, and collecting second voltage signals of multiple channels of the printed circuit board through a voltage follower circuit, where an upper edge threshold and a lower edge threshold are set in the dual-threshold hysteresis comparator circuit; based on the first voltage signal and the upper edge threshold or the lower edge threshold of each channel, recording the time information of the upper edge trigger or the time information of the lower edge trigger of each channel; recording the time information corresponding to the second voltage signal of each channel.

[0004] Optionally, the method further includes: generating a digital acquisition waveform diagram corresponding to each channel based on the time information of the upper edge trigger or the time information of the lower edge trigger of each channel; generating an analog acquisition waveform diagram corresponding to each channel based on the time information corresponding to each second voltage signal.

[0005] Optionally, the method further includes: obtaining the timing template of each channel of the printed circuit board according to the identifier of the printed circuit board; determining the upper edge threshold or the lower edge threshold according to the timing template of each channel of the printed circuit board.

[0006] Optionally, based on the first voltage signal and the upper edge threshold or the lower edge threshold of each channel, recording the time information of the upper edge trigger or the time information of the lower edge trigger of each channel includes: when the first voltage signal of the first channel is greater than or equal to the upper edge threshold or less than or equal to the lower edge threshold, starting a timing timer and recording the time information of the upper edge trigger or the time information of the lower edge trigger of the first channel; when the first voltage signal of the (m + 1)-th channel is greater than or equal to the upper edge threshold or less than or equal to the lower edge threshold, interrupting the timing of the m-th channel and recording the time information of the upper edge trigger or the time information of the lower edge trigger of the (m + 1)-th channel, where m is greater than or equal to 1.

[0007] Optionally, the method further includes: after the circuit board is powered on and off, polling a task pool according to a preset period; when the task pool contains a timing processing task, calling a data processing model to execute the timing processing task to analyze and process the time information triggered by the rising edge or the falling edge of each channel; when the task pool contains a voltage sampling task, calling a data processing model to execute the voltage sampling task to analyze and process the time information corresponding to each second voltage signal.

[0008] Optionally, the method further includes: when the task pool contains a key value processing task, calling a key matrix scanning model to execute the key value processing task to obtain a corresponding key value from the key value processing task; determining whether the key value is valid, and if the key value is valid, responding to the corresponding operation based on the key value.

[0009] Optionally, the operation includes any one of the following: an operation to turn on each channel, an operation to turn off each channel, an operation to select each channel, or an operation to display the detection data of each channel.

[0010] Optionally, the method further includes: when the task pool contains a timeout processing task, calling a timeout processing model; analyzing the timeout processing task through the timeout processing model to determine whether the detection duration of the circuit board meets a preset duration.

[0011] Optionally, the method further includes: after recording the time information triggered by the rising edge or the falling edge of the last channel of the circuit board, clearing the time information of the timing timer and turning off the timing timer; after the timing timer is turned off, clearing the time information of the voltage sampling timer and turning off the voltage sampling timer; after the voltage sampling timer is turned off, clearing the time information of the timeout timer and turning off the timeout timer.

[0012] An embodiment of the present application further provides a power-on and power-off timing detection device, including a processor and a memory. The device further includes a dual-threshold hysteresis comparator circuit and a voltage follower circuit, and a rising edge threshold and a falling edge threshold are set in the dual-threshold hysteresis comparator circuit; an executable program is stored in the memory, and the memory executes the executable program to perform the following steps: in response to the power-on and power-off of the circuit board, collecting first voltage signals of multiple channels of the circuit board through the dual-threshold hysteresis comparator circuit, and collecting second voltage signals of multiple channels of the circuit board through the voltage follower circuit; based on the first voltage signal of each channel and the rising edge threshold or the falling edge threshold, recording the time information triggered by the rising edge or the falling edge of each channel; recording the time information corresponding to the second voltage signal of each channel. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a flowchart of the power-on and power-off timing detection method according to an embodiment of the present application;

[0014] Figure 2 Flow chart of the power-on and power-off timing detection method for another embodiment of the present application;

[0015] Figure 3 Flow chart of the power-on and power-off timing detection method for still another embodiment of the present application;

[0016] Figure 4 Flow chart of the power-on and power-off timing detection method for yet another embodiment of the present application;

[0017] Figure 5 Flow chart of the power-on and power-off timing detection method for yet another embodiment of the present application;

[0018] Figure 6 Flow chart of the power-on and power-off timing detection method for yet another embodiment of the present application;

[0019] Figure 7 Flow chart of the power-on and power-off timing detection method for yet another embodiment of the present application;

[0020] Figure 8 Schematic diagram of the power-on and power-off timing detection device for an embodiment of the present application. Detailed implementation manners

[0021] Various solutions and features of the present application are described herein with reference to the accompanying drawings.

[0022] It should be understood that various modifications can be made to the embodiments applied herein. Therefore, the above description should not be regarded as a limitation, but only as an example of the embodiments. Those skilled in the art will think of other modifications within the scope and spirit of the present application.

[0023] The accompanying drawings included in and constituting a part of this specification illustrate embodiments of the present application and, together with the general description of the present application given above and the detailed description of the embodiments given below, are used to explain the principles of the present application.

[0024] These and other features of the present application will become apparent from the following description of the preferred forms of the embodiments given as non-limiting examples with reference to the accompanying drawings.

[0025] It should also be understood that although the present application has been described with reference to some specific examples, those skilled in the art can surely implement many other equivalent forms of the present application.

[0026] When combined with the accompanying drawings, the above and other aspects, features, and advantages of the present application will become more apparent in view of the following detailed description.

[0027] Specific embodiments of the present application will be described hereinafter with reference to the accompanying drawings; however, it should be understood that the embodiments claimed are merely examples of the present application and can be implemented in various ways. Well-known and / or repetitive functions and structures are not described in detail to avoid obscuring the present application with unnecessary or redundant details. Therefore, the specific structural and functional details claimed herein are not intended to be limiting, but are merely a basis and representative basis for the claims to teach those skilled in the art to use the present application in substantially any suitable detailed structure in a variety of ways.

[0028] This specification may use the phrase "in one embodiment", "in another embodiment", "in yet another embodiment", or "in other embodiments", each of which may refer to one or more of the same or different embodiments according to the present application.

[0029] In the design of electronic systems, the power-on and power-off timing of the circuit board is crucial for the stability and reliability of the system. A reliable system requires strict power-on and power-off timing logic to ensure the correct operating sequence of each component. Currently, in order to measure the timing of the circuit board and detect timing problems, an oscilloscope is usually used for measurement. However, the oscilloscope has some disadvantages in this regard: (1) Limited number of channels: The number of channels of the oscilloscope is limited. For some timings, multiple signal lines need to be measured, even a dozen or even dozens of them, which increases the inconvenience of measurement. (2) Complex operation: The operation of the oscilloscope is relatively complex and requires a certain amount of professional knowledge to operate correctly. This makes the measurement of timing cumbersome and is not conducive to quickly locating and solving problems. Based on the above disadvantages, the existing oscilloscopes have certain limitations in measuring the circuit board timing and detecting timing problems, and a more efficient and simple method is needed for timing measurement and problem location.

[0030] An embodiment of the present application proposes a power-on and power-off timing detection method, which can simultaneously collect the first and second voltage signals of multiple channels of the circuit board through a dual-threshold hysteresis comparator circuit and a voltage follower circuit, thereby realizing multi-channel timing detection and avoiding the limitation of the limited number of channels of the oscilloscope. An ascending edge threshold and a descending edge threshold are set in the dual-threshold hysteresis comparator circuit, which can accurately capture the change of the signal and ensure accurate recording of the trigger time information of the ascending edge and the descending edge. Based on the first voltage signal of each channel and the set threshold, the time information of the ascending edge and the descending edge trigger of each channel is recorded, and at the same time, the time information corresponding to the second voltage signal of each channel is recorded, providing accurate data support for system timing analysis. The method of the present application is simpler to operate than the oscilloscope, reduces the operation complexity, makes the timing measurement more convenient, is conducive to quickly locating and solving problems, and improves work efficiency.

[0031] The power-on and power-off timing detection method of the present application will be described in detail below with reference to the accompanying drawings. Figure 1The flowchart of the power-on and power-off timing detection method according to the embodiments of the present application is as follows Figure 1 As shown, the method includes the following steps:

[0032] S110: In response to the power-on and power-off of the circuit board, collect the first voltage signals of multiple channels of the circuit board through a dual-threshold hysteresis comparator circuit, and collect the second voltage signals of multiple channels of the circuit board through a voltage follower circuit. An ascending edge threshold and a descending edge threshold are set in the dual-threshold hysteresis comparator circuit.

[0033] The above power-on and power-off timing detection method can be applied to detect a power-on and power-off timing detection device, which may include a dual-threshold hysteresis comparator circuit and a voltage follower circuit. For example, the first voltage signals of multiple channels of the circuit board can be collected in a digital acquisition manner through the dual-threshold hysteresis comparator circuit. The second voltage signals of multiple channels of the circuit board can be collected in an analog acquisition manner through the voltage follower circuit.

[0034] Specifically, the dual-threshold hysteresis comparator circuit is a circuit design used to compare input signals and trigger corresponding actions according to preset ascending edge and descending edge thresholds. For example, in the power-on and power-off timing detection device, through the dual-threshold hysteresis comparator circuit, the first voltage signals of multiple channels of the circuit board can be collected in a digital acquisition manner, and the circuit can detect whether the signal reaches or exceeds the set threshold, thereby triggering the recording of corresponding time information. The voltage follower circuit is a circuit design used to follow the change of the input signal and output the corresponding voltage signal. For example, in the power-on and power-off timing detection device, through the voltage follower circuit, the second voltage signals of multiple channels of the circuit board can be collected in an analog acquisition manner. And the circuit can follow the change of the signal in real time and output the corresponding voltage signal for recording time-related information.

[0035] Through the dual-threshold hysteresis comparator circuit and the voltage follower circuit in the embodiments of the present application, different types of voltage signals of multiple channels of the circuit board can be collected simultaneously, realizing the comprehensive monitoring and recording of signal changes. In this way, the trigger time information of the ascending edge and the descending edge can be captured more accurately, providing more reliable data support for system timing analysis. This method combines digital acquisition and analog acquisition methods, providing a more comprehensive information acquisition means for timing detection, which helps to improve the measurement accuracy and system stability.

[0036] Exemplarily, the circuit board can be an important component in an electronic device. For example, it can be various types of main boards, also known as motherboards or system boards. Different types of main boards have different channel numbers and configurations in design to meet the functional requirements of specific devices.

[0037] Specifically, motherboards of different models have different numbers of channels. A channel refers to a path for transmitting data or signals and is used to connect various components and external devices. Some motherboards can be configured with a small number of channels for connecting basic components, while some motherboards can be configured with more channels for connecting more external devices or expansion cards. The channel configuration of a motherboard depends on the design and purpose of the device. Channels can be of various types, such as data transmission channels, audio channels, video channels, etc. These channels can support different types of data transmission and communication requirements. Different models of motherboards support different types of channels, including PCI (Peripheral Component Interconnect), PCIe (PCI Express), SATA (Serial ATA), USB (Universal Serial Bus), etc. These channels can connect various devices, such as graphics cards, sound cards, storage devices, external devices, etc. The channels on the motherboard follow different standards and specifications, such as PCIe 3.0, USB 3.0, SATA 6Gb / s, etc. These standards define the transmission speed, bandwidth, and compatibility of the channels, affecting the data transmission efficiency and stability between devices.

[0038] Exemplarily, the rising edge threshold and the falling edge threshold set in the above-mentioned dual-threshold hysteresis comparator circuit can be determined according to the types of each channel in the circuit board. In the dual-threshold hysteresis comparator circuit, the rising edge threshold and the falling edge threshold are key parameters for judging the state change of the input signal. These two thresholds respectively define the voltage levels that the input signal needs to reach when converting from a low level to a high level (rising edge) and from a high level to a low level (falling edge). Different signal channels can have different electrical characteristics, such as voltage range, signal waveform, rise and fall times, etc. Therefore, the setting of the rising edge threshold and the falling edge threshold should be based on the specific type and application requirements of each channel. For example, for digital signals, the threshold is usually selected as the intermediate value between the logical high level and the logical low level of the signal to ensure the stability and reliability of the signal. For analog signals, the peak value, noise level, and possible interference of the signal need to be considered. In different working environments, factors such as temperature, humidity, and electromagnetic interference may affect the quality of the signal. Therefore, the setting of the threshold should also consider these external factors to ensure reliability under various conditions.

[0039] With the rising edge threshold and the falling edge threshold determined according to the types of each channel in the circuit board, the dual-threshold hysteresis comparator can effectively reduce false triggering and missed triggering phenomena, improving the accuracy and reliability of timing detection. This flexible threshold setting method enables the circuit to widely adapt to different types of signal channels and meet the requirements of complex circuit designs.

[0040] In some embodiments of the present application, the power-on and power-off timing detection device is connected to the circuit board of the device under test. For example, the power-on and power-off timing detection device is equipped with multiple probes, and these probes can be physically connected to the pins of the circuit board through jigs or plugs. According to the design of the circuit board, the probes can adopt different types of connection methods, such as: directly soldering to the test points of the circuit board, using spring clips or test jigs for convenient and quick connection and disconnection. Using standardized connectors, such as Dupont wires or other types of plugs, is convenient for multiple connections and disconnections. When the device under test is powered on or off, the probes of the power-on and power-off timing detection device monitor the voltage changes in each channel of the circuit board in real time. After the probes are connected to the pins of the circuit board, they can capture the voltage signals generated by the circuit board during the power-on and power-off processes, such as the first voltage signal and the second voltage signal. The first voltage signal is collected by the dual-threshold hysteresis comparator circuit, which is mainly used to judge the rising edge and falling edge of the signal to ensure that the voltage changes during power-on and power-off can be accurately captured. The second voltage signal is collected by the voltage follower circuit, which provides a more stable voltage output for subsequent data processing and analysis.

[0041] The power-on and power-off timing detection device supports multi-channel detection. Users can select the number of channels to be connected according to actual needs, such as detecting 2, 3, 4, 5, 6, 7... n channels. Each channel can be monitored independently to ensure comprehensive timing information is obtained. When the device is connected, users can select the channels to be monitored through a selection switch or a software interface to ensure that the system can adapt flexibly to different test requirements. Through effective connection with the circuit board, the power-on and power-off timing detection device can monitor and record the voltage changes in each channel in real time, providing accurate timing information, which helps engineers analyze power management and signal integrity. The collected voltage signals can be further processed and analyzed to help identify potential design defects or faults and optimize the device performance. The power-on and power-off timing detection device realizes real-time monitoring and signal acquisition of multiple channels through effective connection with the circuit board of the device under test. This flexible connection method and multi-channel support enable the present invention to adapt to various complex test requirements and provide a powerful tool for the development and debugging of electronic devices.

[0042] S120: Based on the first voltage signal of each channel and the rising edge threshold or the falling edge threshold, record the time information of the rising edge trigger or the falling edge trigger of each channel.

[0043] Exemplarily, during the power-on and power-off process of the circuit board, it is determined whether there is a rising edge trigger or a falling edge trigger by comparing the first voltage signal with the rising edge threshold or the falling edge threshold.

[0044] Specifically, based on the first voltage signal of each channel and the rising edge threshold or falling edge threshold, record the time information of the rising edge trigger or falling edge trigger of each channel, including: when the first voltage signal of the first channel is greater than or equal to the rising edge threshold or less than or equal to the falling edge threshold, start the timing timer and record the time information of the rising edge trigger or falling edge trigger of the first channel; when the first voltage signal of the (m + 1)-th channel is greater than or equal to the rising edge threshold or less than or equal to the falling edge threshold, interrupt the timing of the m-th channel and record the time information of the rising edge trigger or falling edge trigger of the (m + 1)-th channel, where m is greater than or equal to 1.

[0045] Based on the above embodiments, the power-on and power-off timing detection device continuously monitors the first voltage signal of each channel through a dual-threshold hysteresis comparator. The voltage signal of each channel is compared with a preset rising edge threshold or falling edge threshold. The rising edge threshold sets a voltage level, when the first voltage signal reaches or exceeds this value, it indicates that a rising edge occurs in the signal. The falling edge threshold sets a voltage level, when the first voltage signal drops to or below this value, it indicates that a falling edge occurs in the signal. For example, when the first voltage signal of the first channel is greater than or equal to the rising edge threshold, the timing timer is started and begins timing. This marks the rising edge trigger event of the first channel. Similarly, when the first voltage signal of the first channel is less than or equal to the falling edge threshold, the timing timer is also started to record the time information of the falling edge trigger event. After the timer is started, the current timestamp is recorded as the time information of the rising edge or falling edge trigger of the first channel. This time information is usually in milliseconds or microseconds to ensure high precision. The timing timer of each channel can operate independently to ensure that the trigger events of different channels do not interfere with each other. When the first voltage signal of the (m + 1)-th channel is greater than or equal to the rising edge threshold, interrupt the timer of the m-th channel and record the time information of the rising edge trigger of the (m + 1)-th channel. If the first voltage signal of the (m + 1)-th channel is less than or equal to the falling edge threshold, interrupt the timer of the m-th channel and record the time information of the falling edge trigger. This operation ensures that at any time, as long as a new rising edge or falling edge is triggered, the system can record the time information of this event in a timely manner and interrupt the timing of the previous channel to accurately track the change of the signal. Through the above mechanism, the rising edge and falling edge trigger time information of each channel can be recorded with high precision. This mechanism not only improves the accuracy of timing detection but also provides reliable data support for subsequent analysis.

[0046] S130: Record the time information corresponding to the second voltage signal of each channel.

[0047] Exemplarily, during the process of detecting multiple channels in a circuit board by the power-on and power-off timing detection device, the second voltage signals of multiple channels in the circuit board can be collected through a voltage follower circuit, and the time information corresponding to the second voltage signal of each channel can be recorded. For example, a voltage follower circuit (also known as a buffer amplifier) is a circuit that can provide a high input impedance and a low output impedance, usually configured using an operational amplifier. Its main function is to "follow" the voltage level of the input signal to the output end to ensure the integrity and stability of the signal. In the power-on and power-off timing detection device, the voltage follower circuit is used to collect the second voltage signals of multiple channels in the circuit board. By using a voltage follower circuit, the load effect of the signal source can be avoided, ensuring that the collected signal is accurate and distortion-free. The input end of the voltage follower circuit is connected to the voltage output point of each channel in the circuit board. The voltage signal of each channel is processed by the voltage follower circuit. The output end of the voltage follower circuit provides a stable second voltage signal, which is the same as the input signal but has a stronger driving ability and is suitable for subsequent signal processing and recording. While the voltage follower circuit outputs the second voltage signal, the time information corresponding to this signal is recorded. This time information is generated by a voltage sampling timer, usually in milliseconds or microseconds. The second voltage signal of each channel and its corresponding time information can be stored in a data recorder. This recording method ensures that the voltage change of each channel corresponds one-to-one with the time information, facilitating subsequent analysis. The power-on and power-off timing detection device can process the signals of multiple channels simultaneously. The voltage follower circuit of each channel can work independently to ensure that the signals of different channels do not interfere with each other. The second voltage signals of all collected channels and their time information can be integrated into a time series data set. In this way, engineers can comprehensively analyze the timing behavior of the entire system. Through the application of the voltage follower circuit, the collected second voltage signals have high integrity and stability, reducing signal distortion caused by impedance mismatch. The corresponding relationship between the recorded time information and the voltage signal makes subsequent data analysis more efficient, enabling the rapid identification of the signal change trend and its corresponding time point.

[0048] By collecting the second voltage signals of multiple channels in the circuit board through the voltage follower circuit and recording the corresponding time information, the power-on and power-off timing detection device can achieve efficient and accurate timing monitoring. This method not only improves the quality of signal collection but also provides reliable data support for subsequent analysis and optimization.

[0049] In an embodiment of the present application, the above power-on and power-off timing detection method, as Figure 2 shown, may further include the following steps:

[0050] S210: Generate the digital acquisition waveform diagram corresponding to each channel based on the time information triggered by the rising edge or the falling edge of each channel.

[0051] Exemplarily, a data visualization tool or programming language (such as Matplotlib in Python, MATLAB, etc.) is used to generate a data acquisition waveform diagram. These tools can process time series data and plot the corresponding waveforms. For example, the recorded time information and voltage signals are imported into the plotting tool, and the plotting tool automatically generates a data acquisition waveform diagram, such as a line chart, based on the time information and the first voltage signal. A line chart is used to represent the change of voltage over time. When the rising edge is triggered, the voltage value jumps upward; when the falling edge is triggered, the voltage value jumps downward. Additionally, the generated data acquisition waveform diagram can help engineers identify signal characteristics, such as rise time, fall time, signal stability, etc. These characteristics are crucial for system performance analysis and fault troubleshooting. By observing the waveform diagram, the timing relationship between each channel can be analyzed to identify potential timing problems. The generated waveform diagram can be organized into a report together with other analysis results for easy communication and decision-making within the team.

[0052] S220: Generate analog acquisition waveform diagrams corresponding to each channel based on the time information corresponding to each of the second voltage signals.

[0053] Exemplarily, a data visualization tool (such as Matplotlib in Python, MATLAB, etc.) is used to generate analog acquisition waveform diagrams. These tools can process time series data and generate the corresponding waveforms. The recorded time information and voltage signals are imported into the plotting tool, and the plotting tool automatically generates a data acquisition waveform diagram, such as a line chart, based on the time information and the second voltage signal. A line chart is used to represent the change of voltage over time. The analog acquisition waveform usually shows the change process of the voltage value over time, clearly demonstrating the signal fluctuations. The generated analog acquisition waveform diagram can help engineers identify signal characteristics, such as rise time, fall time, signal stability, etc. These characteristics are crucial for system performance analysis and fault troubleshooting. By observing the waveform diagrams of different channels, the timing relationship between each channel can be analyzed to identify potential timing problems. The generated analog acquisition waveform diagram can be organized into a report together with other analysis results for easy communication and decision-making within the team.

[0054] By generating analog acquisition waveform diagrams based on the time information corresponding to the second voltage signals of each channel, engineers can intuitively observe and analyze the signal changes. This visualization method not only improves the efficiency of data analysis but also provides strong support for subsequent fault troubleshooting and performance optimization.

[0055] Based on the above embodiments, the data acquisition waveform diagram usually represents the data of discrete sampling points and is suitable for the representation of digital signals. In the data acquisition waveform diagram, the changes of the rising edge and the falling edge are relatively obvious, which is suitable for timing analysis. The data acquisition waveform diagram is generated based on actual sampling data and can accurately reflect the instantaneous changes of the signal. Engineers can clearly identify the characteristics such as the rising edge, the falling edge, and the peak value of the signal, which is convenient for timing analysis. When processing digital signals, digital filters can be used to suppress noise and improve the reliability of the data. The analog acquisition waveform diagram usually represents a continuously changing analog signal and can reflect the smooth change of the signal. Through interpolation or other methods, the analog acquisition waveform diagram can show the changes of the signal between sampling points. The analog acquisition waveform diagram can more intuitively show the change trend of the signal, is suitable for observing the overall shape of the signal, can display the subtle changes of the signal, and is applicable to in-depth analysis of the signal waveform. When processing analog signals, the analog acquisition waveform diagram can more truly reflect the characteristics of the signal. When engineers perform signal analysis, the following aspects can be considered to compare the data acquisition waveform diagram and the analog acquisition waveform diagram. The data acquisition waveform diagram is easier to identify specific trigger events (such as the rising edge, the falling edge) and instantaneous values. The analog acquisition waveform diagram can provide richer context information, which is convenient for observing the smooth change and trend of the signal. The data acquisition waveform diagram usually appears as discrete points or a stepped shape and is suitable for displaying transient responses. The analog acquisition waveform diagram appears as a continuous curve and is suitable for showing the overall shape and trend of the signal.

[0056] In an embodiment of the present application, the above power-on and power-off timing detection method, as Figure 3 shown, may further include the following steps:

[0057] S310: Obtain the timing templates of each channel of the circuit board according to the identification of the circuit board.

[0058] Exemplarily, each circuit board is usually set with a unique identifier (such as model number, version number, serial number, etc.). Through this information, the type and characteristics of the circuit board can be quickly identified. Different types of circuit boards (such as digital circuit boards, analog circuit boards, mixed-signal circuit boards, etc.) have different timing characteristics and operating parameters. Therefore, the identifier can help the system select the correct timing template for analysis. The timing template for each channel contains timing parameters specific to that channel, such as voltage level, time delay, noise tolerance, etc. These templates are generated based on the analysis of the signal characteristics of the circuit board and the test results. The timing template can be directly stored locally in the power-on / power-off timing detection device, so that it can be quickly accessed and used without a network connection. The timing template can be stored in a remote background database and accessed through the network. This is convenient for centralized management and version control of data, allows the template to be updated and maintained, and ensures that all devices use the latest timing template. The timing template can also be stored in an external storage device (such as a USB flash drive, external hard drive, etc.), which is convenient for carrying and backup and is suitable for temporary detection or the needs of different projects.

[0059] In the timing template, it contains relevant parameters for calculating the rising edge and falling edge thresholds. These parameters can include: voltage level, time delay, noise tolerance, and so on. The voltage level defines the voltage value at which the signal is considered high level or low level. The time delay is the time delay required for the signal to reach the threshold, which is used to compensate for signal propagation delay and response time. The noise tolerance takes into account environmental noise, and the set threshold may need to include a certain tolerance to avoid misjudgment.

[0060] By effectively utilizing the circuit board identifier and reasonably storing the timing template, the power-on / power-off timing detection device can achieve efficient and accurate signal monitoring and analysis. This not only improves the detection accuracy but also provides convenience for fault troubleshooting and system maintenance. Engineers can flexibly select and apply the corresponding timing template according to the characteristics of different circuit boards, thereby optimizing the detection process.

[0061] S320: Determine the rising edge threshold or the falling edge threshold according to the timing template of each channel of the circuit board.

[0062] Exemplarily, according to parameters such as voltage levels, time delays, noise tolerances, etc. in the timing templates of each channel, the rising edge threshold or the falling edge threshold corresponding to each channel is determined. For example, in power-on and power-off timing detection, the voltage level refers to the specific voltage value at which a signal is considered "high" or "low". Usually, a rising edge threshold and a falling edge threshold can be initially set according to the voltage level to distinguish between the high level and the low level of a digital signal. The high level threshold is usually set to a certain percentage of the maximum expected voltage of the signal (such as 5V or 3.3V), for example, 70% to 80%. That is, when the signal voltage exceeds this value, the signal is considered to be in the high level state. The low level threshold is usually set to a certain percentage of the minimum expected voltage of the signal (such as 0V), for example, 20% to 30%. When the signal voltage is lower than this value, the signal is considered to be in the low level state.

[0063] The time delay refers to the time required for a signal to reach the threshold from the input. This parameter is very important for compensating for signal propagation delay and circuit response time. Rising edge time delay During the process of the signal rising from the low level to the high level, it is necessary to calculate the time required for the signal to reach the high level threshold. This can be determined by analyzing the characteristics of the circuit (such as the influence of capacitance and resistance). Falling edge time delay Similarly, during the process of the signal falling from the high level to the low level, it is also necessary to calculate the time required for the signal to reach the low level threshold. This delay can help the system accurately judge the state change of the signal. The noise tolerance refers to the range of voltage fluctuations that the system can accept to avoid misjudgment caused by noise. Noise boundary A noise tolerance range is set according to the characteristics of the signal and the noise level of the working environment. Usually, this range is adjusted according to the actual test results. When determining the rising edge and falling edge thresholds, a certain noise tolerance can be added or subtracted based on the voltage level. For example, if the high level threshold is set to 3.5V and the noise tolerance is ±0.2V, then the actual judgment threshold range is 3.3V to 3.7V.

[0064] In an embodiment of the present application, the above power-on and power-off timing detection method, as Figure 4 shown, may further include the following steps:

[0065] S410: After the power-on and power-off of the circuit board, poll the task pool according to a preset period.

[0066] Exemplarily, when performing circuit board detection, the signal changes of each channel are monitored in real time. For example, by capturing the time information of the rising edge and falling edge, corresponding processing tasks can be effectively generated for subsequent analysis and data acquisition. When the signal voltage of a certain channel rises from a low level (such as 0V) to a high level (such as 3.3V or 5V), the time information at this moment is recorded. This time information reflects the signal change moment and is the key data for timing analysis. Similarly, when the signal voltage drops from a high level to a low level, the time information of this falling edge is recorded. These time information can be used to judge the stability and response speed of the signal. Based on the captured rising edge and falling edge time information, timing processing tasks are generated. Each task contains the following information: channel number, trigger type, timestamp, task purpose, etc. The channel number indicates which channel the signal is from. The trigger type is either a rising edge or a falling edge. The timestamp records the exact time when the trigger event occurs. The task purpose can be used for further timing analysis, such as calculating parameters such as signal frequency, pulse width, and jitter. By analyzing these parameters, engineers can better evaluate the performance of the circuit board.

[0067] During the detection process, in addition to timing information, the voltage changes of each channel are also monitored, especially the second voltage signal. For the second voltage signal, voltage sampling tasks are generated. Each task contains the following information: channel number, sampling time, timestamp, task purpose, etc. The channel number indicates which channel the voltage signal is from. The sampling time records the time point when the voltage signal is sampled. The sampling value is the actually sampled voltage value. The task purpose is to obtain the actual voltage value of the signal for subsequent data analysis and processing, such as comparing the actual voltage with the preset voltage and evaluating the working state of the circuit.

[0068] All generated timing processing tasks and voltage sampling tasks will be stored in a task pool. The task pool is a dynamic data structure that can be continuously updated according to the tasks generated in real time. A preset period (for example, per second, per millisecond, etc.) is set according to actual needs to determine the polling frequency of the task pool. This period can be adjusted according to the urgency of the detection requirements and the processing capacity of the system. When each preset period arrives, the task pool is polled to check if it contains timing processing tasks or voltage sampling tasks. If timing processing tasks are found, the system will immediately execute the corresponding analysis algorithm to process these tasks and generate analysis results. If voltage sampling tasks are found, the system will perform the corresponding voltage data acquisition and store the sampling results or use them for subsequent analysis.

[0069] S420: When the task pool contains timing processing tasks, call the data processing model to execute the timing processing tasks to analyze and process the time information triggered by the rising edge or falling edge of each channel.

[0070] S430: When the task pool contains a voltage sampling task, call the data processing model to execute the voltage sampling task to analyze and process the time information corresponding to each second voltage signal.

[0071] Exemplarily, during the circuit board detection process, multiple timing processing tasks and voltage sampling tasks accumulate in the task pool. To ensure timely response and effective analysis, it is necessary to periodically poll the task pool to locate and process these tasks. The task pool is polled according to the set preset period. In each poll, all tasks in the task pool are checked to identify the timing processing tasks and voltage sampling tasks. Each task has a clear type identifier. For example, the timing processing task contains the time information triggered by the rising edge and falling edge. The voltage sampling task contains the corresponding voltage value and sampling time. Tasks that need to be processed immediately are filtered out according to the priority, timestamp or other specific conditions of the tasks. This filtering can ensure that high-priority tasks are processed in a timely manner, thereby improving the response ability of the system. The data processing model is an algorithm or strategy for analyzing and processing timing and voltage data. The data processing model can be a combination of technologies such as machine learning, signal processing, and statistical analysis, depending on the detection requirements. According to the actual detection requirements, the data processing model can be configured and adjusted to adapt to different application scenarios. For example, different processing strategies are adopted for certain specific signal feature data processing models.

[0072] Specifically, when a timing processing task is identified, the relevant time information (such as the rising edge and falling edge timestamps) is extracted. The following analysis methods can be adopted by the data processing model: calculate the frequency of the signal to evaluate the stability of the signal. Analyze the time difference between the rising edge and the falling edge to evaluate the pulse width of the signal. Detect changes in the time information to evaluate the jitter of the signal.

[0073] When a voltage sampling task is identified, the sampled voltage value and the corresponding time information are extracted. Evaluate the change trend of the sampled voltage over time to judge the working state of the circuit. Compare the sampled voltage with the set threshold to judge whether the circuit is working properly. Use statistical methods or machine learning models to detect outliers in the voltage sampling data and issue an alarm in a timely manner.

[0074] When polling the task pool, by locating the timing processing task and the voltage sampling task, the data processing model can be effectively called for analysis and processing. This process not only improves the efficiency of data processing, but also ensures the accuracy and timeliness of signal monitoring, providing strong support for circuit board detection. The flexible configuration of the data processing model enables the system to adapt to different detection requirements, further enhancing the reliability and effectiveness of the overall detection. The analysis results will be stored in the database for subsequent query and analysis. At the same time, alarms can be issued or engineers can be notified according to the analysis results to facilitate the timely handling of potential problems. By calling the data processing model, the signal status of the circuit board can be monitored in real time, and problems can be discovered and handled in a timely manner. The analysis results provide an important decision-making basis for engineers, helping them optimize the design and improve the production process.

[0075] In one embodiment of the present application, the above power-on and power-off timing detection method, as Figure 5 shown, may further include the following steps:

[0076] S510: When the key value processing task is included in the task pool, call the key matrix scanning model to execute the key value processing task to obtain the corresponding key value from the key value processing task.

[0077] Exemplarily, during the circuit board detection process, the user interacts with the detection system through an input device (such as buttons and arrow keys). These inputs can not only control the start and end of the detection, but also select different detection channels. To achieve effective user interaction, it is necessary to be able to generate corresponding key value processing tasks and manage and process them in a task pool. The on / off button in the power-on and power-off timing detection device is used to control the start and stop of the detection. When the user presses this button, corresponding key value processing tasks are generated according to the state of the button (pressed or released). For example, pressing the button indicates the start of the detection of a specific channel. Releasing the button indicates the stop of the detection of this channel. The arrow keys are used to select between multiple detection channels. The user can switch the currently selected channel by pressing the arrow keys. For example, the up arrow key selects the previous channel. The down arrow key selects the next channel. The state of the input device is monitored in real time. When the user presses or releases a button, this event is captured and a corresponding key value processing task is generated. Each key value processing task contains the following information: task type, key value, timestamp. The task type identifies whether it is an on / off button operation or an arrow key operation. The key value records the type of button pressed and its state (for example, on / off or the selected channel number). The timestamp records the time of the user's operation for subsequent analysis and processing. The generated key value processing tasks are added to the task pool and wait for subsequent polling processing. The task pool is polled at a preset time interval to check if there are any key value processing tasks to be processed. In each poll, the key value processing tasks are identified and the corresponding processing model is prepared to be called. The key matrix scanning model is an algorithm for parsing the state of the input device. This model can identify which buttons are pressed and generate corresponding key values according to the row and column information of the buttons.

[0078] For example, the information in the key value processing task (such as the button type and state) is passed to the key matrix scanning model. After the model executes, corresponding key values are generated according to the input button state. For example: If the user presses the on / off button, the model outputs "Start detection" or "Stop detection". If the user presses an arrow key, the model outputs the currently selected channel number. After the key matrix scanning model processes the task, the corresponding key value is obtained. Corresponding operations are performed according to the generated key value. For example: If the key value indicates "Start detection", the detection process for the specified channel is started. If the key value indicates "Switch channel", the currently selected channel is updated and the detection is prepared. Through this mechanism, the user can conveniently interact with the detection system, control the detection process in real time, quickly respond to the user's input, and improve the flexibility and efficiency of the detection process.

[0079] By monitoring the user's operations on the input device, key value processing tasks can be generated in real time and added to the task pool. During polling, the key matrix scanning model is called to parse these tasks to obtain the corresponding key values. This mechanism not only improves the user's interaction experience with the detection system but also ensures the efficiency and accuracy of the detection process.

[0080] S520: Determine whether the key value is valid. If the key value is valid, respond to the corresponding operation based on the key value. The operations include any one of the following: operations to turn on each channel, operations to turn off each channel, operations to select each channel, or operations to display the detection data of each channel.

[0081] Exemplarily, in a circuit board detection system, the key values generated by the user through the input device need to be judged for validity to ensure that the operations performed by the system are valid and meet expectations. Valid key values will trigger corresponding operations to control the detection process and data display. A valid key value refers to a value that can be recognized and corresponds to a specific operation. Invalid key values may be caused by incorrect input, undefined operations, or the current state not allowing the operation. Whether the key value is within the predefined range. For example, the channel selection key value must be within the range of the available channel numbers. Whether the current system state allows the operation. For example, if the system is in the "detecting" state, the operation of "turning on the channel" cannot be performed. If the operation represented by the key value is already in progress, there is no need to execute it repeatedly. After receiving the key value generated by the user, first parse the key value to extract relevant information (such as the operation type and channel number). Verify whether the key value conforms to the predefined format and range, judge whether the operation is feasible according to the current state, and judge whether the operation is already in progress. When it is determined that the key value is valid, respond to the corresponding operation according to the key value.

[0082] When the key value indicates "open channel", the detection process of the specified channel will be started. Determine the channel number to be opened according to the key value. Update the status of this channel to "open" and start data acquisition. Provide feedback to the user that the channel has been successfully opened. When the key value indicates "close channel", the detection process of the specified channel will be stopped. Determine the channel number to be closed according to the key value. Update the status of this channel to "closed" and stop data acquisition. Provide feedback to the user that the channel has been successfully closed. When the key value indicates "select channel", the currently selected channel will be updated. Determine the currently selected channel number according to the key value. Update the current selection status of the system so that subsequent operations are performed on this channel. Provide feedback to the user that the current channel has been successfully selected. When the key value indicates "display detection data", the detection results of the currently selected channel will be displayed. Retrieve the corresponding detection data from the database or cache according to the currently selected channel number. Display the detection data in a user-friendly format on the interface. Provide feedback to the user that the data has been successfully displayed. Whenever an operation is successfully executed, provide clear feedback to the user, including the result of the operation and the current system status. If the key value is invalid or the operation fails, provide the corresponding error message to help the user understand the problem and guide them to perform the correct operation. Through the validity judgment and the response of the corresponding operation, a smooth and intuitive user experience can be provided, ensuring that the user can easily control the detection process. The validity judgment mechanism can prevent invalid or incorrect operations and improve the stability and reliability of the system.

[0083] By judging the validity of the key value, the reliability and validity of the user input are ensured. Based on the valid key value, a series of operations can be performed, including opening / closing channels, selecting channels, and displaying detection data. This mechanism enhances the interaction ability between the user and the detection system and improves the efficiency and accuracy of the overall detection process.

[0084] In an embodiment of the present application, the above power-on / power-off timing detection method, as Figure 6 shown, may further include the following steps:

[0085] S610: When there is a timeout processing task in the task pool, call the timeout processing model.

[0086] S620: Analyze the timeout processing task through the timeout processing model to determine whether the detection duration of the circuit board meets the preset duration.

[0087] Exemplarily, during the circuit board detection process, the timeout handling task is an important mechanism to ensure that the detection process proceeds as expected. By monitoring the signal acquisition duration of each channel, potential timeout situations can be detected in a timely manner, and corresponding measures can be taken to ensure the accuracy and reliability of the detection. When starting to acquire the first voltage signal in the circuit board, a timeout handling task is generated to monitor the acquisition duration of this signal. When acquiring the second voltage signal, a timeout handling task is generated. During the entire circuit board detection process, the entire detection duration is monitored, and corresponding timeout handling tasks are generated. The timeout handling model is an algorithm used to analyze the timeout handling tasks. The main function of this model is to evaluate whether the detection timeout duration of the circuit board meets the preset duration and to determine whether the signal acquisition of each circuit is completed on time. Regularly poll the task pool to determine whether there are timeout handling tasks. When a timeout handling task is found, the timeout handling model will be called for analysis. Specifically, it is determined whether the signal acquisition duration of the dual-threshold hysteresis comparator circuit in the circuit board meets the preset duration. Record the start and end times of the acquisition of the dual-threshold hysteresis comparator circuit. Compare the actual acquisition duration with the preset duration. If the actual acquisition duration exceeds the preset duration, it is marked as a timeout and corresponding processing is performed. Determine whether the signal acquisition duration of the voltage follower circuit in the circuit board meets the preset duration. Record the start and end times of the acquisition of the voltage follower circuit. Compare the actual acquisition duration with the preset duration. If the actual acquisition duration exceeds the preset duration, it is marked as a timeout and corresponding processing is performed. Determine whether the duration of the entire circuit board detection process meets the preset duration. Record the start and end times of the entire detection process. Compare the actual detection duration with the preset duration. If the actual detection duration exceeds the preset duration, it is marked as a timeout and corresponding processing is performed.

[0088] When the timeout handling model determines that a certain acquisition process or the overall detection is timed out, the timeout handling task will be marked in the task pool, and detailed information (such as the timeout duration, relevant circuits, etc.) will be recorded. And the user will be notified of the timeout situation in a timely manner, providing specific information about the timeout so that the user can take necessary measures. The generation and analysis of the timeout handling tasks are key links in the circuit board detection system to ensure the effectiveness of the detection process. By monitoring the first voltage signal, the second voltage signal, and the overall detection duration, the system can detect timeout situations in a timely manner and analyze them through the timeout handling model to ensure the accuracy and reliability of the circuit board detection.

[0089] In an embodiment of the present application, the above power-on and power-off timing detection method, as Figure 7 shown, may further include the following steps:

[0090] S710: After recording the time information of the rising edge trigger or the falling edge trigger of the last channel of the circuit board, clear the time information of the timing timer and turn off the timing timer;

[0091] Exemplarily, during the circuit board detection process, the number and status of channels are determined. After power-on and power-off, it is necessary to manage the timing timer according to the number and status of the channels to be measured to ensure the accuracy and timeliness of the detection process. Power-on and power-off process: When the circuit board is powered on, initialization starts, preparing for signal acquisition and detection. First, identify and determine the number of channels to be measured. This is usually done by reading the configuration or status register of the circuit board. Read the channel configuration of the circuit board through a hardware interface (such as GPIO, ADC, etc.) to confirm the availability of each channel. Record the identified number of channels in a system variable for subsequent processing. The timing timer is used to track the time information of signal triggering to ensure accurate signal acquisition timing. After determining the number of channels to be measured, the timing timer will be started to record time information when the signal is triggered. When collecting the signal of the last channel in the circuit board, it will be decided when to interrupt the timing timer based on the time information triggered by the rising edge or falling edge. If the signal of the last channel is triggered at the rising edge, the time information will be recorded. Similarly, if the signal of the last channel is triggered at the falling edge, the time information will also be recorded. When the time information triggered by the rising edge or falling edge of the last channel is recorded, a clearing operation will be performed. The time information stored in the timing timer will be cleared to ensure that subsequent signal acquisitions will not be confused. After clearing the time information, the timing timer will be turned off to stop timing, saving resources and avoiding unnecessary interference. By accurately managing the timing timer, it is possible to ensure precise signal acquisition timing, thereby improving the reliability and accuracy of detection. Turning off the timing timer when it is not needed helps save system resources and improve overall performance.

[0092] After the circuit board is powered on and off, the timing timer is managed by identifying the number of channels to be measured. By clearing the time information and turning off the timing timer after the signal of the last channel is triggered, the accuracy of signal acquisition can be ensured and resource usage can be optimized. This process is a key link to ensure the efficient and reliable operation of the circuit board detection system.

[0093] S720: After the timing timer is turned off, clear the time information of the voltage sampling timer and turn off the voltage sampling timer;

[0094] Exemplarily, during the printed circuit board detection process, a voltage sampling timer is used to track the sampling duration of voltage signals. Ensuring the effective management of the voltage sampling timer is crucial for the accuracy of signal acquisition and system performance. After the timing timer is turned off, the information of the voltage sampling timer needs to be cleared to avoid data interference and resource waste. The timing timer is turned off after recording the rising or falling edge trigger time of the last channel. This indicates that the signal acquisition process has been completed. After the timing timer is turned off, relevant resources can be released to prepare for subsequent operations. The voltage sampling timer is used to monitor the sampling duration of voltage signals to ensure that the voltage signals of each channel are acquired within the specified time. The voltage sampling timer starts when the voltage signal sampling begins and records the duration of the sampling. When the timing timer is turned off, the information clearing operation of the voltage sampling timer will be immediately performed to ensure the accuracy of the system state. The time information stored in the voltage sampling timer will be cleared to ensure that expired or invalid time data is no longer used. The clearing operation helps to avoid data confusion in subsequent sampling processes, thereby improving the accuracy of sampling. After the sampling task of the voltage signal is completed, the voltage sampling timer will be turned off. This is usually done after the voltage signals of all channels have been successfully acquired and processed. After the voltage sampling timer is turned off, the resources associated with the timer will be released to avoid unnecessary resource occupation. The status of the voltage sampling timer will be reset to prepare for the next sampling cycle. By clearing and turning off the voltage sampling timer in a timely manner, resources can be managed more effectively, improving the overall performance. Clearing invalid time information and turning off the timer helps to ensure the accuracy of subsequent signal acquisition and reduce the likelihood of errors.

[0095] S730: After the voltage sampling timer is turned off, clear the time information of the timeout timer and turn off the timeout timer.

[0096] Exemplarily, during the circuit board detection process, an overtime timer is used to monitor the maximum allowed time for signal acquisition or other operations. Ensuring the effective management of the overtime timer is crucial for the stability and reliability of the system. After the voltage sampling timer is turned off, the information of the overtime timer needs to be cleared to avoid data confusion and resource waste. The voltage sampling timer is turned off after the voltage signals of all channels are successfully acquired and processed. This indicates the end of the processing of the voltage signals. After turning off the voltage sampling timer, the resources associated with this timer can be released to prepare for subsequent operations. The overtime timer is used to monitor the maximum duration of an operation to ensure that the system completes tasks within a predetermined time. If the operation exceeds this time, corresponding measures (such as restarting the operation or issuing an alarm) will be taken. The overtime timer is usually started at the beginning of signal acquisition or other critical operations to monitor whether the operation is completed within the specified time. When the voltage sampling timer is turned off, the information clearing operation of the overtime timer will be performed immediately to ensure the accuracy of the system state. The time information stored in the overtime timer will be cleared to ensure that expired or invalid time data is no longer used. The clearing operation helps to avoid data confusion in subsequent operations and improve the reliability and stability of the system. After related operations (such as signal sampling or data processing) are completed, the overtime timer will be turned off. This is usually done after confirming that all necessary operations have been successfully executed. After turning off the overtime timer, the resources associated with this timer will be released to avoid unnecessary resource occupation. The status of the overtime timer will be reset to prepare for the next operation cycle.

[0097] After the voltage sampling timer is turned off, clearing the time information of the overtime timer and turning off the overtime timer can ensure the efficient operation of the circuit board detection system. By clearing invalid data and releasing resources, the system can improve the accuracy of operations and overall performance, and make full preparations for subsequent signal acquisition and processing.

[0098] The embodiment of the present application also provides a power-on / off timing detection device, including a processor and a memory. The device also includes a dual-threshold hysteresis comparator circuit and a voltage follower circuit. An upper-edge threshold and a lower-edge threshold are set in the dual-threshold hysteresis comparator circuit; an executable program is stored in the memory, and the memory executes the executable program to perform the following steps: in response to the power-on / off of the circuit board, collect the first voltage signals of multiple channels of the circuit board through the dual-threshold hysteresis comparator circuit, and collect the second voltage signals of multiple channels of the circuit board through the voltage follower circuit; based on the first voltage signal and the upper-edge threshold or the lower-edge threshold of each channel, record the time information of the upper-edge trigger or the time information of the lower-edge trigger of each channel; record the time information corresponding to the second voltage signal of each channel.

[0099] In an embodiment of the present application, the schematic diagram of the above power-on / off timing detection device is as Figure 8As shown, the device may include a display device 810, an input device 820, a microcontroller unit (MCU) 830, a collection device 840, and a power supply 850. In this embodiment, the MCU 830 includes a processor and a memory.

[0100] During the detection of the circuit board, the detection channel can be selected through the input device 820, and then the user physically connects the probe of the collection device 840 to the pin under test of the circuit board. The MCU 830 can control the dual-threshold hysteresis comparator circuit and the voltage follower circuit in the collection device 840 to collect the first voltage signal and the second voltage signal respectively. During the collection process, the digital potentiometer circuit can be controlled to perform voltage division on the pre-collection signal (for example, converting a 12V signal to 1V after voltage division by the potentiometer to facilitate signal collection and processing) to obtain the first voltage signal and the second voltage signal.

[0101] Based on the first voltage signal of each channel and the rising edge threshold or falling edge threshold, the MCU 830 activates the timing timer to record the time information of the rising edge trigger or the time information of the falling edge trigger of each channel; activates the voltage sampling timer to record the time information corresponding to the second voltage signal of each channel. And the overtime timer can also be activated to record the collection duration of each channel and the entire detection duration. The rising edge threshold or the falling edge threshold can be determined according to the timing template of each channel. The timing template can be downloaded from an external device. As shown, the external device can be a storage device, and the storage device is connected to the power-on / off timing device through an interface.

[0102] Based on the time information of the rising edge trigger or the time information of the falling edge trigger of each channel, the MCU 830 generates the digital acquisition waveform diagram corresponding to each channel; based on the time information corresponding to each second voltage signal, generates the analog acquisition waveform diagram corresponding to each channel. And the digital acquisition waveform diagram and the analog acquisition waveform diagram are displayed on the display device 810 for engineering analysis.

[0103] The above embodiments are only exemplary embodiments of the present application and are not used to limit the present application. The protection scope of the present application is defined by the claims. Those skilled in the art can make various modifications or equivalent replacements within the essence and protection scope of the present application, and such modifications or equivalent replacements should also be regarded as falling within the protection scope of the present application.

Claims

1. A power-on and power-off timing detection method, characterized in that, Including: In response to the power-on and power-off of the circuit board, collect the first voltage signals of multiple channels of the circuit board through a dual-threshold hysteresis comparator circuit, and collect the second voltage signals of multiple channels of the circuit board through a voltage follower circuit. An upper-edge threshold and a lower-edge threshold are set in the dual-threshold hysteresis comparator circuit; Based on the first voltage signal of each channel and the upper-edge threshold or the lower-edge threshold, record the time information triggered by the upper edge or the time information triggered by the lower edge of each channel; Record the time information corresponding to the second voltage signal of each channel.

2. The method according to claim 1, characterized in that, The method further includes: Based on the time information triggered by the upper edge or the time information triggered by the lower edge of each channel, generate a data acquisition waveform diagram corresponding to each channel; Based on the time information corresponding to each of the second voltage signals, generate an analog acquisition waveform diagram corresponding to each channel.

3. The method according to claim 1, wherein The method further includes: Obtain the timing templates of each channel of the circuit board according to the identifier of the circuit board; Determine the upper-edge threshold or the lower-edge threshold according to the timing templates of each channel of the circuit board.

4. The method according to claim 1, wherein The recording of the time information triggered by the upper edge or the time information triggered by the lower edge of each channel based on the first voltage signal of each channel and the upper-edge threshold or the lower-edge threshold includes: When the first voltage signal of the first channel is greater than or equal to the upper-edge threshold or less than or equal to the lower-edge threshold, start a timing timer and record the time information triggered by the upper edge or the time information triggered by the lower edge of the first channel; When the first voltage signal of the (m + 1)-th channel is greater than or equal to the upper-edge threshold or less than or equal to the lower-edge threshold, interrupt the timing of the m-th channel and record the time information triggered by the upper edge or the time information triggered by the lower edge of the (m + 1)-th channel, where m is greater than or equal to 1.

5. The method according to claim 1, characterized in that The method further includes: After the circuit board is powered on and off, poll the task pool according to a preset period; When the task pool contains a timing processing task, call a data processing model to execute the timing processing task to analyze and process the time information triggered by the upper edge or the time information triggered by the lower edge of each channel; When the task pool contains a voltage sampling task, call the data processing model to execute the voltage sampling task to analyze and process the time information corresponding to each of the second voltage signals.

6. The method according to claim 5, wherein The method further includes: When the task pool contains a key value processing task, call a key matrix scanning model to execute the key value processing task to obtain the corresponding key value from the key value processing task; Judge whether the key value is valid, and if the key value is valid, respond to the corresponding operation based on the key value.

7. The method according to claim 6, wherein The operation includes any one of the following: an operation to turn on each channel, an operation to turn off each channel, an operation to select each channel, or an operation to display the detection data of each channel.

8. The method according to claim 5, characterized in that The method further includes: When the task pool contains a timeout processing task, call a timeout processing model; Analyze the timeout processing task through the timeout processing model to determine whether the detection duration of the circuit board meets a preset duration.

9. The method according to claim 4, characterized in that, The method further includes: After recording the time information of the rising edge trigger or the falling edge trigger of the last channel of the circuit board, clear the time information of the timing timer and turn off the timing timer; After turning off the timing timer, clear the time information of the voltage sampling timer and turn off the voltage sampling timer; After turning off the voltage sampling timer, clear the time information of the timeout timer and turn off the timeout timer.

10. A power-on and power-off timing detection device, the device comprising a processor and a memory, characterized in that, The device further includes a dual-threshold hysteresis comparator circuit and a voltage follower circuit, and a rising edge threshold and a falling edge threshold are set in the dual-threshold hysteresis comparator circuit; An executable program is stored in the memory, and the memory executes the executable program to perform the following steps: In response to the power-on and power-off of the circuit board, collect the first voltage signals of multiple channels of the circuit board through the dual-threshold hysteresis comparator circuit, and collect the second voltage signals of multiple channels of the circuit board through the voltage follower circuit; Based on the first voltage signal of each channel and the rising edge threshold or the falling edge threshold, record the time information of the rising edge trigger or the falling edge trigger of each channel; record the time information corresponding to the second voltage signal of each channel.

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