Display panel, preparation method thereof and display device

Abstract

The embodiment of the invention provides a display panel, a preparation method thereof and a display device, relates to the technical field of display, and is used for preventing color crosstalk. The display panel comprises a substrate and an isolation structure. The isolation structure is arranged on the substrate; the isolation structure defines a plurality of pixel openings. The isolation structure includes a first isolation pattern and a plurality of second isolation patterns. The first isolation pattern includes a first surface distal from the substrate. Every two adjacent second isolation patterns are separated by at least part of the first isolation patterns; at least part of the second isolation pattern is arranged between every two adjacent pixel openings, and the second isolation patterns and the boundaries of the pixel openings are arranged at intervals; the second isolation pattern includes a second surface remote from the substrate. A height difference exists between the edge part, close to the second surface, of the first surface and the second surface; the surface average roughness of the second surface is greater than the surface average roughness of the first surface. The display panel is used for the display device.

Description

Technical Field

[0001] The present disclosure relates to the field of display technologies, and in particular, to a display panel, a method for manufacturing the same, and a display device. Background Art

[0002] OLED (Organic Light Emitting Diode) display panels are widely used in display screens such as mobile phones, tablets, and in-vehicle displays due to their advantages of being all-solid-state, having a fast response speed, and a wide operating temperature range. Summary of the Invention

[0003] An object of an embodiment of the present disclosure is to provide a display panel and a display device for preventing color crosstalk.

[0004] To achieve the above object, the embodiments of the present disclosure provide the following technical solutions:

[0005] On the one hand, a display panel is provided. The display panel includes a substrate and an isolation structure. The isolation structure is disposed on the substrate; the isolation structure defines a plurality of pixel openings. The isolation structure includes a first isolation pattern and a plurality of second isolation patterns. The first isolation pattern at least circumferentially surrounds the pixel opening along the circumference of the pixel opening; the first isolation pattern includes a first surface away from the substrate. Adjacent two second isolation patterns are spaced apart by at least a part of the first isolation pattern; at least a part of the second isolation pattern is provided between adjacent two pixel openings, and the second isolation pattern and the first isolation pattern are arranged in a first direction, and the first direction intersects with the thickness direction of the substrate; the second isolation pattern is spaced from the boundary of the pixel opening; the second isolation pattern includes a second surface away from the substrate. Wherein, an edge portion of the first surface close to the second surface has a height difference from the second surface; the surface average roughness of the second surface is greater than the surface average roughness of the first surface.

[0006] It can be understood that when the surface average roughness of the second surface is greater than the surface average roughness of the first surface, the resistance of the portion of the second electrode layer disposed on the second surface is relatively large. In this way, by adjusting the surface average roughness of the second surface, the resistance of the second electrode layer disposed on the second isolation pattern can be adjusted, so that the second electrode layer disposed on the second isolation pattern is in a state where it cannot conduct or is difficult to conduct, so as to achieve power-off isolation between adjacent light-emitting devices.

[0007] By providing a height difference between the edge portion of the first surface close to the second surface and the second surface, a step difference can be created between the first surface and the second surface, resulting in less material of the second electrode layer deposited between the first surface and the second surface. Consequently, the thickness of the second electrode layer disposed at the junction position between the first surface and the second surface is thinner or even zero. In this way, the isolation and power-off effect between adjacent light-emitting devices can be further enhanced to prevent crosstalk between pixels. Moreover, through the above arrangement, compared with some implementation methods where power-off isolation is achieved through a partition structure with an undercut structure, the power-off isolation effect can be better, and the effect of preventing crosstalk between pixels can be improved.

[0008] In some embodiments, the difference between the surface average roughness of the second surface and that of the first surface is greater than or equal to 2 nm.

[0009] In some embodiments, the surface average roughness range of the second surface is 5 nm to 30 nm.

[0010] In some embodiments, the difference between the height of the edge portion of the first surface close to the second surface and the average height of the second surface ranges from 0.05 μm to 5 μm.

[0011] In some embodiments, the isolation structure further includes a transition pattern. The transition pattern is disposed between the first isolation pattern and the second isolation pattern; the transition pattern includes a third surface away from the substrate, and the surface average roughness range of the third surface is 5 nm to 30 nm.

[0012] In some embodiments, along the first direction, the minimum distance between the transition pattern and the boundary where it approaches the pixel opening ranges from 1.5 μm to 10 μm.

[0013] In some embodiments, the edge portion of the first surface close to the second surface is farther from the substrate than the second surface. The angle formed by the tangent of the third surface and the second surface ranges from 90° to 160°.

[0014] In some embodiments, the orthographic projection of the second isolation pattern on the substrate includes a strip shape and / or an arc shape. The display panel has multiple surrounding directions, and one surrounding direction is set around one pixel opening; the number of second isolation patterns disposed beside one pixel opening is multiple, and the multiple second isolation patterns are arranged along the surrounding direction.

[0015] In some embodiments, along the surrounding direction, the distance between any two adjacent second isolation patterns is greater than or equal to 1.5 μm.

[0016] In some embodiments, the first isolation pattern includes a first boundary portion and a second boundary portion that are connected to the transition pattern. The distance between the orthographic projections of the first boundary portion and the second boundary portion on the substrate ranges from 1.5 μm to 21 μm.

[0017] In some embodiments, the display panel includes pixel opening units arranged in a repeating pattern; one pixel opening unit includes four pixel openings distributed in a quadrilateral shape. The connecting lines of the geometric centers of the four pixel openings form a quadrilateral, and the four pixel openings are located at the four vertices of the quadrilateral. The second isolation pattern surrounds at least a portion of the pixel openings. The display panel further includes spacers. The spacers are disposed on the first isolation pattern and in the middle portion of the area where the pixel opening units are located; the spacers are spaced apart from the second isolation pattern.

[0018] In some embodiments, the edge portion of the first surface close to the second surface is closer to the substrate than the second surface. The range of the angle formed by the tangent of the third surface and the edge portion of the adjacent first surface is 120° to 177°.

[0019] In some embodiments, the display panel includes pixel opening units arranged in a repeating pattern; one pixel opening unit includes four pixel openings, the connecting lines of the geometric centers of the four pixel openings form a quadrilateral, and the four pixel openings are located at the four vertices of the quadrilateral; among the four pixel openings included in the pixel opening unit, gaps are formed between two adjacent pixel openings in the circumferential direction of the pixel opening unit. One second isolation pattern and one transition pattern are provided in the area where one pixel opening unit is located, and the transition pattern surrounds the second isolation pattern; the orthographic projections of the second isolation pattern and the transition pattern provided in the area where one pixel opening unit is located on the substrate include a four-pointed star shape, and the four corner portions of the pattern formed by the second isolation pattern and the transition pattern respectively extend into the four gaps in the area where the pixel opening unit is located.

[0020] In some embodiments, the two transition patterns located in the areas where two adjacent pixel opening units are located are spaced apart.

[0021] In some embodiments, the size of the first isolation pattern between two adjacent transition patterns in the third direction ranges from 1.5 μm to 5 μm, and the third direction is parallel to the center connection line of the two second isolation patterns.

[0022] In some embodiments, the second isolation pattern is reused as a spacer.

[0023] In some embodiments, the display panel further includes: a light-emitting device disposed within the pixel opening. The light-emitting device includes a first electrode and a light-emitting layer. The first electrode is disposed on the substrate. The light-emitting layer is disposed on a side of the first electrode away from the substrate. The display panel further includes a second electrode layer, which includes a first portion, a second portion, a third portion, and a fourth portion. The first portion is disposed on a side of the light-emitting layer away from the first electrode, the second portion is disposed on a side of the first isolation pattern away from the substrate; the third portion is disposed on a side of the second isolation pattern away from the substrate; the fourth portion is disposed on a side of the transition pattern away from the substrate. Among them, the thickness range of the first portion is 10 nm to 20 nm; the thickness range of the second portion is 10 nm to 20 nm; the thickness range of the third portion is 0 nm to 20 nm; the thickness range of the fourth portion is 0 nm to 20 nm.

[0024] In some embodiments, the display panel further includes a first encapsulation layer. The first encapsulation layer is disposed on a side of the second electrode layer away from the substrate; the first encapsulation layer is a continuous film layer, and the thickness range of the first encapsulation layer is 0.8 μm to 1.5 μm.

[0025] In some embodiments, the material of the isolation structure includes a light-absorbing material.

[0026] On the other hand, a display device is provided. The display device includes: the display panel as described in any of the above embodiments and a circuit board. The circuit board is electrically connected to the display panel.

[0027] The beneficial effects of the preparation method of the above display device are the same as those of the display panel described in some of the above embodiments, and will not be elaborated here.

[0028] On another aspect, a method for preparing a display panel is provided. The preparation method includes: forming a substrate; and forming an isolation structure on the substrate. The isolation structure defines a plurality of pixel openings. The isolation structure includes a first isolation pattern and a plurality of second isolation patterns. The first isolation pattern at least circumferentially surrounds the pixel opening along the circumference of the pixel opening; the first isolation pattern includes a first surface away from the substrate. Adjacent two second isolation patterns are separated by at least a part of the first isolation pattern, at least a part of the second isolation pattern is provided between adjacent two of the pixel openings, and the second isolation pattern is spaced from the boundary of the pixel opening; the second isolation pattern includes a second surface away from the substrate. Among them, an edge portion of the first surface close to the second surface has a height difference from the second surface; the surface average roughness of the second surface is greater than that of the first surface.

[0029] The beneficial effects of the preparation method of the above display panel are the same as those of the display panel described in some of the above embodiments, and will not be elaborated here.

[0030] In some embodiments, an isolation structure is formed on a substrate, including: forming a second initial isolation structure; the second initial isolation structure defining a plurality of pixel openings; the second initial isolation structure including a first isolation pattern and a plurality of initial patterns, the initial patterns being used to form the second isolation pattern; and, using a dry etching process to roughen the surface of the initial patterns away from the substrate, converting the initial patterns into the second isolation pattern.

[0031] In some embodiments, forming the second initial isolation structure includes: forming a first initial isolation structure; and, using a halftone mask to etch the first initial isolation structure to form the first isolation pattern and a plurality of initial patterns. Description of the Drawings

[0032] To more clearly illustrate the technical solutions in the present disclosure, the following will briefly introduce the drawings required for use in some embodiments of the present disclosure. Obviously, the drawings in the following description are only the drawings of some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings. In addition, the drawings in the following description can be regarded as schematic diagrams, and are not limitations on the actual sizes of the products, the actual processes of the methods, the actual timings of the signals, etc. involved in the embodiments of the present disclosure.

[0033] Figure 1 Structural diagram of a display device according to some embodiments;

[0034] Figure 2 Structural diagram of a display panel according to some embodiments;

[0035] Figure 3A Structural diagram of a display panel according to still some other embodiments;

[0036] Figure 3B Microscopic morphology diagram of a spacer according to some embodiments;

[0037] Figure 4A Atomic force microscope image of an isolation structure according to some embodiments;

[0038] Figure 4B Display effect diagram of a display panel in a lit state according to some embodiments;

[0039] Figure 5A Atomic force microscope image of an isolation structure according to some embodiments;

[0040] Figure 5B Display effect diagram of a display panel in a lit state according to still some other embodiments;

[0041] Figure 6A Atomic force microscope image of an isolation structure according to some embodiments;

[0042] Figure 6B The display effect diagram of the display panel in the lit state according to some other embodiments;

[0043] Figure 7 The structural diagram of the display panel according to some other embodiments;

[0044] Figure 8 The structural diagram of the display panel according to some other embodiments;

[0045] Figure 9 The structural diagram of the display panel according to some other embodiments;

[0046] Figure 10A The top view of the display panel according to some embodiments;

[0047] Figure 10B The top view of the isolation structure according to some embodiments;

[0048] Figure 10C The orthographic projection diagram of the isolation structure on the substrate according to some embodiments;

[0049] Figure 10D The top view of the isolation structure according to some other embodiments;

[0050] Figure 10E The orthographic projection diagram of the isolation structure on the substrate according to some other embodiments;

[0051] Figure 11 The top view of the display panel according to some other embodiments;

[0052] Figure 12A The top view of the display panel according to some embodiments;

[0053] Figure 12B The top view of the isolation structure according to some embodiments;

[0054] Figure 13 The flowchart of the manufacturing method of the display panel according to some embodiments;

[0055] Figure 14 The microscopic morphology diagram of the display panel according to some embodiments;

[0056] Figures 15A to 18I The step diagram in the manufacturing method of the display panel according to some embodiments. Detailed implementation manners

[0057] The following will clearly and completely describe the technical solutions in some embodiments of the present disclosure with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments provided in the present disclosure belong to the scope of protection of the present disclosure.

[0058] Unless the context otherwise requires, throughout the specification and claims, the term "comprise" and its other forms, such as the third-person singular form "comprises" and the present participle form "comprising", are interpreted as open and inclusive, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example", or "some examples", etc., are intended to indicate that the specific features, structures, materials, or characteristics related to the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms do not necessarily refer to the same embodiment or example. In addition, the described specific features, structures, materials, or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0059] Hereinafter, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the embodiments of the present disclosure, unless otherwise specified, the meaning of "a plurality" is two or more.

[0060] When describing some embodiments, the expression "connected" and its derivatives may be used. The term "connected" should be understood in a broad sense. For example, "connected" may be a fixed connection, a detachable connection, or integrated; it may be directly connected or indirectly connected through an intermediate medium. The embodiments disclosed herein are not necessarily limited to the content herein.

[0061] "At least one of A, B, and C" has the same meaning as "at least one of A, B, or C", and both include the following combinations of A, B, and C: only A, only B, only C, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B, and C.

[0062] "A and / or B" includes the following three combinations: only A, only B, and the combination of A and B.

[0063] As used herein, "about", "substantially" or "approximately" includes the stated value and average values within an acceptable deviation range of the specific value, where the acceptable deviation range is determined by a person of ordinary skill in the art considering the measurement being discussed and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system).

[0064] As used herein, "parallel", "perpendicular", "equal" include the stated situation and situations similar to the stated situation, and the range of the similar situations is within an acceptable deviation range, where the acceptable deviation range is determined by a person of ordinary skill in the art considering the measurement being discussed and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, and the acceptable deviation range of approximate parallelism can be, for example, within a deviation of 5°; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, and the acceptable deviation range of approximate perpendicularity can also be, for example, within a deviation of 5°. "Equal" includes absolute equality and approximate equality, and the acceptable deviation range of approximate equality can be, for example, that the difference between the two equal ones is less than or equal to 5% of either one.

[0065] It should be understood that when a layer or element is referred to as being on another layer or substrate, it can be that the layer or element is directly on the other layer or substrate, or there can also be an intermediate layer between the layer or element and the other layer or substrate.

[0066] Exemplary embodiments are described herein with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of the layer and the area of the region are enlarged for clarity. Therefore, variations in the shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances can be envisioned. Accordingly, the exemplary embodiments should not be construed as being limited to the shapes of the regions shown herein, but include shape deviations caused by, for example, manufacturing. For example, an etched region shown as rectangular will generally have curved features. Thus, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shape of the regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0067] It should be noted that, for example, 1 / 2 appearing in the drawings of the present disclosure means that both component 1 and component 2 can refer to this component. For example, 120 / 121 in the drawings means that both the second electrode 120 and the first part 121 of the second electrode layer 120G can be represented by this component. Other similar reference numerals appearing in the drawings also follow the above description.

[0068] As Figure 1As shown, some embodiments of the present disclosure provide a display device 300. The display device 300 includes a display panel 200 and has a display function.

[0069] The above-mentioned display device 300 can be any display device that displays whether it is moving (e.g., video) or stationary (e.g., still image), and whether it is text or image. More specifically, it is expected that the display device 300 of the embodiment can be implemented in or associated with a variety of electronic devices, such as (but not limited to) mobile phones, wireless devices, personal digital assistants (PDAs), handheld or portable computers, GPS receivers / navigators, cameras, MP4 video players, video cameras, game consoles, watches, clocks, calculators, TV monitors, flat panel displays, computer monitors, automotive displays (e.g., odometer displays, etc.), navigators, cockpit controllers and / or displays, displays of camera views (e.g., displays of rearview cameras in vehicles), electronic photos, electronic billboards or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., displays of images of a piece of jewelry), etc.

[0070] In terms of the light-emitting type of the display device 300, the above-mentioned display device 300 can be an Organic Light-Emitting Diode (OLED) display device or a Quantum Dot Light Emitting Diodes (QLED) display device. In terms of the form of the display device 300, the above-mentioned display device 300 can be a flat display device, a curved display device, or a foldable display device, etc. In terms of the shape of the display device 300, the above-mentioned display device 300 can be rectangular or circular, etc. The embodiments of the present disclosure do not make specific limitations in this regard. Hereinafter, taking the display device 300 as a flat OLED display device as an example, some embodiments of the present disclosure will be schematically described. However, the implementation manners of the present disclosure are not limited thereto, and any other display device can also be considered as long as the same technical idea is applied.

[0071] Exemplarily, as Figure 1 shown, the display device 300 further includes a circuit board 310. The circuit board 310 is electrically connected to the display panel 200.

[0072] Exemplarily, the display device 300 further includes a driving chip disposed on the circuit board 310, and the driving chip is used to drive the display panel 200 to emit light or display.

[0073] In addition, the display device 300 may further include an under-screen camera and an under-screen fingerprint recognition sensor, etc., so that the display device 300 can implement various different functions such as taking pictures, recording videos, fingerprint recognition, or face recognition.

[0074] In some embodiments, as Figure 2 shown, the display panel 200 includes a substrate 210 and an isolation structure 220. The isolation structure 220 is disposed on the substrate 210, and the isolation structure 220 defines a plurality of pixel openings Q.

[0075] It should be understood that when the isolation structure 220 defines a plurality of pixel openings Q, the isolation structure 220 is a patterned structure.

[0076] Exemplarily, the minimum distance between the adjacent boundaries of two pixel openings Q that are close to each other is 14 μm to 24 μm, such as 14 μm, 15 μm, 16 μm, 17 μm, 18 μm, 19 μm, 20 μm, 21 μm, 22 μm, 23 μm, or 24 μm, etc.

[0077] It should be noted that in some examples, the surface of the substrate 210 has various microstructures such as channels, openings, circuits (such as the pixel driving circuit 2121 described below), etc. The part of the isolation structure 220 close to the substrate 210 may contact these microstructures on the surface of the substrate 210. However, for the convenience of expression, in the drawings of the present disclosure, these microstructures on the substrate 210 are omitted, that is, the surface of the substrate 210 close to the isolation structure 220 is represented as an approximately flat surface. However, the slight deviations in the profile of the isolation structure 220 caused by these microstructures, as well as parameters such as the first angle α described in detail below, should all be covered within the protection scope of the present disclosure.

[0078] In some embodiments, as Figure 2 shown, the display panel 200 further includes a light-emitting device 100 disposed in the pixel opening Q. For example, a plurality of light-emitting devices 100 may be provided in one-to-one correspondence with a plurality of pixel openings Q.

[0079] In some embodiments, as Figure 2 shown, the substrate 210 includes a base 211 and a driving circuit layer 212 disposed on one side of the base 211 along its thickness direction. In this case, the isolation structure 220 may be located on the side of the driving circuit layer 212 away from the base 211.

[0080] Exemplarily, a plurality of pixel openings Q may be arranged in a direction parallel to the base 211.

[0081] Exemplarily, the material of the base 211 may be a rigid material, such as glass, to achieve a rigid substrate display; or, the material of the base 211 may also be a flexible material, such as polyimide (PI) or polyethylene glycol terephthalate (PET), to achieve a flexible substrate display.

[0082] In some examples, the driving circuit layer 212 includes a plurality of pixel driving circuits 2121 arranged in an array. The pixel driving circuit 2121 includes a plurality of transistors TFT. The pixel driving circuit 2121 is electrically connected to the light-emitting device 100 and is used to drive the light-emitting device 100 to emit light. For example, the pixel driving circuit 2121 can generate a driving current. Each light-emitting device 100 can emit light under the driving action of the driving current generated by the corresponding pixel driving circuit 2121. At this time, the pixel driving circuit 2121 adopts TFT technology, and the display panel 200 can be called an active driving display panel.

[0083] In some examples, the display panel 200 includes a display area and a peripheral area, and the light-emitting device 100 is disposed in the display area of the display panel 200.

[0084] In some examples, the driving circuit layer 212 includes a plurality of functional film layers disposed between the substrate 211 and the isolation structure 220. The plurality of functional film layers includes any combination of one or more of a buffer layer (Buffer), a shielding layer (LS), an active layer (AL), a gate metal layer (Gate), a gate insulating layer (GI), a first source-drain metal layer (SD1), a second source-drain metal layer (SD2), a passivation layer (PVX), and an interlayer dielectric layer (ILD). Among them, the second source-drain metal layer is farther from the substrate 211 than the first source-drain metal layer.

[0085] Among the above functional film layers, some functional film layers are continuous and integrally laid film layers, some functional film layers are patterned film layers, some functional film layers are only located in the display area, some functional film layers extend from the display area to the peripheral area, and some functional film layers include a part located in the display area and a part located in the peripheral area, and these two parts are separated.

[0086] Among them, the gate metal layer, the first source-drain metal layer, the second source-drain metal layer, and the shielding layer are conductive film layers, and the materials of these conductive film layers are, for example, aluminum (Al), silver (Ag), copper (Cu), or chromium (Cr), etc. The gate insulating layer GI, the interlayer dielectric layer ILD, and the passivation layer PVX are insulating film layers, and the materials of these insulating film layers are, for example, silicon oxide, silicon nitride, or silicon oxynitride, etc.

[0087] In some embodiments, the plurality of light-emitting devices 100 includes a blue light-emitting device, a red light-emitting device, and a green light-emitting device. At this time, the display panel 200 can be used for full-color display. By separately adjusting the brightness (gray scale) of the blue light-emitting device, the red light-emitting device, and the green light-emitting device, various colors can be displayed through color combination and superposition.

[0088] In some embodiments, such as Figure 2As shown, the light-emitting device 100 includes a first electrode 110 and a light-emitting layer 130. The first electrode 110 is disposed on a substrate 210. The light-emitting layer 130 is disposed on a side of the first electrode 110 away from the substrate 210.

[0089] Exemplarily, the light-emitting device 100 further includes a second electrode 120, and the second electrode 120 is disposed on a side of the light-emitting layer 130 away from the first electrode 110.

[0090] In some examples, the first electrode 110 is an anode and the second electrode 120 is a cathode. In this case, the light-emitting device 100 may be referred to as a normal light-emitting device. In still other examples, the first electrode 110 is a cathode and the second electrode 120 is an anode. In this case, the light-emitting device 100 may be referred to as an inverted light-emitting device.

[0091] During operation, voltages are respectively applied to the first electrode 110 and the second electrode 120 to generate an electric field therebetween, which can drive holes from the anode and electrons from the cathode to recombine in the light-emitting layer, thereby emitting light.

[0092] In some embodiments, to improve the light-emitting efficiency of the light-emitting device 100, the light-emitting device 100 further includes a hole transport functional layer (not shown in the figure) located between the light-emitting layer and the anode. The hole transport functional layer includes, for example, at least one of a hole injection layer (Hole Inject Layer, HIL), a hole transport layer (Hole Transport Layer, HTL), and an electron blocking layer (Electron Blocking Layer, EBL).

[0093] In some embodiments, to improve the light-emitting efficiency of the light-emitting device 100, the light-emitting device 100 further includes an electron transport functional layer (not shown in the figure) between the light-emitting layer and the cathode. The electron transport functional layer includes, for example, at least one of a stacked electron injection layer (Electron Inject Layer, EIL), an electron transport layer (Electron Transport Layer, ETL), and a hole blocking layer (Hole Blocking Layer, EBL).

[0094] In some embodiments, as Figure 2 shown, the first electrode 110 of the light-emitting device 100 is a patterned electrode, and the second electrode 120 of the light-emitting device 100 may be a structure with a whole-layer connection, that is, a plurality of second electrodes 120 may be connected to each other to form a second electrode layer 120G.

[0095] In some examples, the light-emitting device 100 includes a light-emitting layer 130. At this time, the light-emitting device 100 is a single-layer light-emitting device, and the first electrode 110, the light-emitting layer 130, and the second electrode 120 are stacked along the thickness direction of the substrate 211. In still other examples, the light-emitting device 100 includes a plurality (for example, two) of stacked light-emitting layers 130. At this time, the light-emitting device 100 is a stacked light-emitting device (for example, a stacked OLED light-emitting device), and the first electrode 110, the plurality of light-emitting layers 130, and the second electrode 120 are stacked along the thickness direction of the substrate 211. Among them, the stacked OLED light-emitting device has advantages such as higher efficiency and higher brightness, making the stacked OLED light-emitting device more widely used.

[0096] In some embodiments, when the light-emitting device 100 includes a plurality of light-emitting layers 130, the light-emitting device 100 further includes a charge generation unit, and the charge generation unit is located between two adjacent light-emitting layers 130 among the plurality of light-emitting layers 130.

[0097] Through the above charge generation unit, a plurality of light-emitting units can be sequentially connected in the vertical direction of the light-emitting surface (for example, the thickness direction of the substrate 211). Moreover, the charge generation unit not only plays a role in connecting the light-emitting layer 130 in the stacked OLED light-emitting device 100, but also helps to improve the generation efficiency of charges (holes or electrons), and can have a significant impact on the performance of the light-emitting device 100.

[0098] In some examples, the charge generation unit includes an electron generation layer and a hole generation layer stacked; the electron generation layer is closer to the anode than the hole generation layer.

[0099] In some embodiments, the light-emitting device 100 is an OLED light-emitting device, and the light-emitting layer 130 of the light-emitting device 100 is prepared by an evaporation process. In order to enable the light-emitting material to be evaporated onto the target pixel opening (for example, the pixel opening corresponding to the red light-emitting device), rather than being evaporated onto other pixel openings except the target pixel opening (for example, the pixel openings corresponding to the green light-emitting device or the blue light-emitting device), the evaporation process needs to be realized by means of a high-precision metal mask (Fine Metal Mask, FMM). For example, by setting the FMM, the target pixel opening is exposed, while other pixel openings except the target pixel opening are blocked.

[0100] In some examples, the display panel 200 further includes spacers 240 (PS) (see Figure 8 ), provided on the isolation structure 220. The spacers 240 are at least used to support the FMM when evaporating the light-emitting material.

[0101] In some examples, as Figure 2As shown, the display panel 200 further includes a packaging layer 230, and the packaging layer 230 can be disposed on the side of the plurality of light-emitting devices 100 and the isolation structure 220 away from the substrate 210. When the light-emitting device 100 includes the second electrode layer 120G, the packaging layer 230 can be located on the side of the second electrode layer 120G away from the substrate 210.

[0102] In some embodiments, as Figure 3A shown, the packaging layer 230 can include a first packaging layer 231 disposed on the side of the second electrode layer 120G away from the substrate 210, and the material of the first packaging layer 231 includes, for example, an inorganic material.

[0103] In some examples, as Figure 3A shown, the packaging layer 230 can further include a second packaging layer 232 disposed on the side of the first packaging layer 231 away from the second electrode layer 120G. The material of the second packaging layer 232 includes, for example, an organic material.

[0104] Exemplarily, as Figure 3A shown, the packaging layer 230 can include a third packaging layer 233 disposed on the side of the second packaging layer 232 away from the first packaging layer 231. The material of the third packaging layer 233 is, for example, an inorganic material.

[0105] Exemplarily, the process of forming the first packaging layer 231 and / or the third packaging layer 233 can be Chemical Vapor Deposition (CVD).

[0106] Exemplarily, the display panel 200 can be a QLED display panel or an OLED display panel. At this time, the packaging layer 230 covers the light-emitting device 100 to wrap the light-emitting device 100, so as to prevent water vapor and oxygen in the external environment from entering the display panel 200 and damaging the materials in the light-emitting device 100, resulting in a shortened lifespan of the QLED display panel or the OLED display panel.

[0107] In some implementation manners, some film layers (for example, an electron generation layer or a hole generation layer) in the OLED light-emitting device are common film layers, and lateral leakage is likely to occur, resulting in a color crosstalk phenomenon in which adjacent sub-pixels are also lit when a single sub-pixel is lit, making the color purity of the light emitted by the OLED light-emitting device poor and the display effect poor.

[0108] Therefore, in some other implementation manners, as Figure 3A and Figure 3BAs shown, the display panel 200 further includes a partition structure 250. The cross-section of the partition structure 250 perpendicular to the substrate 210 is designed as an inverted trapezoid (it can also be understood that the partition structure 250 has an undercut structure). When the material of the common film layer of the OLED light-emitting device is deposited in the area where the partition structure 250 is located, it is in a discontinuous state under the influence of the inverted trapezoid shape of the partition structure 250, thereby disconnecting the common film layer to achieve the purpose of power-off isolation and preventing color crosstalk. These common film layers include, for example, at least one of the second electrode layer 120G, the hole generation layer, and the electron generation layer.

[0109] However, in the above implementation, the partition structure 250 with an undercut structure may have the following problems in use: First, the uniformity of the partition structure 250 is not easy to control; second, the partition structure 250 is prone to peeling from the isolation structure 220; third, the corners of the partition structure 250 far from the substrate 210 are relatively sharp and easy to fall off, resulting in the risk of the partition structure 250 having a collapsed edge. These problems will lead to a poor power-off isolation effect of the partition structure 250 and a poor reliability of the function of preventing color crosstalk of the partition structure 250.

[0110] The inventors of the present disclosure found that the surface roughness of the isolation structure 220 affects the continuity of the second electrode layer 120G, and the continuity of the second electrode layer 120G can affect the resistance of the second electrode layer 120G. When the roughness of the isolation structure 220 is relatively large, the continuity of the second electrode layer 120G is poor, and the overall resistance of the second electrode layer 120 is relatively large; when the roughness of the isolation structure 220 increases to a certain value, the continuity of the second electrode layer 120G is greatly reduced, and the second electrode layer 120 can be in a power-off state and cannot conduct.

[0111] In some embodiments, in combination with Figure 3A , the relationship between the surface roughness of the isolation structure 220 and the lighting condition of the display panel 200 was experimentally verified. Experimental Example 1, Experimental Example 2, and Experimental Example 3 were respectively set, and the surface roughness of the isolation structure 220 in the three experimental examples increased in sequence. Among them, the surface roughness of the isolation structure 220 was measured using an Atomic Force Microscope (AFM).

[0112] In Experimental Example 1, the atomic force microscope image of the isolation structure is as Figure 4A shown, and the lighting condition of the display panel is as Figure 4B shown. The results show that when the average surface roughness Ra of the isolation structure is 3.87 nm and the root mean square roughness Rq is 4.82 nm, the display panel is lit and no uneven display phenomenon occurs.

[0113] In Experimental Example 2, the atomic force microscopy image of the isolation structure is as shown in Figure 5A , and the lighting condition of the display panel is as shown in Figure 5B . The results show that when the surface average roughness Ra of the isolation structure is 7.83 nm and the root mean square roughness Rq is 6.11 nm, the display panel is lit, but there is uneven brightness.

[0114] In Experimental Example 3, the atomic force microscopy image of the isolation structure is as shown in Figure 6A , and the lighting condition of the display panel is as shown in Figure 6B . The results show that when the surface average roughness Ra of the isolation structure is 16.3 nm and the root mean square roughness Rq is 20.7 nm, the middle part of the display panel shows an abnormality, and the second electrode of the light-emitting device located in the middle is in a power-off state.

[0115] Based on this, some embodiments of the present disclosure provide a display panel 200 to solve at least one of the above problems.

[0116] As shown in Figure 7 and Figure 8 , in the display panel 200, the isolation structure 220 includes a first isolation pattern 221 and a plurality of second isolation patterns 222. The first isolation pattern 221 at least circumferentially surrounds the pixel opening Q along the circumference of the pixel opening Q; the first isolation pattern 221 includes a first surface 221a away from the substrate 210. Adjacent two second isolation patterns 222 are spaced apart by at least a part of the first isolation pattern 221; at least a part of the second isolation pattern 222 is provided between adjacent two pixel openings Q, and the second isolation pattern 222 is spaced apart from the boundary of the pixel opening Q; the second isolation pattern 222 includes a second surface 222a away from the substrate 210. Wherein, there is a height difference △H between the edge part of the first surface 221a close to the second surface 222a and the second surface 222a; the surface average roughness Ra2 of the second surface 222a is greater than the surface average roughness Ra1 of the first surface 221a.

[0117] Here, the first isolation pattern 221 at least circumferentially surrounds the pixel opening Q along the circumference of the pixel opening Q, which can be understood as that the first isolation pattern 221 at least includes the part surrounding the pixel opening Q. By such setting, the second isolation pattern 222 can be spaced apart from the boundary of the pixel opening Q.

[0118] It should be understood that the first isolation pattern 221 may further include other parts in addition to the part surrounding the pixel opening Q. For example, as shown in Figure 10B , in addition to the part surrounding the pixel opening Q, the first isolation pattern 221 further includes a part 221d provided between the second isolation patterns 222.

[0119] Exemplarily, the first surface 221a can be a planar surface or a curved surface.

[0120] In the case where two adjacent second isolation patterns 222 are at least partially spaced apart by the first isolation pattern 221, and at least part of the second isolation pattern 222 is provided between two adjacent pixel openings Q, the plurality of second isolation patterns 222 can be arranged at intervals, and the plurality of second isolation patterns 222 can be respectively provided in the interval regions between the plurality of pixel openings Q.

[0121] In some examples, when the second isolation pattern 222 and the first isolation pattern 221 are arranged along the first direction X1, the orthographic projections of the second isolation pattern 222 and the first isolation pattern 221 on the substrate 210 do not overlap, or the edge portions close to each other intersect.

[0122] Exemplarily, the arrangement direction of the second isolation pattern 222 and the first isolation pattern 221 can be perpendicular to the thickness direction of the substrate 210, that is, the first direction X1 can be perpendicular to the thickness direction Y of the substrate 210.

[0123] In some examples, an atomic force microscope (AFM) is used to measure the surface average roughness Ra2 of the second surface 222a and / or the surface average roughness Ra1 of the first surface 221a.

[0124] It can be understood that when the surface average roughness Ra2 of the second surface 222a is greater than the surface average roughness Ra1 of the first surface 221a, the resistance of the portion of the second electrode layer 120G provided on the second surface 222a is larger. In this way, the resistance of the second electrode layer 120G provided on the second isolation pattern 222 can be adjusted by adjusting the surface average roughness Ra2 of the second surface 222a, so that the second electrode layer 120G provided on the second isolation pattern 222 is in a non-conductive or difficult-to-conduct state, so as to achieve power-off isolation between adjacent light-emitting devices 100.

[0125] By setting the edge part of the first surface 221a close to the second surface 222a to have a height difference △H from the second surface 222a, a step difference can be formed between the first surface 221a and the second surface 222a, resulting in less material of the second electrode layer 120G deposited between the first surface 221a and the second surface 222a. Consequently, the thickness of the second electrode layer 120G at the junction position between the first surface 221a and the second surface 222a is relatively thin or even zero. In this way, the isolation and power-off effect between adjacent light-emitting devices 100 can be further enhanced to prevent crosstalk between pixels. Moreover, through the above setting, compared with the case of power-off isolation by a partition structure 250 with an undercut structure in some implementation manners, the power-off isolation effect can be better, and the effect of preventing crosstalk between pixels can be improved.

[0126] Here, there is no limitation on the difference between the surface average roughness Ra2 of the second surface 222a and the surface average roughness Ra1 of the first surface 221a.

[0127] In some embodiments, such as Figure 7 and Figure 8 shown, the difference between the surface average roughness Ra2 of the second surface 222a and the surface average roughness Ra1 of the first surface 221a is greater than or equal to 2 nm.

[0128] Exemplarily, the difference between the surface average roughness Ra2 of the second surface 222a and the surface average roughness Ra1 of the first surface 221a can be 2 nm, 5 nm, 10 nm, 12 nm, 15 nm, 18 nm, 20 nm, 23 nm, 25 nm, 27 nm, 30 nm, 35 nm, 40 nm, or 50 nm, etc.

[0129] Through the above setting, the difference between the surface average roughness Ra2 of the second surface 222a and the surface average roughness Ra1 of the first surface 221a can be made relatively large. On the one hand, the surface average roughness Ra2 of the second surface 222a can be made relatively large, increasing the resistance of the second electrode layer 120G disposed on the second isolation pattern 222, and improving the power-off isolation and the effect of preventing crosstalk between pixels. On the other hand, based on the relatively large surface average roughness Ra2 of the second surface 222a, the surface average roughness Ra1 of the first surface 221a can be made relatively low. In this way, the resistance of the second electrode layer 120G disposed on the first isolation pattern 221 is relatively small, causing the second electrode layer 120G disposed on the first isolation pattern 221 to be in an electrically connected state, and making the second electrode layer 120G a common electrode shared by multiple light-emitting devices 100.

[0130] Here, there is no limit to the value of the surface average roughness Ra2 of the second surface 222a, as long as the effect of power-off isolation can be achieved. For example, the surface average roughness Ra2 of the second surface 222a can be 32nm, 34nm, 40nm, 50nm, etc.

[0131] In some examples, the material of the isolation structure 220 includes resin. Exemplarily, the material of the isolation structure 220 further includes pigment or dye.

[0132] In some embodiments, as Figure 7 and Figure 8 shown, the range of the surface average roughness Ra2 of the second surface 222a is 5nm to 30nm.

[0133] Exemplarily, the surface average roughness Ra2 of the second surface 222a can be 5nm, 7nm, 10nm, 12nm, 15nm, 19nm, 20nm, 23nm, 25nm, 27nm, or 30nm, etc.

[0134] It can be understood that when the surface average roughness Ra2 of the second surface 222a is small, the resistance of the second electrode layer 120G provided on the second isolation pattern 222 is relatively small, resulting in a relatively poor effect of power-off isolation and anti-pixel crosstalk; when the surface average roughness Ra2 of the second surface 222a is large, it may increase the process difficulty of the roughening process. For example, when the material of the isolation structure 220 includes resin, the surface of the initial pattern 222i (see Figure 16B ) can be roughened through a dry etching process to make the surface of the second isolation pattern 222 rough. When the surface average roughness Ra2 of the second surface 222a is large, the process difficulty is relatively high during the roughening process by the dry etching process. Therefore, by setting the surface average roughness Ra2 of the second surface 222a in the range of 5nm to 30nm, the process difficulty of forming the second surface 222a of the second isolation pattern 222 can be reduced while ensuring the effects of power-off isolation and anti-pixel crosstalk.

[0135] In the embodiments of the present disclosure, there is no limit to the difference between the height H1 of the edge portion of the first surface 221a close to the second surface 222a and the average height H2 of the second surface 222a. For example, the difference between the height H1 of the edge portion of the first surface 221a close to the second surface 222a and the average height H2 of the second surface 222a can be 0.03μm, 0.04μm, 5.5μm, 6μm, or 7μm, etc.

[0136] In some examples, asFigure 7 and Figure 8 As shown in Figure 8 , the display panel 200 further includes at least one planarization layer PLN disposed between the substrate 210 and the first electrode 110. For example, the display panel 200 further includes two or three planarization layers disposed between the second source / drain metal layer and the first electrode 110.

[0137] In some examples, the above planarization layer PLN may form a part of the isolation structure 220. In this case, the second surface 222a of the second isolation pattern 222 may be lower than the first surface 221a of the first isolation pattern 221 and is disposed between the layer where the first electrode 110 is located and the layer where the second source / drain metal layer is located; that is, the second isolation pattern 222 may be formed by opening a groove in the planarization layer PLN.

[0138] In some embodiments, as Figure 7 and Figure 8 shown, the difference (hereinafter referred to as the first difference) between the height H1 of the edge portion of the first surface 221a close to the second surface 222a and the average height H2 of the second surface 222a ranges from 0.05 μm to 5 μm.

[0139] Exemplarily, the difference between the height H1 of the edge portion of the first surface 221a close to the second surface 222a and the average height H2 of the second surface 222a may be 0.05 μm, 0.1 μm, 0.15 μm, 0.2 μm, 0.25 μm, 0.3 μm, 0.35 μm, 0.37 μm, 0.40 μm, 0.45 μm or 5 μm, etc.

[0140] In some examples, as Figure 7 shown, the edge portion of the first surface 221a close to the second surface 222a is farther from the substrate 210 than the second surface 222a. At this time, the difference between the height H1 of the edge portion of the first surface 221a close to the second surface 222a and the average height H2 of the second surface 222a may be from 0.05 μm to 5 μm, for example, 0.05 μm, 0.1 μm, 0.15 μm, 0.2 μm, 0.24 μm, 0.3 μm, 0.32 μm, 0.37 μm, 0.40 μm, 0.45 μm or 5 μm, etc.

[0141] In still other examples, as Figure 8As shown, the edge portion of the first surface 221a close to the second surface 222a is closer to the substrate 210 than the second surface 222a. At this time, the difference between the height H1 of the edge portion of the first surface 221a close to the second surface 222a and the average height H2 of the second surface 222a can be 0.6 μm to 1.5 μm, such as 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm, 1.1 μm, 1.2 μm, 1.3 μm, 1.4 μm or 1.5 μm, etc.

[0142] Here, the height H1 of the edge portion of the first surface 221a close to the second surface 222a refers to the distance between the edge portion of the first surface 221a close to the second surface 222a and the reference plane; the average height H2 of the second surface 222a refers to the average value of the distances between the second surface 222a and the reference plane. Among them, the reference plane is, for example, the surface of the base 211 close to the isolation structure 220.

[0143] It can be understood that when the first difference is small, the improvement degree of the isolation power-off effect is relatively small; when the first difference is large, the first difference may be greater than the thickness of the isolation structure 220 (such as including the planarized layer ILD), making the process feasibility of forming the height difference ΔH poor; therefore, by setting the first difference range to be 0.05 μm to 5 μm, on the basis of ensuring the isolation power-off effect between adjacent light-emitting devices 100, the process feasibility of forming the height difference ΔH can be improved.

[0144] In some examples, as Figure 9 shown, the first isolation pattern 221 is directly connected to the second isolation pattern 222. At this time, the surface of the isolation structure 220 far from the substrate 210 further includes: an interface surface K connecting between the first surface 221a and the second surface 222a and perpendicular to the substrate 210. It should be understood that when the first isolation pattern 221 is directly connected to the second isolation pattern 222, the mutually close boundaries of the orthographic projections of the first isolation pattern 221 and the second isolation pattern 222 on the substrate 210 are directly connected.

[0145] In some embodiments, as Figure 7 and Figure 8 shown, the isolation structure 220 further includes a transition pattern 223. The transition pattern 223 is disposed between the first isolation pattern 221 and the second isolation pattern 222; the transition pattern 223 includes a third surface 223a far from the substrate, and the surface average roughness Ra3 of the third surface 223a ranges from 5 nm to 30 nm.

[0146] Exemplarily, the surface average roughness Ra3 of the third surface 223a may be 5 nm, 8 nm, 10 nm, 12 nm, 15 nm, 19 nm, 20 nm, 22 nm, 25 nm, 27 nm, 30 nm, etc.

[0147] With the above arrangement, the first isolation pattern 221 and the second isolation pattern 222 can be connected by the transition pattern 223. Compared with the case where the first isolation pattern 221 and the second isolation pattern 222 are directly connected, the process difficulty of forming the height difference ΔH between the edge portion of the first surface 221a close to the second surface 222a and the second surface 222a can be reduced.

[0148] It should be understood that when the transition pattern 223 is disposed between the first isolation pattern 221 and the second isolation pattern 222, one transition pattern 223 surrounds one second isolation pattern 222; moreover, when the transition pattern 223 is disposed between the second isolation pattern 222 and the first isolation pattern 221, and the first isolation pattern 221 surrounds the pixel opening Q, along the first direction X1, the transition pattern 223 and the pixel opening Q are spaced apart.

[0149] In some examples, along the first direction X1, the minimum distance D1 between the boundaries where the transition pattern 223 and the pixel opening Q approach each other is less than 1.5 μm, for example, 1.0 μm, 1.2 μm, 1.3 μm, 1.4 μm, etc.

[0150] In some embodiments, as Figure 7 and Figure 8 shown, along the first direction X1, the range of the minimum distance D1 between the boundaries where the transition pattern 223 and the pixel opening Q approach each other is 1.5 μm to 10 μm.

[0151] Exemplarily, along the first direction X1, the minimum distance D1 (hereinafter referred to as the first distance D1) between the boundaries where the transition pattern 223 and the pixel opening Q approach each other may be 1.5 μm, 2 μm, 3 μm, 3.5 μm, 4 μm, 4.5 μm, 5 μm, 5.5 μm, 6.0 μm, 6.2 μm, 6.5 μm, 7 μm, 7.5 μm, 8 μm, 9 μm, 10 μm, etc.

[0152] When the first distance D1 is relatively small (e.g., less than 1.5 μm), in order to space the transition pattern 223 from the pixel opening Q, the process difficulty of forming the second isolation pattern 222 and the transition pattern 223 may increase. For example, when the second isolation pattern 222 and the transition pattern 223 are formed by an etching process and the first distance D1 is relatively small (e.g., less than 1.5 μm), in order to space the transition pattern 223 from the pixel opening Q, the accuracy requirement for the etching process is relatively high (e.g., the resolution of the photoresist material PR needs to be less than 1.5 μm), making the process difficulty of forming the isolation structure 220 relatively high; when the first distance D1 is relatively large (e.g., greater than 10 μm), the distance between adjacent pixel openings Q is relatively large, reducing the effective light-emitting area of the display panel 200. Therefore, by setting the range of the first distance D1 to be 1.5 μm to 10 μm, the process difficulty of forming the second isolation pattern 222 and the transition pattern 223 can be reduced while ensuring the effective light-emitting area of the display panel 200.

[0153] It should be understood that when there is a height difference ΔH between the first surface 221a and the second surface 222a at the edge portion where the first surface 221a is close to the second surface 222a, as Figure 7 shown, the second surface 222a can be set higher than the edge portion of the first surface 221a close to the second surface 222a, or, as Figure 8 shown, the second surface 222a can also be set lower than the edge portion of the first surface 221a close to the second surface 222a. Hereinafter, the two cases will be exemplarily described.

[0154] In some implementation manners, as Figure 3A shown, the first encapsulation layer 231 is formed on the second electrode layer 120G by a deposition process. When the power-off isolation is performed using the partition structure 250 with an undercut structure, the material of the first encapsulation layer 231 deposited in the region where the partition structure 250 is located is likely to be in a disconnected state, making the formed first encapsulation layer 231 prone to cracks, affecting the encapsulation effect of the first encapsulation layer 231.

[0155] In some implementation manners, when the power-off isolation is performed using the partition structure 250 with an undercut structure, due to the undercut structure of the partition structure 250, the partition structure 250 is usually prepared by a separate process and is difficult to be combined with the formation process of other structures. For example, it is difficult to combine the process of forming the partition structure 250 and the isolation structure 220 using a halftone mask, making the manufacturing method of the display panel 200 relatively complex.

[0156] In some embodiments, as Figure 7As shown, the edge portion of the first surface 221a close to the second surface 222a is farther from the substrate 210 than the second surface 222a. The range of the angle α formed by the tangent line L1 of the third surface 223a and the second surface 222a is 90° to 160°.

[0157] Exemplarily, when the edge portion of the first surface 221a close to the second surface 222a is farther from the substrate 210 than the second surface 222a, the topographic images of the first isolation pattern 221, the second isolation pattern 222, and the transition pattern 223 are as Figure 14 shown.

[0158] Exemplarily, the angle α (hereinafter simply referred to as the first angle α) formed by the tangent line L1 of the third surface 223a and the second surface 222a can be 90°, 100°, 110°, 120°, 130°, 140°, 153°, 160°, etc.

[0159] In some examples, as Figure 7 shown, the third surface 223a is a plane, and the first angle α corresponding to each position of the third surface 223a is equal or approximately equal; in some other examples, the third surface 223a is a curved surface, and the angular value of the first angle α may change with the change of the position of the tangent point of the third surface 223a.

[0160] Here, as a possible obtaining method, a first reference line can be taken in the second surface 222a to make the first reference line coplanar with the tangent line L1 of the third surface 223a. At this time, the angle between the first reference line and the tangent line L1 of the third surface 223a is the first angle α. It should be noted that when the first reference line and the tangent line L1 of the third surface 223a do not directly intersect, the first reference line can be appropriately extended so that the extension line of the first reference line intersects the tangent line L1 of the third surface 223a to obtain the first angle α.

[0161] It should be understood that when the edge portion of the first surface 221a close to the second surface 222a is farther from the substrate 210 than the second surface 222a, the second isolation pattern 222 and the transition pattern 223 can be formed by opening grooves in the structure for forming the isolation structure 220 (such as the first initial isolation structure 220i described in detail below).

[0162] When the first angle α is relatively small (for example, less than 90°), it may be difficult to deposit the material of the first encapsulation layer 231 on the third surface 223a, making the formed first encapsulation layer 231 prone to cracks; moreover, it may be difficult to combine the processes of forming the second isolation pattern 222 and the first isolation pattern 221, making the process of forming the isolation structure 220 more complex. When the first angle α is relatively large (for example, greater than 160°), the process feasibility of forming the groove may be reduced.

[0163] Therefore, by setting the range of the first angle α to be 90° to 160°, first, it is possible to prevent cracks from occurring in the first encapsulation layer 231 and improve the encapsulation effect of the first encapsulation layer 231; second, it can improve the process feasibility of forming the second isolation pattern 222; third, it can at least partially combine the steps of forming the second isolation pattern 222 and the first isolation pattern 221. For example, a halftone mask can be used to form the morphologies of the second isolation pattern 222 and the first isolation pattern 221 by using a single etching process. Compared with some implementation modes where the power-off isolation is achieved by using the partition structure 250 with an undercut structure, the manufacturing method of the display panel 200 can be simplified; fourth, it can form a relatively smooth transition between the second surface 222a and the third surface 223a, making the surface average roughness Ra2 of the second surface 222a relatively consistent with the surface average roughness Ra3 of the third surface 223a, which is beneficial to improving the power-off isolation effect.

[0164] Here, there is no limit to the shape of the positive projection of the second isolation pattern 222 on the substrate 210. For example, the positive projection of the second isolation pattern 222 on the substrate 210 can be rectangular, circular, elliptical, rhombic, etc.

[0165] In some examples, the second electrode 120 (for example, the cathode) auxiliary lapping technology is used in the display panel 200. At this time, the second isolation pattern 222 provided beside a pixel opening Q can be an annular second isolation pattern 222.

[0166] In some examples, the positive projection of the second isolation pattern 222 on the substrate 210 includes a strip. The pixel opening Q is a square opening. At this time, the number of the second isolation patterns 222 provided beside a pixel opening Q can be multiple, and the multiple second isolation patterns 222 are arranged at intervals around the pixel opening Q in sequence. The arrangement direction of the second isolation pattern 222 is, for example, parallel to the long side or the short side of the pixel opening Q.

[0167] In some embodiments, as Figure 10B 、 Figure 10D 、 Figure 10E and Figure 11 shown, the second isolation pattern 222 on the substrate 210 (seeFigure 7 ) The orthographic projection on it includes a strip shape and / or an arc shape. The display panel 200 has a plurality of surrounding directions X4, and one surrounding direction X4 is set around a pixel opening Q; the number of the second isolation patterns 222 provided beside a pixel opening Q is plural, and the plural second isolation patterns 222 are arranged along the surrounding direction X4.

[0168] For example, as Figure 10B shown, the pixel opening Q is a circular opening, the number of the second isolation patterns 222 provided beside the pixel opening Q is two, and the second isolation patterns 222 are arc-shaped isolation patterns.

[0169] For another example, as Figure 11 shown, the pixel opening Q is a circular opening, the number of the second isolation patterns 222 provided beside the pixel opening Q is eight, and the second isolation patterns 222 are strip-shaped isolation patterns.

[0170] Through the above settings, the pixel opening Q can be surrounded by a pattern composed of a plurality of second isolation patterns 222, so that a second isolation pattern 222 is provided between the surrounded light-emitting device 100 and a plurality of adjacent light-emitting devices 100, which can improve the effect of preventing color crosstalk between the surrounded light-emitting device 100 and a plurality of adjacent light-emitting devices 100, and improve the display effect of the display panel 200.

[0171] In some examples, along the surrounding direction X4, the distance D2 between any two adjacent second isolation patterns 222 is greater than 0 and less than 1.5 μm, for example, 0.1 μm, 0.5 μm, 1.0 μm or 1.4 μm. At this time, the distance D2 between two adjacent second isolation patterns 222 is relatively small.

[0172] In some embodiments, as Figure 10B shown, along the surrounding direction X4, the distance D2 between any two adjacent second isolation patterns 222 is greater than or equal to 1.5 μm.

[0173] Exemplarily, along the surrounding direction X4, the distance D2 (hereinafter simply referred to as the second distance D2) between any two adjacent second isolation patterns 222 can be 1.5 μm, 1.8 μm, 2.0 μm, 2.2 μm, 2.5 μm, 3.0 μm, 4.0 μm, 4.5 μm or 5.0 μm, etc.

[0174] When the second distance D2 is relatively small, the process precision requirements for forming the second isolation pattern 222 are relatively high. For example, when using an etching process to form the second isolation pattern 222 and the second distance D2 is small, in order to avoid adjacent second isolation patterns 222 from connecting, the process precision requirements for etching to form the second isolation pattern 222 are relatively high. Therefore, by setting the second distance D2 to be greater than or equal to 1.5 μm, the process difficulty of forming the second isolation pattern 222 can be reduced, and the method of forming the isolation structure 220 can be simplified.

[0175] In some embodiments, such as Figure 9 , Figure 10B , Figure 10D and Figure 10E shown, the first isolation pattern 221 includes a first boundary portion 221b and a second boundary portion 221c that are connected to the transition pattern 223. The distance D3 between the orthographic projections of the first boundary portion 221b and the second boundary portion 221c on the substrate 210 is the third distance D3.

[0176] Figure 10B The relative positional relationship of the orthographic projections of the first isolation pattern 221, the second isolation pattern 222, the transition pattern 223, the first boundary portion 221b, and the second boundary portion 221c on the substrate 210 is as shown in Figure 10D ; Figure 10C The relative positional relationship of the orthographic projections of the first isolation pattern 221, the second isolation pattern 222, the transition pattern 223, the first boundary portion 221b, and the second boundary portion 221c on the substrate 210 is as shown in Figure 10E shown, where 221’ represents the orthographic projection of the first isolation pattern 221 on the substrate 210, 222’ represents the orthographic projection of the second isolation pattern 222 on the substrate 210, 223’ represents the orthographic projection of the transition pattern 223 on the substrate 210, 221b’ represents the orthographic projection of the first boundary portion 221b on the substrate 210, and 221c’ represents the orthographic projection of the second boundary portion 221c on the substrate 210. As shown in Figure 10C shown, there is a third distance D3 between the orthographic projections of the first boundary portion 221b and the second boundary portion 221c on the substrate 210.

[0177] As described above, in the edge portion of the first surface 221a close to the second surface 222a, compared with the case where the second surface 222a is far from the substrate 210, the morphology of the second isolation pattern 222 and the transition pattern 223 can be formed by opening a groove in the structure for forming the isolation structure 220 (such as the third initial isolation structure 220iii described in detail below, see Figure 15C ).

[0178] In the case where the orthographic projection of the second isolation pattern 222 on the substrate 210 includes a strip shape and / or an arc shape, the third distance D3 corresponds to the width of the end portion of the groove away from the substrate 210.

[0179] The embodiments of the present disclosure do not limit the value of the third distance D3. For example, the third distance D3 can be 1.0μm, 1.2μm, 1.4μm, 22μm, 25μm, etc.

[0180] In some embodiments, as Figure 10B shown, the range of the third distance D3 is 1.5μm to 21μm.

[0181] Exemplarily, the third distance D3 can be 1.5μm, 3μm, 5μm, 8μm, 10μm, 13μm, 18μm, 20μm, 22μm, etc.

[0182] When the third distance D3 is relatively small, the process accuracy requirement for forming the second isolation pattern 222 is relatively high, increasing the process difficulty of forming the second isolation pattern 222. For example, when using an etching process to form the second isolation pattern 222 and the third distance D3 is relatively small, in order to avoid the third distance D3 being less than the set requirement, the process accuracy requirement for etching to form the second isolation pattern 222 is relatively high. When the third distance D3 is relatively large, the distance between adjacent pixel openings Q is relatively large, reducing the effective light-emitting area of the display panel 200. Therefore, by setting the range of the third distance D3 to be 1.5μm to 21μm, the process difficulty of forming the second isolation pattern 222 can be reduced on the basis of ensuring the effective light-emitting area of the display panel 200.

[0183] In some embodiments, as Figure 10A and Figure 11 shown, the display panel 200 includes repeatedly arranged pixel opening units QG; one pixel opening unit QG includes four pixel openings Q, the geometric center connection lines of the four pixel openings Q form a quadrilateral, and the four pixel openings Q are located at the four vertices of the quadrilateral. The second isolation pattern 222 is disposed around at least part of the pixel openings Q. The display panel 200 further includes spacers 240. The spacers 240 are disposed on the first isolation pattern 221 and in the middle part of the area where the pixel opening unit QC is located; the spacers 240 are spaced apart from the second isolation pattern 222.

[0184] Exemplarily, in the display panel 200, multiple pixel opening units QG are arranged in an array.

[0185] Exemplarily, as Figure 10A and Figure 11As shown, the pixel opening unit QG includes a first pixel opening Q1, a second pixel opening Q2, a third pixel opening Q3, and a fourth pixel opening Q4. Among them, the light-emitting device 100 disposed in the first pixel opening Q1 is, for example, a red light-emitting device, the light-emitting devices 100 disposed in the second pixel opening Q2 and the fourth pixel opening Q4 are, for example, green light-emitting devices, and the light-emitting device 100 disposed in the third pixel opening Q3 is, for example, a blue light-emitting device.

[0186] It should be noted that, in order to more clearly illustrate the differences between the light-emitting devices 100 in the four pixel openings Q, Figure 10A 、 Figure 11 and in the following detailed description Figure 12A the second electrode 120 disposed on the light-emitting layer 130 is omitted. In practical applications, when the second electrode layer 120G is covered on the first isolation pattern 221 and the second isolation pattern 222 of the display panel 200, the second electrode layer 120G is usually also covered on the light-emitting layer 130.

[0187] Exemplarily, the quadrilateral formed by the connecting lines of the geometric centers of the four pixel openings Q can be a trapezoid or a quadrilateral with unequal side lengths, etc.

[0188] The second isolation pattern 222 is disposed around at least part of the pixel opening Q, which means that one second isolation pattern 222 is disposed around the circumferential direction of one pixel opening Q, and the second isolation pattern 222 surrounds the pixel opening Q or surrounds part of the pixel opening Q.

[0189] As described above, the spacer 240 can be used to support the FMM when evaporating the light-emitting material; by disposing the spacer 240 on the first isolation pattern 221, the surface of the spacer 240 away from the substrate 210 can be higher than the first surface 221a and higher than the second surface 222a. In this way, the surface of the spacer 240 away from the substrate 210 can be disposed at a position relatively far from the substrate 210, which can improve the supporting effect of the spacer 240 on the FMM. Moreover, since the connecting lines of the geometric centers of the four pixel openings Q included in the pixel opening unit QG form a quadrilateral, the area of the first isolation pattern 221 in the middle part of the area where the pixel opening unit QC is located is relatively large. By disposing the spacer 240 in the middle part of the area where the pixel opening unit QC is located, the setting position of the spacer 240 can be more flexible, and the cross-sectional area of the spacer 240 parallel to the substrate 210 can be relatively large, which can further improve the supporting effect.

[0190] Above, an example of the case where the second surface 222a is lower than the edge part of the first surface 221a close to the second surface 222a will be described. Hereinafter, an example of the case where the second surface 222a is higher than the edge part of the first surface 221a close to the second surface 222a will be described.

[0191] In some embodiments, as Figure 8 shown, the edge portion of the first surface 221a close to the second surface 222a is closer to the substrate 210 than the second surface 222a. The range of the angle β formed by the tangent line L2 of the third surface 223a and the adjacent edge portion of the first surface 221a is 120° to 177°.

[0192] Exemplarily, the angle β (hereinafter simply referred to as the second angle β) formed by the tangent line L2 of the third surface 223a and the adjacent edge portion of the first surface 221a may be 120°, 130°, 140°, 153°, 160°, 165°, 170°, or 177°, etc.

[0193] In some examples, the third surface 223a is a plane, and the second angle β corresponding to each position of the third surface 223a is equal or approximately equal; in still other examples, as Figure 8 shown, the third surface 223a is a curved surface, and the angular value of the second angle β may change with the change of the position of the tangent point of the third surface 223a.

[0194] Here, as a possible obtaining method, a second reference line may be taken in the edge portion of the first surface 221a adjacent to the third surface 223a, so that the second reference line is coplanar with the tangent line L2 of the third surface 223a. At this time, the angle between the second reference line and the tangent line L2 of the third surface 223a is the second angle β. It should be noted that the second reference line may be the tangent line of the edge portion of the first surface 221a adjacent to the third surface 223a. Moreover, in the case where the second reference line and the tangent line L2 of the third surface 223a do not directly intersect, the second reference line may be appropriately extended so that the extension line of the second reference line intersects the tangent line L2 of the third surface 223a to obtain the second angle β.

[0195] It should be understood that in the case where the edge portion of the first surface 221a close to the second surface 222a is closer to the substrate 210 than the second surface 222a, the second isolation pattern 222 and the transition pattern 223 may be formed by forming a protrusion on the structure for forming the isolation structure 220 (such as the second initial isolation structure 220ii described in detail below).

[0196] When the second angle β is relatively small, it may be difficult for the material of the first encapsulation layer 231 to be deposited on the third surface 223a, making the formed first encapsulation layer 231 prone to cracks. Moreover, it may be difficult to combine the processes of forming the second isolation pattern 222 and the first isolation pattern 221, making the process of forming the isolation structure 220 relatively complex. When the second angle β is relatively large (for example, greater than 177°), the process feasibility of forming the convex structure may be reduced. Therefore, by setting the range of the second angle β to be 120° to 177°, firstly, the encapsulation effect of the first encapsulation layer 231 can be improved; secondly, the process feasibility of forming the second isolation pattern 222 and the first isolation pattern 221 can be increased, and the forming process can be simplified. For example, a halftone mask can be used to form the morphologies of the second isolation pattern 222 and the first isolation pattern 221 by a single etching process. The encapsulation effect of the first encapsulation layer 231 can be improved;

[0197] The present disclosure embodiment does not limit the shape of the positive projection of the second isolation pattern 222 on the substrate 210. For example, the positive projection of the second isolation pattern 222 on the substrate 210 can be rectangular, circular, elliptical, rhombic, strip-shaped, arc-shaped, etc.

[0198] In some embodiments, in combination with Figure 8 , as Figure 12A shown, the display panel 200 includes repeatedly arranged pixel opening units QG; one pixel opening unit QG includes four pixel openings Q, the geometric center connection lines of the four pixel openings Q form a quadrilateral, and the four pixel openings Q are located at the four vertices of the quadrilateral; among the four pixel openings Q included in the pixel opening unit QG, a gap is formed between two adjacent pixel openings Q in the circumferential direction of the pixel opening unit QG.

[0199] One second isolation pattern 222 and one transition pattern 223 are provided in the area where one pixel opening unit QG is located; and the transition pattern 223 surrounds the second isolation pattern 222. The positive projections of the second isolation pattern 222 and the transition pattern 223 provided in the area where one pixel opening unit QG is located on the substrate 210 include a four-corner star shape, and the four corners of the pattern formed by the second isolation pattern 222 and the transition pattern 223 respectively extend into the four gaps in the area where the pixel opening unit QG is located.

[0200] Here, for the understanding of the pixel opening unit QG, reference can be made to the understanding of the pixel opening unit QG in the foregoing part, which will not be elaborated here.

[0201] In some examples, the four corner portions of the second isolation pattern 222 respectively extend into four gaps within the region where the pixel opening unit QG is located. For example, the first corner portion of the second isolation pattern 222 extends into the gap between the first pixel opening Q1 and the second pixel opening Q2 to achieve power-off isolation between the two light-emitting devices 100 within the first pixel opening Q1 and the second pixel opening Q2; the second corner portion of the second isolation pattern 222 extends into the gap between the second pixel opening Q2 and the third pixel opening Q3 to achieve power-off isolation between the two light-emitting devices 100 within the second pixel opening Q2 and the third pixel opening Q3; the third corner portion of the second isolation pattern 222 extends into the gap between the third pixel opening Q3 and the fourth pixel opening Q4 to achieve power-off isolation between the two light-emitting devices 100 within the third pixel opening Q3 and the fourth pixel opening Q4; the fourth corner portion of the second isolation pattern 222 extends into the gap between the fourth pixel opening Q4 and the first pixel opening Q1 to achieve power-off isolation between the two light-emitting devices 100 within the fourth pixel opening Q4 and the first pixel opening Q1.

[0202] It can be understood that when the four corner portions of the pattern formed by the second isolation pattern 222 and the transition pattern 223 respectively extend into the four gaps within the region where the pixel opening unit QG is located, through one second isolation pattern 222 and one transition pattern 223, the power-off isolation effect between the light-emitting devices 100 within the pixel opening Q included in one pixel opening unit QG can be achieved. In this way, the number of the second isolation patterns 222 can be reduced, and the formation process of the second isolation pattern 222 can be simplified.

[0203] In some embodiments, in combination with Figure 12B , such as Figure 8 shown, the two transition patterns 223 located within the regions of two adjacent pixel opening units QG are spaced apart.

[0204] Exemplarily, between the two transition patterns 223 located within the regions of two adjacent pixel opening units QG, they are spaced apart by the first isolation pattern 221.

[0205] Through the above settings, the first isolation pattern 221 within the regions of two adjacent pixel opening units QG can extend between the two transition patterns 223, making the first isolation pattern 221 within the regions of two adjacent pixel opening units QG in an electrically connected state, and further making the second electrode layer 120G a common electrode shared by multiple light-emitting devices 100.

[0206] In some examples, the first isolation pattern 221 located between two adjacent transition patterns 223 has a size D4 in the third direction X3 that is greater than 0 and less than or equal to 1.5 μm, such as 0.1 μm, 0.5 μm, 1.0 μm, or 1.4 μm. At this time, the distance between two adjacent second isolation patterns 222 is relatively small. Among them, the third direction X3 is parallel to the center line LL of the two second isolation patterns 222.

[0207] In some embodiments, as Figure 12B shown, the first isolation pattern 221 located between two adjacent transition patterns 223 has a size D4 in the third direction X3 in the range of 1.5 μm to 5 μm.

[0208] Exemplarily, the size D4 of the first isolation pattern 221 located between two adjacent transition patterns 223 in the third direction X3 (hereinafter simply referred to as the first size D4) can be 1.5 μm, 1.8 μm, 2.0 μm, 2.3 μm, 2.5 μm, 3.0 μm, 4.0 μm, or 5.0 μm, etc.

[0209] When the first size D4 is relatively small, the process accuracy requirements for forming the second isolation pattern 222 and the transition pattern 223 are relatively high. For example, when using an etching process to form the second isolation pattern 222 and the transition pattern 223 and the first size D4 is relatively small, in order to avoid adjacent transition patterns 223 from being connected, the process accuracy requirements for etching to form the second isolation pattern 222 and the transition pattern 223 are relatively high. When the first size D4 is relatively large, the size of the pattern formed by the second isolation pattern 222 and the transition pattern 223 extending into the gap within the area where the pixel opening unit QG is located is relatively small, resulting in a relatively poor power-off isolation effect. Therefore, by setting the first size D4 in the range of 1.5 μm to 5 μm, on the basis of ensuring the power-off isolation effect of the second isolation pattern 222, the process difficulty of forming the second isolation pattern 222 and the transition pattern 223 can be reduced, and the method of forming the isolation structure 220 can be simplified.

[0210] In some examples, the edge portion of the first surface 221a close to the second surface 222a is closer to the substrate 210 than the second surface 222a. Moreover, the display panel 200 further includes spacers 240, and the spacers 240 are provided on the first isolation pattern 221 or the second isolation pattern 222.

[0211] In some embodiments, as Figure 8 shown, the second isolation pattern 222 is reused as the spacer 240.

[0212] Exemplarily, in the case where the second isolation pattern 222 is reused as the spacer 240, when the light-emitting material is vapor-deposited, the second surface 222a of the second isolation pattern 222 is in contact with the FMM.

[0213] Through the above arrangement, the steps of forming the second isolation pattern 222 and forming the spacer 240 can be combined, which can simplify the manufacturing method of the display panel 200. Moreover, the second surface 222a of the second isolation pattern 222 is relatively rough. In the case where the second surface 222a of the second isolation pattern 222 is in contact with the FMM, relative movement between the second isolation pattern 222 and the FMM can be prevented, and the supporting effect of the spacer 240 on the FMM can be improved.

[0214] In some embodiments, as Figure 7 and Figure 8 shown, the second electrode layer 120G includes a first portion 121, a second portion 122, a third portion 123, and a fourth portion 124. The first portion 121 is disposed on a side of the light-emitting layer 130 away from the first electrode 110. The second portion 122 is disposed on a side of the first isolation pattern 221 away from the substrate 210. The third portion 123 is disposed on a side of the second isolation pattern 222 away from the substrate. The fourth portion 124 is disposed on a side of the transition pattern 223 away from the substrate.

[0215] It should be understood that the first portion 121 is disposed on a side of the light-emitting layer 130 away from the first electrode 110, and the first portion 121 is the second electrode 120 described in the foregoing part.

[0216] The first portion 121 is disposed on a side of the light-emitting layer 130 away from the first electrode 110. The first portion 121 may be disposed on the light-emitting layer 130, or may be disposed on an electron transport functional layer (for example, an electron transport layer or an electron injection layer) or a hole transport functional layer (for example, a hole transport layer or a hole injection layer) located between the light-emitting layer 130 and the second electrode 120. Moreover, the surface roughness of these film layers such as the light-emitting layer 130, the electron transport functional layer, or the hole transport functional layer is relatively small. The second portion 122 is disposed on a side of the first isolation pattern 221 away from the substrate 210. The surface average roughness Ra1 of the first surface 221a is less than the surface average roughness Ra2 of the second surface 222a, and the surface average roughness Ra1 of the first surface 221a is relatively small.

[0217] Therefore, in the process of forming the second electrode layer 120G (for example, a deposition process), the material of the second electrode layer 120G can be deposited relatively more on these film layers such as the light-emitting layer 130, the electron transport functional layer, or the hole transport functional layer, and on the first isolation pattern 221, so that the formed first portion 121 and the second portion 122 are relatively thick.

[0218] The third part 123 is disposed on a side of the second isolation pattern 222 away from the substrate, and the fourth part 124 is disposed on a side of the transition pattern 223 away from the substrate. The surface average roughness Ra2 of the second surface 222a and the surface average roughness Ra3 of the third surface 223a are both greater than the surface average roughness Ra1 of the first surface 221a. Moreover, the third surface 223a may be an inclined surface. Under the influence of these factors, in the process of forming the second electrode layer 120G (for example, the deposition process), the material of the second electrode layer 120G may be deposited relatively less on the second surface 222a and the third surface 223a, making the formed third part 123 and fourth part 124 relatively thinner. Exemplarily, the thickness of the fourth part 124 is less than the thickness of the third part 123.

[0219] Therefore, in some embodiments, as Figure 7 shown, the thickness D5 of the first part 121 ranges from 10 nm to 20 nm; the thickness D6 of the second part 122 ranges from 10 nm to 20 nm; the thickness D7 of the third part 123 ranges from 0 nm to 20 nm; the thickness D8 of the fourth part 124 ranges from 0 nm to 20 nm.

[0220] Exemplarily, the thickness D5 of the first part 121 may be 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, 15 nm, 16 nm, 17 nm, 18 nm, 19 nm or 20 nm, etc.

[0221] Exemplarily, the thickness D6 of the second part 122 may be 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, 15 nm, 16 nm, 17 nm, 18 nm, 19 nm or 20 nm, etc. Moreover, the thickness D5 of the first part 121 and the thickness D6 of the second part 122 may be equal or not equal, and there is no limitation here.

[0222] Exemplarily, the thickness D7 of the third part 123 may be 0 nm, 2 nm, 4 nm, 6 nm, 7 nm, 8 nm, 10 nm, 12 nm, 14 nm, 15 nm, 16 nm, 18 nm or 20 nm, etc. Exemplarily, the thickness D8 of the fourth part 124 may be 0 nm, 2 nm, 3 nm, 6 nm, 7 nm, 8 nm, 10 nm, 13 nm, 14 nm, 15 nm, 16 nm, 18 nm or 20 nm, etc. Moreover, regarding the relative magnitude relationship between the thickness D7 of the third part 123, the thickness D8 of the fourth part 124, and the thickness D5 of the first part 121, and the relative magnitude relationship between the thickness D7 of the third part 123, the thickness D8 of the fourth part 124, and the thickness D6 of the second part 122, there is no limitation here.

[0223] With the above settings, on the one hand, the thickness D5 of the first part 121 and the thickness D6 of the second part 122 are relatively thick, so that the second electrode layer 120G provided on the first isolation pattern 221 and on one side of the light-emitting layer 130 is in an electrically connected state, and further, the second electrode layer 120G is a common electrode shared by multiple light-emitting devices 100; on the other hand, the thickness D7 of some position points in the third part 123 and / or the fourth part 124 can be 0 nm. In this case, the resistance of these position points is 0, and the function of power-off isolation can be achieved, improving the effect of preventing pixel color crosstalk.

[0224] In some embodiments, as Figure 7 shown, the first encapsulation layer 231 is a continuous film layer, and the thickness D9 range of the first encapsulation layer 231 is 0.8 μm to 1.5 μm.

[0225] Exemplarily, the thickness D9 of the first encapsulation layer 231 can be 0.8 μm, 0.9 μm, 1 μm, 1.1 μm, 1.18 μm, 1.2 μm, 1.3 μm, 1.35 μm, 1.4 μm or 1.5 μm, etc.

[0226] Here, the first encapsulation layer 231 being a continuous film layer means that the first encapsulation layer 231 on multiple light-emitting devices 100 and the isolation structure 220 is an integrally connected film layer; it can also be understood that the first encapsulation layer 231 can cover multiple light-emitting devices 100 and the isolation structure 220.

[0227] With the above settings, the encapsulation effect of the first encapsulation layer 231 on multiple light-emitting devices 100 is better. Compared with the case where the first encapsulation layer 231 has cracks or breaks, the performance of the first encapsulation layer 231 in blocking water and oxygen can be improved, which is beneficial to improving the service life of the display panel 200.

[0228] The embodiments of the present disclosure do not limit the type of the material of the isolation structure 220.

[0229] In some examples, the isolation structure 220 includes a transparent resin material. At this time, the light emitted by the light-emitting device 100 can pass through the isolation structure 220 and exit.

[0230] In some embodiments, the material of the isolation structure 220 includes a light-absorbing material.

[0231] For example, the isolation structure 220 includes a resin material and a light-absorbing material.

[0232] Exemplarily, the light-absorbing material can include at least one of black ink, black glue, and black photoresist material. The black glue is, for example, silica gel doped with black powder.

[0233] When the material of the isolation structure 220 includes a light-absorbing material, the isolation structure 220 can also be referred to as Black PDL (BPDL).

[0234] Exemplarily, when the material of the isolation structure 220 includes a light-absorbing material, the isolation structure 220 can also be configured to absorb the light incident on the isolation structure 220.

[0235] By setting it in this way, the isolation structure 220 can be used to absorb the light incident on the display panel 200 (i.e., external light). On the one hand, the reflection of external light on the driving circuit layer 212 (see Figure 1 ) can be reduced, and the reflectivity can be lowered to improve the color separation phenomenon during the off-screen state; on the other hand, the light incident on the display panel 200 can be prevented from irradiating the driving circuit layer, thereby avoiding the influence of the light incident on the display panel 200 on the structure of the driving circuit layer 212.

[0236] Some embodiments of the present disclosure also provide a method for manufacturing a display panel 200. Combining Figure 7 , as Figure 13 shown, the manufacturing method includes S1 and S2.

[0237] S1: Form a substrate 210.

[0238] S2: Form an isolation structure 220 on the substrate 210. The isolation structure 220 defines a plurality of pixel openings Q. The isolation structure 220 includes a first isolation pattern 221 and a plurality of second isolation patterns 222. The first isolation pattern 221 at least circumferentially surrounds the pixel opening Q along the circumference of the pixel opening Q; the first isolation pattern 221 includes a first surface 221a away from the substrate 210. Adjacent two second isolation patterns 222 are spaced apart by at least a part of the first isolation pattern 221, at least a part of the second isolation pattern 222 is provided between adjacent two pixel openings Q, and the second isolation pattern 222 is spaced from the boundary of the pixel opening Q; the second isolation pattern 222 includes a second surface 222a away from the substrate 210.

[0239] Wherein, an edge portion of the first surface 221a close to the second surface 222a has a height difference ΔH from the second surface 222a; the surface average roughness Ra2 of the second surface 222a is greater than the surface average roughness Ra1 of the first surface 221a.

[0240] The beneficial effects of the above method for manufacturing the display panel 200 are the same as those of the display panel 200 described in the above some embodiments, and will not be elaborated here.

[0241] In some embodiments, when forming the isolation structure on the substrate 210 (i.e., S2), combining Figure 16B andFigure 16C , including S2.1 to S2.2.

[0242] S2.1: Form a second initial isolation structure 220ii; the second initial isolation structure 220ii defines a plurality of pixel openings Q; the second initial isolation structure 220ii includes a first isolation pattern 221 and a plurality of initial patterns 222i, and the initial patterns 222i are used to form a second isolation pattern 222.

[0243] S2.2: Adopt a dry etching process to roughen the surface of the initial pattern 222i away from the substrate 210, so that the initial pattern 222i is transformed into a second isolation pattern 222.

[0244] In some examples, the process gas used in the dry etching process includes oxygen (O2).

[0245] Exemplarily, in addition to oxygen (O2), the process gas used in the dry etching process further includes a control gas for controlling the etching amount, such as carbon tetrafluoride (CF4). In this case, the ratio of oxygen to the control gas can be adjusted, and the relevant parameters of the isolation structure 220 can be controlled within a set range. Combining Figure 7 and Figure 8 , the above relevant parameters may include at least one of: the surface average roughness Ra2 of the second surface 222a, the surface average roughness Ra3 of the third surface 223a, the height difference △H between the edge portion of the first surface 221a close to the second surface 222a and the second surface 222a, the number of the second isolation patterns 222, the distance D3 between the first boundary portion 221b and the second boundary portion 221c, the angle α formed by the tangent L1 of the third surface 223a and the second surface 222a, and the angle β formed by the tangent L2 of the third surface 223a and the edge portion of the adjacent first surface 221a.

[0246] For example, the process gas used in the dry etching process includes oxygen and carbon tetrafluoride. When the proportion of oxygen in the process gas is relatively high, the surface average roughness Ra2 of the second surface 222a is relatively large, and the surface average roughness Ra2 of the second surface 222a is relatively large.

[0247] Also for example, the process gas used in the dry etching process includes oxygen and carbon tetrafluoride. When the proportion of oxygen in the process gas is relatively high, the height difference △H between the edge portion of the first surface 221a close to the second surface 222a and the second surface 222a is relatively large.

[0248] By setting S2 to include S2.1 to S2.2, the roughening process is a dry etching process. The dry etching process has the advantages of controllable roughness and easy implementation. Moreover, when the dry etching process is used for roughening, the roughening process and the process for forming the grooves or protrusions of the second isolation pattern 222 can be the same process, which can reduce the process difficulty of forming the isolation structure 220.

[0249] In some embodiments, forming the second initial isolation structure 220ii (i.e., S2.1), in combination with Figure 16B and Figure 16C , includes S2.1.1 to S2.1.2.

[0250] S2.1.1: Form the first initial isolation structure.

[0251] Exemplarily, forming the first initial isolation structure can be a coating process.

[0252] S2.1.2: Use a halftone mask to etch the first initial isolation structure to form the first isolation pattern 221 and a plurality of initial patterns 222i.

[0253] The halftone mask (Half Tone Mask, HTM) includes a halftone pattern (Half Tone Pattern) and mask openings. Among them, the halftone pattern can be made of a semi-transparent film. Based on this structure, the halftone mask can utilize the partial light transmissivity of the grating to incompletely expose the photoresist (PR). In practical applications, a suitable semi-transparent film can be selected so that the light transmittance of the semi-transparent film is within a set range, so that in the obtained second initial isolation structure 220ii, the height difference between the edge portion of the first surface 221a close to the initial pattern 222i and the initial pattern 222i is within a set range.

[0254] In some examples, in combination with Figure 18B , the edge portion of the first surface 221a close to the second surface 222a is farther from the substrate 210 than the second surface 222a; at this time, during the formation of the second initial isolation structure 220ii, in the first initial isolation structure 220i, the portion opposite to the halftone pattern of the halftone mask forms the initial pattern 222i, and the portion opposite to the opening of the halftone mask forms the pixel opening Q.

[0255] In still other examples, in combination with Figure 16B, the edge portion of the first surface 221a close to the second surface 222a is closer to the substrate 210 than the second surface 222a; at this time, in the process of forming the second initial isolation structure 220ii, the portion of the first initial isolation structure 220i opposite to the halftone pattern of the halftone mask forms the first isolation pattern 221, and the portion opposite to the opening of the halftone mask forms the pixel opening Q.

[0256] Exemplarily, the transmittance of the halftone pattern of the halftone mask is in the range of 5% to 95%, for example, 5%, 15%, 20%, 30%, 35%, 40%, 50%, 60%, 65%, 70%, 80% or 95%.

[0257] By setting S2.1 including S2.1.1 to S2.1.2, a single dry etching process can be used to form the pixel opening Q of the isolation structure 220 and the morphology of the first isolation pattern 221, and form the initial morphology of the second isolation pattern 222, so that there is a height difference between the edge portion of the first surface 221a close to the initial pattern 222i and the initial pattern 222i. Compared with the situation where the pixel opening Q, the morphology of the first isolation pattern 221, and the initial morphology of the second isolation pattern 222 are formed respectively through multiple etching processes, the process of forming the second initial isolation structure 220ii can be simplified, and the method of preparing the display panel 200 can be simplified.

[0258] Hereinafter, the technical solutions provided by the present disclosure will be described in detail and exemplarily through the following embodiments.

[0259] [Example 1]

[0260] The following embodiment prepares a display panel 200, the structure of which is as follows: Figure 7 As shown, the top view is Figure 10A The preparation method at least includes M1 to M9.

[0261] M1: If Figure 15A As shown, a plurality of first electrodes 110 are formed on a substrate 210 and are spaced apart from each other.

[0262] Illustratively, the process of forming the plurality of spaced-apart first electrodes 110 is an evaporation process or an etching process.

[0263] Exemplarily, the material of the substrate 210 includes polyimide (PI).

[0264] M2: If Figure 15B As shown, a third preliminary isolation structure 220iii is formed on one side of the plurality of first electrodes 110 away from the substrate 210 . The third preliminary isolation structure 220iii defines a plurality of pixel openings Q and includes a first isolation pattern 221 .

[0265] Exemplarily, the material of the third initial isolation structure 220iii may include positive photoresist or negative photoresist.

[0266] Exemplarily, the material of the third initial isolation structure 220iii may be transparent photoresist or black photoresist containing light-absorbing material.

[0267] Exemplarily, in the third initial isolation structure 220iii, the range of the angle formed by the first surface 221a and the surface of the first electrode 110 is 120° to 177°, such as 120°, 130°, 140°, 155°, 160°, 167°, 170° or 177°, etc.

[0268] M3: As Figure 15C shown, in the third initial isolation structure 220iii, except for the regions where the to-be-formed second isolation pattern 222 (see Figure 15D ) and the transition pattern 223 are located, other regions are covered with photoresist material PR to expose the regions where the to-be-formed second isolation pattern 222 and the transition pattern 223 are located.

[0269] M4: As Figure 15D shown, using a dry etching process, grooves are formed in the regions where the to-be-formed second isolation pattern 222 and the transition pattern 223 are located in the third initial isolation structure 220iii to form a plurality of initial patterns and a plurality of initial transition patterns. Among them, the initial transition patterns are used to form the transition pattern 223.

[0270] M5: As Figure 15D shown, using a dry etching process, surface roughening treatment is performed on the surfaces of the plurality of initial patterns and the plurality of initial transition patterns away from the substrate to form the second isolation pattern 222 and the transition pattern 223.

[0271] Exemplarily, in the dry etching processes of M4 and M5, the process gases used include oxygen and carbon tetrafluoride, and the volume ratio range of oxygen and carbon tetrafluoride is 100:0 to 100:10, such as 100:0, 100:1, 100:3, 100:5, 100:6, 100:8 or 100:10, etc.

[0272] Exemplarily, in the dry etching process of M4 and M5, the gas flow rate (Gas source) ranges from 3k to 12k, such as 3k, 4k, 6k, 8k, 9k, 10k, or 12k, etc.; the self-bias ranges from 0k to 1k, such as 0k, 0.1k, 0.3k, 0.5k, 0.7k, 0.9k, or 1k, etc.; the pressure (Pressure) ranges from 10mT to 50mT, such as 10mT, 20mT, 25mT, 30mT, 40mT, or 50mT, etc.; the etching time ranges from 80s to 200s, such as 80s, 100s, 120s, 150s, 160s, 180s, or 200s, etc.

[0273] Exemplarily, in combination with Figure 7 , in M5, parameters such as the volume ratio of oxygen to carbon tetrafluoride and the self-bias can be controlled so that the range of the angle α formed by the tangent line L1 of the third surface 223a and the second surface 222a is 90° to 160°, such as 90°, 100°, 110°, 125°, 130°, 140°, 155°, or 160°, etc.

[0274] Exemplarily, in combination with Figure 7 , the surface average roughness Ra2 of the second surface 222a obtained in M5 ranges from 5nm to 30nm, such as 5nm, 7nm, 10nm, 12nm, 14nm, 19nm, 20nm, 23nm, 26nm, 27nm, or 30nm, etc. The surface average roughness Ra3 of the third surface 223a obtained in M5 ranges from 5nm to 30nm, such as 5nm, 6nm, 10nm, 12nm, 14nm, 19nm, 20nm, 25nm, 26nm, 27nm, or 30nm, etc.

[0275] Exemplarily, in combination with Figure 7 , the difference between the height H1 of the edge portion of the first surface 221a close to the second surface 222a and the average height H2 of the second surface 222a ranges from 0.05μm to 5μm, such as 0.05μm, 0.1μm, 0.14μm, 0.2μm, 0.26μm, 0.3μm, 0.35μm, 0.37μm, 0.40μm, 0.45μm, or 5μm, etc.

[0276] M6: As shown in Figure 15E , a light-emitting layer 130 is formed on the side of the first electrode 110 away from the substrate 210 within the pixel opening Q.

[0277] Exemplarily, in M6, light-emitting layers 130 of red light-emitting devices, green light-emitting devices, and blue light-emitting devices are respectively formed.

[0278] M7: As shown in Figure 15F , a first portion 121 of a second electrode layer 120G is formed on a side of a light-emitting layer 130 away from a first electrode 110, a second portion 122 of the second electrode layer 120G is formed on a side of a first isolation pattern 221 away from a substrate 210, and a third portion 123 of the second electrode layer 120G is formed on sides of a second isolation pattern 222 and a transition pattern 223 away from the substrate 210.

[0279] Exemplarily, the process of forming the second electrode layer 120G may be an evaporation process.

[0280] Exemplarily, in combination with Figure 7 , the thickness D5 of the first portion 121 formed in M7 may be 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, 15 nm, 16 nm, 17 nm, 18 nm, 19 nm, 20 nm, etc.

[0281] Exemplarily, in combination with Figure 7 , the thickness D6 of the second portion 122 formed in M7 may be 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, 15 nm, 16 nm, 17 nm, 18 nm, 19 nm, 20 nm, etc.

[0282] Exemplarily, in combination with Figure 7 , the thickness D7 of the third portion 123 formed in M7 may be 0 nm, 1 nm, 4 nm, 6 nm, 7 nm, 8 nm, 10 nm, 12 nm, 14 nm, 15 nm, 17 nm, 18 nm, 20 nm, etc.

[0283] M8: As shown in Figure 15G , a first encapsulation layer 231 is formed on a side of the second electrode layer 120G away from the substrate 210, and the first encapsulation layer 231 located on the third portion 123 (see Figure 15F ) uniformly covers the third portion 123.

[0284] Exemplarily, the process of forming the first encapsulation layer 231 may be a deposition process or an inkjet printing process.

[0285] Exemplarily, in combination with Figure 7 , the thickness D9 range of the first encapsulation layer 231 formed in M8 may be 0.8 μm to 1.5 μm, for example, 0.8 μm, 0.9 μm, 1 μm, 1.1 μm, 1.15 μm, 1.2 μm, 1.3 μm, 1.37 μm, 1.4 μm, 1.5 μm, etc.

[0286] M9: As shown in Figure 15H and Figure 15IAs shown, a second encapsulation layer 232 and a third encapsulation layer 233 are sequentially formed on a side of the first encapsulation layer 231 away from the second electrode layer 120G, wherein the second encapsulation layer 232 is a flat film layer.

[0287] Exemplarily, the thickness range of the second encapsulation layer 232 formed in M9 can be 4 μm to 20 μm, such as 4 μm, 6 μm, 8 μm, 10 μm, 11 μm, 12 μm, 14 μm, 16 μm, 18 μm or 20 μm, etc.

[0288] Exemplarily, the thickness range of the third encapsulation layer 233 formed in M9 can be 0.8 μm to 2 μm, such as 0.8 μm, 1.0 μm, 1.1 μm, 1.2 μm, 1.3 μm, 1.4 μm, 1.6 μm, 1.8 μm or 2 μm, etc.

[0289]

Example 2

[0290] The following example prepared a display panel 200, the structure of which is as Figure 8 shown, and the top view is as Figure 12A shown. The manufacturing method at least includes N1 to N9.

[0291] N1: As Figure 16A shown, a plurality of first electrodes 110 spaced apart are formed on a substrate 210.

[0292] Here, for the understanding of the material of the substrate 210 in N1 and the process of forming the first electrode 110, reference can be made to the exemplary description of the corresponding part in M1 of Example 1, which will not be elaborated here.

[0293] N2: As Figure 16B shown, a first initial isolation structure (not shown in the figure) is formed.

[0294] Exemplarily, the material of the first initial isolation structure may include a positive photoresist.

[0295] Exemplarily, the material of the first initial isolation structure may be a transparent photoresist or a black photoresist containing a light-absorbing material.

[0296] N3: As Figure 16B shown, using a halftone mask, the first initial isolation structure is etched to form a second initial isolation structure 220ii. The second initial isolation structure 220ii defines a plurality of pixel openings Q and includes a first isolation pattern 221, a plurality of initial patterns 222i and a plurality of initial transition patterns 223i. The initial transition pattern 223i is used to form a transition pattern 223.

[0297] Exemplarily, in the second initial isolation structure 220ii, the range of the angle formed by the surface of the initial transition pattern 223i away from the substrate 210 and the edge portion of the adjacent first surface 221a is 120° to 177°, such as 120°, 130°, 140°, 153°, 160°, 165°, 170°, or 177°, etc.

[0298] Exemplarily, in the second initial isolation structure 220ii, the range of the angle formed by the first surface 221a and the surface of the first electrode 110 is 120° to 177°, such as 120°, 130°, 140°, 155°, 160°, 167°, 170°, or 177°, etc.

[0299] Exemplarily, in combination with Figure 12A , the multiple pixel openings Q defined by the second initial isolation structure 220ii are divided into repeatedly arranged pixel opening units QG; one pixel opening unit QG includes four pixel openings Q distributed in a quadrilateral shape, and between two adjacent pixel openings Q in the circumferential direction of the pixel opening unit QG, a gap is formed; within the area of one pixel opening unit QG, there is an initial pattern 222i and an initial transition pattern 223i, and the orthographic projection of the two patterns on the substrate 210 includes a four-pointed star shape, and the four corners of the pattern formed by the initial pattern 222i and the initial transition pattern 223i respectively extend into the four gaps within the area of the pixel opening unit QG.

[0300] Exemplarily, in combination with Figure 12A and Figure 12B , the two initial transition patterns 223i located in the areas of two adjacent pixel opening units QG are arranged at intervals, and the size range of the first isolation pattern 221 between the two adjacent initial transition patterns 223i in the third direction X3 is 1.5 μm to 5 μm, such as 1.5 μm, 1.8 μm, 2.0 μm, 2.5 μm, 2.8 μm, 3.0 μm, 4.0 μm, or 5.0 μm, etc. The third direction X3 is parallel to the center connection line of the two second isolation patterns 222 to be formed.

[0301] N4: As Figure 16C shown, in the second initial isolation structure 220ii, other areas except for the multiple initial patterns 222i and the multiple initial transition patterns 223i are covered with a photoresist material PR to expose the multiple initial patterns 222i and the multiple initial transition patterns 223i.

[0302] N5: As Figure 16DAs shown, a dry etching process is adopted to roughen the surfaces of a plurality of initial patterns 222i and a plurality of initial transition patterns 223i to form second isolation patterns 222 and transition patterns 223, and then the photoresist material PR is removed.

[0303] Exemplarily, in the dry etching process of N5, the process gas used is oxygen.

[0304] Exemplarily, in the dry etching process of N5, the gas flow rate (Gas source) ranges from 3k to 12k, such as 3k, 4k, 6k, 8k, 9k, 10k or 12k, etc.; the self-bias ranges from 0k to 1k, such as 0k, 0.1k, 0.3k, 0.5k, 0.7k, 0.9k or 1k, etc.; the pressure (Pressure) ranges from 10mT to 50mT, such as 10mT, 20mT, 25mT, 30mT, 40mT or 50mT, etc.; the etching time ranges from 30s to 80s, such as 40s, 50s, 60s, 65s, 70s or 80s, etc.

[0305] Exemplarily, the average surface roughness Ra2 of the second surface 222a formed in N5 ranges from 5nm to 30nm, such as 5nm, 7nm, 10nm, 12nm, 14nm, 19nm, 20nm, 23nm, 26nm, 27nm or 30nm, etc. The average surface roughness Ra3 of the third surface 223a formed in N5 ranges from 5nm to 30nm, such as 5nm, 6nm, 10nm, 12nm, 14nm, 19nm, 20nm, 25nm, 26nm, 27nm or 30nm, etc.

[0306] N6: As Figure 16E shown, a light-emitting layer 130 is formed on the side of the first electrode 110 away from the substrate 210 within the pixel opening Q.

[0307] Exemplarily, in N6, light-emitting layers 130 of red light-emitting devices, green light-emitting devices and blue light-emitting devices are respectively formed.

[0308] N7: As Figure 16F shown, a first portion 121 of the second electrode layer 120G is formed on the side of the light-emitting layer 130 away from the first electrode 110, a second portion 122 of the second electrode layer 120G is formed on the side of the first isolation pattern 221 away from the substrate 210, and a third portion 123 of the second electrode layer 120G is formed on the side of the second isolation pattern 222 and the transition pattern 223 away from the substrate 210. Moreover, the third portion 123 of the second electrode layer 120G is discontinuous.

[0309] Exemplarily, the thickness of the first portion 121 formed by N7 can be 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, 15 nm, 16 nm, 17 nm, 18 nm, 19 nm, 20 nm, etc.

[0310] Exemplarily, the thickness of the second portion 122 formed by N7 can be 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, 15 nm, 16 nm, 17 nm, 18 nm, 19 nm, 20 nm, etc.

[0311] N8: As Figure 16G shown, a first encapsulation layer 231 is formed on the side of the second electrode layer 120G (see Figure 16E ) away from the substrate 210. The first encapsulation layer 231 located on the third portion 123 uniformly covers the third portion 123.

[0312] Exemplarily, the thickness range of the first encapsulation layer 231 formed by N8 can be 0.8 μm to 1.5 μm, for example, 0.8 μm, 0.9 μm, 1 μm, 1.1 μm, 1.15 μm, 1.2 μm, 1.32 μm, 1.37 μm, 1.4 μm, 1.5 μm, etc.

[0313] N9: As Figure 16H and Figure 16I shown, a second encapsulation layer 232 and a third encapsulation layer 233 are sequentially formed on the side of the first encapsulation layer 231 away from the second electrode layer 120G (see Figure 16E ). Among them, the second encapsulation layer 232 is a flat film layer.

[0314] Exemplarily, the thickness range of the second encapsulation layer 232 formed by N9 can be 4 μm to 20 μm, for example, 4 μm, 6 μm, 8 μm, 10 μm, 11 μm, 12 μm, 14 μm, 16 μm, 18 μm, 20 μm, etc.

[0315] Exemplarily, the thickness range of the third encapsulation layer 233 formed by N9 can be 0.8 μm to 2 μm, for example, 0.8 μm, 1.0 μm, 1.1 μm, 1.2 μm, 1.3 μm, 1.4 μm, 1.6 μm, 1.8 μm, 2 μm, etc.

[0316]

Example 3

[0317] The following example prepared a display panel 200, whose structure is as Figure 8 shown, and the top view is as Figure 12A shown. The preparation method at least includes U1 to U8.

[0318] U1: As Figure 17AAs shown, a plurality of first electrodes 110 spaced apart are formed on a substrate 210.

[0319] Here, for the understanding of the material of the substrate 210 in U1 and the process of forming the first electrodes 110, reference can be made to the exemplary description of the corresponding part in M1 of Embodiment 1, which will not be elaborated here.

[0320] U2: As Figure 17B shown, a third initial isolation structure 220iii is formed on a side of the plurality of first electrodes 110 away from the substrate 210. The third initial isolation structure 220iii defines a plurality of pixel openings Q and includes a first isolation pattern 221.

[0321] Exemplarily, the material of the third initial isolation structure 220iii may include a negative photoresist.

[0322] Exemplarily, the material of the third initial isolation structure 220iii may be a transparent photoresist or a black photoresist containing a light-absorbing material.

[0323] Exemplarily, in the third initial isolation structure 220iii, the range of the angle formed by the first surface 221a and the surface of the first electrode 110 is 90° to 177°, such as 90°, 100°, 110°, 120°, 130°, 140°, 155°, 160°, 167°, 170° or 177°, etc.

[0324] U3: As Figure 17C shown, by using an etching process, an initial spacer 240i is formed on the third initial isolation structure 220iii. The initial spacer 240i and the third initial isolation structure 220iii on its side close to the substrate 210 together form a plurality of initial patterns 222i and a plurality of initial transition patterns 223i. The initial transition patterns 223i are used to form transition patterns 223.

[0325] Exemplarily, the range of the angle formed by the surface of the initial transition pattern 223i formed in U3 away from the substrate 210 and the edge portion of the adjacent first surface 221a is 90° to 177°, such as 90°, 100°, 110°, 120°, 130°, 140°, 153°, 160°, 166°, 170° or 177°, etc.

[0326] U4: As Figure 17D shown, in the third initial isolation structure 220iii, other regions except for the plurality of initial patterns 222i and the plurality of initial transition patterns 223i are covered with a photoresist material PR to expose the plurality of initial patterns 222i and the plurality of initial transition patterns 223i.

[0327] U5: AsFigure 17E As shown, a dry etching process is adopted to roughen the surfaces of a plurality of initial patterns 222i (see Figure 17D ) and a plurality of initial transition patterns 223i to form second isolation patterns 222 and transition patterns 223, and then the photoresist material is removed.

[0328] U6: As Figure 17F shown, a light-emitting layer 130 is formed on the side of the first electrode 110 away from the substrate 210 within the pixel opening Q.

[0329] U7: As Figure 17G shown, a first portion 121 of the second electrode layer 120G is formed on the side of the light-emitting layer 130 away from the first electrode 110, a second portion 122 of the second electrode layer 120G is formed on the side of the first isolation pattern 221 away from the substrate 210, and a third portion 123 of the second electrode layer 120G is formed on the side of the second isolation pattern 222 and the transition pattern 223 away from the substrate 210. Moreover, the third portion 123 of the second electrode layer 120G is discontinuous.

[0330] U8: As Figure 17H shown, a first encapsulation layer 231 is formed on the side of the second electrode layer 120G away from the substrate 210, and the first encapsulation layer 231 located on the third portion 123 uniformly covers the third portion 123.

[0331] U9: As Figure 17I and Figure 17J shown, a second encapsulation layer 232 and a third encapsulation layer 233 are sequentially formed on the side of the first encapsulation layer 231 away from the second electrode layer 120G, wherein the second encapsulation layer 232 is a flat film layer.

[0332] Here, regarding the understanding of the shapes of the plurality of initial patterns 222i and the plurality of initial transition patterns 223i in U3, the relevant parameters (such as the process gas used, gas flow rate, bias voltage, etc.) in the dry etching process in U5 and the surface average roughness of the formed second surface 222a and third surface 223a, and, regarding the understanding of the thicknesses of the first portion 121, the second portion 122, the first encapsulation layer 231, the second encapsulation layer 232, and the third encapsulation layer 233 in U6 - U9, reference can be made to the exemplary descriptions in the corresponding parts of N3, N5, N56 - N9 in Embodiment 2, which will not be elaborated here.

[0333]

Embodiment 4

[0334] The following embodiment prepares a display panel 200, whose structure is as Figure 7 shown, and the top view is as Figure 10A shown. The preparation method includes at least V1 - V9.

[0335] V1: As shown in Figure 18A Figure Figure 18A , a plurality of first electrodes 110 are formed on the substrate 210 at intervals.

[0336] Here, for the understanding of the material of the substrate 210 in V1 and the process of forming the first electrode 110, reference can be made to the corresponding exemplary description in M1 in Embodiment 1, which will not be elaborated here.

[0337] V2: As shown in Figure 18B Figure Figure 18B , a first initial isolation structure (not shown in the figure) is formed.

[0338] Exemplarily, the material of the first initial isolation structure may include positive photoresist.

[0339] Exemplarily, the material of the first initial isolation structure may be transparent photoresist or black photoresist containing light-absorbing material.

[0340] V3: As shown in Figure 18B Figure Figure 18B , using a halftone mask, the first initial isolation structure is etched to form a second initial isolation structure 220ii. The second initial isolation structure 220ii defines a plurality of pixel openings Q and includes a first isolation pattern 221, a plurality of initial patterns 222i, and a plurality of initial transition patterns 223i. The initial transition pattern 223i is used to form the transition pattern 223.

[0341] Exemplarily, the light transmittance range of the halftone pattern of the halftone mask is 5% - 95%, such as 5%, 15%, 20%, 30%, 35%, 40%, 50%, 60%, 70%, 80%, or 95%, etc.

[0342] Exemplarily, in the second initial isolation structure 220ii formed in V3, the difference (hereinafter referred to as the first difference) between the height of the edge portion of the first surface 221a close to the surface of the initial pattern 222i away from the substrate 210 and the average height of the surface of the initial pattern 222i away from the substrate 210 ranges from 0.05 μm to 5 μm, such as 0.05 μm, 0.1 μm, 0.12 μm, 0.2 μm, 0.25 μm, 0.3 μm, 0.35 μm, 0.37 μm, 0.40 μm, 0.45 μm, or 5 μm, etc.

[0343] Exemplarily, in the second initial isolation structure 220ii formed in V3, the angle formed by the first surface 221a and the surface of the first electrode 110 ranges from 90° to 177°, such as 90°, 100°, 110°, 120°, 130°, 140°, 155°, 160°, 167°, 170°, or 177°, etc.

[0344] Exemplarily, in V3, by adjusting the exposure amount, the angle α formed by the tangent of the initial transition pattern 223i away from the surface of the substrate 210 and the initial pattern 222i away from the surface of the substrate 210 ranges from 90° to 160°.

[0345] V4: As Figure 18C shown, in the second initial isolation structure 220ii, other regions except for the plurality of initial patterns 222i and the plurality of initial transition patterns 223i are covered with a photoresist material PR to expose the plurality of initial patterns 222i and the plurality of initial transition patterns 223i.

[0346] V5: As Figure 18D shown, a dry etching process is used to roughen the surfaces of the plurality of initial patterns 222i (see Figure 18B ) and the plurality of initial transition patterns 223i to form the second isolation pattern 222 and the transition pattern 223, and then the photoresist material PR is removed.

[0347] V6: As Figure 18E shown, a light-emitting layer 130 is formed on the side of the first electrode 110 away from the substrate 210 within the pixel opening Q.

[0348] V7: As Figure 18F shown, a first portion 121 of the second electrode layer 120G is formed on the side of the light-emitting layer 130 away from the first electrode 110, a second portion 122 of the second electrode layer 120G is formed on the side of the first isolation pattern 221 away from the substrate 210, and a third portion 123 of the second electrode layer 120G is formed on the side of the second isolation pattern 222 and the transition pattern 223 away from the substrate 210. Moreover, the third portion 123 of the second electrode layer 120G is discontinuous.

[0349] V8: As Figure 18G shown, a first encapsulation layer 231 is formed on the side of the second electrode layer 120G away from the substrate 210. The first encapsulation layer 231 located on the third portion 123 uniformly covers the third portion 123 (see Figure 18F ).

[0350] V9: As Figure 18H and Figure 18I shown, a second encapsulation layer 232 and a third encapsulation layer 233 are sequentially formed on the side of the first encapsulation layer 231 away from the second electrode layer 120G, wherein the second encapsulation layer 232 is a flat film layer.

[0351] Here, for the understanding of the relevant parameters in the dry etching process in V5 (such as the process gas used, gas flow rate, bias voltage, etc.) and the surface average roughness of the formed second surface 222a and third surface 223a, as well as the understanding of the thicknesses of the first part 121, second part 122, first encapsulation layer 231, second encapsulation layer 232, and third encapsulation layer 233 in V6 to V9, reference can be made to the exemplary descriptions in the corresponding parts of N5 to N9 in Embodiment 2, which will not be elaborated here.

[0352] As described above, the foregoing are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present disclosure, upon thinking of changes or substitutions, should be covered by the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A display panel, characterized in that, Comprising: A substrate; An isolation structure disposed on the substrate; the isolation structure defines a plurality of pixel openings; The isolation structure includes: A first isolation pattern that at least circumferentially surrounds the pixel opening along the circumference of the pixel opening; the first isolation pattern includes a first surface away from the substrate; A plurality of second isolation patterns; two adjacent second isolation patterns are spaced apart by at least a portion of the first isolation pattern; at least a portion of the second isolation pattern is provided between two adjacent pixel openings, and the second isolation pattern is spaced from the boundary of the pixel opening; the second isolation pattern includes a second surface away from the substrate; Wherein, an edge portion of the first surface close to the second surface has a height difference from the second surface; the surface average roughness of the second surface is greater than the surface average roughness of the first surface.

2. The display panel according to claim 1, wherein The difference between the surface average roughness of the second surface and the surface average roughness of the first surface is greater than or equal to 2 nm.

3. The display panel according to claim 1, wherein The surface average roughness range of the second surface is 5 nm to 30 nm; and / or, The difference range between the height of the edge portion of the first surface close to the second surface and the average height of the second surface is 0.05 μm to 5 μm.

4. The display panel according to any one of claims 1 to 3, characterized in that The isolation structure further includes: A transition pattern disposed between the first isolation pattern and the second isolation pattern; the transition pattern includes a third surface away from the substrate, and the surface average roughness range of the third surface is 5 nm to 30 nm.

5. The display panel according to claim 4, wherein Along the first direction, the minimum distance range between the transition pattern and the boundary where the transition pattern and the pixel opening approach each other is 1.5 μm to 10 μm.

6. The display panel according to claim 4, wherein The edge portion of the first surface close to the second surface is farther from the substrate than the second surface; The range of the angle formed by the tangent of the third surface and the second surface is 90° to 160°.

7. The display panel according to claim 6, wherein The orthographic projection of the second isolation pattern on the substrate includes a strip shape, and / or, an arc shape; the display panel has a plurality of surrounding directions, and one surrounding direction is arranged around one pixel opening; The number of the second isolation patterns disposed beside one pixel opening is multiple, and the multiple second isolation patterns are arranged along the surrounding direction.

8. The display panel according to claim 7, wherein Along the surrounding direction, the distance between any two adjacent second isolation patterns is greater than or equal to 1.5 μm.

9. The display panel according to claim 7, wherein, The first isolation pattern includes a first boundary portion and a second boundary portion that are connected to the transition pattern; The spacing range of the orthographic projections of the first boundary portion and the second boundary portion on the substrate is 1.5 μm to 21 μm.

10. The display panel according to claim 6, characterized in that, The display panel includes repeatedly arranged pixel opening units; one pixel opening unit includes four pixel openings, the geometric center connection lines of the four pixel openings form a quadrilateral, and the four pixel openings are located at the four vertices of the quadrilateral; The second isolation pattern surrounds at least a portion of the pixel opening; The display panel further includes: Spacers disposed on the first isolation pattern and in the middle part of the area where the pixel opening units are located; The spacer is disposed at an interval from the second isolation pattern.

11. The display panel according to claim 4, wherein The edge portion of the first surface close to the second surface is closer to the substrate than the second surface. The range of the angle formed by the tangent line of the third surface and the edge portion of the adjacent first surface is 120° to 177°.

12. The display panel according to claim 11, wherein The display panel includes pixel opening units arranged in repetition; one pixel opening unit includes four pixel openings, the geometric center connection lines of the four pixel openings form a quadrilateral, and the four pixel openings are located at the four vertices of the quadrilateral; among the four pixel openings included in the pixel opening unit, gaps are formed between two adjacent pixel openings in the circumferential direction of the pixel opening unit. One second isolation pattern and one transition pattern are provided in the area where one pixel opening unit is located, and the transition pattern surrounds the second isolation pattern. The orthographic projections of the second isolation pattern and the transition pattern provided in the area where one pixel opening unit is located on the substrate include a four-corner star shape, and the four corner portions of the pattern formed by the second isolation pattern and the transition pattern respectively extend into the four gaps within the area where the pixel opening unit is located.

13. The display panel according to claim 12, wherein The two transition patterns located in the areas where two adjacent pixel opening units are located are disposed at an interval.

14. The display panel according to claim 13, wherein The first isolation pattern located between two adjacent transition patterns has a size range of 1.5 μm to 5 μm in the third direction, and the third direction is parallel to the center connection line of the two second isolation patterns.

15. The display panel according to claim 11, wherein The second isolation pattern is reused as a spacer.

16. The display panel according to claim 4, wherein The display panel further includes: a light-emitting device disposed in the pixel opening, and the light-emitting device includes: a first electrode disposed on the substrate; a light-emitting layer disposed on the side of the first electrode away from the substrate; The display panel further includes: a second electrode layer, and the second electrode layer includes a first portion, a second portion, a third portion, and a fourth portion. The first portion is disposed on the side of the light-emitting layer away from the first electrode, the second portion is disposed on the side of the first isolation pattern away from the substrate; the third portion is disposed on the side of the second isolation pattern away from the substrate; the fourth portion is disposed on the side of the transition pattern away from the substrate; wherein, the thickness range of the first portion is 10 nm to 20 nm; the thickness range of the second portion is 10 nm to 20 nm; the thickness range of the third portion is 0 nm to 20 nm; the thickness range of the fourth portion is 0 nm to 20 nm.

17. The display panel according to claim 16, wherein The display panel further includes: a first encapsulation layer disposed on the side of the second electrode layer away from the substrate; the first encapsulation layer is a continuous film layer, and the thickness range of the first encapsulation layer is 0.8 μm to 1.5 μm.

18. The display panel according to claim 1, wherein The material of the isolation structure includes a light-absorbing material.

19. A display device, characterized in that, Including: The display panel according to any one of claims 1 to 18; and, a circuit board electrically connected to the display panel.

20. A method for preparing a display panel, characterized in that, Including: forming a substrate; forming an isolation structure on the substrate; the isolation structure defines a plurality of pixel openings; The isolation structure includes a first isolation pattern and a plurality of second isolation patterns; The first isolation pattern at least circumferentially surrounds the pixel opening along the circumference of the pixel opening; the first isolation pattern includes a first surface away from the substrate; Two adjacent second isolation patterns are spaced apart by at least a part of the first isolation pattern; at least a part of the second isolation pattern is provided between two adjacent pixel openings, and the second isolation pattern is spaced from the boundary of the pixel opening; the second isolation pattern includes a second surface away from the substrate; Wherein, there is a height difference between an edge portion of the first surface close to the second surface and the second surface; the surface average roughness of the second surface is greater than the surface average roughness of the first surface.

21. The manufacturing method of the display panel according to claim 20, wherein, Forming the isolation structure on the substrate includes: Forming a second initial isolation structure; the second initial isolation structure defines the plurality of pixel openings; the second initial isolation structure includes the first isolation pattern and a plurality of initial patterns, and the initial patterns are used to form the second isolation patterns; Adopting a dry etching process to roughen the surface of the initial pattern away from the substrate, so that the initial pattern is transformed into the second isolation pattern.

22. The method for manufacturing a display panel according to claim 21, wherein Forming the second initial isolation structure includes: Forming a first initial isolation structure; Etching the first initial isolation structure by using a halftone mask to form the first isolation pattern and the plurality of initial patterns.

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