Distributed processing system based on open architecture

Abstract

The invention discloses a distributed processing system based on an open architecture, and a backboard is divided into a basic plane which is used for providing a general basic circuit; the management plane is used for supervising and managing various standard modules inserted into the slots of the backboard through a management bus; the control plane is used for realizing control instruction or low-bandwidth data transmission between the standard modules and between the internal system and the external system through a control bus; the data plane is used for realizing service information or high-bandwidth data transmission between the modules and between the internal system and the external system through a data bus; the expansion plane is used for realizing an additional data communication path between the standard modules through an interconnection bus; and the interface plane realizes interconnection between the standard modules and between the standard modules and external interfaces through discrete lines, low-speed buses and high-speed buses. According to the invention, through plane division of the backboard, various kinds of signals are orderly crosslinked on the backboard, so that the distributed processing system has good expandability and maintainability.

Description

Technical Field

[0001] The present invention relates to the field of modular hardware system design, and particularly to a distributed processing hardware based on an open architecture. Background Art

[0002] With the development of computer technology, the complexity of the core computing system has increased exponentially. At the same time, the diverse requirements in different scenarios have promoted the rapid change and iteration of the core computing system. The types of various modules and daughter cards have been increasing continuously. Modules from different manufacturers often cannot be directly integrated, which has led to a reduction in the overall machine function integration efficiency and a continuous increase in the development cost. The need to quickly and economically construct and upgrade the system using modules with unified and open standards has become increasingly urgent.

[0003] The design of traditional distributed processing systems is often carried out independently and closedly, and the internal structure and functions cannot be flexibly expanded and modified. The separate module and chassis standards do not solve the system integration problem. Specifically manifested as:

[0004] 1) When manufacturers design the same type of module, they do not follow the unified standard, resulting in different physical connectors and signal definitions, and it is impossible to achieve in-situ replacement and upgrade of the same type of module;

[0005] 2) The interconnection of the integrated backplane is not divided according to the plane, resulting in chaotic interconnection between modules and it is impossible to achieve flexible expansion;

[0006] 3) The chassis design does not follow the standard, resulting in difficulties in chassis-level expansion and stacking;

[0007] To solve this problem, the present invention proposes a distributed modular system based on the open architecture standard, which is mainly solved by the following methods:

[0008] 1) Modules are classified into types such as power supply, switching, function, IO, etc. Each type of module follows the open standard signal definition and reserves some user-defined signals; Optionally, the core devices with rapid development can be made into the form of standard daughter cards to achieve rapid upgrade and replacement;

[0009] 2) The backplane is divided into different planes, and the cross-link signal types of each plane are determined, and the interconnection bus follows the open standard;

[0010] 3) The system design can adopt the form of large chassis integration to achieve distributed processing with multiple internal modules, or adopt the form of small chassis stacking to achieve distributed processing with multiple chassis. The chassis design follows the open standard, and the connector selection and packaging are unified to achieve effective space utilization.

[0011] Through the above method, it is possible to achieve the integration and interchange of multiple different functional modules that follow unified open standards, enabling the entire system to be organized and deployed in a way similar to "building blocks", thereby improving the flexibility, expandability, and maintainability of the device. At the same time, it is also possible to integrate functional modules from different manufacturers that follow the same standard into one chassis, thus opening up the closed R & D ecosystem and achieving the agile upgrade and replacement of the system. Summary of the Invention

[0012] The object of the present invention is to provide a distributed processing system based on an open architecture, aiming to solve the problems of the existing processing system design being closed, having poor expandability, and long upgrade costs and cycles.

[0013] The object of the present invention is achieved through the following technical solutions:

[0014] A distributed processing system based on an open architecture includes an external interface, a backplane, and standard modules. The backplane realizes signal cross-connection between various standard modules and between standard modules and the external interface. The signal cross-connection of the backplane is divided into a basic plane, a management plane, a control plane, a data plane, an expansion plane, and an interface plane according to types;

[0015] The backplane basic plane is used to provide general basic circuits, including a power supply, a reference clock, and a system reset signal;

[0016] The backplane management plane supervises and manages various standard modules inserted into the backplane slots through a management bus and summarizes the status information of all access standard modules; the management bus protocol follows an open standard;

[0017] The backplane control plane realizes the transmission of control instructions or low-bandwidth data between various standard modules and between the internal system and the external system through a control bus; the control bus protocol follows an open standard; physically, the control bus uses 2 / 4 differential pair electrical signals or 2 / 4 optical fibers;

[0018] The backplane data plane realizes the transmission of service information or high-bandwidth data between various standard modules and between the internal system and the external system through a data bus; the data bus protocol follows an open standard; physically, the data bus uses 8 differential pair electrical signals or 8 optical fibers;

[0019] The backplane expansion plane realizes an additional data communication path between standard modules through an internal high-speed interconnection bus; the internal high-speed interconnection bus protocol follows an open standard; physically, the expansion bus uses 8 / 16 differential pair electrical signals or 8 / 16 optical fibers;

[0020] The backplane interface plane realizes the interconnection between standard modules and between standard modules and the external interface through discrete lines, low-speed, and high-speed buses; the low-speed and high-speed interconnection bus protocols follow open standards.

[0021] Preferably, the external interface is used to implement power supply and signal transmission between the inside of the distributed processing system and the external system. The external interface is implemented in the form of a connector, including but not limited to power connectors, electrical signal connectors, fiber optic connectors, and debugging connectors that follow open standards.

[0022] Preferably, the standard modules are divided into two categories: 3U VPX and 6U VPX according to the structural dimensions, and are divided into power modules, functional modules, switching modules, input / output modules, and basic modules according to the functional types. The mechanical structures and physical interfaces of all standard modules follow the same industry open standard; the distributed processing system flexibly combines and adjusts different types and quantities of standard modules according to functional requirements to form distributed processing systems with different functions.

[0023] Preferably, the standard module uses a resource organization form of "carrier board + standard daughter card", and the standard daughter card is used for upgrade and replacement.

[0024] Preferably, a distributed processing system based on an open architecture further includes a chassis. The chassis shell adopts the GJB441 ATR chassis standard and uses a finned cold plate structure to provide physical encapsulation protection, fastening, and a good electromagnetic shielding and heat dissipation environment for the internal standard modules.

[0025] Preferably, a distributed processing system based on an open architecture further includes a transmission component. The transmission component includes slot connectors that follow open standards and are used for cross-linking module electrical signals with the backplane, integrated cables for leading out module electrical signals, and integrated optical modules for leading out module high-speed signals, so as to realize signal cross-linking between the standard module and the backplane, the backplane and the external interface.

[0026] The beneficial effects of the present invention are as follows:

[0027] Compared with the traditional distributed processing system, the present solution can realize in-situ replacement and upgrade of the same type of module by using a limited number of module types, standard physical dimensions, and electrical signal definitions; through the planar division of the backplane, various signals such as high-speed and low-speed data, control, and management are cross-linked in an orderly manner on the backplane, making the distributed processing system have good scalability and maintainability; through the use of a unified standard chassis package, the distributed processing system can effectively perform chassis-level expansion and upgrade. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a schematic diagram of the composition of the distributed processing system based on an open architecture of the present invention;

[0029] Figure 2 It is a schematic diagram of the backplane interconnection planar division of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0030] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

[0031] See Figure 1 As shown, a distributed processing system based on an open architecture shown in this embodiment is composed of an external interface, a chassis housing, a backplane, a transmission component, standard modules, etc. The standard modules inside the distributed processing system are selected according to specified types. The structure and signal definition of the standard modules follow open standards. The backplane is divided and interconnected according to specified plane types and constraint conditions, and the interconnection bus follows open standards. The selection of connectors on the external interface and the chassis follows open standards. The distributed processing system based on the open architecture provides a highly flexible, scalable, and upgradable system construction method, which can meet the diverse system requirements in different fields.

[0032] The external interface is used to realize power supply and signal transmission between the inside of the distributed processing system based on the open architecture and the external system. The external interface is implemented in the form of a connector, including but not limited to a power connector 1 following the GJB599 series standard, an electrical signal connector 2, an optical fiber connector 3, a debugging connector 4 following the GJB2446 series standard, etc.

[0033] The chassis housing adopts the GJB441 ATR chassis standard and a finned cold plate structure, providing physical encapsulation protection, fastening, and a good electromagnetic shielding and heat dissipation environment for the internal standard modules.

[0034] The transmission component includes a slot connector 5 following the VITA46-3U-VPX standard for cross-linking module electrical signals with the backplane, an integrated cable 7 for leading out module electrical signals, and an integrated optical module 6 for leading out module high-speed signals, thereby realizing signal cross-linking between the standard module and the backplane, the backplane and the external interface;

[0035] The standard modules are used to implement the functions required by the distributed processing system. The standard modules are divided into two categories, 3U VPX and 6U VPX, according to the structural dimensions, and are divided into power modules, functional modules, switching modules, input / output modules, and basic modules according to the function types. The mechanical structures and signal definitions of various modules follow open standards. The power modules in the standard modules follow the VITA62 standard; other modules follow the VITA46 standard. If the selected module is a 3U VPX module, the distributed processing system can select functional modules, switching modules, input / output modules, and basic modules for combination. The signal definition of the functional module follows one of VITA65 MOD3-PAY-1F1F2U1TU1T1U1T-16.2.15-n, MOD3-PAY-1F1U1S1S1U1U2F1H-16.6.11-n, MOD3-PAY-1F1U1S1S1U1U4F1J-16.6.13-n, MOD3-PAY-1F1U1S1S1U1U1K-16.6.14-n; the signal definition of the switching module follows one of MOD3-SWH-6F8U-16.4.16, MOD3-SWH-6F1U7U-16.4.15-n, MOD3-SWH-4F1U7U1J-16.8.7-n; the signal definition of the basic module follows SLT3x-TIM-2S1U22S1U2U1H-14.9.2-n. If the selected module is a 6U VPX module, the system can select functional modules, switching modules, and IO modules for combination. The signal definition of the functional module follows one of VITA65 SLT6-PAY-4F1Q1H4U1T1S1S1TU2U2T1H-10.6.3-n, SLT6-PAY-4F2Q1H4U1T1S1S1TU2U2T1H-10.6.4-n, SLT6-PAY-4F2Q1H4U1T1S1S1T1U2U2T2H-10.6.5-n, the signal definition of the switching module follows SLT6-SWH-14F16U1U15U1J-10.8.1-n, and the signal definition of the input / output module follows SLT6-PAY-4U2U-10.2.8.

[0036] For example, in this embodiment, 3U VPX modules are selected for combination, including 1 power supply module (PSM), 2 general processing modules (GPM), 2 accelerated processing modules (APM), 1 network switch module (NSM), and 1 input / output module (IOM). The power supply module follows the VITA62 standard, and the other modules follow the VITA46 standard. The signal definitions of the general processing module and the accelerated processing module follow the VITA65 MOD3-PAY-1F1U1S1S1U1U2F1H-16.6.11-n standard, the signal definition of the network switch module follows the VITA65 MOD3-SWH-6F1U7U-16.4.15-n standard, and the signal definition of the I / O module follows the VITA65 MOD3-PAY-2U2U-16.2.16-n standard.

[0037] Standard modules allow users to customize and expand, but the mechanical structures and physical interfaces of all standard modules need to follow the same industry open standard for interconnection with other standard modules.

[0038] Standard modules can be flexibly combined and adjusted by selecting different types and quantities of modules according to system requirements to form distributed processing systems with different functions.

[0039] Standard modules allow the use of the resource organization form of "carrier board + standard daughter card", and the standard daughter card can be upgraded and replaced to provide a highly flexible agile upgrade ability.

[0040] The backplane signal cross-connection can be classified into a basic plane, a management plane, a control plane, a data plane, an expansion plane, and an interface plane according to types, realizing the signal cross-connection between various modules and between the modules and external interfaces.

[0041] As shown in the appendix Figure 2 The backplane basic plane is used to provide general basic circuits, including a 12V DC power supply, a reference clock CLK, a system reset signal RST, etc.

[0042] The backplane management plane supervises and manages various standard modules inserted into the backplane slots through a management bus and summarizes the status information of all access standard modules. The management bus protocol follows the I2C bus protocol standard.

[0043] The backplane control plane realizes the control instruction or low-bandwidth data transmission between each standard module, inside the system and external systems through the control bus; the control bus protocol follows the TCP / UDP Ethernet open standard; physically, the control bus uses 2 / 4 differential pairs of electrical signals or 2 / 4 optical fibers. For example, when using 2 differential pairs of electrical signals, it can realize the data transceiver of 1000BASE-KX gigabit rate.

[0044] The backplane data plane realizes the service information or high-bandwidth data transmission between each standard module, inside the system and external systems through the data bus; the data bus protocol follows the RoCEv2 Ethernet open standard; physically, the data bus uses 8 differential pairs of electrical signals or 8 optical fibers. For example, when using 8 optical fibers, it can realize the RDMA data transceiver of 40GBASE-SR4.

[0045] The backplane expansion plane realizes an additional data communication path between tightly coupled modules inside the system through the internal high-speed interconnection bus; the internal high-speed interconnection bus protocol follows the PCIE3.0 open standard; physically, the expansion bus uses 8 / 16 differential pairs of electrical signals or 8 / 16 optical fibers. For example, when using 8 differential pairs of electrical signals, it can realize the data transceiver of PCIe3.0 X4.

[0046] The backplane interface plane realizes the interconnection between internal modules of the system and between modules and external interfaces through discrete lines, low-speed, high-speed buses, etc.; the low-speed and high-speed interconnection bus protocols follow open standards. For example, the interconnection between internal modules of the system is realized through single-ended GPIO discrete lines, etc., and the interconnection between modules and external interfaces is realized through 40GBASE-SR4, 1000MBASE-KX, GPIO, serial ports, etc.

[0047] In summary, through the use of modules of defined types, standard physical sizes and electrical signal definitions, the present invention can realize the rapid construction of various distributed processing systems, and the same type of standard modules can be in-situ replaced and upgraded. The entire system is organized and deployed in a way like "building blocks", improving the agility and flexibility of the device; through the standard plane division, various signals such as high-speed and low-speed data, control, and management are cross-linked in an orderly manner on the backplane, making the system have good scalability and maintainability; through the use of a unified standard chassis package, the chassis-level expansion and upgrade of the distributed system design can be effectively carried out.

[0048] It can be understood that for those of ordinary skill in the art, equivalent replacements or changes can be made according to the technical solution of the present invention and its inventive concept, and all such changes or replacements should fall within the protection scope of the claims appended to the present invention.

Claims

1. A distributed processing system based on an open architecture, comprising an external interface, a backplane, and standard modules. The backplane realizes signal cross-connection between each standard module and between the standard module and the external interface, and is characterized in that The signal cross-connection of the backplane is classified into a basic plane, a management plane, a control plane, a data plane, an expansion plane, and an interface plane according to types; The backplane basic plane is used to provide general basic circuits, including a power supply, a reference clock, and a system reset signal; The backplane management plane supervises and manages various standard modules inserted into the backplane slots through a management bus, and summarizes the status information of all access standard modules; The management bus protocol follows an open standard; The backplane control plane realizes the control instructions or low-bandwidth data transmission between various standard modules, inside the system and external systems through a control bus; the control bus protocol follows an open standard; physically, the control bus uses 2 / 4 differential pair electrical signals or 2 / 4 optical fibers; The backplane data plane realizes the service information or high-bandwidth data transmission between various standard modules, inside the system and external systems through a data bus; the data bus protocol follows an open standard; physically, the data bus uses 8 differential pair electrical signals or 8 optical fibers; The backplane expansion plane realizes an additional data communication path between standard modules through an internal high-speed interconnection bus; the internal high-speed interconnection bus protocol follows an open standard; physically, the expansion bus uses 8 / 16 differential pair electrical signals or 8 / 16 optical fibers; The backplane interface plane realizes the interconnection between standard modules and between standard modules and external interfaces through discrete lines, low-speed, and high-speed buses; 2. The distributed processing system based on an open architecture according to claim 1, characterized in that The low-speed and high-speed interconnection bus protocols follow an open standard.

3. A distributed processing system based on an open architecture according to claim 1, characterized in that The external interface is used to realize the power supply and signal transmission between the inside and outside of the distributed processing system. The external interface is implemented in the form of a connector, including but not limited to a power connector, an electrical signal connector, an optical fiber connector, and a debugging connector that follow open standards.

4. A distributed processing system based on an open architecture according to claim 1, characterized in that The standard modules are divided into two categories: 3U VPX and 6U VPX according to the structural dimensions, and are divided into power modules, function modules, switching modules, input / output modules, and basic modules according to the function types. The mechanical structures and physical interfaces of all standard modules follow the same industry open standard; the distributed processing system flexibly combines and adjusts different types and quantities of standard modules according to functional requirements to form distributed processing systems with different functions.

5. A distributed processing system based on an open architecture according to claim 1, characterized in that The standard module uses a resource organization form of "carrier board + standard daughter card", and the standard daughter card is used for upgrade and replacement.

6. A distributed processing system based on an open architecture according to claim 1, characterized in that It also includes a chassis. The chassis shell adopts the GJB441 ATR chassis standard and uses a finned cold plate structure to provide physical packaging protection, fastening, and a good electromagnetic shielding and heat dissipation environment for the internal standard modules. It also includes a transmission component. The transmission component includes a slot connector that follows an open standard and is used for the cross-connection of module electrical signals and the backplane, an integrated cable for leading out module electrical signals, and an integrated optical module for leading out module high-speed signals, so as to realize the signal cross-connection between the standard module and the backplane, and between the backplane and the external interface.

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