Byte value transmission method, terminal equipment and storage medium

Abstract

The invention is suitable for the field of network communication, and discloses a byte numerical value transmission method, terminal equipment and a storage medium. The method is applied to a communication system, the communication system comprises a master single-chip microcomputer and a slave single-chip microcomputer, the master single-chip microcomputer is integrated with a digital-to-analog converter, and the slave single-chip microcomputer is integrated with an analog-to-digital converter, and the byte numerical value transmission method is characterized by comprising the following steps: when a byte numerical value to be transmitted is obtained, controlling the master single-chip microcomputer to transmit the byte numerical value according to the byte numerical value and a preset reference voltage; simulating a first voltage value; controlling the master single-chip microcomputer to output a first voltage value, and controlling the slave single-chip microcomputer to perform voltage sampling on the communication bus to obtain a first sampling value; the slave single-chip microcomputer is controlled to convert the first sampling value into a target byte value, and the master single-chip microcomputer is controlled to output a second voltage value; and the slave single-chip microcomputer is controlled to carry out voltage sampling on the communication bus to obtain a second sampling value so as to identify that byte numerical value transmission is completed. The communication efficiency can be improved.

Description

Technical Field

[0001] The present invention belongs to the field of network communication, and particularly relates to a method for transmitting byte values, a terminal device, and a storage medium. Background Art

[0002] In the field of single-chip microcomputer communication, unidirectional single-line communication between master and slave devices is widely used in scenarios such as sensor data acquisition and industrial control due to its low cost and simple structure.

[0003] In traditional technologies, serial communication is used to send pulses with different duty cycles to simulate "0" and "1", and then they are pieced together into a byte, and more content information is extended in units of bytes. All are based on digital communication. It is necessary to use 0V to represent low level and 5V to represent high level on the bus, and then make the basic elements of communication based on this digital signal. Transmitting a byte requires a relatively large number of pulsations. Therefore, a new technical means is needed to solve the above technical problems. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a method for transmitting byte values, a terminal device, and a storage medium, which can solve the problem that a relatively large number of pulsations are required to transmit a byte in the related art.

[0005] The first aspect of the present invention provides a method for transmitting byte values. The communication system includes a master single-chip microcomputer and a slave single-chip microcomputer. The master single-chip microcomputer is integrated with a digital-to-analog converter, and the slave single-chip microcomputer is integrated with an analog-to-digital converter. The method is characterized by including: When obtaining the byte value to be transmitted, controlling the master single-chip microcomputer to simulate a first voltage value according to the byte value and a preset reference voltage; Controlling the master single-chip microcomputer to output the first voltage value, and controlling the slave single-chip microcomputer to sample the voltage of the communication bus to obtain a first sampling value; Controlling the slave single-chip microcomputer to convert the first sampling value into a target byte value, and controlling the master single-chip microcomputer to output a second voltage value; Controlling the slave single-chip microcomputer to sample the voltage of the communication bus to obtain a second sampling value to indicate that the transmission of the byte value is completed.

[0006] Optionally, in the first implementation manner of the first aspect of the present invention, before the step of obtaining the byte value to be transmitted and controlling the master single-chip microcomputer to simulate a first voltage value according to the byte value and a preset reference voltage, the method further includes: When obtaining the data to be transmitted, converting the data to be transmitted into a byte sequence; Determining the byte value to be transmitted according to the byte sequence; If it is detected that the transmission of the byte value is completed, return to execute determining the byte value to be transmitted according to the byte sequence until the processing of the byte sequence is completed.

[0007] Optionally, in the second implementation manner of the first aspect of the present invention, the range where the first voltage value is located is from N / 257 times of the reference voltage to (N + 1) / 257 times of the reference voltage, where N is the byte value of the byte to be transmitted, and N is greater than or equal to 0 and less than or equal to 255; the range where the second voltage value is located is from 256 / 257 times of the reference voltage to the full-scale value of the reference voltage.

[0008] Optionally, in the third implementation manner of the first aspect of the present invention, before the step of controlling the main microcontroller to simulate the first voltage value according to the byte value and the preset reference voltage when obtaining the byte value to be transmitted, the method further includes: When obtaining the data to be transmitted, convert the data to be transmitted into a byte sequence; Determine a single byte in the byte sequence to obtain the byte value to be transmitted.

[0009] Optionally, in the fourth implementation manner of the first aspect of the present invention, the range where the first voltage value is located is from N / 17 times of the reference voltage to (N + 1) / 17 times of the reference voltage, where N is the byte value of the byte to be transmitted, and N is greater than or equal to 0 and less than or equal to 15; the range where the second voltage value is located is from 16 / 17 times of the reference voltage to the full-scale value of the reference voltage.

[0010] Optionally, in the fifth implementation manner of the first aspect of the present invention, before the step of controlling the main microcontroller to simulate the first voltage value according to the byte value and the preset reference voltage when obtaining the byte value to be transmitted, the method further includes: When obtaining the data to be transmitted, convert the data to be transmitted into a byte sequence; Determine a half-byte in the byte sequence to obtain the byte value to be transmitted.

[0011] Optionally, in the sixth implementation manner of the first aspect of the present invention, the range where the first voltage value is located is from N / 65537 times of the reference voltage to (N + 1) / 65537 times of the reference voltage, where N is the byte value of the byte to be transmitted, and N is greater than or equal to 0 and less than or equal to 65535; the range where the second voltage value is located is from 65536 / 65537 times of the reference voltage to the full-scale value of the reference voltage.

[0012] Optionally, in the seventh implementation manner of the first aspect of the present invention, before the step of controlling the master single-chip microcomputer to simulate the first voltage value according to the byte value and a preset reference voltage when obtaining the byte value to be transmitted, the method further includes: When obtaining the data to be transmitted, convert the data to be transmitted into a byte sequence; Determine a double-byte in the byte sequence to obtain the byte value to be transmitted.

[0013] In a second aspect, an embodiment of the present invention provides a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the steps of the above byte value transmission method are implemented.

[0014] In a third aspect, an embodiment of the present invention provides a computer-readable storage medium storing a computer program, and when the computer program is executed by a processor, the steps of the above byte value transmission method are implemented.

[0015] In a fourth aspect, an embodiment of the present invention provides a computer program product, and when the computer program product runs on a terminal device, the terminal device is enabled to execute the above byte value transmission method.

[0016] The beneficial effects of the embodiments of the present invention compared with the prior art are as follows: By DA / AD conversion, the voltage range is divided into multiple discrete intervals, and each voltage interval is directly mapped to the target byte value. Combining with the delimiter mechanism of the reference voltage, the transmission of a single byte only requires two voltage jumps (numerical voltage + delimiter), which is significantly more efficient than the 8-level voltage jumps required for traditional serial communication and the conventional duty cycle encoding method. By simulating the information-carrying capacity of the full voltage range, while maintaining the single-wire physical layer structure, high-density data transmission can be achieved through voltage amplitude encoding, which not only avoids the waste of voltage intervals caused by the hard division of high and low levels by digital signals, but also ensures the stability of byte transmission boundary recognition through the voltage threshold design of the delimiter, and can optimize the communication efficiency with zero increase in hardware cost for resource-constrained single-chip microcomputer systems. Description of the Drawings

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for use in the embodiments or the description of the prior art. Obviously, the following drawings are only some embodiments of the present invention, and those of ordinary skill in the art can obtain other drawings without creative efforts based on these drawings.

[0018] Figure 1 It is a schematic diagram of an embodiment of the byte value transmission method in the embodiment of the present invention; Figure 2 It is a schematic diagram of a specific embodiment before step S101 of the method for transmitting byte values in an embodiment of the present invention; Figure 3 It is a schematic diagram of a specific embodiment before step S101 of the method for transmitting byte values in an embodiment of the present invention; Figure 4 It is a schematic diagram of a specific embodiment before step S101 of the method for transmitting byte values in an embodiment of the present invention; Figure 5 It is a schematic diagram of an embodiment of a terminal device in an embodiment of the present invention. Detailed implementation manners

[0019] In order to make the objectives, technical solutions and advantages of the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative efforts fall within the protection scope of the present invention.

[0020] It should be noted that the terms "including", "comprising" and "having" and any variations thereof in the description and claims of the present invention and the above-mentioned drawings are intended to cover non-exclusive inclusion. For example, a process, method, terminal, product or device including a series of steps or units is not limited to the listed steps or units, but may optionally further include unlisted steps or units, or may optionally further include other steps or units inherent to these processes, methods, products or devices. In the terms in the claims, description and drawings of the present invention, relational terms such as "first" and "second" are only used to distinguish one entity / operation / object from another entity / operation / object, and do not necessarily require or imply any such actual relationship or order between these entities / operations / objects.

[0021] Referring to "embodiments" herein means that the specific features, structures or characteristics described in connection with the embodiments may be included in at least one embodiment of the present invention. The phrase appears in various places in the description and does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0022] In the field of single-chip microcomputer communication, unidirectional single-wire communication between master and slave devices is widely used in scenarios such as sensor data acquisition and industrial control due to its low cost and simple structure.

[0023] In the traditional technology, serial communication is used to send pulses with different duty cycles to simulate "0" and "1", and then these are pieced together into a byte. Based on this byte, more content information is expanded. All of this is based on digital communication. It is necessary to use 0V to represent the low level and 5V to represent the high level on the bus, and based on this digital signal, the basic elements of communication are made. Transmitting a byte requires a relatively large number of pulsations. Therefore, a new technical means is needed to solve the above technical problems.

[0024] In view of this, the embodiments of the present invention provide a method for transmitting byte values, a terminal device, and a storage medium. By performing DA / AD conversion, the voltage range is divided into multiple discrete intervals, and each voltage interval is directly mapped to the target byte value. Combining with the delimiter mechanism of the reference voltage, the transmission of a single byte only requires two voltage jumps (numerical voltage + delimiter). Compared with the traditional serial communication that requires 8 level jumps and the conventional duty cycle encoding method, the efficiency is significantly improved. By simulating the information-carrying capacity of the entire voltage range, while maintaining the single-wire physical layer structure, high-density data transmission can be achieved through voltage amplitude encoding. This not only avoids the waste of voltage intervals caused by the rigid division of high and low levels in digital signals, but also ensures the stability of boundary recognition for byte transmission through the voltage threshold design of the delimiter, and can optimize the communication efficiency with zero increase in hardware cost for a microcontroller system with limited resources.

[0025] In order to illustrate the technical solution of the present invention, the following will be described through specific embodiments.

[0026] Figure 1 The figure shows a schematic flowchart of the implementation of a method for transmitting byte values provided by an embodiment of the present invention. This method can be applied to a terminal device. The terminal device can be a mobile phone, a tablet computer, a laptop computer, an ultra-mobile personal computer (UMPC), a netbook, etc.

[0027] Specifically, the above method for transmitting byte values may include the following steps S101 to step S104.

[0028] Step S101, when obtaining the byte value to be transmitted, control the main microcontroller to simulate the first voltage value according to the byte value and the preset reference voltage.

[0029] In the embodiment of the present invention, the method for transmitting byte values is applied to a communication system. The communication system includes a main microcontroller and a slave microcontroller. The main microcontroller is integrated with a digital-to-analog converter, and the slave microcontroller is integrated with an analog-to-digital converter.

[0030] Optionally, the communication system adopts a master-slave hardware architecture. The core consists of a master control single-chip microcomputer equipped with a high-precision digital-to-analog converter (DAC) and a slave mechanism integrated with an analog-to-digital converter (ADC), forming a one-way analog signal transmission link. The master single-chip microcomputer has a DAC module with at least 8-bit resolution, generates 257 equally divided voltage intervals within the range of 0 - Vref through a precision reference voltage source. The median value of each interval corresponds to a single-byte value (0x00 - 0xFF), and a dedicated highest section (256 / 257 Vref to Vref) is set as the frame separation identification voltage; the slave single-chip microcomputer is equipped with an SAR-type ADC module with more than 12 bits, uses oversampling technology to improve the effective resolution, and combines a dynamic threshold comparator to detect the bus voltage state in real time. The master and slave are directly connected through a single-wire shielded cable. The cable terminal is configured with an RC filter network to suppress high-frequency interference. The output stage of the master-end DAC uses a push-pull amplifier to enhance the driving ability, and the input stage of the slave-end is set with a programmable gain operational amplifier to adapt to different transmission distances. When the system works, the master control DAC sequentially outputs data voltage and separator voltage to form a communication waveform. The slave ADC realizes fast response under low power consumption through a two-stage trigger mechanism. The dual machines share an independent reference source to ensure voltage calculation consistency, forming a closed-loop transmission system of "voltage encoding - precise sampling - frame boundary recognition".

[0031] In an embodiment of the present invention, during the data preparation stage, the master single-chip microcomputer obtains the byte sequence data to be transmitted and splits the data by single-byte units.

[0032] During the voltage generation stage, the master single-chip microcomputer calculates the target voltage interval according to the current byte value N (0 ≤ N ≤ 255): V1_low = (N / 257) * Vref; V1_high = ((N + 1) / 257) * Vref; Generates the intermediate voltage value within this interval: V1 = (V1_low + V1_high) / 2; Step S102, controls the master single-chip microcomputer to output the first voltage value, and controls the slave single-chip microcomputer to sample the voltage of the communication bus to obtain the first sampling value.

[0033] In an embodiment of the present invention, during the voltage output stage, the master single-chip microcomputer outputs the V1 voltage to the communication bus through the DAC module and maintains the V1 output for at least t1 time (t1 > the slave AD sampling period).

[0034] The slave single-chip microcomputer samples the bus voltage at a fixed period Ts during the continuous monitoring stage (it is recommended that Ts < t1 / 3); performs sliding window voltage filtering processing (to eliminate instantaneous interference).

[0035] During the numerical analysis stage, when the voltage is detected to jump from V2 to the V1 interval, start precise AD sampling (to improve sampling accuracy), and calculate the N value corresponding to the first sampling value: N = floor(V_sample * 257 / Vref); Store N in the receive buffer.

[0036] Step S103: Control the slave microcontroller to convert the first sampling value into a target byte value, and control the master microcontroller to output the second voltage value.

[0037] In the embodiment of the present invention, during the delimiter sending stage, the master microcontroller calculates the delimiter voltage interval: V2_low = (256 / 257) * Vref; V2_high = Vref; Generate the delimiter voltage: V2 = (V2_low + Vref) / 2; Switch the DAC output to the V2 voltage and maintain the V2 output for at least t2 time (t2 > the slave AD sampling period).

[0038] Step S104: Control the slave microcontroller to sample the voltage of the communication bus to obtain the second sampling value to indicate the completion of byte value transmission.

[0039] In the embodiment of the present invention, during the frame confirmation stage, when the voltage is detected to jump to the V2 interval, mark the completion of the current byte reception; trigger the packet recombination process. Then prepare to receive the next byte.

[0040] Optionally, the total time T for the master microcontroller to send each byte = t1 + t2; the slave sets the sampling window (starting point of t1 + Δt, ending point of t1 - Δt).

[0041] Optionally, the interval where the first voltage value is located is N / 17 times the reference voltage to N + 1 / 17 times the reference voltage, where N is the byte value of the byte to be transmitted, N is greater than or equal to 0 and less than or equal to 15; the interval where the second voltage value is located is 16 / 17 times the reference voltage to the full-scale value of the reference voltage. By reducing the number of bits transmitted per time (4 bits), the voltage interval span is expanded to 300 mV (5V system), allowing a ±50 mV noise tolerance, and the reliability is improved in a strong interference environment. At the same time, it supports non-aligned data processing. For example, 12-bit sensor data can be directly split into 3 half-bytes for transmission, reducing the hardware resource occupancy by 60%.

[0042] Optionally, the first voltage value ranges from N / 257 times the reference voltage to N+1 / 257 times the reference voltage, where N is the byte value of the byte to be transmitted and is greater than or equal to 0 and less than or equal to 255. The second voltage value ranges from 256 / 257 times the reference voltage to the full-scale value of the reference voltage. By dividing the reference voltage into 257 equally divided intervals (0-255 corresponding to byte values, with the 256th interval serving as a delimiter), a single voltage output can transmit a full 8-bit of data. This significantly improves efficiency compared to traditional single-line pulse encoding, which requires eight level transitions.

[0043] Optionally, the first voltage value ranges from N / 65537 times the reference voltage to N+1 / 65537 times the reference voltage, where N is the byte value of the byte to be transmitted and is greater than or equal to 0 and less than or equal to 65535. The second voltage value ranges from 65536 / 65537 times the reference voltage to the full-scale value of the reference voltage. By dividing the reference voltage by 65537, a single voltage output can transmit 16 bits of data, achieving a transmission efficiency 32 times that of traditional serial port solutions (16 bits require 139μs at 115200bps, while this solution only requires 200μs). Using piecewise linear compensation technology, ±1LSB error control is achieved with 16-bit DAC accuracy, making it suitable for high-precision industrial sensors. In 3.3V systems, the voltage resolution reaches 50μV, meeting the requirements of precision measurement scenarios.

[0044] Compared with the prior art, the beneficial effects of the embodiments of the present invention are as follows: the voltage range is divided into multiple discrete intervals through DA / AD conversion, each voltage interval directly maps the target byte value, and combined with the reference voltage delimiter mechanism, the transmission of a single byte only requires two voltage jumps (numerical voltage + delimiter), which is significantly more efficient than the traditional serial communication method that requires eight level jumps and conventional duty cycle encoding. By simulating the information carrying capacity of the full range of voltage, while maintaining the single-line physical layer structure, high-density data transmission can be achieved through voltage amplitude encoding, which not only avoids the waste of voltage intervals caused by the rigid division of high and low levels of digital signals, but also ensures the stability of byte transmission boundary recognition through the voltage threshold design of the delimiter, which can achieve communication efficiency optimization with zero increase in hardware cost for resource-constrained single-chip microcomputer systems.

[0045] Traditional single-wire communication schemes (such as pulse-width encoding) have significant drawbacks when processing multibyte data. They require sending complete data packets as continuous pulse trains. Long signal transmissions are susceptible to power supply fluctuations, and actual measurements show a sharp increase in bit error rates beyond eight bytes. The receiver must continuously track pulse counts, and if interference causes a loss of synchronization, a complete retransmission is necessary. Furthermore, the receiver must pre-allocate memory for complete data packets, making them impractical in resource-constrained embedded scenarios. Based on these considerations, the present invention proposes an alternative embodiment.

[0046] Figure 2 This is a schematic diagram of a specific embodiment before step S101 of the byte value transmission method in the embodiments of the present invention. The following optional specific implementations are also included before step S101: Step S201, when obtaining the data to be transmitted, convert the data to be transmitted into a byte sequence.

[0047] In the embodiments of the present invention, the master microcontroller receives the original data to be transmitted (such as sensor data, control instructions, etc.), and splits it into a continuous byte sequence in units of single bytes (8 bits).

[0048] Number and mark the byte sequence (such as increasing the packet header index) to form an ordered transmission queue.

[0049] Step S202, determine the byte value to be transmitted according to the byte sequence.

[0050] In the embodiments of the present invention, the master microcontroller extracts the first byte value (N) from the head of the queue, calculates the corresponding first voltage value (V1) according to the preset reference voltage (Vref), and outputs it to the communication bus through the DAC.

[0051] The slave microcontroller samples the bus periodically through the ADC (for example, once every 10 μs), and after detecting that the voltage jumps to the valid data range, starts the high-precision sampling mode.

[0052] Step S203, if it is detected that the byte value transmission is completed, return to execute determining the byte value to be transmitted according to the byte sequence until the byte sequence is processed completely.

[0053] In the embodiments of the present invention, the slave microcontroller converts the first sampling value into a byte value and verifies the data integrity (such as parity check). If the verification passes, it sends an implicit confirmation to the master microcontroller (judged by the bus voltage holding time).

[0054] After the master microcontroller detects that the separator (V2) is output completely, it automatically extracts the next byte from the queue and loops until the queue is emptied.

[0055] In the embodiments of the present invention, decomposing the long data stream into single-byte units for transmission can effectively avoid the cumulative error caused by continuous signal distortion in traditional single-line communication, reducing the bit error rate; for breakpoint resumption in non-continuous transmission scenarios, the resending position can be accurately located when interrupted by interference, improving the resending efficiency; only a single-byte buffer is required to achieve streaming transmission, reducing the memory occupancy compared to the whole-packet buffer required by traditional solutions.

[0056] Figure 3It is a schematic diagram of a specific embodiment before step S101 of the method for transmitting byte values in the embodiments of the present invention. Before step S101, the following optional specific embodiments are further included: Step S204, when obtaining the data to be transmitted, convert the data to be transmitted into a byte sequence.

[0057] Step S205, determine a single byte in the byte sequence to obtain the byte value to be transmitted.

[0058] In the embodiments of the present invention, the master single-chip microcomputer splits the original data stream into a continuous byte sequence by single bytes (8 bits) and adds a sequence number identifier (such as an incrementing packet header); for the current byte value N (0 ≤ N ≤ 255), calculate the voltage range V1 ∈ [N / 257·Vref, (N + 1) / 257·Vref], and output the median voltage of this range; after V1 is stably output for 100 μs, switch to the delimiter voltage V2 ∈ [256 / 257·Vref, Vref] and maintain it for 50 μs; detect the current byte transmission completion flag (V2 is confirmed by the slave), automatically extract the next byte and loop until the end of the sequence.

[0059] The slave single-chip microcomputer detects the bus activation state through a window comparator (threshold 0.1Vref); when the bus voltage enters the V1 range, start 12-bit ADC high-speed sampling (4 times oversampling); substitute the first sampling value into the formula N = floor(V_sample×257 / Vref) to restore the byte and store it in the buffer area with sequence number marks; detect packet loss according to the sequence number, and set the retransmission request flag if the sequence numbers are detected to be discontinuous.

[0060] In the embodiments of the present invention, the independent transmission of single bytes can avoid continuous interference of long data packets; the time-consuming of single-byte transmission meets the millisecond-level response requirements of industrial control scenarios; through the sequence number mechanism, it supports discontinuous transmission, allows inserting high-priority data packets, and reduces system latency.

[0061] Figure 4 It is a schematic diagram of a specific embodiment before step S101 of the method for transmitting byte values in the embodiments of the present invention. Before step S101, the following optional specific embodiments are further included: Step S206, when obtaining the data to be transmitted, convert the data to be transmitted into a byte sequence.

[0062] Step S207, determine a nibble in the byte sequence to obtain the byte value to be transmitted.

[0063] In an embodiment of the present invention, the master microcontroller splits the original data into half - bytes (4 bits), and combines every two half - bytes into 1 byte (for example, byte 0x5A is split into 0x5 and 0xA); for the current half - byte value N (0 ≤ N ≤ 15), calculate the voltage range V1 ∈ [N / 17·Vref, (N + 1) / 17·Vref], and output the median voltage of this range; after V1 is stably output for 200 μs, switch to the delimiter voltage V2 ∈ [16 / 17·Vref, Vref], and maintain it for 100 μs; alternately transmit the high and low four bits (such as sending 0x5 first and then 0xA), and insert a long delimiter (V2 is maintained for 500 μs) after every two half - bytes of 1 byte are transmitted.

[0064] After the slave microcontroller detects the voltage in the V1 range, it starts 10 - bit ADC sampling, and restores the half - byte through the formula N = floor(V_sample×17 / Vref); uses a double - buffer mechanism to store two consecutive half - bytes in a temporary register, combines them into a complete byte and then moves it into the receive queue; performs parity check on the combined byte, and sets the re - transmission request flag if the check fails.

[0065] In an embodiment of the present invention, each half - byte corresponds to a voltage step of 294 mV (5V system), allowing a noise tolerance of ±100 mV, and the bit error rate is reduced compared with the traditional 4 - bit PWM scheme; the slave only needs a 4 - bit buffer to work, reducing the memory occupation (the traditional scheme requires a 16 - bit buffer); it supports non - aligned data processing, and the transmission efficiency is improved compared with the traditional BCD coding.

[0066] Before step S101, the following optional specific embodiments are further included: Step S208, when obtaining the data to be transmitted, convert the data to be transmitted into a byte sequence.

[0067] Step S209, determine a double - byte in the byte sequence to obtain the byte value to be transmitted.

[0068] In an embodiment of the present invention, the master microcontroller splits the original data into continuous data blocks by double - bytes (16 bits), and adds a check code (such as CRC16) to each double - byte; for the current double - byte value N (0 ≤ N ≤ 65535), calculate the voltage range V1 ∈ [N / 65537·Vref, (N + 1) / 65537·Vref], and output the median voltage of this range; after V1 is stably output for 500 μs, switch to the delimiter voltage V2 ∈ [65536 / 65537·Vref, Vref], and maintain it for 200 μs; dynamically adjust the DAC output according to the ambient temperature (compensation coefficient 0.05% / °C) so that the voltage accuracy error < ±0.5 LSB.

[0069] After the single-chip microcomputer detects that the bus voltage enters the V1 range, start 14-bit ADC differential sampling (32 times oversampling); restore the double-byte through the formula N = floor(V_sample × 65537 / Vref), and compare it with the check code; if the CRC check passes, store the double-byte in the non-volatile memory; if it fails, set the error flag and request retransmission; dynamically correct the ADC reference voltage according to the temperature data (encoded by a specific voltage) synchronously sent by the master device.

[0070] In the embodiment of the present invention, 16-bit data is transmitted once, and the efficiency is improved compared with the traditional serial port scheme; under the combination of 16-bit DAC + 14-bit ADC, an absolute accuracy of ±1 LSB is achieved, which can effectively meet the demand for lossless transmission; the double-byte atomic transmission avoids data splitting and splicing, reduces the memory occupancy compared with the traditional scheme, and eliminates the risk of splicing errors.

[0071] As Figure 5 shown, it is a schematic diagram of a terminal device provided by an embodiment of the present invention. The terminal device 5 may include: a processor 501, a memory 502, and a computer program 503 stored in the memory 502 and executable on the processor 501, such as a transmission program for byte values. When the processor 501 executes the computer program 503, the steps in the above-mentioned transmission embodiments of each byte value are implemented.

[0072] The computer program may be divided into one or more modules / units, and one or more modules / units are stored in the memory 502 and executed by the processor 501 to complete the present invention. One or more modules / units may be a series of computer program instruction segments capable of performing specific functions, and the instruction segments are used to describe the execution process of the computer program in the terminal device.

[0073] The terminal device may include, but is not limited to, a processor 501 and a memory 502. Those skilled in the art can understand that Figure 5 merely examples of the terminal device do not constitute a limitation on the terminal device, and may include more or fewer components than shown in the figure, or combine certain components, or different components. For example, the terminal device may also include input / output devices, network access devices, buses, etc.

[0074] The so-called processor 501 may be a Central Processing Unit (CPU), or may also be other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field-Programmable Gate Arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor, or the processor may also be any conventional processor, etc.

[0075] The memory 502 may be an internal storage unit of the terminal device, such as the hard disk or memory of the terminal device. The memory 502 may also be an external storage device of the terminal device, such as a plug-in hard disk equipped on the terminal device, a Smart Media Card (SMC), a Secure Digital (SD) card, a Flash Card, etc. Further, the memory 502 may also include both the internal storage unit and the external storage device of the terminal device. The memory 502 is used to store computer programs and other programs and data required by the terminal device. The memory 502 may also be used to temporarily store data that has been output or is to be output.

[0076] It should be noted that for the convenience and brevity of description, the structure of the above terminal device may also refer to the specific description of the structure in the method embodiments, which will not be elaborated here.

[0077] The embodiment of the present invention also provides a computer-readable storage medium. The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in the above byte value transmission method can be implemented.

[0078] The embodiment of the present invention provides a computer program product. When the computer program product runs on a mobile terminal, the mobile terminal can be made to execute the steps in the above byte value transmission method when executed.

[0079] In the above embodiments, the descriptions of the respective embodiments have their own emphases. For parts not detailed or recorded in a certain embodiment, reference may be made to the relevant descriptions of other embodiments.

[0080] Those of ordinary skill in the art will realize that the units and algorithm steps of the examples described in combination with the embodiments disclosed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are executed in hardware or software depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.

[0081] In the embodiments provided by the present invention, it should be understood that the disclosed terminal devices and methods can be implemented in other ways. For example, the terminal device embodiments described above are merely illustrative. Another point is that the couplings or direct couplings or communication connections shown or discussed among each other can be through some interfaces, and the indirect couplings or communication connections of devices or units can be in electrical, mechanical or other forms.

[0082] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they can be located in one place, or distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0083] In addition, the functional units in each embodiment of the present invention can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units.

[0084] When the integrated module / unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, to implement all or part of the processes in the above-described embodiment methods of the present invention, it can also be completed by a computer program instructing relevant hardware. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by a processor, the steps of the above-described various method embodiments can be implemented. Among them, the computer program includes computer program code, and the computer program code can be in the form of source code, object code, executable file, or some intermediate form, etc. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disc, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal, and software distribution medium, etc. It should be noted that the content included in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, the computer-readable medium does not include electrical carrier signals and telecommunication signals.

[0085] The above-described embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features. And these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the various embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A method for transmitting byte values, applied to a communication system, the communication system including a main single-chip microcomputer and a slave single-chip microcomputer, the main single-chip microcomputer integrating a digital-to-analog converter, and the slave single-chip microcomputer integrating an analog-to-digital converter, characterized in that, Including: When obtaining the byte value to be transmitted, controlling the master single-chip microcomputer to simulate a first voltage value according to the byte value and a preset reference voltage; Controlling the master single-chip microcomputer to output the first voltage value, and controlling the slave single-chip microcomputer to perform voltage sampling on the communication bus to obtain a first sampling value; Controlling the slave single-chip microcomputer to convert the first sampling value into a target byte value, and controlling the master single-chip microcomputer to output a second voltage value; Controlling the slave single-chip microcomputer to perform voltage sampling on the communication bus to obtain a second sampling value to indicate that the transmission of the byte value is completed.

2. The method for transmitting byte values according to claim 1, wherein Before the step of, when obtaining the byte value to be transmitted, controlling the master single-chip microcomputer to simulate a first voltage value according to the byte value and a preset reference voltage, the method further includes: When obtaining the data to be transmitted, converting the data to be transmitted into a byte sequence; Determining the byte value to be transmitted according to the byte sequence; If it is detected that the transmission of the byte value is completed, returning to execute determining the byte value to be transmitted according to the byte sequence until the byte sequence is processed completely.

3. The method for transmitting byte values according to claim 1, characterized in that, The interval where the first voltage value is located is from N / 257 times of the reference voltage to (N + 1) / 257 times of the reference voltage, where N is the byte value of the byte to be transmitted, and N is greater than or equal to 0 and less than or equal to 255; the interval where the second voltage value is located is from 256 / 257 times of the reference voltage to the full-scale value of the reference voltage.

4. The method for transmitting byte values according to claim 3, characterized in that, Before the step of, when obtaining the byte value to be transmitted, controlling the master single-chip microcomputer to simulate a first voltage value according to the byte value and a preset reference voltage, the method further includes: When obtaining the data to be transmitted, converting the data to be transmitted into a byte sequence; Determining a single byte in the byte sequence to obtain the byte value to be transmitted.

5. The transmission method of byte values according to claim 1, characterized in that, The interval where the first voltage value is located is from N / 17 times of the reference voltage to (N + 1) / 17 times of the reference voltage, where N is the byte value of the byte to be transmitted, and N is greater than or equal to 0 and less than or equal to 15; the interval where the second voltage value is located is from 16 / 17 times of the reference voltage to the full-scale value of the reference voltage.

6. The method for transmitting byte values according to claim 5, characterized in that, Before the step of, when obtaining the byte value to be transmitted, controlling the master single-chip microcomputer to simulate a first voltage value according to the byte value and a preset reference voltage, the method further includes: When obtaining the data to be transmitted, converting the data to be transmitted into a byte sequence; Determining a half-byte in the byte sequence to obtain the byte value to be transmitted.

7. The method for transmitting byte values according to claim 1, characterized in that, The interval where the first voltage value is located is from N / 65537 times of the reference voltage to (N + 1) / 65537 times of the reference voltage, where N is the byte value of the byte to be transmitted, and N is greater than or equal to 0 and less than or equal to 65535; the interval where the second voltage value is located is from 65536 / 65537 times of the reference voltage to the full-scale value of the reference voltage.

8. The method for transmitting byte values according to claim 7, characterized in that, Before the step of, when obtaining the byte value to be transmitted, controlling the master single-chip microcomputer to simulate a first voltage value according to the byte value and a preset reference voltage, the method further includes: When obtaining the data to be transmitted, converting the data to be transmitted into a byte sequence; Determine a double-byte in the byte sequence to obtain the byte value to be transmitted.

9. A terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the steps of the byte value transmission method according to any one of claims 1 to 8 are implemented.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, the steps of the byte value transmission method according to any one of claims 1 to 8 are implemented.

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