A solar cell and a photovoltaic module

Abstract

The application discloses a solar cell and a photovoltaic module, and relates to the photovoltaic technical field. The solar cell comprises a cell body, the cell body comprises a first surface and a second surface, and a grid line is formed on the first surface and diffusion strips are formed on both sides of the grid line, wherein the diffusion strips comprise nanoparticles. The nanoparticles are microscopic particles of nanometer size, and the formation of the nanoparticles can increase the scattering area of the diffusion strip area. The nanoparticles are uniformly distributed in the diffusion strip area. After long-wave light irradiated from the second surface to the solar cell passes through a semiconductor substrate, part of the light is reflected back to the semiconductor substrate by the nanoparticles for secondary utilization, so that the long-wave light absorption utilization rate is improved, the current Jsc is improved, and the efficiency is also improved.

Description

Technical Field

[0001] This application relates to the field of photovoltaic technology, and more particularly to a solar cell and a photovoltaic module. Background Technology

[0002] Solar cells are increasingly being used as a new energy alternative. Photovoltaic solar cells, in particular, are devices that convert sunlight into electrical energy. Specifically, solar cells utilize the photovoltaic principle to generate charge carriers, which are then extracted using electrodes, thus facilitating the efficient use of electrical energy.

[0003] In the process of manufacturing the electrode grid lines of solar cells, the grid lines are generally formed by printing with paste or laser transfer followed by drying and curing. The paste may contain conductive particles such as silver, copper, and aluminum. When light shines on a solar cell, especially a thin-film solar cell, long-wavelength light passes through the semiconductor substrate without being absorbed, resulting in waste. Summary of the Invention

[0004] The purpose of this application is to provide a solar cell and a photovoltaic module to improve the light absorption and utilization rate.

[0005] To achieve the above objectives, this application provides the following technical solution:

[0006] A solar cell includes: a cell body, the cell body including a first surface and a second surface opposite to each other, and grid lines formed on the first surface and diffusion bands formed on both sides of the grid lines, the diffusion bands including nanoparticles.

[0007] Nanoparticles are microscopic particles on the nanometer scale. Their formation can increase the scattering area of ​​the diffusion zone. With nanoparticles uniformly distributed in the diffusion zone, when long-wavelength light irradiating the solar cell from the second surface passes through the semiconductor substrate, some of the light is reflected back to the semiconductor substrate for secondary utilization. This improves the long-wavelength light absorption and utilization rate, thereby increasing the current Jsc and improving efficiency.

[0008] In one implementation, the nanoparticles contain a metal element that is at least partially the same as the conductive metal element within the gate line.

[0009] Preferably, the conductive metal element includes at least one of silver, copper, and aluminum. When the conductive metal element is the same as the metal element portion of the nanoparticles, the nanoparticles can be applied to the solar cell simultaneously during the fabrication of the grid lines, reducing the number of fabrication steps for the solar cell.

[0010] In one implementation, the nanoparticles are selected from one or more of copper particles, copper oxide particles, cuprous oxide particles, and copper particles coated with copper oxide and / or cuprous oxide. When the nanoparticles include the aforementioned copper-containing particles, the processing cost of the solar cell can be reduced while ensuring its performance.

[0011] In one implementation, the nanoparticles have a particle size of 50 nm to 150 nm, which can ensure the reflectivity of light passing through the semiconductor substrate and being reflected back to the semiconductor substrate by the nanoparticles, thereby further improving the light absorption and utilization rate.

[0012] In one implementation, the distribution density of nanoparticles is 1-100 particles / μm. 2 This ensures that there are nanoparticles within each square micrometer to reflect the light passing through the semiconductor substrate, further improving the light absorption and utilization rate at various locations on the first surface.

[0013] In one implementation, the gate lines comprise organic matter, and the diffusion band comprises one or more of various organic substances within the gate lines. The organic matter exhibits good adhesion, which enhances the adhesion of the nanoparticles to the first surface and prevents the nanoparticles from detaching from the first surface.

[0014] In one implementation, the gate line includes a fine gate extending along a first direction;

[0015] The width of the fine grid is 30μm-130μm to reduce the shading area of ​​the fine grid while preventing excessively high resistivity, which would affect the current collection and transmission efficiency. And / or, the width of the diffusion band on either side of the fine grid is 30μm-200μm to prevent excessively wide diffusion bands on both sides of the fine grid from causing mutual interference between adjacent fine grids, reducing printing abnormalities during printing, and ensuring that the width of the diffusion band 2 is moderate to improve the adhesion of the fine grid to the first surface. In the back contact battery structure, this also prevents the diffusion band 2 from extending into areas of opposite polarity, thus avoiding leakage.

[0016] In one implementation, the first surface has a textured structure, and the grid lines and diffusion bands are formed on the textured structure. The formation of the textured structure increases the surface area of ​​the first surface, thereby increasing the contact area between the grid lines and diffusion bands and the first surface, further improving the adhesion of the grid lines and / or diffusion bands on the first surface, while reducing the contact resistance of the grid lines, thus ensuring the efficiency of current collection and transmission.

[0017] And / or, the first surface has a textured structure and a transparent conductive layer formed on the textured structure, with the gate lines and diffusion bands formed on the transparent conductive layer. The formation of the textured structure increases the surface area of ​​the first surface, thereby increasing the contact area between the gate lines and diffusion bands and the first surface, further improving the adhesion of the gate lines and / or diffusion bands on the first surface, while reducing the contact resistance of the gate lines, ensuring the efficiency of current collection and transmission.

[0018] In one implementation, the velvet structure includes a pyramidal structure and / or an inverted pyramidal structure;

[0019] The height of the pyramid-shaped structure and / or inverted pyramid-shaped structure is less than or equal to 5μm, which makes most of the conductive metal particles comparable in size to the textured structure. This not only increases the contact area between the conductive metal particles and the textured structure, but also further improves the adhesion of the grid lines.

[0020] In one implementation, the width of the fine grid is 60μm-130μm to reduce the light-blocking area, improve the light absorption rate, and simultaneously give the fine grid low transmission resistance and current transmission loss; and / or, the width of the diffusion band on either side of the fine grid is 60μm-200μm to prevent the organic diffusion bands on both sides of the fine grid from being too wide, thereby reducing the time required for the formation of diffusion band 2, improving processing efficiency, and ensuring that the width of the organic diffusion band is moderate to improve the adhesion of the fine grid on the first surface. This reduces the risk of leakage in the back contact battery structure.

[0021] In one implementation, at least a portion of the first surface is a polished surface, and the gate lines and diffusion bands are formed on the polished surface.

[0022] In one implementation, the gate line includes a fine gate extending along a first direction; the width of the fine gate is 30 μm to 100 μm; and / or, the width of the diffusion band located on either side of the fine gate is 30 μm to 60 μm.

[0023] In one implementation, the ratio of the height to the width of the grid line is 0.2 to 0.6, which can reduce the resistance of the grid line while ensuring the cross-sectional area of ​​the grid line, thereby improving the current collection and transmission effect.

[0024] In one implementation, the gate line comprises copper powder and resin;

[0025] The resin includes at least one of epoxy resin, acrylic resin and phenolic resin.

[0026] In one implementation, the first surface of the battery body includes a first region and a second region; the battery body includes a first semiconductor layer formed at least in the first region and a second semiconductor layer formed at least in the second region, and the first semiconductor layer and the second semiconductor layer have opposite conductivity types.

[0027] The gate line includes a first polar gate line and a second polar gate line; the first polar gate line is located in a first region and is electrically connected to a first semiconductor layer; the second polar gate line is located in a second region and is electrically connected to a second semiconductor layer.

[0028] In one implementation, the distance between the diffusion bands on both sides of the first polarity gate line and the edge of the first region is greater than 1 μm; the distance between the diffusion bands on both sides of the second polarity gate line and the edge of the second region is greater than 5 μm. This configuration prevents nanoparticles in the diffusion bands on both sides of the first polarity gate line from diffusing into the second region, and simultaneously prevents nanoparticles in the diffusion bands on both sides of the second polarity gate line from diffusing into the first region, thereby avoiding leakage between the diffusion bands on both sides of the first polarity gate line and the diffusion bands on both sides of the second polarity gate line, which would affect battery efficiency.

[0029] In one implementation, the first semiconductor layer includes doped polycrystalline silicon; and / or, the second semiconductor layer includes one or more of doped amorphous silicon, doped microcrystalline silicon, doped nanocrystalline silicon, and doped polycrystalline silicon; and / or, the solar cell further includes a second interface passivation layer located at least between the second semiconductor layer and the semiconductor substrate of the solar cell; and / or, the solar cell further includes a transparent conductive layer covering the side of the first semiconductor layer and the second semiconductor layer opposite to the semiconductor substrate of the solar cell.

[0030] A photovoltaic module comprising at least one solar cell as described above and an encapsulation layer.

[0031] Compared with the prior art, the beneficial effects of the photovoltaic module provided in the embodiments of the present invention are the same as those of the solar cell described above, and will not be repeated here. Attached Figure Description

[0032] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0033] Figure 1 A top view of a solar cell provided in an embodiment of this application;

[0034] Figure 2 A cross-sectional view of a solar cell provided in an embodiment of this application;

[0035] Figure 3 A partial SEM image of the diffusion band of a solar cell provided in an embodiment of this application;

[0036] Figure 4 Another partial SEM image of the diffusion band of the solar cell provided in the embodiments of this application;

[0037] Figure 5 Another partial SEM image of the diffusion band of the solar cell provided in an embodiment of this application.

[0038] Figure label:

[0039] 1-Gate line, 2-Diffusion band, 3-First semiconductor layer, 4-Second semiconductor layer, 5-First interface passivation layer, 6-Second interface passivation layer, 7-Semiconductor substrate, 8-Transparent conductive layer, 9-Nanoparticles. Detailed Implementation

[0040] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0041] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0042] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise expressly specified. "Several" means one or more, unless otherwise expressly specified.

[0043] In the description of this application, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0044] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0045] Please see Figure 1 and Figure 2 The solar cell provided in this embodiment of the invention includes a cell body, which includes a first surface and a second surface that are opposite to each other, that is, the two surfaces that are opposite to each other along the thickness direction of the cell body are the first surface and the second surface, respectively.

[0046] The first surface can correspond to the back surface of the solar cell, and the second surface can correspond to the light-facing surface of the solar cell. The solar cell also includes grid lines 1 formed on the first surface of the cell body and diffusion bands 2 formed on both sides of the grid lines 1, such as... Figures 3-5 As shown, the diffusion band 2 includes nanoparticles 9. Nanoparticles 9 are nanoscale microparticles, and their formation increases the scattering area of ​​the diffusion band 2 region. The nanoparticles 9 are uniformly distributed in the diffusion band 2 region. When long-wavelength light irradiating the solar cell from the second surface passes through the semiconductor substrate 7, some of the light is reflected back to the semiconductor substrate 7 by the nanoparticles 9 for secondary utilization, thereby improving the long-wavelength light absorption utilization rate, which in turn increases the current Jsc and improves efficiency.

[0047] It is understood that the battery body provided by the present invention includes a semiconductor substrate 7, a first semiconductor layer 3, a second semiconductor layer 4, etc., to meet the working performance of the solar cell.

[0048] In some embodiments, the nanoparticles 9 contain a metal element, wherein the metal element is at least partially the same as the conductive metal element in the grid line 1. Specifically, during the fabrication of the grid line 1, after paste printing or laser transfer and before the paste cures, one or more of the conductive metal elements in the paste gradually diffuse on both sides of the grid line 1 to form a diffusion band 2, and one or more of the conductive metal elements eventually form the nanoparticles 9. The conductive metal element has a high surface smoothness, therefore, when the nanoparticles 9 include the conductive metal element, it is beneficial to further improve the light scattering intensity and further improve the light absorption utilization rate.

[0049] In some embodiments, the conductive metal element may include at least one of silver, copper, and aluminum. These metals have good conductivity and are suitable for fabricating the grid line 1. Preferably, the conductive metal includes copper, as copper is relatively inexpensive and its conductivity meets the requirements of solar cells.

[0050] In some embodiments, the nanoparticles 9 are selected from one or more of copper particles, copper oxide particles, cuprous oxide particles, and copper particles coated with copper oxide and / or cuprous oxide. Since copper is a low-cost element, and the preparation process of metallic copper or copper oxide nanoparticles 9 is simple, when the nanoparticles 9 include the aforementioned copper-containing particles, the processing cost of the solar cell can be reduced while ensuring its performance.

[0051] If the particle size of nanoparticles 9 is too small, the scattering area will decrease, affecting the reflectivity of light reflected to the semiconductor substrate 7. If the particle size of nanoparticles 9 is too large, the bonding force between nanoparticles 9 and the solar cell will decrease, and the gaps between nanoparticles 9 will be larger, also reducing the reflectivity of light reflected to the semiconductor substrate 7. Based on the above, in this technical solution, the particle size of nanoparticles 9 is within a reasonable range of 50nm to 150nm. When nanoparticles 9 are non-spherical, the particle size of nanoparticles 9 can be an equivalent particle size. Nanoparticles 9 can be of any shape, such as spheres, cylinders, ellipsoids, irregular shapes, etc. With this setting, the particle size of nanoparticles 9 is within a reasonable range, which can ensure the reflectivity of light reflected back to the semiconductor substrate 7 from the nanoparticles 9, further improving the light absorption and utilization rate.

[0052] For example, the particle size of nanoparticle 9 is 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm or 150nm, etc.

[0053] In some embodiments, the distribution density of nanoparticles 9 is 1-100 particles / μm. 2 That is, each square micrometer in the diffusion zone 2 contains 1-100 nanoparticles 9, which ensures that there are nanoparticles 9 in each square micrometer to reflect the light passing through the semiconductor substrate, further improving the light absorption and utilization rate at various locations on the first surface.

[0054] For example, the number of nanoparticles 9 contained in each square micrometer can be 1, 5, 10, 20, 30, 40, 50, 60, 70, 80, 90 or 100.

[0055] In some embodiments, the grid line 1 contains organic matter, and the diffusion band 2 includes one or more of the various organic substances within the grid line 1. Specifically, during the fabrication of the grid line 1, after slurry printing or laser transfer and before the slurry cures, one or more organic substances and one or more conductive metal elements in the slurry diffuse towards the battery cell surfaces on both sides of the grid line 1, forming the diffusion band 2 on both sides of the grid line 1. It is understood that the slurry used to form the grid line 1 contains various organic substances; some of these organic substances diffuse faster than others, therefore the diffusion band 2 may include one or more organic substances from the slurry. This configuration provides better adhesion of the organic substances, improving the adhesion of the nanoparticles 9 to the first surface and preventing the nanoparticles 9 from detaching from the first surface.

[0056] In some embodiments, the grid line 1 includes a fine grid extending along a first direction, the width of which is 30μm-130μm. If the width of the fine grid is too large, it will result in a large shading area, affecting the photoelectric conversion efficiency of the solar cell. If the width of the fine grid is too small, it will result in high contact resistance between the fine grid and the semiconductor layer, affecting the current transmission efficiency. Therefore, the width of the fine grid is set within a reasonable range of 30μm-130μm to reduce the shading area of ​​the fine grid while preventing excessively high resistivity, which would affect the current collection and transmission efficiency. For example, the width of the fine grid can be 30μm, 40μm, 50μm, 60μm, 70μm, 80μm, 90μm, 110μm, 120μm, or 130μm, etc.

[0057] The width of the diffusion band 2 located on either side of the fine grid is 30μm to 200μm. This prevents excessively wide diffusion bands 2 on both sides of the fine grid from causing mutual interference between adjacent fine grids, reducing printing abnormalities during printing, and ensuring that the width of the diffusion band 2 is moderate to improve the adhesion of the fine grid to the first surface. In the back contact battery structure, it also prevents the diffusion band 2 from extending into areas with opposite polarity, thus avoiding leakage. For example, the width of the diffusion band 2 located on either side of the fine grid can be 30μm, 40μm, 50μm, 60μm, 70μm, 80μm, 90μm, 100μm, 110μm, 120μm, 130μm, 140μm, 150μm, 160μm, 170μm, 180μm, 190μm, or 200μm. Specifically, along the extension direction of the grid line 1, the width of the diffusion band 2 at any position is the distance from one edge of the grid line 1 at that position to the edge of the diffusion band 2 away from the grid line 1. Since the widths of the diffusion band 2 and the gate line 1 may differ at different locations, in this invention, the width of the diffusion band 2 located on one side of the gate line 1 can refer to either the average width or the maximum width of the diffusion band 2. Similarly, the width of the gate line 1 can refer to either the average width or the maximum width of the root of the gate line 1. It is understood that when the width of the diffusion band 2 on one side refers to its average width, the width of the gate line 1 refers to the average width of the root of the gate line 1; and when the width of the diffusion band 2 on one side refers to its maximum width, the width of the gate line 1 refers to the maximum width of the root of the gate line 1. The maximum width of the diffusion band 2 refers to its width at its widest point, and the maximum width of the root of the gate line 1 refers to its width at its widest point. The end of the gate line 1 closest to the first surface is the root of the gate line 1.

[0058] When the nanoparticles 9 contain metal elements, and the metal elements are at least the same as the conductive metal elements in the grid lines 1, the edge of the diffusion band 2 away from the grid lines 1 is the farthest position where the conductive metal in the slurry diffuses away from the grid lines 1. After the edge of the diffusion band 2 is exceeded, the battery surface no longer contains conductive metal diffused from the slurry.

[0059] In some embodiments, such as Figure 3 and Figure 4 As shown, the first surface can have a textured structure, on which the grid lines 1 and the diffusion band 2 are formed. This configuration increases the surface area of ​​the first surface, thereby increasing the contact area between the grid lines 1 and the diffusion band 2 and the first surface. This further improves the adhesion of the grid lines 1 and / or the diffusion band 2 to the first surface, while simultaneously reducing the contact resistance of the grid lines 1, ensuring efficient current collection and transmission. Furthermore, the textured structure has a light-trapping effect; therefore, when the first surface has a textured structure, the reflectivity of light can be reduced, allowing more light to be refracted from the light-facing surface into the semiconductor substrate 7 and absorbed and utilized by the semiconductor substrate 7, thus improving the photoelectric conversion efficiency of the solar cell.

[0060] In other embodiments, the solar cell may further include a transparent conductive layer 8, which is disposed on the side of the first semiconductor layer 3 or the second semiconductor layer 4 away from the semiconductor substrate 7. The transparent conductive layer 8 has high conductivity, which can promptly export the collected charge carriers and reduce the carrier recombination rate. The transparent conductive layer 8 can be selectively disposed on the side of the first semiconductor layer 3 away from the semiconductor substrate 7, as needed. For example, if the first semiconductor layer 3 is doped polycrystalline silicon, the transparent conductive layer 8 may or may not be disposed on the side of the first semiconductor layer 3 away from the semiconductor substrate 7; if the first semiconductor layer 3 is doped amorphous silicon, doped microcrystalline silicon, or doped nanocrystalline silicon, the transparent conductive layer 8 may be disposed on the side of the first semiconductor layer 3 away from the semiconductor substrate 7. Similarly, the transparent conductive layer 8 can be selectively disposed on the side of the second semiconductor layer 4 away from the semiconductor substrate 7, as needed. For example, if the second semiconductor layer 4 is doped amorphous silicon, doped microcrystalline silicon, or doped nanocrystalline silicon, the transparent conductive layer 8 may be disposed on the side of the second semiconductor layer 4 away from the semiconductor substrate 7.

[0061] Furthermore, when the solar cell is a back-contact cell, and when both the first semiconductor layer 3 and the second semiconductor layer 4 are provided with transparent conductive layers 8 on the side away from the semiconductor substrate 7, an insulating groove can also be provided that penetrates the transparent conductive layer 8 along the thickness direction of the semiconductor substrate 7. The insulating groove separates the portion of the transparent conductive layer 8 corresponding to the first semiconductor layer 3 and the portion corresponding to the second semiconductor layer 4.

[0062] In the case where the solar cell also includes a transparent conductive layer 8, the transparent conductive layer 8 is formed on the textured structure, and the grid lines 1 and the diffusion band 2 are formed on the transparent conductive layer 8. The increased contact area between the grid lines 1 and the diffusion band 2 and the transparent conductive layer 8 further improves the adhesion of the grid lines 1 and / or the diffusion band 2 to the transparent conductive layer, while reducing the contact resistance of the grid lines 1, thus ensuring the efficiency of current collection and transmission.

[0063] Regarding the aforementioned transparent conductive layer 8, the embodiments of the present invention do not specifically limit the material and thickness of the transparent conductive layer 8. For example, the material of the transparent conductive layer 8 may include at least one selected from fluorine-doped tin oxide, aluminum-doped zinc oxide, tin-doped indium oxide, tungsten-doped indium oxide, molybdenum-doped indium oxide, cerium-doped indium oxide, and indium hydroxide.

[0064] In some embodiments, the textured structure includes a pyramidal structure and / or an inverted pyramidal structure. Since the average particle size of the conductive metal particles contained within the gate line 1 is between 2 μm and 8 μm, and the proportion of conductive metal particles smaller than 10 μm is greater than or equal to 80%, the height of the pyramidal structure and / or inverted pyramidal structure is less than or equal to 5 μm. This makes the size of most conductive metal particles comparable to that of the textured structure, increasing not only the contact area between the conductive metal particles and the textured structure but also further improving the adhesion of the gate line 1 to the first surface. For example, the height of the pyramidal structure and / or inverted pyramidal structure can be 1 μm, 2 μm, 3 μm, 4 μm, or 5 μm, etc.

[0065] like Figure 3 and Figure 4 As shown, when the textured surface structure is a pyramidal structure, the nanoparticles 9 of the diffusion band 2 are located on the sides of the pyramidal structure. This uniform distribution of nanoparticles 9 on the sides of the pyramidal structure allows for more uniform light reflection back to the semiconductor substrate 7 from all locations within the pyramidal structure, resulting in more uniform current generation at all locations within the semiconductor substrate 7. Furthermore, the organic matter in the organic diffusion band 2 is located at the bottom of the pyramidal structure. During the formation of the gate line 1, rapid annealing ensures that the organic matter in the diffusion band 2 remains only at the bottom of the pyramidal structure, with no organic matter in the upper half of the pyramid. This reduces organic matter residue and ensures better electrical interconnection.

[0066] In some embodiments, when the fine gate and diffusion band 2 are formed on the textured structure, the width of the fine gate is 60μm-130μm. If the width of the fine gate is too wide, it will increase the light-blocking area; if the width of the fine gate is too narrow, its transmission resistance will be high. Therefore, in this technical solution, the width of the fine gate is set within a reasonable range of 60μm-130μm to reduce the light-blocking area, improve the light absorption rate, and simultaneously give the fine gate low transmission resistance and current transmission loss. Exemplarily, the width of the fine gate is 60μm, 65μm, 70μm, 75μm, 80μm, 85μm, 90μm, 95μm, 100μm, 105μm, 110μm, 115μm, 120μm, 125μm, or 130μm, etc.

[0067] In some embodiments, the width of the diffusion band 2 located on either side of the fine grid is 60 μm to 200 μm. This prevents the organic diffusion bands 2 on both sides of the fine grid from being too wide, which could lead to mutual interference between adjacent fine grids and reduce printing abnormalities during printing. Simultaneously, it ensures that the width of the diffusion band 2 is moderate, improving the adhesion of the fine grid to the first surface. In a back-contact battery structure, it also prevents leakage caused by the diffusion band 2 extending into areas of opposite polarity. For example, the width of the diffusion band 2 located on either side of the fine grid is 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, 150 μm, 160 μm, 170 μm, 180 μm, 190 μm, or 200 μm.

[0068] In other embodiments, such as Figure 5 As shown, at least a portion of the first surface is polished, and the gate line 1 and the diffusion band 2 are formed on the polished surface. This technical solution simplifies the manufacturing process, and the fact that the gate line 1 and the diffusion band 2 are formed on the polished surface improves the uniformity of their thickness, avoiding uneven thickness caused by uneven surfaces.

[0069] When the gate line 1 and the diffusion band 2 are formed on the polished surface, the width of the fine gate is 30μm-100μm to reduce the light-blocking area, improve the light absorption rate, and simultaneously give the fine gate lower transmission resistance and current transmission loss. For example, in this technical solution, the width of the fine gate is 30μm, 35μm, 40μm, 45μm, 50μm, 55μm, 60μm, 65μm, 70μm, 75μm, 80μm, 85μm, 90μm, 95μm, or 100μm, etc.

[0070] When the grid line 1 and the diffusion band 2 are formed on the polished surface, the width of the diffusion band 2 located on either side of the fine grid is 30μm to 60μm, thereby reducing the risk of leakage current, while ensuring that the width of the organic diffusion band 2 is moderate and improving the adhesion of the fine grid on the first surface.

[0071] It should be noted that when the slurry forming the grid lines 1 diffuses on a surface with a textured surface, it tends to flow along the base of the textured surface, and the slurry retained in the gaps between adjacent textured surfaces forms a diffusion band 2. However, when the slurry forming the grid lines 1 diffuses on a polished surface, the slurry flows along the polished surface, easily forming narrower and more uniformly wide grid lines 1. Thus, with the same volume of diffused slurry, the slurry can diffuse a greater distance along a surface with a textured surface. Therefore, in this application, the diffusion band 2 formed on the textured surface is wider than the diffusion band 2 formed on the polished surface, which facilitates processing and improves processing efficiency.

[0072] In some embodiments, the ratio of the height to the width of the grid line 1 is 0.2 to 0.6. The height of the grid line 1 refers to the distance from its root to its top. This configuration ensures a relatively low resistance in the grid line 1 while maintaining its cross-sectional area, thereby improving current collection and transmission efficiency. Furthermore, it reduces the amount of slurry used and prevents waste.

[0073] In the above embodiments, the ratio of the height to the width of the gate line 1 can be 0.2, 0.3, 0.4, 0.5, or 0.6. For example, the width of the gate line 1 is 31 μm and the height is 14 μm; the width of the gate line 1 is 35 μm and the height is 10 μm.

[0074] In other embodiments, the grid line 1 includes a main grid extending along a second direction. The width of the main grid is 50μm-100μm. If the main grid width is too large, it will result in a large shading area, affecting the photoelectric conversion efficiency of the solar cell. If the main grid width is too small, it will result in a high contact resistance between the main grid and the fine grid, affecting the current transmission efficiency. Therefore, the width of the main grid is set within a reasonable range of 50μm-100μm to reduce the shading area of ​​the main grid while preventing the resistivity of the main grid from being too high, which would affect the current collection and transmission efficiency. For example, the width of the main grid is 50μm, 55μm, 60μm, 65μm, 70μm, 75μm, 80μm, 85μm, 90μm, 95μm, or 100μm.

[0075] The first direction and the second direction intersect. The angle between the first direction and the second direction is not specifically limited; for example, the first direction and the second direction can be perpendicular. Alternatively, the angle between the first direction and the second direction can be greater than or equal to 60° and less than 90°.

[0076] In the above embodiments, for a gridless solar cell, the solar cell's grid includes a first grid and a second grid, and the first and second grids are arranged alternately along a second direction. In this embodiment, the first and second grids can be continuously and uninterruptedly arranged along the first direction, or they can be intermittently formed into multiple segments.

[0077] For a solar cell with a main grid, the solar cell's fine grid includes a first fine grid and a second fine grid, and the solar cell's main grid includes a first main grid and / or a second main grid. In this embodiment, the first fine grid and the second fine grid can be continuously and uninterruptedly arranged along a first direction or can be intermittently formed into multiple segments. The first main grid is electrically connected to at least one first fine grid, and the second main grid is electrically connected to at least one second fine grid.

[0078] In some embodiments, the grid line 1 includes copper powder and resin. The copper powder can be any shape, such as spherical, ellipsoidal, or columnar.

[0079] The resin includes at least one of epoxy resin, acrylic resin and phenolic resin. The above-mentioned resins have good adhesion, which is beneficial to improving the adhesion of the grid line 1 on the first surface.

[0080] The epoxy resin is a thermosetting resin, and may include one or more of the following: bisphenol A type epoxy resin, bisphenol F type epoxy resin, hydrogenated bisphenol A type epoxy resin, polyurethane modified epoxy resin, dimer acid modified epoxy resin, siloxane modified epoxy resin, phenolic type epoxy resin, polyol glycidyl ether type epoxy resin, and polyacid glycidyl ester type epoxy resin. For example, the epoxy resin may include bisphenol A type epoxy resin and / or bisphenol F type epoxy resin; as another example, the epoxy resin may include polyurethane modified epoxy resin, phenolic type epoxy resin, and / or hydrogenated bisphenol A type epoxy resin.

[0081] In some embodiments, the slurry used to form the grid lines 1 further includes a curing agent, a curing accelerator, a dispersant, and / or a solvent. To improve the overall properties of the slurry, such as stability and thixotropy, the slurry used to form the grid lines 1 may also include a coupling agent and a thixotropic agent.

[0082] The mass percentage of copper powder in the slurry used to form grid line 1 can be 85%-92%; the mass percentage of resin can be 2%-5%; the mass percentage of curing agent can be 0.2%-0.5%; the mass percentage of curing accelerator can be 0.02%-0.05%; the mass percentage of dispersant can be 1%-3%; and the mass percentage of solvent can be 3%-6%.

[0083] The curing agent is the substance that enables the resin to cure. Curing agents can include one or more of the following: tertiary amines, isocyanates, imidazoles, dicyandiamides, and acid anhydrides. For example, a tertiary amine is a type of triethanolamine. Isocyanates include one or more of the following: Trixene BI 7982 (a blocked isocyanate based on HDI), MF-K60X (a blocked polyisocyanate HDI curing agent), ketoxime-terminated isocyanates, hexamethylene diisocyanate-terminated with hexamethylene hexamethylene, and dodecyl mercaptan-terminated diphenyl diisocyanate.

[0084] Curing accelerators can catalyze the curing of resins, reduce curing temperature, and shorten curing time. Curing accelerators include at least one of quaternary ammonium salts, imidazole esters or imidazoleium salts, and substituted ureas. Quaternary ammonium salts may include benzyltriethylammonium chloride, etc.; substituted ureas may be one or more of N-p-chlorophenyl-N,N'-dimethylurea, N-(3,4-dichlorophenyl)-N,N'-dimethylurea, N-(3-phenyl)-N,N'-dimethylurea, N-(4-phenyl)-N,N'-dimethylurea, and 2-methylimidazolium; imidazoles and their esters or imidazolium salts may include imidazole sulfonates / salts, imidazole phosphates / salts, or imidazole acetates / salts, such as dibutyl imidazole phosphate, 1-ethyl-3-methylimidazolium acetate, 1-ethyl-3-methylimidazolium methane sulfonate, trimellitate 1-cyanoethyl-2-undecapridinium, isocyanurate 2-methylimidazolium, tetraphenylboronic acid 2-ethyl-4-methylimidazolium, and tetraphenylboronic acid 2-ethyl-1,4-dimethylimidazolium.

[0085] Dispersant molecules adsorb onto the particle surface, forming a protective film that makes it difficult for particles to approach each other, thereby preventing the agglomeration of conductive metals in the slurry. Dispersants include at least one of triethylhexylphosphate, sodium dodecyl sulfate, polyacrylamide, polyvinylpyrrolidone, hydroxyethyl cellulose, polyethylene glycol, polyethyleneimine or fatty acid polyethylene glycol esters, BYK-110, BYK-111, and Tween 80.

[0086] The solvent can include a mixture of ketones and ethers. Ketone solvents can include one of cyclohexanone, butanone, benzophenone, or isophorone. Ether solvents can include one of propylene glycol methyl ether, diethylene glycol butyl ether, dipropylene glycol methyl ether, or ethylene glycol diethyl ether. Different types of solvents have different diffusion and evaporation rates. The use of a mixed solvent in this technical solution ensures a larger diffusion area for the nanoparticles 9 in the slurry, allowing the solvent and nanoparticles 9 to fill the entire textured and smooth areas of the solar cell. After the solvent evaporates, the remaining nanoparticles 9 adhere uniformly to the surface of the solar cell.

[0087] Coupling agents can improve the bonding between copper powder and resin, and enhance the adhesion between the cured slurry and the battery cell. They can be silane coupling agents and / or titanate coupling agents, such as one or more of KH550, KH560, KH570, isopropyltris(dodecylbenzenesulfonyl) titanate, isopropyltris(dioctylpyrophosphate) titanate and isopropyltris(dioctylphosphate) titanate.

[0088] Thixotropic agents can enhance the thixotropic properties of copper pastes. These agents can be waterborne polyurethane, polyamide wax, polyoxyethylene castor oil, hydrophobic fumed silica, or BYK-405.

[0089] It should be noted that the width of the diffusion band 2 is not only related to the first surface covered by the grid line 1, but also, according to the general understanding of those skilled in the art, can be controlled by controlling the type and amount of resin used, the type and amount of solvent used, the size of the copper nanoparticles, and the printing process.

[0090] Taking copper paste as an example, in the process of preparing paste for forming grid line 1, nanoparticles 9 can be obtained by introducing copper precursor into the paste and then preparing it in situ during curing, or by preparing nanoparticles 9 in advance with copper precursor.

[0091] Specifically, when nanoparticles 9 are prepared in situ by introducing a copper precursor into the slurry and then curing them, the preparation method of the gate line 1 is as follows:

[0092] 1) Provide copper powder;

[0093] 2) Copper powder, resin, solvent, curing agent, dispersant, curing accelerator and copper precursor are mixed in a certain proportion and ground by a three-roll mill to obtain copper paste;

[0094] 3) The copper paste is transferred onto the battery cell by screen printing and then heated and cured to obtain grid line 1.

[0095] When nanoparticles 9 are prepared in advance using a copper precursor, the specific method for preparing the gate line 1 is as follows:

[0096] 1) Nanoparticles 9 were prepared by heating a copper precursor;

[0097] 2) Provide copper powder;

[0098] 3) Copper powder, nanoparticles 9, resin, solvent, curing agent, dispersant and curing accelerator are mixed in a certain proportion and ground by a three-roll mill to obtain copper paste;

[0099] 4) The copper paste is transferred onto the battery cell by screen printing and then heated and cured to obtain grid line 1.

[0100] The copper precursor includes a reducing agent and a copper salt. The reducing agent may include one or more of hypophosphite, sodium phosphite, hypophosphite (e.g., sodium hypophosphite, potassium hypophosphite, calcium hypophosphite, magnesium hypophosphite), dimethylamineborane, amineborane, glucose, hydrazine hydrate, formic acid, ethylene glycol, oleylamine, formaldehyde, and ammonia. Optionally, the reducing agent includes hypophosphite, hypophosphite, and formic acid. The copper salt includes monovalent or divalent organic or inorganic copper salts. Specific copper salts may include one or more of copper sulfate, anhydrous copper sulfate, copper carboxylate (copper formate, copper acetate, copper propionate, copper butyrate, copper lactate, copper oxalate, copper glycolate, copper stearate, copper myristate), copper chloride, and copper bromide, for example, copper salts include copper formate and / or copper citrate.

[0101] In other embodiments, when the solar cell provided in this application is a back-contact cell, both the first semiconductor layer 3 and the second semiconductor layer 4 are located on the first surface, and the grid lines 1 are formed only on the first surface. A portion of the grid lines 1 are electrically connected to the first semiconductor layer 3, and another portion of the grid lines 1 are electrically connected to the second semiconductor layer 4, thereby facilitating the extraction of electrons or holes by the grid lines 1 to form a current. When the solar cell is a bifacial cell, the first semiconductor layer 3 and the second semiconductor layer 4 are located on the first surface and the second surface, respectively, and a portion of the grid lines 1 are formed on the first surface and electrically connected to the first semiconductor layer 3, while another portion of the grid lines 1 are formed on the second surface and electrically connected to the second semiconductor layer 4.

[0102] In some embodiments, the semiconductor substrate 7 of the solar cell can be made of materials such as silicon (Si), germanium (Ge), or gallium arsenide (GaAs). Obviously, in terms of conductivity type, the semiconductor substrate 7 can be an intrinsically conductive semiconductor substrate, an n-type conductive semiconductor substrate, or a p-type conductive semiconductor substrate. Preferably, the semiconductor substrate is a p-type conductive semiconductor substrate or an n-type conductive semiconductor substrate. Compared to an intrinsically conductive semiconductor substrate, a p-type conductive semiconductor substrate or an n-type conductive semiconductor substrate has better conductivity, resulting in a lower bulk resistivity in the final back contact cell, thereby improving the efficiency of the back contact cell.

[0103] For example, the semiconductor substrate 7 can be a p-type semiconductor substrate or an n-type semiconductor substrate. The n-type semiconductor substrate has advantages such as high minority carrier lifetime, no light decay, and good performance in weak light.

[0104] Furthermore, the materials of the first semiconductor layer 3 and the second semiconductor layer 4 can be silicon (Si), germanium (Ge), silicon carbide (SiCx), or gallium arsenide (GaAs), etc. Taking the case where both the first semiconductor layer 3 and the second semiconductor layer 4 are made of silicon (Si) as an example, the first semiconductor layer 3 can be one or more of doped polycrystalline silicon, doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon. The second semiconductor layer 4 can be one or more of doped polycrystalline silicon, doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon. The first semiconductor layer 3 can be additionally formed on the semiconductor substrate 7 by deposition technology, or it can be formed within the semiconductor substrate 7 by diffusion, ion implantation, or other methods.

[0105] In some examples, the first semiconductor layer 3 includes a doped polycrystalline silicon layer. In this case, the doped polycrystalline silicon layer has higher carrier transport characteristics compared to the doped amorphous silicon layer. Therefore, when the first semiconductor layer 3 is a doped polycrystalline silicon layer, the carrier transport efficiency is higher, which is beneficial to improving the photoelectric conversion efficiency of the solar cell.

[0106] Regarding the conductivity type, the first semiconductor layer 3 can be an n-type doped layer and the second semiconductor layer 4 can be a p-type doped layer; or, the first semiconductor layer 3 can be a p-type doped layer and the second semiconductor layer 4 can be an n-type doped layer.

[0107] like Figure 2 As shown, the solar cells in the two embodiments described above may further include a first interface passivation layer 5, which is located at least between the first semiconductor layer 3 and the semiconductor substrate 7. In this case, the passivated contact structure formed by the first interface passivation layer 5 and the first semiconductor layer 3 has excellent interface passivation effect and can achieve selective collection of charge carriers, reducing the carrier recombination rate between the first surface of the semiconductor substrate 7 and the corresponding region of the first semiconductor layer 3, thereby further improving the photoelectric conversion efficiency of the solar cell. The material and thickness of the first interface passivation layer 5 can be set according to the material of the first semiconductor layer 3 and actual needs, and are not specifically limited here.

[0108] The material of the first interface passivation layer 5 can be determined based on the material of the first semiconductor layer 3. For example, if the first semiconductor layer 3 includes a doped polycrystalline silicon layer, the first interface passivation layer 5 is a tunneling oxide layer. As another example, if the first semiconductor layer 3 includes a doped amorphous silicon layer and / or doped microcrystalline silicon, the first interface passivation layer 5 includes an intrinsic amorphous silicon layer and / or doped microcrystalline silicon. Furthermore, this embodiment of the invention does not specifically limit the material of the first interface passivation layer 5.

[0109] like Figure 2 As shown, the aforementioned solar cell may further include a second interface passivation layer 6, which is located at least between the second semiconductor layer 4 and the semiconductor substrate 7. In this case, the passivated contact structure formed by the second interface passivation layer 6 and the second semiconductor layer 4 can achieve selective collection of charge carriers and reduce the carrier recombination rate in the corresponding region between the semiconductor substrate 7 and the second semiconductor layer 4. The material and thickness of the second interface passivation layer 6 can be set according to the material of the second semiconductor layer 4 and actual needs, and are not specifically limited here. For example, when the material of the second semiconductor layer 4 includes one or more of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon, the second interface passivation layer 6 includes one or more of intrinsic amorphous silicon, intrinsic microcrystalline silicon, and intrinsic nanocrystalline silicon.

[0110] As for the thickness of the second interface passivation layer 6, since the thickness of the second interface passivation layer 6 will affect its own transmission resistance and passivation effect, and thus affect the forward leakage loss and reverse breakdown voltage of the solar cell, the thickness of the second interface passivation layer 6 can be determined according to the requirements of the forward leakage loss and reverse breakdown voltage of the solar cell in the actual application scenario. No specific limit is made here.

[0111] like Figure 2 As shown, in the case of a back-contact solar cell provided in this application, such as Figure 2 As shown, the first surface may include a first region and a second region. The solar cell also includes a first semiconductor layer 3 formed at least in the first region and a second semiconductor layer 4 formed at least in the second region, wherein the first semiconductor layer 3 and the second semiconductor layer 4 have opposite conductivity types. The grid line 1 includes a first polarity grid line and a second polarity grid line; the first polarity grid line is located in the first region and is electrically connected to the first semiconductor layer 3; the second polarity grid line is located in the second region and is electrically connected to the second semiconductor layer 4. The first region and the second region may be arranged in an alternating stripe pattern or an alternating interdigitated pattern.

[0112] In addition, the first surface may also include a third region. In some embodiments, the first semiconductor layer 3 and the second semiconductor layer 4 may overlap in the third region; or the third region may separate the first semiconductor layer 3 and the second semiconductor layer 4.

[0113] In the case that the solar cell is a back-contact cell, such as Figure 2 As shown, the distance D1 between the diffusion bands on both sides of the first polarity gate line and the edge of the first region is greater than 1 μm to prevent nanoparticles in the diffusion bands on both sides of the first polarity gate line from diffusing into the second region. The distance D2 between the diffusion bands on both sides of the second polarity gate line and the edge of the second region is greater than 5 μm to prevent nanoparticles in the diffusion bands on both sides of the second polarity gate line from diffusing into the first region, thereby avoiding leakage between the diffusion bands on both sides of the first polarity gate line and the diffusion bands on both sides of the second polarity gate line, which would affect battery efficiency.

[0114] It is understandable that when the first region is a groove structure, the diffusion bands located on both sides of the first polar grid line are not easy to climb and diffuse to the second region. However, the second region is higher, and the diffusion bands located on both sides of the second polar grid line are more likely to flow to the first region due to gravity. Therefore, D1 can be less than D2.

[0115] For example, the spacing between the diffusion bands on both sides of the first polar gate line and the edge of the first region is 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.5 μm, 4 μm, 4.5 μm, or 5 μm, etc. The spacing between the diffusion bands on both sides of the second polar gate line and the edge of the second region is 5 μm, 5.5 μm, 6 μm, 6.5 μm, 7 μm, 7.5 μm, 8 μm, 8.5 μm, 9 μm, 9.5 μm, or 10 μm, etc.

[0116] For example, the solar cell provided in this application can be a hybrid back-contact cell. The first semiconductor layer 3 can be a doped polycrystalline silicon layer, and a tunneling oxide layer is also disposed between the first semiconductor layer 3 and the semiconductor substrate 7. The second semiconductor layer 4 can be one or more of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon, and one or more of intrinsic amorphous silicon, intrinsic microcrystalline silicon, and intrinsic nanocrystalline silicon are also disposed between the second semiconductor layer 4 and the semiconductor substrate 7. In this technical solution, both the first semiconductor layer 3 and the second semiconductor layer 4 extend to the third region, and the first semiconductor layer 3 and the second semiconductor layer 4 overlap in the third region. A transparent conductive layer 8 is disposed on the side of the first semiconductor layer 3 and the second semiconductor layer 4 away from the semiconductor substrate 7, and an insulating groove is disposed on the transparent conductive layer 8 to prevent leakage. A fine grid and a diffusion band 2 are formed on the transparent conductive layer 8.

[0117] For example, the solar cell provided in this application can be a TBC (Tunnel Oxide Passivated Contact-Back Contact) solar cell. The first semiconductor layer 3 is a doped polycrystalline silicon layer, and a tunneling oxide layer is disposed between the first semiconductor layer 3 and the semiconductor substrate 7. The second semiconductor layer 4 is a doped polycrystalline silicon layer, and a tunneling oxide layer is also disposed between the second semiconductor layer 4 and the semiconductor substrate 7. In this technical solution, neither the first semiconductor layer 3 nor the second semiconductor layer 4 extends into the third region. The third region isolates the first semiconductor layer 3 and the second semiconductor layer 4 to prevent leakage. Furthermore, a passivation layer is disposed on the side of the first semiconductor layer 3 and the second semiconductor layer 4 facing away from the semiconductor substrate 7, and a fine gate and diffusion band 2 are formed on the passivation layer. The passivation layer includes one or more stacked layers of silicon nitride, silicon oxynitride, and silicon oxide.

[0118] For example, the solar cell provided in this application can be a TOPCon (Tunnel Oxide Passivated Contact) solar cell, in which a first semiconductor layer 3 is formed on a first surface and a second semiconductor layer 4 is formed on a second surface. The first semiconductor layer 3 includes doped polycrystalline silicon, and a tunneling oxide layer is also disposed between the first semiconductor layer 3 and the semiconductor substrate 7. The second semiconductor layer 4 may also include doped polycrystalline silicon, and a tunneling oxide layer is also disposed between the second semiconductor layer 4 and the semiconductor substrate 7. Furthermore, a passivation layer is disposed on the side of the first semiconductor layer 3 and the second semiconductor layer 4 facing away from the semiconductor substrate 7, and a fine gate and a diffusion band 2 are formed on the passivation layer.

[0119] This invention also provides a photovoltaic module, which includes at least one solar cell and an encapsulation layer provided in any of the above embodiments. Considering that the encapsulation layer also contains organic matter, and that this organic matter diffuses into the diffusion zone 2, it is difficult to distinguish whether the organic matter in the diffusion zone 2 originates from the grid lines 1 or the encapsulation layer. Therefore, making the material of the encapsulation layer different from the organic matter in the diffusion zone 2 facilitates the determination of the edge of the diffusion zone 2 and whether the organic matter in the diffusion zone 2 originates from the grid lines 1 or the encapsulation layer.

[0120] Compared with the prior art, the beneficial effects of the photovoltaic module provided in the embodiments of the present invention are the same as those of the solar cell described above, and will not be repeated here.

[0121] For example, the gate line 1 of the present invention is the gate line of Embodiment 1.

[0122] Example 1:

[0123] Preparation of copper precursors

[0124] Copper oxalate and oleylamine were added to a mixed solvent of ethanol and water at a mass ratio of 1:2. The mixture was stirred at 60°C for 4 hours, and then the water and ethanol were evaporated to obtain the copper precursor.

[0125] Preparation of copper grid lines

[0126] (1) Dissolve 0.4g of polyurethane modified epoxy resin and 1.6g of hydrogenated bisphenol A type epoxy resin in 5g of diethylene glycol butyl ether, stir and mix at room temperature, and then filter through a 500-mesh sieve to remove impurities to obtain a polymer resin solution.

[0127] (2) Add 0.5g of dispersant Tween 80 and 0.3g of coupling agent KH-570 to the above polymer resin solution and stir and disperse evenly. Then add 1g of curing agent MF-K60X, 0.2g of curing accelerator DYHARD UR400 and 0.02g of polyamide wax to the above solution and disperse evenly. Then add 44g of nano-spherical copper powder, 44g of flake micron copper powder and 2g of copper precursor and place them in a planetary mixer for premixing to obtain a premix.

[0128] (3) The obtained premixed material is subjected to high-speed shearing and grinding in a three-roll mill to obtain low-temperature conductive copper paste. The obtained paste is then passed through a 400-mesh sieve to remove impurities and large particles, and then vacuum degassing is performed to obtain copper paste.

[0129] (4) The prepared copper paste is printed onto the HBC cell by screen printing.

[0130] The textured surface region of the battery cell prepared in Example 1 was characterized by SEM (scanning electron microscopy), as shown in Figure 4. Multiple nanoparticles 9 were found on the textured surface of the battery cell. [The remaining text appears to be incomplete and requires further context.] Figure 4X-ray elemental analysis (EDS) was performed on positions 1-3, and the elemental contents are shown in Table 1:

[0131] Table 1

[0132]

[0133] As can be seen from Table 1, Figure 4 The nanoparticles 9 contain copper at positions 1, 2, and 3.

[0134] The polished surface area of ​​the battery cell prepared in Example 1 was characterized by SEM (scanning electron microscopy), such as... Figure 5 As shown, multiple nanoparticles 9 were found on the polished surface of the battery cell. Figure 5 The elemental contents obtained by X-ray elemental analysis (EDS) at positions 1-4 are shown in Table 2:

[0135] Table 2

[0136]

[0137]

[0138] As shown in Table 2, Figure 5 The nanoparticles 9 contain copper at positions 1, 3, and 4, while the nanoparticles 9 do not contain copper at position 2.

[0139] Comparative Example 1:

[0140] Preparation of copper grid lines

[0141] (1) Dissolve 0.4g of polyurethane modified epoxy resin and 1.6g of hydrogenated bisphenol A type epoxy resin in 5g of diethylene glycol butyl ether, stir and mix at room temperature, and then filter through a 500-mesh sieve to remove impurities to obtain a polymer resin solution.

[0142] (2) Add 0.5g of dispersant Tween 80 and 0.3g of coupling agent KH-570 to the above polymer resin solution and stir thoroughly to disperse evenly. Then add 1g of MF-K60X, 0.2g of curing accelerator DYHARD UR400 and 0.02g of polyamide wax to the above solution and disperse thoroughly. Then add 45g of nano-spherical copper powder and 45g of flake-shaped micron copper powder and place them in a planetary mixer for premixing to obtain a premix.

[0143] (3) The obtained premixed material is subjected to high-speed shearing and grinding in a three-roll mill to obtain low-temperature conductive copper paste. The obtained paste is then passed through a 400-mesh sieve to remove impurities and large particles, and then vacuum degassing is performed to obtain copper paste.

[0144] (4) The prepared copper paste was printed onto the same HBC cell as before the copper paste was printed in Example 1 by screen printing.

[0145] The solar cell prepared in Comparative Example 1 was characterized by SEM (scanning electron microscopy), and no nanoparticles 9 were found.

[0146] The reflectivity, short-circuit current, and efficiency of the solar cells from Example 1 and Comparative Example 1 were tested, and the results are shown in Table 3:

[0147] Table 3:

[0148] feature reflection / % <![CDATA[Current Jsc / mA / cm 2 > efficiency / % Example 1 Contains nanoparticles 51 41.9 26.6 Comparative Example 1 No nanoparticles 32 41.4 26.2

[0149] As shown in Table 3, when the diffusion band 2 contains nanoparticles 9, the light reflectivity is significantly improved, thereby increasing the short-circuit current and efficiency of the solar cell.

[0150] In the description of the above embodiments, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0151] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A solar cell, characterized in that, include: The battery body includes a first surface and a second surface opposite to each other, and grid lines formed on the first surface and diffusion bands formed on both sides of the grid lines, the diffusion bands including nanoparticles; the diffusion bands are formed on the first surface. The nanoparticles contain a metal element, which is at least partially the same as the conductive metal element in the gate line; the conductive metal element includes at least one of silver, copper, and aluminum; The nanoparticles have a particle size of 50 nm to 150 nm; The grid line includes a fine grid extending along a first direction; the width of the fine grid is 30μm-130μm; and / or, the width of the diffusion band located on either side of the fine grid is 30μm-200μm.

2. The solar cell according to claim 1, characterized in that, The nanoparticles are selected from one or more of copper particles, copper oxide particles, cuprous oxide particles, and copper particles coated with copper oxide and / or cuprous oxide.

3. The solar cell according to claim 1, characterized in that, The distribution density of the nanoparticles is 1-100 particles / μm. 2 .

4. The solar cell according to claim 1, characterized in that, The grid lines contain organic matter, and the diffusion band includes one or more of a variety of organic matter within the grid lines.

5. The solar cell according to any one of claims 1-4, characterized in that, The first surface has a textured structure, and the gate lines and the diffusion band are formed on the textured structure; and / or, the first surface has a textured structure and a transparent conductive layer formed on the textured structure, and the gate lines and the diffusion band are formed on the transparent conductive layer.

6. The solar cell according to claim 5, characterized in that, The velvet structure includes a pyramid-shaped structure and / or an inverted pyramid-shaped structure; The height of the pyramid-shaped structure and / or inverted pyramid-shaped structure is less than or equal to 5 μm.

7. The solar cell according to claim 6, characterized in that, The width of the fine gate is 60μm-130μm; and / or, the width of the diffusion band located on either side of the fine gate is 60μm-200μm.

8. The solar cell according to any one of claims 1-4, characterized in that, At least a portion of the first surface is a polished surface, and the gate lines and the diffusion band are formed on the polished surface.

9. The solar cell according to claim 8, characterized in that, The grid line includes a fine grid extending along a first direction; the width of the fine grid is 30μm-100μm; and / or, the width of the diffusion band located on either side of the fine grid is 30μm-60μm.

10. The solar cell according to claim 1, characterized in that, The ratio of the height to the width of the grid line is 0.2 to 0.

6.

11. The solar cell according to claim 1, characterized in that, The grid lines comprise copper powder and resin; The resin includes at least one of epoxy resin, acrylic resin and phenolic resin.

12. The solar cell according to claim 1, characterized in that, The first surface of the battery body includes a first region and a second region; the battery body includes a first semiconductor layer formed at least in the first region and a second semiconductor layer formed at least in the second region, and the first semiconductor layer and the second semiconductor layer have opposite conductivity types; The gate line includes a first polar gate line and a second polar gate line; the first polar gate line is located in a first region and is electrically connected to the first semiconductor layer; the second polar gate line is located in a second region and is electrically connected to the second semiconductor layer.

13. The solar cell according to claim 12, characterized in that, The diffusion bands located on both sides of the first polar gate line are spaced more than 1 μm from the edge of the first region; the diffusion bands located on both sides of the second polar gate line are spaced more than 5 μm from the edge of the second region.

14. The solar cell according to claim 12, characterized in that, The first semiconductor layer includes doped polycrystalline silicon; and / or, the second semiconductor layer includes one or more of doped amorphous silicon, doped microcrystalline silicon, doped nanocrystalline silicon, and doped polycrystalline silicon; and / or, the solar cell further includes a second interface passivation layer located at least between the second semiconductor layer and the semiconductor substrate of the solar cell; and / or, the solar cell further includes a transparent conductive layer covering the side of the first semiconductor layer and the second semiconductor layer away from the semiconductor substrate of the solar cell.

15. A photovoltaic module, characterized in that, It includes at least one solar cell and encapsulation layer as described in any one of claims 1-14.

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