Error code testing device with small signal loss

Abstract

The invention discloses an error code testing device with small signal loss, which comprises a PCB (Printed Circuit Board), a first optical module socket, a second optical module socket and an error code testing module, and is characterized in that the first optical module socket is electrically connected with the second optical module socket through the PCB; the error code test module is connected with the first optical module socket through a golden finger, the first optical module socket is connected with an external upper computer, and an optical module to be tested is connected with the second optical module socket through a golden finger. The optical module to be tested, the first optical module socket, the PCB, the second optical module socket and the error code testing module are connected without coaxial cables, and the error code testing module comprises a transceiving chip capable of generating a pseudo-random code sequence and a control unit. According to the invention, the signal transmission loss can be reduced, the error code test accuracy can be improved, the manufacturing cost of an error code test instrument can be effectively reduced, and the carrying is convenient.

Description

Technical Field

[0001] The present invention relates to the technical field of digital communication systems, and in particular to a bit error testing device with low signal loss. Background Art

[0002] With the rapid development of information technology, information transmission has become an essential part of daily life, and the reliability of information transmission is becoming increasingly important. Digital communication, due to its minimal impact on distance, excellent communication confidentiality, and strong anti-interference capabilities, has become the preferred method for transmitting information, enjoying widespread application and rapid development. Because bit errors directly undermine the accuracy of information transmission, they are the most significant factor affecting digital communication systems. Bit error meters (BERTs) are widely used as a key tool for assessing the quality of data transmission channels. In recent years, with the continuous increase in information transmission rates, BERT speeds have risen from hundreds of Mbps to hundreds of Gbps. However, the current domestic market for BERTs is limited. Currently, dedicated BERTs are connected to a test fixture via high-frequency cables to perform BERT testing on optical modules. Under existing technical solutions, dedicated BERT testing systems are specialized, difficult to carry, and very expensive, especially for testing high-speed optical modules operating at 200 Gbps, 400 Gbps, 800 Gbps, and above. The core of the test equipment is the bit error test module, which is integrated with the equipment. This is not only costly but also inconvenient to maintain. When using a coaxial cable to connect the bit error test system to the optical module to be tested and perform the test, the signal transmission path is very long due to the long coaxial cable, and the signal loss in the coaxial cable is large. The accuracy of the bit error test system needs to be further improved. Summary of the Invention

[0003] The purpose of the present invention is to provide a bit error test device with reasonable structural design and low signal loss, so as to solve the above problems existing in the prior art.

[0004] In order to solve the above technical problems, the present invention adopts the following technical solutions:

[0005] The present invention provides a bit error test device with low signal loss, comprising a PCB circuit board, a first optical module socket, a second optical module socket and a bit error test module, wherein the first optical module socket and the second optical module socket are electrically connected through the PCB circuit board, the bit error test module and the first optical module socket are connected through a gold finger, the first optical module socket is connected to an external host computer, and the optical module to be tested is connected to the second optical module socket through a gold finger, wherein no coaxial cable is connected between the optical module to be tested, the first optical module socket, the PCB circuit board, the second optical module socket and the bit error test module, and the bit error test module comprises a transceiver chip and a control unit capable of generating a pseudo-random code sequence, the transceiver chip and the control unit are connected The units are electrically connected, the control unit controls the transceiver chip and the transceiver chip generates a pseudo-random code sequence, the pseudo-random code reaches the optical module to be tested via the first optical module socket, the PCB circuit board and the second optical module socket, the pseudo-random code is photoelectrically converted into an optical signal by the optical module to be tested and output to the optical fiber interface, after passing through the optical fiber loop, the optical signal returns to the optical module to be tested, and then is photoelectrically converted into a signal to be compared, the signal to be compared reaches the transceiver chip after passing through the second optical module socket, the PCB circuit board and the first optical module socket, the transceiver chip compares the pseudo-random code sequence and the signal to be compared under the control of the control unit to obtain a bit error rate result, and the comparison result is output to the host computer through the control unit.

[0006] Furthermore, the first optical module socket and the second optical module socket are arranged on the same surface of the PCB circuit board. In this case, the first optical module socket and the second optical module socket can be arranged side by side and in parallel in the same direction, or can be arranged in a row with their openings facing away from each other.

[0007] Furthermore, the first optical module socket and the second optical module socket are arranged at corresponding positions on both sides of the PCB circuit board. The first optical module socket and the second optical module socket can be arranged on both sides of the same position of the PCB circuit board, thereby minimizing the length of the wire connecting the first optical module socket and the second optical module socket.

[0008] Furthermore, the first optical module socket and the second optical module socket are connected via a wire running through the PCB circuit board.

[0009] Furthermore, it also includes a reference clock, which is connected to the transceiver chip, and the transceiver chip is connected to a host computer that displays the eye diagram test results.

[0010] Furthermore, the reference clock is integrated into the transceiver chip.

[0011] Furthermore, the error code testing module is an optical module that has passed the test.

[0012] Compared with the prior art, the present invention has the following beneficial technical effects:

[0013] The bit error test device of the present invention simplifies and shortens the cable connection through the gold finger connection method, reduces signal transmission loss, and improves the accuracy of the bit error test. At the same time, it can effectively miniaturize and port the bit error test equipment, reduce the manufacturing cost of the bit error test device, and facilitate carrying to the site for testing.

[0014] In the bit error test device of the present invention, the first optical module socket and the second optical module socket are electrically connected through a PCB circuit board, and the first optical module socket and the second optical module socket can be arranged on the same side of the PCB circuit, which is convenient for operation and convenient for replacing the bit error test module and the bit error test module at the same time when needed; alternatively, the first optical module socket and the second optical module socket are arranged at corresponding positions on both sides of the PCB circuit board, which can minimize the length of the wire between the first optical module socket and the second optical module socket, reduce the signal loss on the wire, reduce the signal error caused by the wire loss, and improve the accuracy of the bit error test device. At this time, the wire between the first optical module socket and the second optical module socket is arranged by passing through the PCB circuit board, so that the wire between the first optical module socket and the second optical module socket can be made as short as possible, reduce the transmission loss of the signal, and improve the accuracy of the bit error test device.

[0015] In the bit error test device of the present invention, the reference clock can enable the bit error test device to provide the synchronous reference clock required for eye diagram testing, thereby providing eye diagram testing and enriching the functions of the bit error test device. At this time, the reference clock is integrated into the transceiver chip, simplifying the circuit structure and enriching the functions of the bit error test equipment.

[0016] In the bit error test device of the present invention, the optical module with intact functions after testing can be directly used as the bit error test module, which can effectively reduce the manufacturing cost of the bit error test device and the cost of the bit error test module. In addition, local materials can be used, which greatly improves the convenience of using the bit error test device. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0018] Figure 1 This is a structural diagram of a bit error test device with low signal loss according to embodiment 1 of the present invention;

[0019] Figure 2 This is a structural diagram of the bit error test device with low signal loss in direction A according to embodiment 1 of the present invention;

[0020] Figure 3 This is a schematic structural diagram of the bit error test device with low signal loss in direction B according to embodiment 1 of the present invention;

[0021] Figure 4 This is a structural diagram of a bit error test module in a bit error test device with low signal loss according to embodiment 1 of the present invention;

[0022] Figure 5 This is a structural diagram of a bit error test device with low signal loss according to embodiment 2 of the present invention.

[0023] Explanation of the accompanying symbols: 1. PCB circuit board; 2. First optical module socket; 3. Second optical module socket; 4. Error code test module; 41. Transceiver chip; 42. Control unit; 5. Optical module to be tested; 6. Reference clock. DETAILED DESCRIPTION

[0024] The following describes embodiments of the present invention in detail. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended only to explain the present invention and are not to be construed as limiting the present invention.

[0025] In the description of the present invention, it should be understood that the terms "length", "width", "inside", "outside" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "multiple" means two or more, unless otherwise clearly and specifically defined.

[0026] In the description of the present invention, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood broadly. For example, they may refer to fixed connections, detachable connections, or integral connections; they may refer to direct connections or indirect connections through an intermediate medium; they may refer to internal communication between two components or an interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0027] The technical solutions provided by various embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0028] Example 1

[0029] like Figures 1 to 4 As shown, the bit error test device with low signal loss in embodiment 1 of the present invention includes a PCB circuit board 1, a first optical module socket 2, a second optical module socket 3 and a bit error test module 4, wherein the first optical module socket 2 and the second optical module socket 3 are electrically connected through the PCB circuit board 1, the bit error test module 4 is connected to the first optical module socket 2 through a gold finger, the first optical module socket 2 is connected to an external host computer, and the optical module to be tested 5 is connected to the second optical module socket 3 through a gold finger.

[0030] Specifically, the error test module 4 includes a transceiver chip 41 capable of generating a pseudo-random code sequence and a control unit 42. The transceiver chip 41 is electrically connected to the control unit 42. The transceiver chip 41 receives the signal to be compared returned by the pseudo-random code sequence sent after passing through the optical module to be tested 5. The control unit 42 controls the transceiver chip 41 to compare the pseudo-random code sequence with the signal to be compared. The comparison result between the pseudo-random code sequence and the comparison signal is output to the host computer through the control unit 42.

[0031] Furthermore, there is no coaxial cable connection between the optical module to be tested, the first optical module socket 2 , the PCB circuit board 1 , the second optical module socket 3 and the error code test module 4 .

[0032] The bit error test device with low signal loss in embodiment 1 of the present invention can be applied to the testing of optical modules; when in use, the bit error test device is connected to a host computer, which can be a personal computer. Furthermore, the host computer adopts a portable laptop computer, so that both the bit error test device and the host computer are convenient and can be used in various environments such as laboratories, factories, and user sites.

[0033] When in use, the error test device with low signal loss in Example 1 of the present invention comprises an error test module 4 inserted into the first optical module 2 via a gold finger, an optical module to be tested 5 inserted into the second optical module socket 3, and an optical module to be tested 5 connected to an optical fiber. A host computer is connected to the error test device for setting and displaying test results. After the error test device is powered, a control unit 42 controls the transceiver chip 41, which generates a pseudo-random code sequence. The pseudo-random code passes through the first optical module socket 2, the PCB circuit board 1, and the second optical module socket 3 to reach the optical module to be tested 5. The pseudo-random code is then photoelectrically converted by the optical module to an optical signal and output to the optical fiber interface. After passing through the optical fiber loop, the optical signal returns to the optical module to be tested 5 and is then photoelectrically converted into an electrical signal, i.e., a comparison signal. The comparison signal passes through the second optical module socket 3, the PCB circuit board 1, and the first optical module socket 2 to reach the transceiver chip 41. Under the control of the control unit 42 under the transceiver chip 41, the pseudo-random code sequence and the comparison signal are compared to obtain a bit error rate result.

[0034] At this time, there is no coaxial cable connection between the optical module to be tested 5, the first optical module socket 2, the PCB circuit board 1, the second optical module socket 3 and the error test module 4, which effectively shortens the wires between the components.

[0035] Taking the 40GHz frequency signal 400G (8*50Gbps) optical module test as an example, the insertion loss value of the signal in the test is calculated, that is, the total loss of the signal in the circuit. Using traditional bit error test equipment, the signal loss of the RF cable (coaxial cable) is 2.5-3.0dB per 0.8m-1.0m, and the insertion loss of the RF connector is 0.3-0.4dB; the optical module test board trace loss is 3.5-4.5dB, and the total insertion loss of the test equipment is 6.3-7.9dB. When using this embodiment, the gold finger connection method greatly shortens the length of the wire. Among them, the optical module PCB circuit board trace loss is 2.0-2.5dB, and the loss value of the two optical module sockets is 1.0dB, for a total insertion loss of 3.0-3.5dB. That is, the insertion loss value of the present invention is only 45% of that of traditional bit error test equipment, and the reliability of signal transmission quality is greatly improved. In addition, due to the reasonable structural design of this embodiment, the cost is only 30% of that of traditional bit error test equipment. In addition, the higher the rate of the optical module to be tested, the higher the required bandwidth, and the higher the requirement for the insertion loss value. When testing optical modules at higher rates, the solution of the bit error test device of Example 1 of the present invention has more obvious advantages.

[0036] like Figure 1 As shown, the first optical module socket 2 and the second optical module socket 3 are arranged on both sides of corresponding positions of the PCB circuit board 1.

[0037] like Figure 1 、 Figure 2 、 Figure 3As shown, the first optical module socket 2 and the second optical module socket 3 are arranged at corresponding positions on both sides of the PCB circuit board 1. The socket opening direction of the first optical module socket 2 is the same as the socket opening direction of the second optical module socket 3. The first optical module socket 2 and the second optical module socket 3 are connected through the PCB circuit board 1, and the wires connecting the first optical module socket 2 and the second optical module socket 3 pass through the PCB circuit board 1.

[0038] Among them, the first optical module socket 2 and the second optical module socket 3 are arranged on both sides of the same position of the PCB circuit board 1. The length of the wire vertically passing through the PCB circuit board 1 is the shortest and the signal loss is the smallest. The length of the wire connecting the first optical module socket 2 and the second optical module socket 3 depends on the thickness of the PCB board.

[0039] Preferably, the bit error test device of embodiment 1 of the present invention further includes a reference clock 6, which is connected to the transceiver chip 41, and the transceiver chip 41 is connected to a host computer that displays the eye diagram test result.

[0040] like Figure 3 、 Figure 4 As shown, the reference clock 6 is connected to the transceiver chip 41, and a clock interface is set on the PCB circuit board 1, and the clock interface is connected to the first optical module socket 2. At this time, the reference clock 6 can be inherited in the error test module 4 or set outside the error test module 4.

[0041] When in use, the low-signal-loss bit error test device of Example 1 of the present invention comprises a clock interface connected to a host computer that displays eye diagram test results. Specifically, the transceiver chip 4 equipped with the reference clock 6 is connected to the host computer, which is also connected to the optical fiber output interface of the optical module 5 to be tested via optical fiber. Specifically, the host computer can be an oscilloscope. The host computer receives the pseudo-random code sequence signal provided by the reference clock 6 and the signal output from the optical fiber output interface. The eye diagram test results are observed by the host computer, thereby enriching the functionalities of the bit error test device and providing a more comprehensive bit error test.

[0042] In this embodiment, the reference clock 6 is integrated into the transceiver chip 41, so that the transceiver chip 41 has an eye diagram test function. When in use, the transceiver chip 41 is connected to the host computer through the gold finger and the clock interface. At the same time, the host computer is connected to the optical fiber output interface of the optical module to be tested 5 through the optical fiber to implement the eye diagram test.

[0043] In this embodiment, a tested and qualified optical module can be used as the bit error test module 4. In a specific implementation, the tested optical module as the bit error test module 4 is inserted into the first optical module socket 2, with the optical fiber interface of the bit error test module 4 left hanging. The optical module to be tested 5 is inserted into the second optical module socket 3, and the optical fiber interface of the optical module to be tested 5 is connected to the optical fiber.

[0044] During implementation of this embodiment, the bit error test device only requires dedicated circuitry other than the bit error test module 4. This dedicated circuitry, along with the host computer, can be brought to the site of use. During actual use, a qualified optical module can be inserted into the first optical module receptacle 2 as the bit error test module 4. The optical module to be tested 5 can then be inserted into the second optical module receptacle 3 for testing.

[0045] The optical module product itself is a high-value-added product with high manufacturing cost and sales price. By adopting this embodiment, the error test module 4 can be finally applied to the product or used as a product, effectively improving the utilization rate of the product. At the same time, when the error test module 4 is suddenly damaged, it can be very conveniently replaced with other optical modules that have been tested, reducing the inspection and repair costs of the error test device. At the same time, the portability, repairability, and economy of the error test device are greatly improved, and it has excellent commercial application value.

[0046] Example 2

[0047] like Figure 5 As shown, the difference between the bit error test device with low signal loss in embodiment 2 of the present invention and embodiment 1 is that the first optical module socket 2 and the second optical module socket 3 are arranged on the same side of the PCB circuit board 1, and the wire connecting the first optical module socket 2 and the second optical module socket 3 does not pass through the PCB circuit board 1.

[0048] When this embodiment is implemented, the first optical module socket 2 and the second optical module socket 3 can be set as needed. Figure 5 As shown, the sockets of the first optical module socket 2 and the second optical module socket 3 are in the same direction and parallel to each other, so as to facilitate inserting the error test module 4 and the optical module to be tested 5 into the first optical module socket 2 and the second optical module socket 3 respectively.

[0049] Among them, the relevant components of the bit error test device can all be arranged on the same side of the PCB circuit board, which not only facilitates the operation of the bit error test module 4 and the optical module to be tested 5, but also effectively reduces the manufacturing difficulty, reduces the processing steps in the manufacturing, and reduces the manufacturing cost.

[0050] Arranging the first optical module socket 2 and the second optical module socket 3 in a straight line on the PCB circuit board 1 belongs to the equivalent technical solution of this embodiment. Specifically, the socket direction of the first optical module socket 2 is opposite to the socket direction of the second optical module socket 3, and they are collinearly arranged.

[0051] The present invention's low-signal-loss bit error test device can be used for testing optical modules in the communications field. The aforementioned embodiments merely illustrate preferred embodiments of the present invention and do not limit its scope. Any modifications and improvements to the technical solution of the present invention made by persons skilled in the art without departing from the spirit of the present invention are intended to fall within the scope of protection defined by the claims.

Claims

1. A bit error test device with low signal loss, characterized in that: The invention comprises a PCB circuit board (1), a first optical module socket (2), a second optical module socket (3) and a bit error test module (4), wherein the first optical module socket (2) and the second optical module socket (3) are electrically connected via the PCB circuit board (1), the bit error test module (4) and the first optical module socket (2) are connected via a gold finger, the first optical module socket (2) is connected to an external host computer, and the optical module to be tested (5) is connected to the second optical module socket (3) via a gold finger, wherein no coaxial cable is connected between the optical module to be tested (5), the first optical module socket (2), the PCB circuit board (1), the second optical module socket (3) and the bit error test module (4), and the bit error test module (4) comprises a transceiver chip (41) capable of generating a pseudo-random code sequence and a control unit (42), the transceiver chip (41) and the control unit (42) The control unit (42) controls the transceiver chip (41) and generates a pseudo-random code sequence through the transceiver chip (41). The pseudo-random code reaches the optical module to be tested (5) through the first optical module socket (2), the PCB circuit board (1) and the second optical module socket (3). The pseudo-random code is photoelectrically converted by the optical module to be tested (5) and output to the optical fiber interface. After passing through the optical fiber loop, the optical signal returns to the optical module to be tested (5), and is then photoelectrically converted into a signal to be compared. The signal to be compared reaches the transceiver chip (41) after passing through the second optical module socket (3), the PCB circuit board (1) and the first optical module socket (2). Under the control of the control unit (42), the transceiver chip (41) compares the pseudo-random code sequence and the signal to be compared to obtain a bit error rate result. The comparison result is output to the host computer through the control unit (42).

2. The bit error test device with low signal loss according to claim 1, characterized in that: The first optical module socket (2) and the second optical module socket (3) are arranged on the same surface of the PCB circuit board (1).

3. The bit error test device with low signal loss according to claim 1, characterized in that: The first optical module socket (2) and the second optical module socket (3) are arranged at corresponding two side positions of the PCB circuit board (1).

4. The bit error test device with low signal loss according to claim 3, characterized in that: The first optical module socket (2) and the second optical module socket (3) are connected via a wire running through the PCB circuit board (1).

5. The bit error test device with low signal loss according to claim 1, characterized in that: It also includes a reference clock (6), the reference clock (6) is connected to the transceiver chip (41), and the transceiver chip (41) is connected to a host computer that displays eye diagram test results.

6. The bit error test device with low signal loss according to claim 5, characterized in that: The reference clock (6) is integrated into the transceiver chip (41).

7. The bit error test device with low signal loss according to any one of claims 1 to 6, characterized in that: The error code testing module (4) is an optical module that has passed the test.

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