Data processing method and device and electronic equipment

By adopting a dual memory solution in the electronic control unit (ECU) to store the data identifier and the verification identifier separately, the security problem of DID data during storage and reading is solved, and the reliability and robustness of the data are achieved.

CN120671205APending Publication Date: 2025-09-19BEIJING CO WHEELS TECH CO LTD
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Patent Information

Application Number
CN202410317228.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-03-19
Publication Date
2025-09-19

AI Technical Summary

Technical Problem

In the prior art, the data identifier (DID) data in the electronic control unit (ECU) lacks security protection during storage and reading, and is prone to system failure due to illegal changes or failure.

Method used

A dual memory solution is adopted to store data identifier data and theoretical verification identifier in the first memory and the second memory respectively, and data verification is performed when power is turned on again to ensure data reliability and security.

Benefits of technology

Even if the first memory fails, the data in the second memory can still be used to improve the robustness of the system, ensure the security and reliability of DID data, and prevent illegal changes.

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Abstract

The invention relates to the technical field of data processing, in particular to a data processing method and device and electronic equipment, and is used for solving the problem of how to ensure the security of DID data. The method comprises the steps of reading first data identifier data and a first theoretical verification identifier from a first memory and reading second data identifier data and a second theoretical verification identifier from a second memory under the condition of re-electrification; performing data verification on the target data to obtain an actual verification identifier corresponding to the target data; wherein the target data comprises any one of the first data identifier data and the second data identifier data; and when the first theoretical verification identifier is different from the actual verification identifier corresponding to the first theoretical verification identifier and the second theoretical verification identifier is the same as the actual verification identifier corresponding to the second theoretical verification identifier, determining that the data verification of the second data identifier in the second memory is successful.
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Description

Technical Field

[0001] The present disclosure relates to the field of data processing technology, and in particular to a data processing method, device, and electronic device. Background Art

[0002] Currently, the Data Identifier (DID) data in the Electronic Control Unit (ECU) stores critical information, requiring high reliability to prevent unauthorized changes and failures. Therefore, DID data that needs to be stored is typically stored separately in memory. This data is retained after the memory is powered off, and can be read and used after the memory is powered back on. This solution only ensures that DID data can be stored and read. If certain DID data is important and critical, and errors in it would cause major malfunctions in the ECU's operation, then this solution is not feasible.

[0003] Therefore, how to ensure the security of DID data has become an urgent problem to be solved. Summary of the Invention

[0004] In order to solve the above technical problems, the present disclosure provides a data processing method, device and electronic device.

[0005] To achieve the above objectives, the present disclosure adopts the following technical solutions:

[0006] In a first aspect, the present disclosure provides a data processing method, comprising: when power is turned on again, reading first data identifier data and a first theoretical verification identifier from a first memory, and reading second data identifier data and a second theoretical verification identifier from a second memory; performing data verification on target data to obtain an actual verification identifier corresponding to the target data; wherein the target data includes any one of the first data identifier data and the second data identifier data; when the first theoretical verification identifier and the actual verification identifier corresponding to the first theoretical verification identifier are different, and the second theoretical verification identifier and the actual verification identifier corresponding to the second theoretical verification identifier are the same, determining that the second data identifier data in the second memory has been successfully verified.

[0007] In some feasible examples, the data processing method provided by the present disclosure further includes: determining that the first data identifier data verification is successful when the first theoretical verification identifier is identical to the actual verification identifier corresponding to the first data identifier data.

[0008] In some feasible examples, the data processing method provided by the present disclosure further includes: when it is determined that the target data verification is successful, using the target data for redundant replacement protection.

[0009] In some feasible examples, the data processing method provided by the present disclosure also includes: when it is determined that the first data identifier data verification is successful and the second data identifier data verification is successful, selecting any one data identifier data from the first data identifier data and the second data identifier data for redundant replacement protection.

[0010] In some feasible examples, when power is turned on again, before reading the first data identifier data and the first theoretical verification identifier from the first memory, and reading the second data identifier data and the second theoretical verification identifier from the second memory, the data processing method provided by the present disclosure also includes: obtaining the data identifier data to be written; performing data verification on the data identifier data to be written to obtain the theoretical verification identifier corresponding to the data identifier data to be written; writing the data identifier data as the first data identifier data and the theoretical verification identifier as the first theoretical verification identifier into the first memory; writing the data identifier data as the second data identifier data and the theoretical verification identifier as the second theoretical verification identifier into the second memory.

[0011] In some feasible examples, performing data verification on the target data to obtain an actual verification identifier corresponding to the target data includes: performing data verification on the target data using a preset verification algorithm to obtain an actual verification identifier corresponding to the target data.

[0012] In a second aspect, the present disclosure provides a data processing device, comprising: a processing unit, for controlling the acquisition unit to read the first data identifier data and the first theoretical verification identifier from the first memory, and to read the second data identifier data and the second theoretical verification identifier from the second memory when the power is re-on; the processing unit, for performing data verification on the target data acquired by the acquisition unit to obtain an actual verification identifier corresponding to the target data; wherein the target data includes any one of the first data identifier data and the second data identifier data; the processing unit, for determining that the second data identifier data in the second memory is successfully verified when the first theoretical verification identifier acquired by the acquisition unit is different from the actual verification identifier corresponding to the first theoretical verification identifier acquired by the acquisition unit, and the second theoretical verification identifier acquired by the acquisition unit is the same as the actual verification identifier corresponding to the second theoretical verification identifier acquired by the acquisition unit.

[0013] In some feasible examples, the processing unit is further configured to determine that the first data identifier data verification is successful when the first theoretical verification identifier obtained by the acquisition unit is the same as the actual verification identifier corresponding to the first data identifier data obtained by the acquisition unit.

[0014] In some feasible examples, the processing unit is further configured to use the target data for redundant replacement protection when it is determined that the target data acquired by the acquisition unit has been successfully verified.

[0015] In some feasible examples, the processing unit is further configured to select any one of the first data identifier data and the second data identifier data for redundant replacement protection when it is determined that the verification of the first data identifier data is successful and the verification of the second data identifier data is successful.

[0016] In some feasible examples, the acquisition unit is also used to acquire data identifier data to be written; the processing unit is also used to perform data verification on the data identifier data to be written acquired by the acquisition unit to obtain a theoretical verification identifier corresponding to the data identifier data to be written; the processing unit is also used to use the data identifier data as the first data identifier data, and write the theoretical verification identifier as the first theoretical verification identifier into the first memory; the processing unit is also used to use the data identifier data as the second data identifier data, and write the theoretical verification identifier as the second theoretical verification identifier into the second memory.

[0017] In some feasible examples, the processing unit is specifically configured to perform data verification on the target data acquired by the acquisition unit using a preset verification algorithm to obtain an actual verification identifier corresponding to the target data.

[0018] In a third aspect, the present disclosure provides an electronic device comprising: a memory and a processor, wherein the memory is used to store a computer program; and the processor is used to enable the electronic device to implement the data processing method provided in the first aspect above when executing the computer program.

[0019] In a fourth aspect, the present disclosure provides a computer-readable storage medium, comprising: a computer program stored on the computer-readable storage medium, which, when executed by a computing device, enables the computing device to implement the data processing method provided in the first aspect above.

[0020] In a fifth aspect, the present disclosure provides a vehicle comprising any data processing device provided in the second aspect.

[0021] In this disclosure, the names of the aforementioned data processing devices do not limit the devices or functional modules themselves. In actual implementation, these devices or functional modules may appear with other names. As long as the functions of each device or functional module are similar to those disclosed herein, they are within the scope of the claims of this disclosure and their equivalents.

[0022] These and other aspects of the present disclosure will become more apparent from the following description.

[0023] The technical solution provided by the present disclosure has the following advantages compared with the existing technology:

[0024] As can be seen from the above, the data processing method provided by the present disclosure can read the first data identifier data and the first theoretical verification identifier from the first memory, and read the second data identifier data and the second theoretical verification identifier from the second memory after the vehicle terminal is powered on again. Afterwards, the vehicle terminal performs data verification on the target data to obtain the actual verification identifier corresponding to the target data; when the first theoretical verification identifier is different from the actual verification identifier corresponding to the first theoretical verification identifier, and the second theoretical verification identifier is the same as the actual verification identifier corresponding to the second theoretical verification identifier, it is determined that the second data identifier data in the second memory is successfully verified. In this way, compared with the solution of storing DID data separately in a memory, by pre-storing the data identifier data and the theoretical verification identifier in the first memory and the second memory, the data identifier data and the theoretical verification identifier are stored in the first memory and the second memory. In this way, even when the first memory fails, the data in the second memory can still be used, thereby improving the robustness of the system. Since the data identifier data stored in the first memory and the second memory are more reliable, the data identifier data is more secure, solving the problem of how to ensure the security of DID data. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0026] In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0027] Figure 1 One of the flowcharts of a data processing method provided in an embodiment of the present disclosure;

[0028] Figure 2 A schematic diagram of a scenario of a data processing method provided in an embodiment of the present disclosure;

[0029] Figure 3 A second flow chart of a data processing method provided in an embodiment of the present disclosure;

[0030] Figure 4 The third flowchart of a data processing method provided in an embodiment of the present disclosure;

[0031] Figure 5A fourth flowchart of a data processing method provided in an embodiment of the present disclosure;

[0032] Figure 6 A fifth flowchart of a data processing method provided in an embodiment of the present disclosure;

[0033] Figure 7 A sixth flowchart of a data processing method provided in an embodiment of the present disclosure;

[0034] Figure 8 A schematic structural diagram of a data processing device provided in an embodiment of the present disclosure;

[0035] Figure 9 A schematic structural diagram of a vehicle-mounted terminal provided in an embodiment of the present disclosure;

[0036] Figure 10 A schematic structural diagram of a computer program product of a data processing method provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0037] In order to more clearly understand the above-mentioned objectives, features and advantages of the present disclosure, the scheme of the present disclosure will be further described below. It should be noted that the embodiments of the present disclosure and the features therein can be combined with each other in the absence of conflict.

[0038] In the following description, many specific details are set forth to facilitate a full understanding of the present disclosure, but the present disclosure may also be implemented in other ways different from those described herein; it is obvious that the embodiments in the specification are only part of the embodiments of the present disclosure, rather than all of the embodiments.

[0039] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or device comprising the element.

[0040] The data processing method according to the embodiments of the present application is executed by a data processing device. The data processing device may be installed in a server or other device, and this embodiment is not limited to this. For example, if the data processing device is installed in an automobile, the data processing method according to the embodiments of the present disclosure is executed by the automobile's processor.

[0041] By way of example, the data processing method provided by the embodiment of the present disclosure is introduced by taking an automobile as an example in which the executing entity of the data processing method provided by the embodiment of the present disclosure is a car.

[0042] like Figure 1 As shown, the data processing method provided by the embodiment of the present disclosure includes the following steps S11-S13:

[0043] S11. When power is turned on again, the first data identifier data and the first theoretical verification identifier are read from the first memory, and the second data identifier data and the second theoretical verification identifier are read from the second memory.

[0044] In some examples, the first memory may be an electrically erasable programmable read-only memory (EEPROM), and the second memory may be a flash memory. At this time, after obtaining the DID data to be written, the DID data to be written is subjected to data verification to obtain a theoretical verification identifier corresponding to the DID data to be written. Afterwards, the DID to be written is used as the first data identifier data, and the theoretical verification identifier corresponding to the DID to be written is written into the EEPROM as the first theoretical verification identifier. At the same time, the DID to be written is used as the second data identifier data, and the theoretical verification identifier corresponding to the DID to be written is written into the Flash memory as the second theoretical verification identifier. At this time, when the vehicle-mounted terminal is powered on again, the vehicle-mounted terminal can read the first data identifier data and the first theoretical verification identifier from the EEPROM, and read the second data identifier data and the second theoretical verification identifier from the Flash memory. Furthermore, the vehicle-mounted terminal performs data verification on the target data to obtain the actual verification identifier corresponding to the target data. The vehicle terminal determines that the data verification of the second data identifier in the second memory is successful when the first theoretical verification identifier and the actual verification identifier corresponding to the first theoretical verification identifier are different, and the second theoretical verification identifier and the actual verification identifier corresponding to the second theoretical verification identifier are the same. Alternatively, the vehicle terminal determines that the data verification of the first data identifier in the first memory is successful when the first theoretical verification identifier and the actual verification identifier corresponding to the first theoretical verification identifier are the same, and the second theoretical verification identifier and the actual verification identifier corresponding to the second theoretical verification identifier are different. Alternatively, the vehicle terminal determines that the data verification of the first data identifier in the first memory has failed, and the data verification of the second data identifier in the second memory has failed when the first theoretical verification identifier and the actual verification identifier corresponding to the first theoretical verification identifier are different, and the second theoretical verification identifier and the actual verification identifier corresponding to the second theoretical verification identifier are different. Alternatively, the vehicle terminal determines that the data verification of the first data identifier in the first memory has succeeded, and the data verification of the second data identifier in the second memory has succeeded when the first theoretical verification identifier and the actual verification identifier corresponding to the first theoretical verification identifier are the same, and the second theoretical verification identifier and the actual verification identifier corresponding to the second theoretical verification identifier are the same. In this way, the reliability of the DID data can be guaranteed.

[0045] In some examples, in order to avoid the loss of DID data stored in the EEPROM after the EEPROM fails, the vehicle terminal cannot be used normally. The data processing method provided by the embodiment of the present disclosure backs up the DID data, such as: the DID data and the theoretical verification identifier corresponding to the DID data can be written in advance in the EEPROM and Flash memory respectively. For example, in an automotive electronic control unit (ECU) that meets the Unified Diagnostic Services (UDS) protocol, that is, the International Organization for Standardization (ISO) 14229 protocol, based on the UDS protocol, and as the only write interface, the DID data is written, and during the writing process, the cyclic redundancy check code (CRC) algorithm stored in the vehicle terminal is used to verify the DID data to obtain the theoretical verification identifier corresponding to the DID data, and then the DID data and the theoretical verification identifier are written to the first preset address of the EEPROM and the second preset address of the Flash memory respectively. Afterwards, when the vehicle terminal is powered on again, the first preset address in the EEPROM can be accessed to obtain the DID data and the theoretical verification identifier. At the same time, the second preset address of the Flash memory can also be accessed to obtain the DID data and the theoretical verification identifier.

[0046] In some examples, such as Figure 2 As shown, the vehicle-mounted terminal of the car includes a reading module, a verification module, a writing module, a first interface and a second interface. The first interface is used to communicate with the EEPROM, and the second interface is used to communicate with the flash memory.

[0047] In some examples, after other electronic devices establish a communication connection with the write module (such as: the electronic device establishes a communication connection with the write module of the vehicle terminal through the Internet Diagnostic Protocol (Diagnostic over Internet Protocol, DOIP)), the write module enters the extended session and starts the diagnostic unlocking function. Afterwards, the electronic device sends the DID data to be written to the write module through the target service (such as the 2E diagnostic service). Afterwards, the verification module performs data verification on the DID data to be written received by the write module to obtain the theoretical verification identifier corresponding to the DID data to be written. The write module writes the DID data to be written and the theoretical verification identifier obtained by the verification model into the target memory.

[0048] In some examples, when the target memory includes an EEPROM, the reading module can obtain the DID data and the theoretical verification identifier stored in the EEPROM through the first interface.

[0049] In some examples, when the target memory includes EEPROM and Flash memory, the reading module can obtain the DID data and theoretical verification identifier stored in the EEPROM through the first interface, and the reading module can obtain the DID data and theoretical verification identifier stored in the Flash memory through the second interface.

[0050] In some examples, when the vehicle-mounted terminal is powered on again, the reading module of the vehicle-mounted terminal obtains the DID data and the theoretical verification identifier from the target memory.

[0051] S12: Perform data verification on the target data to obtain an actual verification identifier corresponding to the target data, wherein the target data includes any one of the first data identifier data and the second data identifier data.

[0052] In some examples, a reading module of the vehicle terminal reads a first data identifier and a first theoretical verification flag from an EEPROM, and reads a second data identifier and a second theoretical verification flag from a Flash memory. Subsequently, a verification module performs a data verification on the first data identifier data read by the reading module to obtain an actual verification flag corresponding to the first data identifier data. Simultaneously, the verification module performs a data verification on the second data identifier data read by the reading module to obtain an actual verification flag corresponding to the second data identifier data.

[0053] S13. When the first theoretical verification identifier and the actual verification identifier corresponding to the first theoretical verification identifier are different, and the second theoretical verification identifier and the actual verification identifier corresponding to the second theoretical verification identifier are the same, determine that the data verification of the second data identifier in the second memory is successful.

[0054] In some examples, when the verification module determines that the first theoretical verification identifier is different from the actual verification identifier corresponding to the first theoretical verification identifier, and the second theoretical verification identifier is the same as the actual verification identifier corresponding to the second theoretical verification identifier, the verification module determines that the data verification of the second data identifier in the second memory is successful. Alternatively, when the verification module determines that the first theoretical verification identifier is the same as the actual verification identifier corresponding to the first theoretical verification identifier, and the second theoretical verification identifier is different from the actual verification identifier corresponding to the second theoretical verification identifier, the verification module determines that the data verification of the first data identifier in the first memory is successful. Alternatively, when the verification module determines that the first theoretical verification identifier is different from the actual verification identifier corresponding to the first theoretical verification identifier, and the second theoretical verification identifier is different from the actual verification identifier corresponding to the second theoretical verification identifier, the verification module determines that the data verification of the first data identifier in the first memory has failed, and the data verification of the second data identifier in the second memory has failed. Alternatively, when the verification module determines that the first theoretical verification identifier is the same as the actual verification identifier corresponding to the first theoretical verification identifier, and the second theoretical verification identifier is the same as the actual verification identifier corresponding to the second theoretical verification identifier, the verification module determines that the data verification of the first data identifier in the first memory has succeeded, and the data verification of the second data identifier in the second memory has succeeded.

[0055] In some examples, when the first memory is an EEPROM and the second memory is a Flash memory, if the verification module determines that the first theoretical verification identifier and the actual verification identifier corresponding to the first theoretical verification identifier are identical, the first data identifier is determined to have successfully verified. In this case, the vehicle terminal can normally activate the vehicle function corresponding to the DID data according to the DID data obtained from the EEPROM and / or display the same vehicle information, such as the vehicle model and production date, according to the DID data. If the verification module determines that the first theoretical verification identifier and the actual verification identifier corresponding to the first theoretical verification identifier are not identical, the first data identifier is determined to have failed verification. In this case, the verification module can send a prompt message to the vehicle terminal indicating that the DID data verification failed, so that the user can promptly seek vehicle repair based on the prompt message. If the verification module determines that the second theoretical verification identifier and the actual verification identifier corresponding to the second theoretical verification identifier are identical, the second data identifier is determined to have successfully verified. In this case, the vehicle terminal can normally activate the vehicle function corresponding to the DID data according to the DID data obtained from the Flash memory and / or display the same vehicle information, such as the vehicle model and production date, according to the DID data. If the verification module determines that the second theoretical verification identifier is not identical to the actual verification identifier corresponding to the second theoretical verification identifier, the verification of the second data identifier is determined to have failed. In this case, the verification module may send a prompt message to the vehicle terminal indicating that the DID data verification has failed, so that the user can promptly seek vehicle repair based on the prompt message.

[0056] In some examples, when the first memory is an EEPROM and the second memory is a Flash memory, the verification module needs to perform data verification on the DID data stored in the EEPROM (e.g., first data) and the DID data stored in the Flash memory (e.g., second data). For example, the verification module performs data verification on the first data to obtain a first actual verification identifier corresponding to the data identifier data. The verification module then determines that the data verification of the data identifier is successful if the first actual verification identifier and the theoretical verification identifier are identical. Simultaneously, the verification module performs data verification on the second data to obtain a second actual verification identifier corresponding to the data identifier data. The verification module then determines that the data verification of the data identifier is successful if the second actual verification identifier and the theoretical verification identifier are identical. Because the second data is a backup of the first data, the DID data obtained from the EEPROM can be used preferentially to normally activate the vehicle function corresponding to the DID data and / or display the same vehicle information, such as vehicle model and production date, according to the DID data. Alternatively, the verification module determines that the data verification of the data identifier has failed if the first actual verification identifier and the theoretical verification identifier are different. Conversely, the verification module determines that the data verification of the data identifier is successful if the second actual verification identifier and the theoretical verification identifier are identical. In this case, the DID data obtained from the Flash memory can be prioritized to enable the corresponding vehicle functions in the DID data normally and / or display the same vehicle information, such as the vehicle model and production date, according to the DID data. Alternatively, the verification module determines that the data identifier verification is successful if the first actual verification identifier and the theoretical verification identifier are identical. Meanwhile, the verification module determines that the data identifier verification has failed if the second actual verification identifier and the theoretical verification identifier are different. In this case, the DID data obtained from the EEPROM can be prioritized to enable the corresponding vehicle functions in the DID data normally and / or display the same vehicle information, such as the vehicle model and production date, according to the DID data. Alternatively, the verification module determines that the data identifier verification has failed if the first actual verification identifier and the theoretical verification identifier are different. Meanwhile, the verification module determines that the data identifier verification has failed if the second actual verification identifier and the theoretical verification identifier are different. In this case, the verification module can send a prompt message to the vehicle terminal indicating that the DID data verification has failed, so that the user can promptly seek vehicle repair based on the prompt message.

[0057] As can be seen from the above, the data processing method provided by this disclosure, compared to solutions that store DID data separately in a single memory, pre-stores data identifier data and a theoretical verification identifier in a first memory and a second memory. This improves the robustness of the system by allowing the data in the second memory to be used even if the first memory fails. Due to the higher reliability of the data identifier data stored in the first and second memories, the data identifier data is more secure, solving the problem of how to ensure the security of DID data.

[0058] In some possible implementations, combining Figure 1 ,like Figure 3 As shown, the data processing method provided by the embodiment of the present disclosure also includes S14.

[0059] S14: When the first theoretical verification identifier is identical to the actual verification identifier corresponding to the first data identifier data, determine that the verification of the first data identifier data is successful.

[0060] In some examples, when the first theoretical verification identifier is identical to the actual verification identifier corresponding to the first data identifier data, it is determined that the verification of the first data identifier data is successful, indicating that the first data identifier data stored in the first memory has not been illegally modified, and therefore the first data identifier data can be used for redundancy replacement protection.

[0061] In some possible implementation examples, combined with Figure 3 ,like Figure 4 As shown, the data processing method provided by the embodiment of the present disclosure also includes S15.

[0062] S15. When it is determined that the target data verification is successful, the target data is used for redundant replacement protection.

[0063] In some examples, when the target data is first data identifier data, if the first data identifier data is successfully verified, the first data identifier data can be used for redundancy replacement protection. Alternatively, when the target data includes second data identifier data, if the second data identifier data is successfully verified, indicating that the second data identifier data stored in the second memory has not been illegally changed, the second data identifier data can be used for redundancy replacement protection.

[0064] In some possible implementations, combining Figure 3 ,like Figure 5 As shown, the data processing method provided by the embodiment of the present disclosure also includes S16.

[0065] S16. When it is determined that the verification of the first data identifier data is successful and the verification of the second data identifier data is successful, select any one of the first data identifier data and the second data identifier data for redundant replacement protection.

[0066] In some examples, if the verification of the first data identifier data is successful and the verification of the second data identifier data is successful, it indicates that the first data identifier data stored in the first memory has not been illegally changed, and the second data identifier data stored in the second memory has not been illegally changed. Therefore, either the first data identifier data or the second data identifier data can be selected for redundancy replacement protection.

[0067] In some possible implementations, combining Figure 1 ,like Figure 6 As shown, the data processing method provided by the embodiment of the present disclosure also includes S17-S20.

[0068] S17. Obtain data identifier data to be written.

[0069] S18: Perform data verification on the data identifier data to be written to obtain a theoretical verification identifier corresponding to the data identifier data to be written.

[0070] S19. Write the data identifier data as the first data identifier data and the theoretical verification identifier as the first theoretical verification identifier into the first memory.

[0071] S20: Write the data identifier data as the second data identifier data and the theoretical verification identifier as the second theoretical verification identifier into the second memory.

[0072] In some examples, the data processing methods provided by embodiments of the present invention can be used to implement redundant protection for some diagnostic DID data. Compared to solutions that store data in a single memory, this dual-memory backup solution allows data from one memory to be used if one fails, improving system robustness. The addition of an additional CRC storage area can identify unauthorized data changes, improving data reliability.

[0073] In some possible implementations, combining Figure 1 ,like Figure 7 As shown, the above S12 can be specifically implemented through the following S120.

[0074] S120: Perform data verification on the target data using a preset verification algorithm to obtain an actual verification identifier corresponding to the target data.

[0075] In some examples, the target data can be input into the verification model for data verification to obtain the actual verification mark corresponding to the target data. The training process of the verification model is as follows:

[0076] Acquire training sample data and a marking result of the training sample data; wherein the training sample data includes training data identifier data, and the marking result includes a marking verification identifier corresponding to the training data identifier data.

[0077] The training sample data is input into the neural network model for learning to obtain the prediction results of the neural network model for the training sample data.

[0078] Based on the prediction results and labeling results, the network parameters of the neural network model are adjusted until the neural network model converges to obtain a verification model.

[0079] The preset verification algorithm includes at least one of a CRC algorithm and a Hash algorithm.

[0080] As can be seen from the foregoing, the data processing method provided by the disclosed embodiments provides a dual-memory backup solution, compared to solutions that store data in a single memory. This allows the use of data from the other memory in the event of a failure in one memory, thereby improving system robustness. The addition of a DID data theoretical verification flag allows for the identification of unauthorized changes to DID data, thereby improving the reliability of DID data.

[0081] The above mainly introduces the solution provided by the embodiment of the present disclosure from the perspective of method. In order to realize the above functions, it includes hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should easily realize that, in combination with the units and algorithm steps of each example described in the embodiments disclosed herein, the present disclosure can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in a hardware or computer software driven hardware manner depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present disclosure.

[0082] The embodiments of the present disclosure can divide the data processing device into functional modules according to the above-mentioned method examples. For example, each functional module can be divided according to each function, or two or more functions can be integrated into one processing module. The above-mentioned integrated modules can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of modules in the embodiments of the present disclosure is schematic and is only a logical functional division. In actual implementation, there may be other division methods.

[0083] like Figure 8FIG. 1 is a schematic structural diagram of a data processing device 10 provided in an embodiment of the present disclosure, comprising a processing unit 101 and an acquisition unit 102 .

[0084] The processing unit 101 is used to control the acquisition unit 102 to read the first data identifier data and the first theoretical verification identifier from the first memory, and to read the second data identifier data and the second theoretical verification identifier from the second memory when the power is turned on again; the processing unit 101 is also used to perform data verification on the target data acquired by the acquisition unit 102 to obtain the actual verification identifier corresponding to the target data; wherein the target data includes any one of the first data identifier data and the second data identifier data; the processing unit 101 is also used to determine that the second data identifier data in the second memory is successfully verified when the first theoretical verification identifier acquired by the acquisition unit 102 is different from the actual verification identifier corresponding to the first theoretical verification identifier acquired by the acquisition unit 102, and the second theoretical verification identifier acquired by the acquisition unit 102 is the same as the actual verification identifier corresponding to the second theoretical verification identifier acquired by the acquisition unit 102.

[0085] In some feasible examples, the processing unit 101 is further used to determine that the first data identifier data verification is successful when the first theoretical verification identifier obtained by the acquisition unit 102 is the same as the actual verification identifier corresponding to the first data identifier data obtained by the acquisition unit 102.

[0086] In some feasible examples, the processing unit 101 is further configured to use the target data for redundancy replacement protection when it is determined that the target data obtained by the obtaining unit 102 has been successfully verified.

[0087] In some feasible examples, the processing unit 101 is further configured to select any one data identifier data from the first data identifier data and the second data identifier data for redundant replacement protection when it is determined that the first data identifier data verification is successful and the second data identifier data verification is successful.

[0088] In some feasible examples, the acquisition unit 102 is also used to acquire data identifier data to be written; the processing unit 101 is also used to perform data verification on the data identifier data to be written acquired by the acquisition unit 102 to obtain a theoretical verification identifier corresponding to the data identifier data to be written; the processing unit 101 is also used to use the data identifier data as the first data identifier data, and write the theoretical verification identifier as the first theoretical verification identifier into the first memory; the processing unit 101 is also used to use the data identifier data as the second data identifier data, and write the theoretical verification identifier as the second theoretical verification identifier into the second memory.

[0089] In some feasible examples, the processing unit 101 is specifically configured to perform data verification on the target data obtained by the obtaining unit 102 using a preset verification algorithm to obtain an actual verification identifier corresponding to the target data.

[0090] Among them, all relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module, and its role will not be repeated here.

[0091] Of course, the data processing device 10 provided in the embodiments of the present disclosure includes but is not limited to the above modules. For example, the data processing device 10 may further include a storage unit 103. The storage unit 103 may be used to store program code of the data processing device 10, and may also be used to store data generated during the operation of the data processing device 10, such as data in a write request.

[0092] Figure 9 A schematic diagram of the structure of a vehicle-mounted terminal provided by an embodiment of the present disclosure is shown in FIG. Figure 9 As shown, the vehicle-mounted terminal may include: at least one processor 51 , a memory 52 , a communication interface 53 and a communication bus 54 .

[0093] The following combination Figure 9 A detailed introduction to the various components of the vehicle terminal:

[0094] The processor 51 is the control center of the electronic device 10 and can be a single processor or a collective term for multiple processing elements. For example, the processor 51 is a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present disclosure, such as one or more DSPs or one or more field programmable gate arrays (FPGAs).

[0095] In a specific implementation, as an embodiment, the processor 51 may include one or more CPUs, such as Figure 9 Also, as an embodiment, the electronic device may include multiple processors, such as Figure 9 5. Each of these processors can be a single-core processor (Single-CPU) or a multi-core processor (Multi-CPU). A processor here can refer to one or more devices, circuits, and / or processing cores for processing data (e.g., computer program instructions).

[0096] The memory 52 may be a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a random access memory (RAM) or other type of dynamic storage device that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compact disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory 52 may be independent and connected to the processor 51 via a communication bus 54. The memory 52 may also be integrated with the processor 51.

[0097] In a specific implementation, the memory 52 is used to store the data disclosed herein and execute the software programs disclosed herein. The processor 51 can execute various functions of the air conditioner by running or executing the software programs stored in the memory 52 and calling the data stored in the memory 52.

[0098] The communication interface 53 uses any transceiver or other device for communicating with other devices or communication networks, such as a Radio Access Network (RAN), a Wireless Local Area Network (WLAN), a terminal, or the cloud. The communication interface 53 may include an acquisition unit to implement the acquisition function.

[0099] The communication bus 54 can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus. This bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 9 Only one thick line is used in the diagram, but this does not mean that there is only one bus or one type of bus.

[0100] As an example, combine Figure 8The function implemented by the acquisition unit 102 in the data processing device 10 is the same as Figure 9 The function of the communication interface 53 in the data processing device 10 is the same as that of the processing unit 101 in the data processing device 10. Figure 9 The function of the processor 51 in the data processing device 10 is the same as that of the storage unit 103 in the data processing device 10. Figure 9 The function of the memory 52 in is the same.

[0101] Another embodiment of the present disclosure further provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a computing device, the computing device executes the mode switching method shown in the above method embodiment.

[0102] In some embodiments, the disclosed methods may be implemented as computer program instructions encoded in a machine-readable format on a computer-readable storage medium or on other non-transitory media or articles of manufacture.

[0103] Figure 10 The figure schematically shows a conceptual partial view of a computer program product provided by an embodiment of the present disclosure, wherein the computer program product includes a computer program for executing a computer process on a computing device.

[0104] In one embodiment, the computer program product is provided using a signal bearing medium 410. The signal bearing medium 410 may include one or more program instructions that, when executed by one or more processors, may provide the above-described Figure 1 Thus, for example, reference to Figure 1 In the embodiment shown in , one or more features of S11-S13 may be undertaken by one or more instructions associated with the signal bearing medium 410. In addition, Figure 10 The program instructions in also describe example instructions.

[0105] In some examples, signal-bearing medium 410 may include computer-readable medium 411, such as, but not limited to, a hard drive, a compact disk (CD), a digital video disk (DVD), a digital tape, a memory, a read-only memory (ROM), a random access memory (RAM), and the like.

[0106] In some implementations, signal bearing medium 410 may include computer recordable medium 412 such as, but not limited to, memory, read / write (R / W) CD, R / W DVD, or the like.

[0107] In some embodiments, signal bearing medium 410 may include communication medium 413 such as, but not limited to, digital and / or analog communication media (eg, fiber optic cables, waveguides, wired communication links, wireless communication links, etc.).

[0108] Signal bearing medium 410 may be communicated by a wireless form of communication medium 413 (eg, a wireless communication medium conforming to the IEEE 802.41 standard or other transmission protocols). The one or more program instructions may be, for example, computing device executable instructions or logic implementing instructions.

[0109] In some examples, such as for Figure 10 The depicted data processing apparatus 10 may be configured to provide various operations, functions, or actions in response to one or more program instructions via computer-readable media 411 , computer-recordable media 412 , and / or communication media 413 .

[0110] Through the description of the above implementation methods, technical personnel in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0111] In the several embodiments provided in the present disclosure, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the modules or units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0112] The units described as separate components may or may not be physically separate, and the components shown as units may be one physical unit or multiple physical units, that is, they may be located in one place or distributed in multiple places. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0113] In addition, the functional units in the various embodiments of the present disclosure may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0114] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of the embodiment of the present disclosure is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling a device (which can be a single-chip microcomputer, chip, etc.) or a processor to execute all or part of the steps of the method described in each embodiment of the present disclosure. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a ROM, a RAM, a magnetic disk or an optical disk.

[0115] The foregoing description is intended only to provide specific embodiments of the present disclosure, intended to enable those skilled in the art to understand and implement the present disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure is not intended to be limited to the embodiments described herein, but rather to be construed in the broadest manner consistent with the principles and novel features disclosed herein.

Claims

1. A data processing method, characterized in that: include: When the power is turned on again, the first data identifier data and the first theoretical verification flag are read from the first memory, and the second data identifier data and the second theoretical verification flag are read from the second memory; Performing data verification on target data to obtain an actual verification identifier corresponding to the target data; wherein the target data includes any one of the first data identifier data and the second data identifier data; When the first theoretical verification identifier is different from the actual verification identifier corresponding to the first theoretical verification identifier, and the second theoretical verification identifier is the same as the actual verification identifier corresponding to the second theoretical verification identifier, it is determined that the data verification of the second data identifier in the second memory is successful.

2. The data processing method according to claim 1, wherein: The method further comprises: In a case where the first theoretical verification identifier is identical to the actual verification identifier corresponding to the first data identifier data, it is determined that the verification of the first data identifier data is successful.

3. The data processing method according to claim 2, characterized in that: The method further comprises: When it is determined that the target data verification is successful, the target data is used for redundancy replacement protection.

4. The data processing method according to claim 2, wherein: The method further comprises: When it is determined that the first data identifier data verification is successful and the second data identifier data verification is successful, any one of the first data identifier data and the second data identifier data is selected for redundant replacement protection.

5. The data processing method according to claim 1, wherein: In the case of powering on again, before reading the first data identifier data and the first theoretical verification identifier from the first memory and reading the second data identifier data and the second theoretical verification identifier from the second memory, the method further comprises: Get the data identifier data to be written; Performing data verification on the data identifier data to be written to obtain a theoretical verification identifier corresponding to the data identifier data to be written; Writing the data identifier data as first data identifier data and the theoretical verification identifier as a first theoretical verification identifier into a first memory; The data identifier data is used as the second data identifier data, and the theoretical verification identifier is written into the second memory as the second theoretical verification identifier.

6. The data processing method according to claim 1, wherein: The performing data verification on the target data to obtain an actual verification identifier corresponding to the target data includes: The target data is verified using a preset verification algorithm to obtain an actual verification identifier corresponding to the target data.

7. A data processing device, characterized in that: include: a processing unit, configured to control the acquisition unit to read the first data identifier data and the first theoretical verification identifier from the first memory, and to read the second data identifier data and the second theoretical verification identifier from the second memory, when the power is turned on again; The processing unit is further configured to perform data verification on the target data obtained by the obtaining unit to obtain an actual verification identifier corresponding to the target data; wherein the target data includes any one of the first data identifier data and the second data identifier data; The processing unit is also used to determine that the data verification of the second data identifier in the second memory is successful when the first theoretical verification identifier obtained by the acquisition unit is different from the actual verification identifier corresponding to the first theoretical verification identifier obtained by the acquisition unit, and the second theoretical verification identifier obtained by the acquisition unit is the same as the actual verification identifier corresponding to the second theoretical verification identifier obtained by the acquisition unit.

8. An electronic device, characterized in that: include: A memory and a processor, wherein the memory is used to store a computer program; and the processor is used to enable the electronic device to implement the data processing method according to any one of claims 1 to 6 when executing the computer program.

9. A computer-readable storage medium, characterized in that include: The computer-readable storage medium stores a computer program, and when the computer program is executed by a computing device, the computing device implements the data processing method according to any one of claims 1 to 6.

10. A vehicle comprising the data processing device according to claim 7.