Dimming data transmission method, backlight system and display equipment
By sending multi-bit dimming data packets in the display device and using sampling control signals and clock signals to determine the target dimming data, the problem of low local dimming data transmission efficiency is solved, the transmission speed and device performance are improved, and electromagnetic interference is reduced.
Patent Information
- Application Number
- CN202510938726.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-08
- Publication Date
- 2025-09-23
- Estimated Expiration
- 2045-07-08
AI Technical Summary
In the existing technology, the transmission method of local dimming data has the problems of long overall transmission time and low transmission efficiency, which leads to delayed screen brightness adjustment and inaccurate dynamic scene dimming of high-performance display devices, affecting the performance of the display devices.
During the display cycle of a frame of image, multiple dimming data packets are continuously sent through a single signal line. Each data packet contains N bits of dimming data. The sampling control signal and clock signal generated by the dimmer are used to determine the target dimming data, reduce the signal value jump frequency, and improve transmission efficiency.
The overall transmission time of dimming data is shortened, the transmission efficiency is improved, the response speed under local dimming technology is increased, the display performance of the display device is improved, and the electromagnetic interference problem is reduced.
Smart Images

Figure CN120690148A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of display technology, and in particular to a dimming data transmission method, a backlight system and a display device. Background Art
[0002] With the rapid development of image display technology, high frame rates and high resolutions have become the core direction for display device performance upgrades. However, while high-performance display devices achieve smoothness, fineness, and high contrast, they also increase the complexity of image data processing and transmission, placing higher demands on the efficiency of data transmission within the display devices.
[0003] In the prior art, to simplify the hardware connections within display devices, a single signal line is typically used to connect the dimming controller to the dimmer. Under this design architecture, when local dimming (Local Dimmimg) technology is used for backlight control, the dimming controller sends local dimming data (Local DimmimgData) to the dimmer on a bit-by-bit basis. The dimmer determines the transmitted value by identifying the value corresponding to the sampling point in the single-bit data. To ensure the accuracy of sampling point identification, boundary times must be set on both sides of the single-bit data detection interval to distinguish the detection intervals corresponding to different data values.
[0004] However, this mechanism significantly increases the time required to transmit single-bit data. When processing the massive amount of local dimming data required by high-performance display devices, the overall transmission time is long and the transmission efficiency is low. This will restrict the real-time performance and response speed of local dimming, resulting in display problems such as brightness adjustment delays and inaccurate dimming in dynamic scenes, causing poor display performance of the display device. Summary of the Invention
[0005] The present invention provides a dimming data transmission method, a backlight system and a display device, which are used to solve the problems of long overall transmission time and low transmission efficiency in the existing local dimming data transmission method.
[0006] In a first aspect, an embodiment of the present invention provides a method for transmitting dimming data, which is applied to a backlight system. The backlight system includes a dimming controller and a dimmer, and the dimmer is electrically connected to the dimming controller via a single signal line. The method includes:
[0007] During a display period of a frame image, the dimming controller continuously sends a plurality of dimming data packets to the dimmer after sending a frame start identifier to the dimmer, wherein each dimming data packet includes a synchronization signal and N bits of dimming data, where N is a positive integer and N ≥ 2;
[0008] The dimmer determines target dimming data based on a sampling control signal and a dimming data packet received by the dimmer, wherein the sampling control signal at least includes a first clock signal generated by the dimmer itself.
[0009] In the dimming data transmission method provided in an embodiment of the present invention, the dimming controller sends a dimming data packet including N bits of dimming data to the dimmer. In this way, each dimming data packet sent can simultaneously transmit multiple bits of dimming data. Compared with the traditional single-bit transmission method of dimming data, the overall transmission time of the dimming data can be shortened and the overall transmission efficiency of the dimming data can be improved. Especially in high-resolution and high-frame rate display devices, the improvement of the dimming data transmission efficiency can improve the response speed of the backlight system under local dimming technology and improve the display performance of the display device. In addition, by packaging and continuously transmitting multi-bit dimming data and setting a synchronization signal in each dimming data packet, there is no need to set a synchronization signal for each bit of dimming data. In this way, during the overall transmission process of the dimming data, the level jump frequency will be reduced, thereby alleviating the EMI (Electromagnetic Interference) problem of the system and improving the system performance of the display device.
[0010] In some embodiments, the sampling control signal further includes a clock mode signal, and the clock mode signal is generated by the dimming controller;
[0011] The dimmer determines target dimming data based on the sampled control signal and the dimming data packet received by the dimmer, including:
[0012] The dimmer determines a plurality of target sampling positions according to the clock mode signal and the first clock signal;
[0013] The dimmer samples the dimming data packet at the plurality of target sampling positions to obtain N sampling data;
[0014] The dimmer generates the target dimming data according to the sampling data determined by the dimmer itself.
[0015] In the above-described embodiment, the dimmer uses the clock mode signal and the first clock signal to determine multiple target sampling positions. At these target sampling positions, the dimmer samples the multi-bit dimming data in a dimming data packet to obtain multiple sampled data, thereby enabling parsing of the dimming data packet containing the multi-bit dimming data. Because the target sampling positions are determined in real time based on the clock mode signal and the first clock signal, even if the frequency of the first clock signal generated by the oscillator within the dimmer has some deviation due to semiconductor process errors, the accuracy of the determined target sampling positions can be guaranteed, thereby ensuring the accuracy of the sampled data obtained at the target sampling positions.
[0016] In some embodiments, the dimmer determines a plurality of target sampling positions according to the clock mode signal and the first clock signal, including:
[0017] The dimmer determines a plurality of target count values based on the first clock signal and the clock mode signal, wherein a period of the first clock signal is smaller than a period of the clock mode signal;
[0018] The dimmer determines the target sampling position according to any two adjacent target count values among the multiple target count values.
[0019] In the above embodiment, the dimmer uses the first clock signal and the clock mode signal to determine multiple target count values, and determines a target sampling position based on every two adjacent target count values, thereby achieving accurate determination of the target sampling position, ensuring that the target sampling position is located in the middle position of the 1-bit dimming data, and ensuring the accuracy of sampling.
[0020] In some embodiments, the dimmer determines a plurality of target count values based on the first clock signal and the clock mode signal, including:
[0021] The dimmer uses the time corresponding to the first level transition edge of the clock mode signal as the starting time to count the period of the first clock signal;
[0022] The dimmer determines the multiple target count values according to the cycle count values of the first clock signal corresponding to multiple target moments, wherein the multiple target moments are moments corresponding to non-first level transition edges of the clock mode signal.
[0023] In the above embodiment, the first clock signal is used to count the time between the first level transition edge of the clock mode signal and each non-first level transition edge to obtain multiple target count values. This allows the target sampling positions to be accurately determined by determining the multiple target count values in real time, even if the frequency of the first clock signal slightly shifts during the display process. This eliminates the need to set fixed sampling positions. Regardless of the situation, as long as the intervals between target sampling positions meet the minimum sampling interval, the accuracy of the sampled data obtained at the target sampling positions can be guaranteed.
[0024] In some embodiments, the dimmer determines the target sampling position according to any two adjacent target count values among the multiple target count values, including:
[0025] The dimmer determines a third target count value according to an average of a first target count value and a second target count value, wherein the first target count value and the second target count value are any two adjacent target count values among the multiple target count values, and the first target count value is smaller than the second target count value;
[0026] The dimmer determines the target sampling position based on the third target count value and the dimming data packet, wherein the time length between the target sampling position and the starting position is equal to the time length corresponding to the third target count value cycle of the first clock signal, and the starting position is determined by the dimmer according to the synchronization signal in the dimming data packet.
[0027] In the above embodiment, since multiple target count values are determined in real time based on the clock mode signal and the first clock signal, a target sampling position is determined by using every two adjacent target count values. This can ensure that the target sampling position always corresponds to the middle position of the 1-bit dimming data of the dimming data packet. In this way, in the subsequent process, data sampling of the dimming data packet is performed at the target sampling position, which can ensure the accuracy of the sampling results and achieve accurate analysis of the dimming data packet.
[0028] In some embodiments, after the dimming controller sends a frame start identifier and before continuously sending multiple dimming data packets, the method further includes:
[0029] The dimming controller sends the clock mode signal to the dimmer, wherein the time length between any two adjacent level transition edges in the clock mode signal is equal to the time length corresponding to 1 bit of dimming data.
[0030] In the above embodiment, the interval between any two adjacent level jump edges in the clock mode signal is set to be consistent with the interval corresponding to 1 bit of dimming data, and the target sampling position determined according to the clock mode signal will always correspond to the middle position of two adjacent level jump edges in the clock mode signal. In this way, the dimming data packet is sampled at the target sampling position, which can ensure that the sampled data is obtained at the middle position of the 1-bit dimming data, which has higher accuracy and greater versatility.
[0031] In some embodiments, the dimmer determines target dimming data based on the sampled control signal and the dimming data packet received by the dimmer, including:
[0032] The dimmer detects the dimming data packet received by the dimmer, and after detecting the synchronization signal, samples the dimming data packet at a plurality of preset sampling positions based on the first clock signal to obtain N sampled data;
[0033] The dimmer generates the target dimming data according to the sampling data determined by the dimmer itself;
[0034] The frequency difference between the first clock signal and the second clock signal satisfies a preset error threshold, the second clock signal is generated by the dimming controller, and the second clock signal is used for sending the dimming data packet.
[0035] In the above embodiment, the first clock signal generated by the dimmer itself can be used to sample the dimming data packet at a preset sampling position. In this case, by ensuring that the frequency error between the first clock signal and the second clock signal generated by the dimming controller meets the preset error threshold, it is possible to ensure that continuous multi-bit dimming data is correctly received and parsed, thereby ensuring the accuracy of the sampled data.
[0036] In some embodiments, in the dimming data packet, the synchronization signal is located before the N bits of dimming data;
[0037] In the N-bit dimming data, the time length corresponding to 1 bit of dimming data is equal to the time length corresponding to M cycles of the first clock signal; wherein M is a positive integer, and M≥6.
[0038] In the above embodiment, by setting the minimum time interval required for synchronization of each bit of dimming data, that is, setting the time length corresponding to 1 bit of dimming data to be consistent with the time length of M cycles of the first clock signal, it is possible to effectively improve the overall transmission speed of the dimming data while ensuring stable detection of the dimming data, avoiding the occurrence of dimming data recognition errors in the dimmer, and improving the system performance of the display device.
[0039] In a second aspect, an embodiment of the present invention provides a backlight system, including a dimming controller and a dimmer, wherein:
[0040] The dimmer is electrically connected to the dimming controller via a single signal line;
[0041] The dimming controller is configured to: within a display period of a frame image, after sending a frame start identifier to the dimmer, continuously send a plurality of dimming data packets to the dimmer, wherein each of the dimming data packets includes a synchronization signal and N bits of dimming data, where N is a positive integer and N ≥ 2;
[0042] The dimmer is configured to determine target dimming data based on a sampling control signal and a dimming data packet received by the dimmer, wherein the sampling control signal at least includes a first clock signal generated by the dimmer itself.
[0043] In some embodiments, the sampling control signal further includes a clock mode signal, and the clock mode signal is generated by the dimming controller and is specifically used for:
[0044] determining a plurality of target sampling positions according to the clock mode signal and the first clock signal;
[0045] Sampling the dimming data packet at the plurality of target sampling positions to obtain N sampling data;
[0046] The target dimming data is generated according to the sampling data determined by itself.
[0047] In some embodiments, the dimmer is specifically configured to:
[0048] determining a plurality of target count values based on the first clock signal and the clock mode signal, wherein a period of the first clock signal is smaller than a period of the clock mode signal;
[0049] The target sampling position is determined according to any two adjacent target count values among the multiple target count values.
[0050] In some embodiments, the dimmer is specifically configured to:
[0051] Taking the time corresponding to the first level transition edge of the clock mode signal as the starting time, counting the period of the first clock signal;
[0052] The multiple target count values are determined according to the cycle count values of the first clock signal corresponding to multiple target moments, wherein the multiple target moments are moments corresponding to non-first level transition edges of the clock mode signal.
[0053] In some embodiments, the dimmer is specifically configured to:
[0054] determining a third target count value according to an average of a first target count value and a second target count value, wherein the first target count value and the second target count value are any two adjacent target count values among the multiple target count values, and the first target count value is smaller than the second target count value;
[0055] Based on the third target count value and the dimming data packet, the target sampling position is determined, wherein the time length between the target sampling position and the starting position is equal to the time length corresponding to the third target count value cycle of the first clock signal, and the starting position is determined by the dimmer according to the synchronization signal in the dimming data packet.
[0056] In some embodiments, the dimming controller is further configured to:
[0057] The clock mode signal is sent to the dimmer, wherein a time length between any two adjacent level transition edges in the clock mode signal is equal to a time length corresponding to 1 bit of dimming data.
[0058] In some embodiments, the dimmer is specifically configured to:
[0059] detecting the dimming data packet received by itself, and after detecting the synchronization signal, sampling the dimming data packet at a plurality of preset sampling positions based on the first clock signal to obtain N sampled data;
[0060] generating the target dimming data according to the sampling data determined by itself;
[0061] The frequency difference between the first clock signal and the second clock signal satisfies a preset error threshold, the second clock signal is generated by the dimming controller, and the second clock signal is used for sending the dimming data packet.
[0062] In some embodiments, in the dimming data packet, the synchronization signal is located before the N bits of dimming data;
[0063] In the N-bit dimming data, the time length corresponding to 1 bit of dimming data is equal to the time length corresponding to M cycles of the first clock signal; wherein M is a positive integer, and M≥6.
[0064] In a third aspect, an embodiment of the present invention provides a display device, comprising a backlight system as described in any one of the embodiments of the second aspect.
[0065] For the technical effects that may be achieved by the backlight system disclosed in the second aspect and the display device disclosed in the third aspect, please refer to the above description of the technical effects that may be achieved by the first aspect or various possible solutions in the first aspect, and no further details will be given here. BRIEF DESCRIPTION OF THE DRAWINGS
[0066] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0067] Figure 1A A schematic diagram of a display device for image display provided in the related art;
[0068] Figure 1B A schematic diagram of the structure of a backlight system inside a display device provided in the related art;
[0069] Figure 1C A schematic structural diagram of another backlight system inside a display device provided in the related art;
[0070] Figure 2 A schematic diagram of a local dimming data transmission method provided for related technologies;
[0071] Figure 3 A schematic structural diagram of a backlight system provided by an embodiment of the present invention;
[0072] Figure 4 A schematic diagram of the workflow of a method for transmitting dimming data provided by an embodiment of the present invention;
[0073] Figure 5 A schematic diagram of a structure of a dimming controller sending a signal provided by an embodiment of the present invention;
[0074] Figure 6A A schematic diagram of the structure of another dimming controller sending a signal provided by an embodiment of the present invention;
[0075] Figure 6B A schematic diagram of the structure of another dimming controller sending a signal provided by an embodiment of the present invention;
[0076] Figure 7 A schematic diagram of multiple preset sampling positions provided by an embodiment of the present invention;
[0077] Figure 8A A schematic diagram of the structure of a clock mode signal provided by an embodiment of the present invention;
[0078] Figure 8B A schematic diagram of multiple target sampling locations provided by an embodiment of the present invention;
[0079] Figure 9 A schematic diagram of a time interval for 1-bit dimming data provided by an embodiment of the present invention;
[0080] Figure 10 A schematic structural diagram of another backlight system provided by an embodiment of the present invention;
[0081] Figure 11 A schematic structural diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0082] To make the objectives, technical solutions, and advantages of the present invention more apparent, the present invention will be further described in detail below with reference to the accompanying drawings. It is apparent that the embodiments described are only some, not all, of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort are intended to fall within the scope of protection of the present invention.
[0083] It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and the accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a particular order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in sequences other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Instead, they are merely examples of apparatus and methods consistent with certain aspects of the present invention, as detailed in the appended claims.
[0084] With the rapid development of image display technology, high frame rate and high resolution have become the core direction of display device performance upgrade. Current display devices, such as televisions (TV), liquid crystal displays (LCD), etc., generally increase the frame rate to 120Hz or even higher, and adopt ultra-high-definition resolution standards such as 4K and 8K to achieve smoothness and fineness of picture display. In addition, in order to meet the high performance requirements of display devices, local dimming technology is usually used for backlight control, that is, the multiple light-emitting units set on the backlight panel are divided into different backlight partitions (Local Dimming Zone), and the brightness of the light-emitting units in each backlight partition is independently controlled to improve the contrast of the displayed picture.
[0085] However, the improvement of display quality will inevitably lead to an increase in the data processing and transmission volume of image data and local dimming data, which puts higher requirements on the data transmission efficiency within the display device.
[0086] Figure 1A FIG. 1 shows a schematic diagram of a display device provided by a related art for displaying an image. Figure 1A As shown, the display device 10 is provided with a display panel 11 and a backlight panel 12, which are arranged opposite to each other. The backlight panel 12 is provided with a plurality of light-emitting units 121 arranged in an array. The light-emitting units 121 can be light-emitting diodes (LEDs), sub-millimeter light-emitting diodes (Mini LEDs), etc.
[0087] like Figure 1A As shown, during the image display process, the local dimming technology is used to control the brightness of different light emitting units 121 to be different ( Figure 1A The different fillings of the light-emitting units 121 indicate different brightness of the light-emitting units 121). After the light-emitting units 121 on the backlight panel 12 project bright light onto the display panel 11, a corresponding picture can be presented on the display panel 11 to display an image.
[0088] Figure 1B FIG1 shows one of the structural diagrams of the backlight system inside the display device provided by the related art, Figure 1C The second structural diagram of the backlight system inside the display device provided by the related art is shown.
[0089] Reference Figure 1B and Figure 1C The backlight system may include a processor 13, a dimming controller 14 (also known as an LED controller), a dimmer 122 (also known as an LED driver), and a light-emitting unit 121. The processor 13 and the dimming controller 14 may communicate via the SPI (Serial Peripheral Interface) protocol; the dimming controller 14 is electrically connected to multiple dimmers 122; the dimmers 122 and the light-emitting units 121 may be provided on the backlight panel 12, with one dimmer 122 connected to one or more light-emitting units 121. Specifically, the processor 13 may be implemented as an SoC (System on Chip), a TELD (Timing Controller Embedded Local Dimming), or the like.
[0090] Reference Figure 1B and Figure 1C The processor 13 can generate local dimming data based on the image data corresponding to a frame of image, and send the local dimming data to the dimming controller 14 through the SPI protocol; the dimming controller 14 will send the local dimming data to each dimmer 122 connected to it; the dimmer 122 drives the light-emitting unit 121 connected to itself to emit light according to the local dimming data it receives, so as to realize backlight control.
[0091] However, in current high-performance display devices, a large number of dimmers are installed on the backlight panel. To ensure that the hardware connection relationship within the display device is not too complicated, a single signal line is usually used to connect the dimming controller and the dimmer. Figure 1CThe dimming controller 14 is electrically connected to the dimmer 122 via a single signal line 15. In this design architecture, a single signal line is required to transmit local dimming data. Therefore, a bit-by-bit transmission of local dimming data is currently commonly used. In other words, the dimming controller sends 1 bit of dimming data to the dimmer each time, and the dimmer determines the transmission value by identifying the value corresponding to the sampling position in the 1-bit dimming data.
[0092] Figure 2 FIG. 1 shows a schematic diagram of a transmission method of local dimming data provided by related technologies. Figure 2 As shown in the figure, the local dimming data sent by the dimming controller to the dimmer is transmitted in 1-bit units. Within the interval corresponding to the 1-bit dimming data, the value of the 1-bit dimming data is detected at the sampling position; if the value at the sampling position in the 1-bit dimming data is "0", it means that the value transmitted by the 1-bit dimming data is "0"; if the value at the sampling position in the 1-bit dimming data is "1", it means that the value transmitted by the 1-bit dimming data is "1".
[0093] Under this scheme, if Figure 2 As shown, in order to ensure the accuracy of sampling detection, a detection interval for distinguishing data values will be set, and boundary times will be set on both sides of the detection interval, namely the Pre interval and the Post interval, wherein the Pre interval is the interval from the starting position of the current 1-bit dimming data to the starting position of the detection interval, and the Pre interval is used to resynchronize each bit of dimming data; the Post interval is the interval from the end position of the detection interval to the starting position of the next 1-bit dimming data, and the Post interval is used to distinguish the next single-bit dimming data. However, this will make the time length corresponding to the single-bit dimming data longer, and the time required for its transmission will also increase accordingly. Therefore, the overall transmission speed of the local dimming data will be slower, especially when processing the massive local dimming data required by high-performance display devices. The existing transmission mechanism will restrict the real-time and response speed of the local dimming, resulting in display problems such as brightness adjustment delay and dynamic scene dimming inaccuracy, resulting in poor display performance of the display device.
[0094] Currently, while there are methods for increasing the transmission rate of local dimming data by using multiple signal lines to connect the dimming controller and dimmer, this undoubtedly increases the complexity of the circuit structure and internal connections, leading to higher product costs. Therefore, there is an urgent need for a method to increase the transmission speed of local dimming data without complicating the circuit structure and increasing product costs.
[0095] Based on this, an embodiment of the present invention provides a dimming data transmission method, a backlight system and a display device. Based on a single transmission line connection architecture, a new dimming data transmission method is designed to shorten the overall transmission time of the dimming data, improve the overall transmission efficiency of the dimming data, and at the same time alleviate EMI problems and improve the overall performance of the display device.
[0096] The purpose, features, and advantages of the present invention will be further described in conjunction with the embodiments and with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are only intended to illustrate and explain the present invention and are not intended to limit the present invention. In addition, the embodiments of the present invention and the features therein may be combined with each other unless there is a conflict.
[0097] The following is a detailed description of the dimming data transmission method provided by the embodiment of the present invention with reference to the accompanying drawings:
[0098] The dimming data transmission method provided in the embodiment of the present invention can be applied to a backlight system. Therefore, the backlight system provided in the embodiment of the present invention is first introduced as follows:
[0099] Figure 3 FIG. 1 shows a schematic structural diagram of a backlight system provided by an embodiment of the present invention. Figure 3 As shown, the backlight system 20 includes a dimming controller 21 and a plurality of dimmers 22, wherein the plurality of dimmers 22 are provided on a backlight panel 23 and arranged in an array on the backlight panel 23. Each dimmer 22 is electrically connected to one or more backlight sources 24 and is used to control the brightness of the backlight source 24 connected thereto. For example, in Figure 3 In the example shown, one dimmer 22 is connected to four backlight sources 24. In addition, multiple backlight sources 24 are also provided on the backlight panel 23, and are also arranged in an array on the backlight panel 23. It should be understood that the embodiments of the present invention do not limit the specific number of dimming controllers 21, nor do they limit the specific number of dimmers 22. Of course, they do not limit the specific number of backlight sources 24 connected to one dimmer 22. These numbers can be flexibly adjusted according to actual application requirements and actual architectural design. For example, the number of dimmers 22 can be determined based on the size of the backlight panel 23; the number of dimming controllers 21 can be determined based on the number and arrangement of the dimmers 22, etc.
[0100] Further, such as Figure 3 As shown, among the multiple dimmers 22 arranged in an array, the multiple dimmers 22 in the same row are connected in series via a single signal line 25. The dimming controller 21 is connected to the dimmer closest to the dimming controller 21 in each of the multiple rows of dimmers 22 (i.e. Figure 322-A in the rows of dimmers 22, and multiple dimmers 22-A in different rows closest to the dimmer controller 21 are electrically connected to the dimmer controller 21 in parallel. For example, a dimmer controller 21 can be electrically connected to each dimmer 22-A in eight rows of dimmers 22 via eight single signal lines 25, and these eight dimmers 22-A are connected in parallel. It should be understood that the number of single signal lines 25 connected to the dimmer controller 21 can also be flexibly designed according to actual application requirements, and this embodiment of the present invention does not impose any limitation on this.
[0101] Furthermore, it should be understood that Figure 3 This is merely an example. In actual applications, the specific connection method between the dimming controller and the dimmer can be flexibly configured based on the architectural design of the display device, and the embodiments of the present invention do not impose any restrictions on this. For example, multiple dimmers located in the same column can be connected in series via a single signal line, and the dimming controller can be electrically connected to the dimmer in each column that is closest to the dimming controller via multiple single signal lines.
[0102] Based on Figure 3 The architecture of the backlight system shown, Figure 4 FIG. 1 shows a schematic diagram of the workflow of the dimming data transmission method provided by an embodiment of the present invention. Figure 4 As shown, the dimming data transmission method according to the embodiment of the present invention may specifically include the following steps:
[0103] In step S401, within the display period of a frame image, the dimming controller sends a frame start identifier to the dimmer and then continuously sends multiple dimming data packets to the dimmer, wherein each dimming data packet includes a synchronization signal and N bits of dimming data, where N is a positive integer and N≥2.
[0104] In some embodiments, after receiving local dimming data corresponding to the current image frame from a preceding device (such as an SoC or TCON), the dimming controller constructs multiple dimming data packets based on the local dimming data. Each dimming data packet includes a synchronization signal and multiple bits of dimming data. When displaying the current image frame, the dimming controller first sends a frame start identifier to the dimmer, and then continuously sends multiple dimming data packets to the dimmer. By repeatedly transmitting dimming data packets to the dimmer, all dimming data corresponding to a frame of image can be transmitted.
[0105] Figure 5 FIG1 shows one of the structural diagrams of the dimming controller sending a signal provided by an embodiment of the present invention. Figure 5As shown, the dimming controller first sends a frame start marker, which indicates the starting position of the time when a frame of image is formed. After receiving the frame start marker, the dimmer can determine that the dimming data received subsequently is the dimming data of a new image frame, thereby performing overall synchronization operations.
[0106] For example, refer to Figure 5 , a certain number of consecutive "1"s can be used to indicate the start of a frame. It should be understood that Figure 5 The frame start identifier in the figure is only an example. In practical applications, other forms may be used to represent the frame start identifier, and the embodiment of the present invention does not impose any limitation on this.
[0107] In some embodiments, the synchronization signal in the dimming data packet is located before the N bits of dimming data.
[0108] For the sake of explanation, Figure 5 The example of dimming data packet shown is consistent with that of the example, and the subsequent embodiments are all described using 8-bit dimming data as an example: after the dimming controller sends the frame start identifier, it will continuously send multiple dimming data packets to the dimmer. Figure 5 As shown, for a dimming data packet, it includes a synchronization signal and 8 bits of dimming data, where:
[0109] like Figure 5 As shown, the data volume of the synchronization signal is 2 bits. In the 2-bit synchronization signal, the signal value of the first bit is "0" and the signal value of the second bit is "1". When the dimmer detects a change in the signal value from "0" to "1", it can be considered that it has received the synchronization signal in the dimming data packet. At this time, the dimmer will use the signal value jump position from "0" to "1" in the synchronization signal as the reference position to perform synchronization operations on a single dimming data packet, so as to facilitate the accuracy of subsequent data analysis operations (for specific implementation methods, please refer to subsequent embodiments).
[0110] like Figure 5 As shown, the 8-bit dimming data is set continuously, so there is no need to set a boundary time for each bit of dimming data. This can effectively reduce the length of each bit of dimming data, shorten the time required for dimming data transmission, and improve the transmission efficiency of dimming data. In the traditional single-bit data transmission method, 1M to 4M bits of dimming data can usually be transmitted per second; however, using the multi-bit data transmission method provided by the embodiment of the present invention, approximately 2M to 8M bits of dimming data can be transmitted per second, and its transmission speed is doubled.
[0111] Furthermore, in an embodiment of the present invention, by setting multiple bits of dimming data in a dimming data packet, the frequency of signal value changes can be effectively reduced, as follows:
[0112] If the traditional single-bit data transmission method is used, since boundary time needs to be set on both sides of the detection interval during each bit of data transmission, this will cause two signal value jumps to occur within the transmission cycle of 1 bit of data, such as Figure 2 As shown in the figure, the first signal value jump occurs at the beginning of the 1-bit dimming data interval, and the second signal value jump occurs at the boundary between the Pre interval and the detection interval, or at the boundary between the detection interval and the Post interval. Therefore, if the traditional single-bit data transmission method is used to transmit 8 bits of dimming data, 16 signal value jumps will occur.
[0113] Figure 6A The second structural diagram of the dimming controller sending a signal according to an embodiment of the present invention is shown. Figure 6B The third structural diagram of the dimming controller sending a signal provided by the embodiment of the present invention is shown.
[0114] In the transmission method of dimming data provided by the embodiment of the present invention,
[0115] like Figure 6A As shown, for the case where the data value of the 8-bit dimming data in the dimming data packet is "11111111", there are only two signal value jumps in the process of transmitting the dimming data packet, that is, the first signal value jump occurs within the corresponding interval of the synchronization signal of the dimming data packet, and the second signal value jump occurs at the end position of the dimming data packet.
[0116] like Figure 6B As shown in the figure, for the case where the data value of the 8-bit dimming data in the dimming data packet is "01010101", there are 10 signal value jumps in total during the transmission of the dimming data packet, that is, the first signal value jump occurs within the interval corresponding to the synchronization signal of the dimming data packet, the second signal value jump occurs at the starting position of the 8-bit dimming data, and as the data value changes, multiple signal value jumps occur within the interval corresponding to the 8-bit dimming data, until the tenth signal value jump occurs at the end position of the dimming data packet.
[0117] Therefore, when the multi-bit dimming data transmission method in the embodiment of the present invention is adopted to transmit 8-bit dimming data, the signal value jumps at least twice and at most ten times.
[0118] The following is an example of the signal value transition corresponding to different dimming data transmission methods:
[0119]
[0120]
[0121] Table 1
[0122] As shown in Table 1, when transmitting 8-bit dimming data, the traditional single-bit transmission method results in 16 signal value transitions. However, the multi-bit transmission method provided by the present invention results in an average of 6 signal value transitions, reducing the frequency of signal value transitions by approximately 38%. This reduction in signal value transition frequency can effectively reduce the system's electromagnetic interference intensity and improve system performance.
[0123] Next, the dimmer receives the 8-bit dimming data and parses it as follows:
[0124] In step S402 , the dimmer determines target dimming data based on the sampling control signal and the dimming data packet received by the dimmer, wherein the sampling control signal at least includes a first clock signal generated by the dimmer itself.
[0125] In an embodiment of the present invention, the dimming controller sends a dimming data packet including N bits of dimming data to the dimmer. In this way, each dimming data packet sent can simultaneously transmit multiple bits of dimming data. Compared with the traditional single-bit transmission method of dimming data, the overall transmission time of the dimming data can be shortened, and the overall transmission efficiency of the dimming data can be improved. Especially in high-resolution and high-frame rate display devices, the improvement of the dimming data transmission efficiency can improve the response speed of the backlight system under local dimming technology and improve the display performance of the display device. In addition, by packaging and continuously transmitting multi-bit dimming data and setting a synchronization signal in each dimming data packet, there is no need to set a synchronization signal for each bit of dimming data. In this way, during the overall transmission process of the dimming data, the level jump frequency will be reduced, thereby alleviating the EMI problem of the system and improving the system performance of the display device.
[0126] In some embodiments, the dimmer can use the first clock signal and the synchronization signal in the dimming data packet to parse the N bits of dimming data in the dimming data packet, and generate target dimming data based on the parsing results, wherein the first clock signal is generated by the dimmer using its own internal oscillator.
[0127] Furthermore, in embodiments of the present invention, the synchronization signal in the dimming data packet is used to control the initialization of the cycle count value of the first clock signal, thereby achieving synchronization of the various dimming data packets and ensuring accurate reception of the dimming data packets. The specific implementation of how the synchronization signal controls the initialization of the cycle count value of the first clock signal can be found in subsequent embodiments.
[0128] It is understandable that because the dimming controller and the dimmer are connected via a single signal line, the dimmer cannot receive the synchronization clock signal used to parse the dimming data packet. To enable the dimmer to parse the dimming data packet containing multi-bit dimming data, the present invention provides at least two implementation methods, as follows:
[0129] Method 1:
[0130] In some embodiments, the dimmer can directly use the first clock signal generated by itself to parse the dimming data packet, which can be achieved in the following ways:
[0131] The dimmer detects the dimming data packet it receives, and after detecting the synchronization signal, samples the dimming data packet at multiple preset sampling positions based on the first clock signal to obtain N sampling data; and generates target dimming data based on the sampling data determined by itself.
[0132] In a specific implementation, multiple preset sampling positions can be pre-set. After the dimmer detects the synchronization signal in the dimming data packet, that is, the signal value change from "0" to "1" at the beginning of the dimming data packet, it begins counting the cycles of the first clock signal generated by itself and determines whether it has reached the preset sampling position based on the cycle count value. When the preset sampling position is reached, the dimming data packet is sampled at the preset sampling position to obtain the data value of each bit of the dimming data to generate the target dimming data.
[0133] Figure 7 FIG. 1 is a schematic diagram showing a plurality of preset sampling positions provided by an embodiment of the present invention. Figure 7 As shown, for a dimming data packet including 8-bit dimming data, 9 preset sampling positions are set, wherein the first preset sampling position (ie Figure 7 The preset sampling position corresponding to the synchronization signal interval in the optical data packet is used to detect the signal value change from "0" to "1" at the beginning of the optical data packet. When the signal value change from "0" to "1" is confirmed, it is considered that the synchronization signal is detected. Then, the first clock signal is used to detect the signal value change from "0" to "1". Figure 7 The sampled data is obtained at a preset sampling position corresponding to the 8-bit dimming data interval in the image, thereby realizing the parsing of the dimming data packet.
[0134] Furthermore, in the first approach, the frequency difference between the first clock signal and the second clock signal is required to meet a preset error threshold, wherein the second clock signal is generated by the dimming controller.
[0135] In specific implementation, Figure 3As shown, the dimming controller 21 uses an external oscillator to generate a second clock signal, and uses the second clock signal to send multiple dimming data packets one by one to the dimmer 22. In addition, due to the single signal line connection structure, the dimmer 22 does not receive the clock signal sent by the dimming controller 21, but uses the clock signal generated by the internal oscillator of the dimmer 22 ( Figure 3 In order to normally receive continuous multi-bit dimming data, it is required that the first clock signal and the second clock signal maintain stable synchronization.
[0136] In an embodiment of the present invention, stable synchronization of the first clock signal and the second clock signal is ensured by setting the frequency difference between the first clock signal and the second clock signal to be less than or equal to a preset error threshold. In a specific implementation, since the dimming controller uses an external oscillator to generate the second clock signal, the clock frequency of the external oscillator is relatively accurate. Therefore, in an embodiment of the present invention, trimming and a rigorous FT test (final test) can be used to calibrate the frequency of the dimmer's internal oscillator, and the calibrated frequency of the dimmer's internal oscillator is compared with the frequency of the dimmer controller's external oscillator to ensure that the error between the frequency of the dimmer's internal oscillator and the frequency of the external oscillator connected to the dimmer controller does not exceed the preset error threshold, thereby ensuring that the frequency synchronization error between the first clock signal generated by the dimmer's internal oscillator and the second clock signal is less than or equal to the preset error threshold.
[0137] Furthermore, it is understood that in practical applications, the preset error threshold may be an empirical value, or may be flexibly set and adjusted based on actual business needs, and the embodiments of the present invention do not impose any limitations on this. For example, the preset error threshold may be set to 3%, i.e., requiring that the frequency difference between the first clock signal and the second clock signal be ≤3%.
[0138] In the above embodiment, the dimming data packet is sampled at a preset sampling position using the first clock signal generated by the dimmer itself. In this case, by ensuring that the frequency error between the first clock signal and the second clock signal generated by the dimming controller meets the preset error threshold, it is possible to ensure that continuous multi-bit dimming data is correctly received and parsed, thereby ensuring the accuracy of the sampled data.
[0139] However, in the above-mentioned method 1, fine-tuning and FT testing of the first clock signal will increase product costs. Therefore, the embodiment of the present invention also provides another feasible method for analyzing dimming data, which is as follows:
[0140] Method 2:
[0141] In some embodiments, the sampling control signal may include a clock mode signal and a first clock signal; the dimmer may utilize the clock mode signal and the first clock signal to parse the dimming data packet. The clock mode signal is generated by the dimming controller, and the time length between any two adjacent level transition edges in the clock mode signal is equal to the time length corresponding to one bit of dimming data.
[0142] In the above embodiment, the interval between any two adjacent level jump edges in the clock mode signal is set to be consistent with the interval corresponding to 1 bit of dimming data. In this way, the target sampling position determined by subsequent embodiments can always correspond to the middle position of each 1 bit of dimming data in the dimming data packet. Sampling the dimming data packet at the target sampling position can ensure that the sampled data is obtained at the middle position of the 1 bit of dimming data, which is more accurate and more versatile.
[0143] In some embodiments, the dimming controller may further send a clock mode signal to the dimmer after sending a frame start identifier and before continuously sending multiple dimming data packets. Specifically, the dimming controller may send the clock mode signal once within a display period corresponding to a frame of image.
[0144] In some embodiments, after receiving the clock mode signal, the dimmer may parse the dimming data packet received by itself in the following manner, which may include the following steps:
[0145] Step 1: The dimmer may determine a plurality of target sampling positions according to the clock pattern signal and the first clock signal.
[0146] In some embodiments, during step 1, the dimmer may determine multiple target sampling positions by:
[0147] Step 1-1: The dimmer determines a plurality of target count values based on a first clock signal and a clock mode signal, wherein a period of the first clock signal is smaller than a period of the clock mode signal.
[0148] In some embodiments, during the execution of step 1-1, the dimmer can determine multiple target count values in the following manner: the dimmer uses the moment corresponding to the first level jump edge of the clock mode signal as the starting moment to count the period of the first clock signal; and determines multiple target count values based on the period count values of the first clock signal corresponding to multiple target moments, wherein the multiple target moments are moments corresponding to non-first level jump edges of the clock mode signal.
[0149] Figure 8A FIG. 1 shows a schematic diagram of the structure of the clock mode signal provided by an embodiment of the present invention. Figure 8AAs shown, the dimmer starts to continuously count the period of the first clock signal when the starting position of the clock mode signal is detected, that is, the first level transition edge of the clock mode signal, and uses the period count value obtained when the second level transition edge of the clock mode signal is detected as the first target count value count-0; then, uses the period count value obtained when the third level transition edge of the clock mode signal is detected as the third target count value count-2; and so on, uses the period count value obtained when the tenth level transition edge of the clock mode signal is detected as the ninth target count value count-8.
[0150] Therefore, when a dimming data packet includes N bits of dimming data, the dimmer determines N+1 target count values based on the first clock signal and the clock mode signal.
[0151] For example, assuming that the frequency of the oscillator inside the dimmer is 50 MHz, the period of the first clock signal clock generated by it is 20 ns; and assuming that when the clock mode signal is counted using the first clock signal clock, the first target count value count-0 obtained is 20 clocks, the second target count value count-1 is 40 clocks, the third target count value count-2 is 60 clocks, and so on.
[0152] Step 1-2: The dimmer determines a target sampling position according to any two adjacent target count values among the multiple target count values.
[0153] In a specific implementation, the dimmer can determine a target sampling position for every two adjacent target counting values among the N+1 target counting values obtained in step 1-1, thus obtaining N target sampling positions.
[0154] In some embodiments, the dimmer determines a third target count value based on an average of a first target count value and a second target count value, wherein the first target count value and the second target count value are any two adjacent target count values among a plurality of target count values, and the first target count value is less than the second target count value.
[0155] In a specific implementation, again taking the dimming data packet including 8 bits of dimming data as an example, the dimmer will obtain 9 target count values, namely, count-0, count-1, count-2, ..., count-8. In the process of determining the third target count value: first, count-0 is used as the first target count value and count-1 is used as the second target count value. By calculating the average of count-0 and count-1, a third target count value, count-a0, is obtained. Then, by calculating the average of count-1 and count-2, another third target count value, count-a1, is obtained. And so on, a total of 8 third target count values are obtained, namely, count-a0, count-a1, count-a2, ..., count-a7.
[0156] For example, assuming that the target count value count-0=20 clocks, the target count value count-1=40 clocks, the target count value count-2=60 clocks, ..., then the third target count value count-a0=30 clocks, the third target count value count-a1=50 clocks, and so on.
[0157] In some embodiments, after obtaining multiple third target count values, for any third target count value, the dimmer determines a target sampling position based on the third target count value and the dimming data packet, wherein the time length between the target sampling position and the starting position is equal to the time length corresponding to the third target count value cycle of the first clock signal, and the starting position is determined by the dimmer according to the synchronization signal in the dimming data packet.
[0158] In a specific implementation, after the dimmer determines multiple third target count values, it uses the synchronization signal and the multiple third target count values to determine multiple target sampling positions in real time during the process of receiving the dimming data packet, and performs data sampling operations on the dimming data packet at the target sampling positions to obtain multiple sampled data, as follows:
[0159] The dimmer detects the dimming data packet. When it detects the synchronization signal carried in the dimming data packet, it uses the level jump edge in the synchronization signal as the starting position. At this starting position, the cycle count value of the first clock signal is cleared and then recounted. When the cycle count value of the first clock signal reaches the third target count value, the position corresponding to that moment in the dimming data packet is used as the target sampling position.
[0160] Figure 8BFIG. 1 shows a schematic diagram of multiple target sampling locations provided by an embodiment of the present invention. Figure 8B As shown, the level transition edge of the synchronization signal from "0" to "1" is used as the starting position, and the counting of the cycles of the first clock signal is restarted. When the count reaches the count-a0th cycle of the first clock signal, the position corresponding to the third target count value count-a0 on the dimming data packet is used as a target sampling position; then, the counting of the cycles of the first clock signal continues. When the count reaches the count-a1th cycle of the first clock signal, the position corresponding to the third target count value count-a1 on the dimming data packet is used as another target sampling position, and so on, until the level transition edge of the synchronization signal in the next dimming data packet is detected, the cycle count value of the first clock signal is cleared to zero, and counting is restarted.
[0161] Reference Figure 8A and Figure 8B Since the time length between two adjacent level transition edges in the clock mode signal is equal to the time length corresponding to one bit of dimming data in the dimming data packet, the multiple target sampling positions determined using the above method will always correspond to the middle position of the one-bit dimming data. In this way, in the subsequent process, when the dimming data packet is sampled at the target sampling position, it can be ensured that the sampled data is the signal value at the middle position of the one-bit dimming data, thereby ensuring the accuracy of the sampling result and achieving accurate analysis of the dimming data packet.
[0162] Step 2: The dimmer samples the dimming data packet at multiple target sampling positions to obtain N sampling data.
[0163] In a specific implementation, the dimmer samples N bits of dimming data in the dimming data packet at multiple target sampling positions determined in real time, obtaining N sampled data. Specifically, based on the cycle count value of the synchronization signal and the first clock signal, the dimmer samples the N bits of dimming data at each target sampling position upon detection, obtaining one sampled data, until sampling of the dimming data packet is complete.
[0164] In actual applications, the oscillator inside the dimmer may cause the frequency of the clock signal it generates to deviate to a certain extent due to factors such as temperature changes or its own semiconductor process errors. For example, the frequency of the oscillator may change from the ideal 50MHz to 51MHz. However, in the embodiment of the present invention, since the target sampling position is determined in real time based on the clock mode signal and the first clock signal, even if there is a slight offset in the frequency of the first clock signal, the target sampling position can be accurately determined by determining multiple target count values in real time, ensuring that the target sampling position always corresponds to the middle position of the 1-bit dimming data. There is no need to set a fixed sampling position separately, thereby improving the accuracy of sampling. Regardless of the circumstances, as long as the interval between each target sampling position meets the minimum sampling interval, the accuracy of the sampled data obtained at the target sampling position can be guaranteed.
[0165] Step 3: The dimmer generates target dimming data based on the sampling data determined by itself.
[0166] In some embodiments, the dimmer may select R consecutive samples from a plurality of sampled data determined by the dimmer according to a set dimming precision, and generate target dimming data based on the R samples, where R is a positive integer determined based on the dimming precision. Specifically, if the dimming precision is R bits, the dimmer may determine a target dimming data based on each R sampled data from the plurality of sampled data determined by the dimmer.
[0167] For example, assuming the dimming accuracy is 8 bits (i.e., the target dimming data can be any value in the range [0, 255]), if the dimmer samples the dimming data packet and obtains 8 sampled data, the dimmer can directly generate 1 target dimming data based on these 8 sampled data. If the dimmer samples the dimming data packet and obtains 4 sampled data, the dimmer needs to parse 2 dimming data packets to obtain 8 sampled data and then generate 1 target dimming data.
[0168] Furthermore, in the embodiment of the present invention, in order to achieve a balance between data transmission speed and data detection stability, the time length corresponding to 1 bit of dimming data in the dimming data packet is limited as follows:
[0169] In some embodiments, in the N-bit dimming data, the time length corresponding to 1 bit of dimming data is equal to the time length corresponding to M cycles of the first clock signal; wherein M is a positive integer, and M≥6.
[0170] Figure 9 FIG. 1 shows a schematic diagram of the time interval of 1-bit dimming data provided by an embodiment of the present invention. Figure 9As shown, within the interval corresponding to the 1-bit dimming data, a signal variation interval of 1 clock interval is required at both the starting position and the ending position, where clock represents one cycle of the first clock signal. Moreover, since the sampling position corresponds to the middle position of the 1-bit dimming data, a margin of 2 clock intervals is required on both sides of the sampling position for stable detection. Therefore, the 1-bit dimming data requires a time interval of at least 6 clock intervals.
[0171] For example, assuming that the frequency of the oscillator inside the dimmer is 50MHz and the period of the first clock signal clock it generates is 20ns, then the time length corresponding to 1 bit of dimming data is: 6×20ns=120ns. Therefore, the amount of dimming data that can be transmitted per second is 8.33Mbps (=1s / 120ns), and its transmission speed is significantly improved.
[0172] In the above embodiment, by setting the minimum time interval required for synchronization of each bit of dimming data, that is, setting the time length corresponding to 1 bit of dimming data to be consistent with the time length of M cycles of the first clock signal, it is possible to effectively improve the overall transmission speed of the dimming data while ensuring stable detection of the dimming data, avoiding the occurrence of dimming data recognition errors in the dimmer, and improving the system performance of the display device.
[0173] Based on the same concept, an embodiment of the present invention also provides a backlight system. Since the principle of solving the problem of the backlight system is similar to the aforementioned method for transmitting dimming data, the implementation of the backlight system can refer to the implementation of the aforementioned method for transmitting dimming data, and the repeated parts will not be repeated.
[0174] like Figure 10 As shown, the backlight system 20 provided by the embodiment of the present invention may include a dimming controller 21 and a dimmer 22, wherein:
[0175] The dimmer 22 is electrically connected to the dimming controller 21 via a single signal line 23;
[0176] The dimming controller 21 is configured to: within a display period of a frame image, after sending a frame start identifier to the dimmer 22, continuously send multiple dimming data packets to the dimmer 22, wherein each dimming data packet includes a synchronization signal and N bits of dimming data, where N is a positive integer and N ≥ 2;
[0177] The dimmer 22 is configured to determine target dimming data based on the sampling control signal and the dimming data packet received by the dimmer, wherein the sampling control signal at least includes a first clock signal generated by the dimmer itself.
[0178] In some embodiments, the sampling control signal further includes a clock mode signal, which is generated by a dimming controller; the dimmer 22 is specifically configured to:
[0179] determining a plurality of target sampling positions according to the clock pattern signal and the first clock signal;
[0180] Sampling the dimming data packet at multiple target sampling positions to obtain N sampling data;
[0181] Generate target dimming data based on the sampling data determined by itself.
[0182] In some embodiments, the dimmer 22 is specifically configured to:
[0183] determining a plurality of target count values based on a first clock signal and a clock mode signal, wherein a period of the first clock signal is smaller than a period of the clock mode signal;
[0184] A target sampling position is determined according to any two adjacent target count values among the multiple target count values.
[0185] In some embodiments, the dimmer 22 is specifically configured to:
[0186] Taking the time corresponding to the first level transition edge of the clock mode signal as the starting time, counting the period of the first clock signal;
[0187] A plurality of target count values are determined according to the period count values of the first clock signal corresponding to a plurality of target moments, wherein the plurality of target moments are moments corresponding to non-first level transition edges of the clock mode signal.
[0188] In some embodiments, the dimmer 22 is specifically configured to:
[0189] determining a third target count value according to an average of the first target count value and the second target count value, wherein the first target count value and the second target count value are any two adjacent target count values among the plurality of target count values, and the first target count value is smaller than the second target count value;
[0190] Based on the third target count value and the dimming data packet, the target sampling position is determined, wherein the time length between the target sampling position and the starting position is equal to the time length corresponding to the third target count value cycle of the first clock signal, and the starting position is determined by the dimmer according to the synchronization signal in the dimming data packet.
[0191] In some embodiments, the dimming controller 21 is further configured to:
[0192] A clock mode signal is sent to the dimmer, wherein the time length between any two adjacent level transition edges in the clock mode signal is equal to the time length corresponding to 1 bit of dimming data.
[0193] In some embodiments, the dimmer 22 is specifically configured to:
[0194] Detecting the dimming data packet received by itself, and after detecting the synchronization signal, sampling the dimming data packet at multiple preset sampling positions based on the first clock signal to obtain N sampled data;
[0195] Generate target dimming data based on the sampling data determined by itself;
[0196] The frequency difference between the first clock signal and the second clock signal satisfies a preset error threshold, the second clock signal is generated by the dimming controller, and the second clock signal is used to send a dimming data packet.
[0197] In some embodiments, in the dimming data packet, the synchronization signal is located before the N bits of dimming data;
[0198] In the N-bit dimming data, the time length corresponding to 1 bit of dimming data is equal to the time length corresponding to M cycles of the first clock signal; wherein M is a positive integer, and M≥6.
[0199] Based on the same concept, an embodiment of the present invention further provides a display device. Since the principle of solving the problem of the display device is similar to that of the aforementioned backlight system, the implementation of the display device can refer to the implementation of the aforementioned backlight system, and the repeated parts will not be repeated.
[0200] like Figure 11 As shown, the display device 30 provided by the embodiment of the present invention may include the backlight system 20 provided by any of the above embodiments.
[0201] In specific implementations, the display device in the embodiments of the present invention may be a smart terminal, a smart mobile terminal, a tablet computer, a laptop computer, a smart handheld device, a personal computer (PC), a computer, a smart screen, a display device, a vehicle-mounted device, various wearable devices, a personal digital assistant (PDA), etc.; wherein, wearable devices include virtual reality (VR) devices, augmented reality (AR) devices, etc. In addition, other essential components of the display device are understood by those of ordinary skill in the art and are not described in detail here, nor should they be construed as limitations of the present invention.
[0202] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.
[0203] Obviously, those skilled in the art may make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if such changes and modifications fall within the scope of the claims and their equivalents, the present invention is intended to include such changes and modifications.
Claims
1. A method for transmitting dimming data, characterized in that: Applied to a backlight system, the backlight system includes a dimming controller and a dimmer, the dimmer is electrically connected to the dimming controller via a single signal line, and the method includes: During a display period of a frame image, the dimming controller continuously sends a plurality of dimming data packets to the dimmer after sending a frame start identifier to the dimmer, wherein each dimming data packet includes a synchronization signal and N bits of dimming data, where N is a positive integer and N ≥ 2; The dimmer determines target dimming data based on a sampling control signal and a dimming data packet received by the dimmer, wherein the sampling control signal at least includes a first clock signal generated by the dimmer itself.
2. The method according to claim 1, wherein The sampling control signal further includes a clock mode signal, and the clock mode signal is generated by the dimming controller; The dimmer determines target dimming data based on the sampled control signal and the dimming data packet received by the dimmer, including: The dimmer determines a plurality of target sampling positions according to the clock mode signal and the first clock signal; The dimmer samples the dimming data packet at the plurality of target sampling positions to obtain N sampling data; The dimmer generates the target dimming data according to the sampling data determined by the dimmer itself.
3. The method according to claim 2, wherein The dimmer determines a plurality of target sampling positions according to the clock mode signal and the first clock signal, including: The dimmer determines a plurality of target count values based on the first clock signal and the clock mode signal, wherein a period of the first clock signal is smaller than a period of the clock mode signal; The dimmer determines the target sampling position according to any two adjacent target count values among the multiple target count values.
4. The method according to claim 3, wherein The dimmer determines a plurality of target count values based on the first clock signal and the clock mode signal, including: The dimmer uses the time corresponding to the first level transition edge of the clock mode signal as the starting time to count the period of the first clock signal; The dimmer determines the multiple target count values according to the cycle count values of the first clock signal corresponding to multiple target moments, wherein the multiple target moments are moments corresponding to non-first level transition edges of the clock mode signal.
5. The method according to claim 3, wherein The dimmer determines the target sampling position according to any two adjacent target count values among the multiple target count values, including: The dimmer determines a third target count value according to an average of a first target count value and a second target count value, wherein the first target count value and the second target count value are any two adjacent target count values among the multiple target count values, and the first target count value is smaller than the second target count value; The dimmer determines the target sampling position based on the third target count value and the dimming data packet, wherein the time length between the target sampling position and the starting position is equal to the time length corresponding to the third target count value cycle of the first clock signal, and the starting position is determined by the dimmer according to the synchronization signal in the dimming data packet.
6. The method according to claim 2, wherein After the dimming controller sends a frame start identifier and before continuously sending a plurality of dimming data packets, the method further includes: The dimming controller sends the clock mode signal to the dimmer, wherein the time length between any two adjacent level transition edges in the clock mode signal is equal to the time length corresponding to 1 bit of dimming data.
7. The method according to claim 1, wherein The dimmer determines target dimming data based on the sampled control signal and the dimming data packet received by the dimmer, including: The dimmer detects the dimming data packet received by the dimmer, and after detecting the synchronization signal, samples the dimming data packet at a plurality of preset sampling positions based on the first clock signal to obtain N sampled data; The dimmer generates the target dimming data according to the sampling data determined by the dimmer itself; The frequency difference between the first clock signal and the second clock signal satisfies a preset error threshold, the second clock signal is generated by the dimming controller, and the second clock signal is used for sending the dimming data packet.
8. The method according to any one of claims 1 to 7, wherein In the dimming data packet, the synchronization signal is located before the N bits of dimming data; In the N-bit dimming data, a time length corresponding to 1 bit of dimming data is equal to a time length corresponding to M cycles of the first clock signal, where M is a positive integer and M≥6.
9. A backlight system, characterized in that: It includes a dimming controller and a dimmer, wherein: The dimmer is electrically connected to the dimming controller via a single signal line; The dimming controller is configured to: within a display period of a frame image, after sending a frame start identifier to the dimmer, continuously send a plurality of dimming data packets to the dimmer, wherein each of the dimming data packets includes a synchronization signal and N bits of dimming data, where N is a positive integer and N ≥ 2; The dimmer is configured to determine target dimming data based on a first clock signal generated by the dimmer and a dimming data packet received by the dimmer.
10. A display device, characterized in that: Comprising a backlight system as claimed in claim 9.
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