A receive radio frequency link adjustment circuit and satellite terminal

Abstract

The application provides a receiving radio frequency link adjustment circuit and a satellite terminal. A baseband processor sends an indication signal to a detector at a time point before a start point of a baseband signal cycle prefix, so that gain adjustment of a link is completed when a radio frequency signal is received, control time delay is reduced, and TTI-level real-time response is realized. Since the control time delay is reduced, the risk of burning radio frequency back-end devices caused by excessively high control time delay is avoided. By using the characteristics that a radio frequency signal is periodic and the strength of adjacent period signals does not suddenly change, gain adjustment strategies corresponding to the strength of a previous period signal are used to adjust a numerical control attenuator in a current period, so that the rationality and effectiveness of gain adjustment are ensured.

Description

Technical Field

[0001] This application relates to the field of radio frequency communication technology, and more specifically, to a receiving radio frequency link conditioning circuit and a satellite terminal. Background Technology

[0002] In traditional receiver RF links, detectors or FPGAs are used to detect the power of the RF signal. The FPGA / MCU then controls the attenuation value of the digitally controlled attenuator or bypasses the low-noise amplifier to achieve gain control of the receiver link. In this process, the signal needs to pass through detection, ADC conversion, FPGA / MCU processing, and then the attenuator is adjusted, resulting in high control loop delay and a risk of burning out RF back-end components. Summary of the Invention

[0003] The purpose of this application is to provide a receiving radio frequency link adjustment circuit and a satellite terminal to solve the problem that the existing receiving radio frequency link gain control has high delay and poses a risk of burning out radio frequency back-end devices.

[0004] This application provides a receiving radio frequency link adjustment circuit, including: a digitally controlled attenuator, an adjustment module, a detector, a signal coupler, and a baseband processor; the signal coupler is used for: the radio frequency signal reaches the digitally controlled attenuator through the signal coupler, and simultaneously, the coupled signal of the signal coupler enters the detector; the detector is used to determine the corresponding voltage signal based on the signal strength of the coupled signal; and, when an indication signal is received, outputs a voltage signal to the adjustment module; the adjustment module is used to adjust the gain of the digitally controlled attenuator based on the voltage signal; the baseband processor is used to send an indication signal to the detector at a set time before the start point of the baseband signal cyclic prefix; the indication signal is used to indicate the voltage signal corresponding to the previous cycle of the radio frequency signal output by the detector.

[0005] Among them, radio frequency signals (i.e. satellite signals) are periodic, and the signal strength of adjacent cycles does not change abruptly. Therefore, the gain adjustment strategy corresponding to the signal strength of the previous cycle can be used to adjust the digitally controlled attenuator in the current cycle.

[0006] In the above technical solution, the baseband processor sends an indication signal to the detector at a set time before the start of the baseband signal cyclic prefix, ensuring that the link gain adjustment is completed by the time the RF signal is received, reducing control delay and achieving TTI-level real-time response. This reduced control delay avoids the risk of RF back-end devices burning out due to excessive control delay. Utilizing the periodicity of RF signals (satellite signals) and the fact that signal strength does not change abruptly between adjacent cycles, a gain adjustment strategy corresponding to the signal strength of the previous cycle is used to adjust the digitally controlled attenuator in the current cycle, ensuring the rationality and effectiveness of gain adjustment.

[0007] In some alternative implementations, the baseband processor is also configured to instruct the detector to output a voltage signal corresponding to the current cycle of the radio frequency signal when there is no voltage signal corresponding to the previous cycle of the radio frequency signal.

[0008] In the above technical solution, when the baseband processor does not have a voltage signal corresponding to the previous cycle of the RF signal, it instructs the detector to output the voltage signal corresponding to the current cycle of the RF signal. This allows the circuit to adapt to various complex operating scenarios. Whether it is the first reception of a signal or a re-reception after a signal interruption, gain adjustment can be performed to ensure the normal operation of the receiving RF link, greatly improving the adaptability of the circuit.

[0009] In some optional implementations, the set time T is: T = T2 + T1; where T1 is the time from the start point of the cyclic prefix of the RF signal to the start point of the cyclic prefix of the baseband signal in the same period, and T2 is the time from the start point of the cyclic prefix of the baseband signal to the adjustment taking effect in the same period.

[0010] In the above technical solution, T1 is the time from the start point of the cyclic prefix input of the RF signal to the start point of the cyclic prefix of the baseband signal within the same cycle, and T2 is the time from the start point of the cyclic prefix of the baseband signal to the adjustment taking effect within the same cycle. By defining the set time T as the sum of T1 and T2, the total time required from the start point of the RF signal cyclic prefix to the gain adjustment taking effect can be accurately calculated. When the baseband processor sends an indication signal to the detector at the set time T, it can be ensured that the gain adjustment takes effect precisely when the RF signal is received, achieving a precise match between the timing of gain adjustment and the RF signal cycle, avoiding problems caused by adjusting too early or too late.

[0011] Specifically, if the gain adjustment is completed too early, before the RF signal arrives, it may cause signal distortion. If the adjustment is too late, the RF signal has already entered the receiving link before the gain adjustment takes effect, which may damage the RF back-end devices due to excessive signal strength. By precisely setting the time T, these problems are effectively avoided, ensuring accurate signal reception.

[0012] In some alternative implementations, it further includes: a low-noise amplifier with bypass; the radio frequency signal passes sequentially through the signal coupler and the digitally controlled attenuator to reach the low-noise amplifier;

[0013] The adjustment module is also used to adjust the gain of the low-noise amplifier based on the voltage signal.

[0014] In real-world communication scenarios, signal strength can fluctuate significantly due to factors such as distance, obstacles, and interference. Low-noise amplifiers with bypass provide an additional transmission path for the signal. When the input signal strength is too high, the signal can be transmitted through the bypass without going through the amplification stage, enabling the system to handle a wide range of signal strengths from extremely weak to relatively strong, greatly expanding the dynamic range of signal reception.

[0015] The adjustment module adjusts the gain of the low-noise amplifier based on the voltage signal, realizing automatic control of the low-noise amplifier's operating state. That is, it automatically selects the amplified signal or transmits the signal through bypass according to the strength of the input signal, ensuring that the signal is always within the appropriate processing range.

[0016] In some optional embodiments, it further includes: a radio frequency transceiver chip; the radio frequency signal passes sequentially through the signal coupler, the digitally controlled attenuator, and the low-noise amplifier to reach the radio frequency transceiver chip;

[0017] The radio frequency transceiver chip is used to convert the analog signal output by the low noise amplifier into a digital baseband signal and transmit the baseband signal to the baseband processor; the baseband processor is also used to determine the starting point of the baseband signal loop prefix based on the baseband signal.

[0018] In the above technical solution, after the baseband processor determines the start point of the baseband signal cyclic prefix, it sends an indication signal to the detector at the start point of the baseband signal cyclic prefix of the next cycle T1+T2 in advance, according to the pre-calibrated time T1 and T2, to ensure that the gain adjustment takes effect just when the radio frequency signal is received.

[0019] In some alternative implementations, the adjustment module includes a comparator; the comparator is used to compare the voltage signal output by the detector with a comparison voltage and output a control level to the controlled terminal of the digitally controlled attenuator or low-noise amplifier.

[0020] In the above technical solution, the voltage signal output by the detector is positively correlated with the signal strength of the radio frequency (RF) signal. A comparator compares the voltage signal with a comparison voltage. When the voltage signal is greater than the comparison voltage, a high-level control signal is output to the digitally controlled attenuator (DCA) to control the DCA to attenuate the RF signal gain, and / or, a low-level control signal is output to the low-noise amplifier (LNA), with the control signal bypassed by the LNA. When the voltage signal is less than the comparison voltage, a low-level control signal is output to the DCA to control the DCA not to attenuate the RF signal gain, and / or, a high-level control signal is output to the LNA to control the LNA to amplify the signal.

[0021] In some optional implementations, the adjustment module includes a first comparator, a second comparator, a third comparator, and a fourth comparator; the first comparator compares the voltage signal output by the detector with a first comparison voltage and outputs a first control level to a first controlled terminal of the digitally controlled attenuator; the second comparator compares the voltage signal output by the detector with a second comparison voltage and outputs a second control level to a second controlled terminal of the digitally controlled attenuator; the third comparator compares the voltage signal output by the detector with a third comparison voltage and outputs a third control level to a third controlled terminal of the digitally controlled attenuator; the fourth comparator compares the voltage signal output by the detector with a fourth comparison voltage and outputs a fourth control level to a controlled terminal of the low-noise amplifier; wherein, 0 < first comparison voltage < second comparison voltage < fourth comparison voltage < third comparison voltage.

[0022] In the above technical solution, control signals are generated and transmitted to the first, second, and third controlled terminals of the digitally controlled attenuator and the controlled terminal of the low-noise amplifier through parallel processing of the first, second, third, and fourth comparators, respectively. Specifically, this includes:

[0023] When the voltage signal is less than the first comparison voltage, the first comparator outputs a low level to the first controlled terminal of the digitally controlled attenuator, the second comparator outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled terminal of the low-noise amplifier.

[0024] When the voltage signal is greater than the first comparison voltage and less than the second comparison voltage, the first comparator outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second comparator outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled terminal of the low-noise amplifier.

[0025] When the voltage signal is greater than the second comparison voltage and less than the fourth comparison voltage, the first comparator outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second comparator outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled terminal of the low-noise amplifier.

[0026] When the voltage signal is greater than the fourth comparison voltage and less than the third comparison voltage, the first comparator outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second comparator outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a high level to the controlled terminal of the low-noise amplifier.

[0027] When the voltage signal is greater than the third comparison voltage, the first comparator outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second comparator outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third comparator outputs a high level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a high level to the controlled terminal of the low-noise amplifier.

[0028] In some alternative implementations, the regulation module includes a MOSFET;

[0029] MOSFETs are used to obtain and output corresponding control levels to the controlled terminals of digitally controlled attenuators or low-noise amplifiers based on the voltage signal output by the detector.

[0030] In the above technical solution, the voltage signal output by the detector is positively correlated with the signal strength of the radio frequency (RF) signal. A MOSFET is used to compare the voltage signal with a comparison voltage. When the voltage signal is greater than the comparison voltage, a high-level control signal is output to the digitally controlled attenuator (DCA) to control the DCA to attenuate the RF signal gain, and / or, a low-level control signal is output to the low-noise amplifier (LNOA), with the control signal bypassed by the LNOA. When the voltage signal is less than the comparison voltage, a low-level control signal is output to the DCA to control the DCA not to attenuate the RF signal gain, and / or, a high-level control signal is output to the LNOA to control the LNOA to amplify the signal.

[0031] In some optional implementations, the adjustment module includes: a first MOSFET, a second MOSFET, a third MOSFET, and a fourth MOSFET; the first MOSFET is used to obtain and output a first control level to a first controlled terminal of the digitally controlled attenuator based on the voltage signal output by the detector; the second MOSFET is used to obtain and output a second control level to a second controlled terminal of the digitally controlled attenuator based on the voltage signal output by the detector; the third MOSFET is used to obtain and output a third control level to a third controlled terminal of the digitally controlled attenuator based on the voltage signal output by the detector; and the fourth MOSFET is used to obtain and output a fourth control level to a controlled terminal of the low-noise amplifier based on the voltage signal output by the detector.

[0032] In the above technical solution, the voltage signal output by the detector enters different MOSFETs after passing through different voltage divider resistors. Then, through parallel processing by the first, second, third, and fourth MOSFETs, control signals are generated and transmitted to the first, second, and third controlled terminals of the digitally controlled attenuator, as well as the controlled terminal of the low-noise amplifier. Specifically, this includes:

[0033] When the voltage signal is less than the first comparison voltage, the first MOSFET outputs a low level to the first controlled terminal of the digitally controlled attenuator, the second MOSFET outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third MOSFET outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a low level to the controlled terminal of the low-noise amplifier.

[0034] When the voltage signal is greater than the first comparison voltage and less than the second comparison voltage, the first MOSFET outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second MOSFET outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third MOSFET outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a low level to the controlled terminal of the low-noise amplifier.

[0035] When the voltage signal is greater than the second comparison voltage and less than the fourth comparison voltage, the first MOSFET outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second MOSFET outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third MOSFET outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a low level to the controlled terminal of the low-noise amplifier.

[0036] When the voltage signal is greater than the fourth comparison voltage and less than the third comparison voltage, the first MOSFET outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second MOSFET outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third MOSFET outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a high level to the controlled terminal of the low-noise amplifier.

[0037] When the voltage signal is greater than the third comparison voltage, the first MOSFET outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second MOSFET outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third MOSFET outputs a high level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a high level to the controlled terminal of the low-noise amplifier.

[0038] In some alternative implementations, the first controlled terminal of the digitally controlled attenuator corresponds to a controllable attenuation of 4dB, the first controlled terminal of the digitally controlled attenuator corresponds to a controllable attenuation of 8dB, and the first controlled terminal of the digitally controlled attenuator corresponds to a controllable attenuation of 16dB.

[0039] The low-noise amplifier has a maximum gain of 22dB and a minimum gain of -1dB.

[0040] In the above technical solution, when the voltage signal is less than the first comparison voltage, the first MOSFET outputs a low level to the first controlled terminal of the digitally controlled attenuator, the second MOSFET outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third MOSFET outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a low level to the controlled terminal of the low-noise amplifier. At this time, the digitally controlled attenuator is in a non-attenuation state, the low-noise amplifier is in amplification state, and the gain of the link is 22dB.

[0041] When the voltage signal is greater than the first comparison voltage and less than the second comparison voltage, the first MOSFET outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuation of 4dB), the second MOSFET outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third MOSFET outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a low level to the controlled terminal of the low-noise amplifier. At this time, the digitally controlled attenuator attenuates by 4dB, the low-noise amplifier is in amplification mode, and the gain of the link is 18dB.

[0042] When the voltage signal is greater than the second comparison voltage and less than the fourth comparison voltage, the first MOSFET outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuation of 4dB), the second MOSFET outputs a high level to the second controlled terminal of the digitally controlled attenuator (attenuation of 8dB), the third MOSFET outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a low level to the controlled terminal of the low-noise amplifier. At this time, the digitally controlled attenuator attenuates a total of 12dB, the low-noise amplifier is in amplification mode, and the gain of the link is 10dB.

[0043] When the voltage signal is greater than the fourth comparison voltage and less than the third comparison voltage, the first MOSFET outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuation of 4dB), the second MOSFET outputs a high level to the second controlled terminal of the digitally controlled attenuator (attenuation of 8dB), the third MOSFET outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a high level to the controlled terminal of the low-noise amplifier (attenuation of 1dB). At this time, the digitally controlled attenuator attenuates a total of 12dB, the low-noise amplifier is in bypass mode, and the link gain is -13dB.

[0044] When the voltage signal exceeds the third comparison voltage, the first MOSFET outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second MOSFET outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third MOSFET outputs a high level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a high level to the controlled terminal of the low-noise amplifier. At this time, the digitally controlled attenuator attenuates by a total of 28dB, the low-noise amplifier is in bypass mode, and the link gain is -29dB.

[0045] In summary, the automatic gain adjustment range of the link is -29dB to +22dB, and the gain range is 51dB.

[0046] This application provides a satellite terminal, including a receiving radio frequency link conditioning circuit as described above. Attached Figure Description

[0047] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0048] Figure 1 A schematic diagram of a receiving radio frequency link conditioning circuit structure provided in the first embodiment of this application;

[0049] Figure 2 A schematic diagram of a receiving radio frequency link conditioning circuit structure provided in the second embodiment of this application;

[0050] Figure 3 A schematic diagram of a receiving radio frequency link conditioning circuit structure provided in the third embodiment of this application;

[0051] Figure 4 This is a schematic diagram of a receiving radio frequency link conditioning circuit structure provided in the fourth embodiment of this application. Detailed Implementation

[0052] The technical solutions in the embodiments of this application will now be described with reference to the accompanying drawings.

[0053] The purpose of this application is to provide a receiving radio frequency link adjustment circuit and a satellite terminal to solve the problem that the existing receiving radio frequency link gain control has high delay and poses a risk of burning out radio frequency back-end devices.

[0054] Please refer to Figure 1 , Figure 1 The first embodiment of this application provides a schematic diagram of a receiving radio frequency link adjustment circuit structure, including: a digitally controlled attenuator, an adjustment module, a detector, a signal coupler, and a baseband processor.

[0055] The signal coupler is used to: send radio frequency signals to the digitally controlled attenuator, and simultaneously send the coupled signal from the signal coupler to the detector.

[0056] The detector is used to determine the corresponding voltage signal based on the signal strength of the coupled signal; and, when an indication signal is received, it outputs a voltage signal to the regulation module.

[0057] The adjustment module is used to adjust the gain of the digitally controlled attenuator based on the voltage signal. The adjustment module, such as a voltage comparator or MOSFET, compares the voltage signal with a corresponding threshold and outputs high or low level signals to the adjustment port of the digitally controlled attenuator to achieve gain adjustment.

[0058] The baseband processor sends an indication signal to the detector at a set time before the start of the baseband signal's cyclic prefix. This indication signal instructs the detector to output the voltage signal corresponding to the previous cycle of the RF signal. Specifically, the detector receives a new voltage signal in each cycle. At the start of the current cycle, the indication signal controls the detector to continue outputting the voltage signal from the previous cycle until the detector generates the voltage signal for the current cycle, at which point the detector updates its output voltage signal. The baseband signal is the RF signal that has been processed and enters the baseband processor. The start of the baseband signal's cyclic prefix is ​​the point where the cyclic prefix in the baseband signal begins.

[0059] Among them, the radio frequency signal (i.e., the satellite signal) is periodic, and the signal strength of adjacent cycles does not change abruptly. Therefore, the gain adjustment strategy corresponding to the signal strength of the previous cycle (i.e., the voltage signal corresponding to the previous cycle of the radio frequency signal) can be used to adjust the digitally controlled attenuator in the current cycle.

[0060] In this embodiment, the baseband processor sends an indication signal to the detector at a predetermined time before the start of the baseband signal cyclic prefix. This ensures that the link gain adjustment is completed by the time the RF signal is received, reducing control delay and achieving TTI-level real-time response. The reduced control delay avoids the risk of RF back-end devices burning out due to excessive control delay. Utilizing the periodicity of RF signals (satellite signals) and the fact that signal strength does not change abruptly between adjacent cycles, a gain adjustment strategy corresponding to the signal strength of the previous cycle is used to adjust the digitally controlled attenuator in the current cycle, ensuring the rationality and effectiveness of gain adjustment.

[0061] Please refer to Figure 2 , Figure 2 This is a schematic diagram of a receiving radio frequency link conditioning circuit structure provided in the second embodiment of this application.

[0062] In some alternative implementations, the baseband processor is also configured to instruct the detector to output a voltage signal corresponding to the current cycle of the radio frequency signal when there is no voltage signal corresponding to the previous cycle of the radio frequency signal.

[0063] In this embodiment, when the baseband processor does not have a voltage signal corresponding to the previous cycle of the RF signal, it instructs the detector to output the voltage signal corresponding to the current cycle of the RF signal. This allows the circuit to adapt to various complex operating scenarios. Whether it is the first reception of a signal or a re-reception after a signal interruption, gain adjustment can be performed to ensure the normal operation of the receiving RF link, greatly improving the adaptability of the circuit.

[0064] Specifically, in one possible embodiment, when the detector obtains a voltage signal based on the coupling signal, it sends the voltage signal to the baseband processor. If the baseband processor does not have a voltage signal from the previous cycle, it will immediately instruct the detector to output the voltage signal, thereby achieving gain adjustment. That is, there is a certain time delay in the first gain adjustment, but there will be no time delay (or the time delay will be reduced) in subsequent gain adjustment processes.

[0065] In some alternative implementations, a time T is set:

[0066] T = T2 + T1;

[0067] Where T1 is the time from the start point of the cyclic prefix input of the RF signal to the start point of the cyclic prefix of the baseband signal in the same period, and T2 is the time from the start point of the cyclic prefix of the baseband signal to the adjustment taking effect in the same period.

[0068] In this embodiment, T1 is the time from the start point of the cyclic prefix of the RF signal to the start point of the cyclic prefix of the baseband signal within the same period, and T2 is the time from the start point of the cyclic prefix of the baseband signal to the adjustment taking effect within the same period. By defining the set time T as the sum of T1 and T2, the total time required from the start point of the cyclic prefix of the RF signal to the gain adjustment taking effect can be accurately calculated. When the baseband processor sends an indication signal to the detector at the set time T, it can be ensured that the gain adjustment takes effect precisely when the RF signal is received, achieving a precise match between the timing of gain adjustment and the period of the RF signal, and avoiding problems caused by adjusting too early or too late.

[0069] Specifically, if the gain adjustment is completed too early, before the RF signal arrives, it may cause signal distortion. If the adjustment is too late, the RF signal has already entered the receiving link before the gain adjustment takes effect, which may damage the RF back-end devices due to excessive signal strength. By precisely setting the time T, these problems are effectively avoided, ensuring accurate signal reception.

[0070] In some optional implementations, it also includes: a radio frequency transceiver chip;

[0071] Radio frequency transceiver chips are used to convert the analog signals output by low-noise amplifiers into digital baseband signals and transmit the baseband signals to the baseband processor;

[0072] The baseband processor is also used to determine the start point of the baseband signal cyclic prefix based on the baseband signal.

[0073] In this embodiment of the application, after the baseband processor determines the start point of the baseband signal cyclic prefix, it sends an indication signal to the detector at the start point of the baseband signal cyclic prefix of the next cycle T1+T2 in advance according to the pre-calibrated time T1 and T2, so as to ensure that the gain adjustment takes effect just when the radio frequency signal is received.

[0074] In some alternative implementations, a low-noise amplifier with bypass is also included;

[0075] The adjustment module is also used to adjust the gain of the low-noise amplifier based on the voltage signal.

[0076] In real-world communication scenarios, signal strength can fluctuate significantly due to factors such as distance, obstacles, and interference. Low-noise amplifiers with bypass provide an additional transmission path for the signal. When the input signal strength is too high, the signal can be transmitted through the bypass without going through the amplification stage, enabling the system to handle a wide range of signal strengths from extremely weak to relatively strong, greatly expanding the dynamic range of signal reception.

[0077] The adjustment module adjusts the gain of the low-noise amplifier based on the voltage signal, realizing automatic control of the low-noise amplifier's operating state. That is, it automatically selects the amplified signal or transmits the signal through bypass according to the strength of the input signal, ensuring that the signal is always within the appropriate processing range.

[0078] In some alternative implementations, the adjustment module includes a comparator;

[0079] The comparator is used to compare the voltage signal output by the detector with the comparison voltage and output a control level to the controlled terminal of the digitally controlled attenuator or low-noise amplifier.

[0080] In this embodiment, the voltage signal output by the detector is positively correlated with the signal strength of the radio frequency (RF) signal. A comparator compares the voltage signal with a comparison voltage. When the voltage signal is greater than the comparison voltage, a high-level control signal is output to the digitally controlled attenuator (DCA) to control the DCA to attenuate the RF signal gain, and / or, a low-level control signal is output to the low-noise amplifier (LNA), with the control signal bypassed by the LNA. When the voltage signal is less than the comparison voltage, a low-level control signal is output to the DCA to control the DCA not to attenuate the RF signal gain, and / or, a high-level control signal is output to the LNA to control the LNA to amplify the signal.

[0081] Specifically, please refer to Figure 3 , Figure 3This is a schematic diagram of a receiving radio frequency link adjustment circuit structure provided in the third embodiment of this application. The adjustment module of this embodiment includes a first comparator, a second comparator, a third comparator, and a fourth comparator; the voltage signal output by the detector is simultaneously input to the first comparator, the second comparator, the third comparator, and the fourth comparator, and the corresponding control level is obtained by the first comparator, the second comparator, the third comparator, and the fourth comparator in parallel processing.

[0082] The first comparator is used to compare the voltage signal output by the detector with the first comparison voltage, and output the first control level to the first controlled terminal of the digitally controlled attenuator;

[0083] The second comparator is used to compare the voltage signal output by the detector with the second comparison voltage, and output the second control level to the second controlled terminal of the digitally controlled attenuator;

[0084] The third comparator is used to compare the voltage signal output by the detector with the third comparison voltage, and outputs the third control level to the third controlled terminal of the digitally controlled attenuator.

[0085] The fourth comparator is used to compare the voltage signal output by the detector with the fourth comparison voltage, and outputs the fourth control level to the controlled terminal of the low noise amplifier.

[0086] In this sequence, 0 < First comparison voltage < Second comparison voltage < Fourth comparison voltage < Third comparison voltage. It should be noted that the voltage signal strength is positively correlated with the RF signal strength. The first, second, third, and fourth voltages are also related to the RF signal strength. The relative magnitudes of the first, second, third, and fourth voltages are related to the adjustable attenuation value of the digitally controlled attenuator (or the amplification factor of the low-noise amplifier). For example, 0 < First comparison voltage (0.4V) < Second comparison voltage (1V) < Fourth comparison voltage (2V) < Third comparison voltage (3.4V).

[0087] In this embodiment, control signals are generated and transmitted to the first controlled terminal, the second controlled terminal, the third controlled terminal, and the controlled terminal of the digitally controlled attenuator, and the controlled terminal of the low-noise amplifier through parallel processing of the first comparator, the second comparator, the third comparator, and the fourth comparator, respectively. Specifically, this includes:

[0088] When the voltage signal is less than the first comparison voltage, the first comparator outputs a low level to the first controlled terminal of the digitally controlled attenuator, the second comparator outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled terminal of the low-noise amplifier.

[0089] When the voltage signal is greater than the first comparison voltage and less than the second comparison voltage, the first comparator outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second comparator outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled terminal of the low-noise amplifier.

[0090] When the voltage signal is greater than the second comparison voltage and less than the fourth comparison voltage, the first comparator outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second comparator outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled terminal of the low-noise amplifier.

[0091] When the voltage signal is greater than the fourth comparison voltage and less than the third comparison voltage, the first comparator outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second comparator outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a high level to the controlled terminal of the low-noise amplifier.

[0092] When the voltage signal is greater than the third comparison voltage, the first comparator outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second comparator outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third comparator outputs a high level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a high level to the controlled terminal of the low-noise amplifier.

[0093] In some alternative implementations, the first controlled terminal of the digitally controlled attenuator corresponds to a controllable attenuation of 4dB, the first controlled terminal of the digitally controlled attenuator corresponds to a controllable attenuation of 8dB, and the first controlled terminal of the digitally controlled attenuator corresponds to a controllable attenuation of 16dB; the maximum gain of the low-noise amplifier is 22dB, and the minimum gain of the low-noise amplifier is -1dB.

[0094] In this embodiment, when the voltage signal is less than the first comparison voltage, the first comparator outputs a low level to the first controlled terminal of the digitally controlled attenuator, the second comparator outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled terminal of the low-noise amplifier. At this time, the digitally controlled attenuator is in a non-attenuation state, the low-noise amplifier is in amplification state, and the gain of the link is 22dB.

[0095] When the voltage signal is greater than the first comparison voltage and less than the second comparison voltage, the first comparator outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuation of 4dB), the second comparator outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled terminal of the low-noise amplifier. At this time, the digitally controlled attenuator attenuates by 4dB, the low-noise amplifier is in amplification mode, and the gain of the link is 18dB.

[0096] When the voltage signal is greater than the second comparison voltage and less than the fourth comparison voltage, the first comparator outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuation of 4dB), the second comparator outputs a high level to the second controlled terminal of the digitally controlled attenuator (attenuation of 8dB), the third comparator outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled terminal of the low-noise amplifier. At this time, the digitally controlled attenuator attenuates a total of 12dB, the low-noise amplifier is in amplification mode, and the link gain is 10dB.

[0097] When the voltage signal is greater than the fourth comparison voltage and less than the third comparison voltage, the first comparator outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuation of 4dB), the second comparator outputs a high level to the second controlled terminal of the digitally controlled attenuator (attenuation of 8dB), the third comparator outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a high level to the controlled terminal of the low-noise amplifier (attenuation of 1dB). At this time, the digitally controlled attenuator attenuates a total of 12dB, the low-noise amplifier is in bypass mode, and the link gain is -13dB.

[0098] When the voltage signal is greater than the third comparison voltage, the first comparator outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second comparator outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third comparator outputs a high level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a high level to the controlled terminal of the low-noise amplifier. At this time, the digitally controlled attenuator attenuates by a total of 28dB, the low-noise amplifier is in bypass mode, and the link gain is -29dB.

[0099] Therefore, in this embodiment, the automatic gain adjustment range of the entire link is -29dB to +22dB, and the gain range is 51dB.

[0100] In some alternative implementations, the regulation module includes a MOSFET;

[0101] MOSFETs are used to obtain and output corresponding control levels to the controlled terminals of digitally controlled attenuators or low-noise amplifiers based on the voltage signal output by the detector.

[0102] In this embodiment, the voltage signal output by the detector is positively correlated with the signal strength of the radio frequency (RF) signal. A MOSFET is used to compare the voltage signal with a comparison voltage. When the voltage signal is greater than the comparison voltage, a high-level control signal is output to the digitally controlled attenuator (DCA) to control the DCA to attenuate the RF signal gain, and / or, a low-level control signal is output to the low-noise amplifier (LNA), with the control signal bypassed by the LNA. When the voltage signal is less than the comparison voltage, a low-level control signal is output to the DCA to control the DCA not to attenuate the RF signal gain, and / or, a high-level control signal is output to the LNA to control the LNA to amplify the signal.

[0103] Specifically, please refer to Figure 4 , Figure 4 This is a schematic diagram of a receiving radio frequency link adjustment circuit structure provided in the fourth embodiment of this application. The adjustment module of this embodiment includes: a first MOSFET, a second MOSFET, a third MOSFET, and a fourth MOSFET;

[0104] The first MOSFET is used to obtain and output a first control level to the first controlled terminal of the digitally controlled attenuator based on the voltage signal output by the detector.

[0105] The second MOSFET is used to obtain and output a second control level to the second controlled terminal of the digitally controlled attenuator based on the voltage signal output by the detector.

[0106] The third MOSFET is used to obtain and output the third control level to the third controlled terminal of the digitally controlled attenuator based on the voltage signal output by the detector.

[0107] The fourth MOSFET is used to obtain and output a fourth control level to the controlled terminal of the low-noise amplifier based on the voltage signal output by the detector.

[0108] In this embodiment, the voltage signal output by the detector passes through different voltage divider resistors and then enters different MOSFETs. Through parallel processing by the first, second, third, and fourth MOSFETs, control signals are generated and transmitted to the first, second, and third controlled terminals of the digitally controlled attenuator and the controlled terminal of the low-noise amplifier, respectively. Specifically, this includes:

[0109] When the voltage signal is less than the first comparison voltage, the first MOSFET outputs a low level to the first controlled terminal of the digitally controlled attenuator, the second MOSFET outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third MOSFET outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a low level to the controlled terminal of the low-noise amplifier.

[0110] When the voltage signal is greater than the first comparison voltage and less than the second comparison voltage, the first MOSFET outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second MOSFET outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third MOSFET outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a low level to the controlled terminal of the low-noise amplifier.

[0111] When the voltage signal is greater than the second comparison voltage and less than the fourth comparison voltage, the first MOSFET outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second MOSFET outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third MOSFET outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a low level to the controlled terminal of the low-noise amplifier.

[0112] When the voltage signal is greater than the fourth comparison voltage and less than the third comparison voltage, the first MOSFET outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second MOSFET outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third MOSFET outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a high level to the controlled terminal of the low-noise amplifier.

[0113] When the voltage signal is greater than the third comparison voltage, the first MOSFET outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second MOSFET outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third MOSFET outputs a high level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a high level to the controlled terminal of the low-noise amplifier.

[0114] In some alternative implementations, the first controlled terminal of the digitally controlled attenuator corresponds to a controllable attenuation of 4dB, the first controlled terminal of the digitally controlled attenuator corresponds to a controllable attenuation of 8dB, and the first controlled terminal of the digitally controlled attenuator corresponds to a controllable attenuation of 16dB.

[0115] The low-noise amplifier has a maximum gain of 22dB and a minimum gain of -1dB.

[0116] In this embodiment, when the voltage signal is less than the first comparison voltage, the first MOSFET outputs a low level to the first controlled terminal of the digitally controlled attenuator, the second MOSFET outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third MOSFET outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a low level to the controlled terminal of the low-noise amplifier. At this time, the digitally controlled attenuator is in a non-attenuation state, the low-noise amplifier is in amplification state, and the gain of the link is 22dB.

[0117] When the voltage signal is greater than the first comparison voltage and less than the second comparison voltage, the first MOSFET outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuation of 4dB), the second MOSFET outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third MOSFET outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a low level to the controlled terminal of the low-noise amplifier. At this time, the digitally controlled attenuator attenuates by 4dB, the low-noise amplifier is in amplification mode, and the gain of the link is 18dB.

[0118] When the voltage signal is greater than the second comparison voltage and less than the fourth comparison voltage, the first MOSFET outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuation of 4dB), the second MOSFET outputs a high level to the second controlled terminal of the digitally controlled attenuator (attenuation of 8dB), the third MOSFET outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a low level to the controlled terminal of the low-noise amplifier. At this time, the digitally controlled attenuator attenuates a total of 12dB, the low-noise amplifier is in amplification mode, and the gain of the link is 10dB.

[0119] When the voltage signal is greater than the fourth comparison voltage and less than the third comparison voltage, the first MOSFET outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuation of 4dB), the second MOSFET outputs a high level to the second controlled terminal of the digitally controlled attenuator (attenuation of 8dB), the third MOSFET outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a high level to the controlled terminal of the low-noise amplifier (attenuation of 1dB). At this time, the digitally controlled attenuator attenuates a total of 12dB, the low-noise amplifier is in bypass mode, and the link gain is -13dB.

[0120] When the voltage signal exceeds the third comparison voltage, the first MOSFET outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second MOSFET outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third MOSFET outputs a high level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOSFET outputs a high level to the controlled terminal of the low-noise amplifier. At this time, the digitally controlled attenuator attenuates by a total of 28dB, the low-noise amplifier is in bypass mode, and the link gain is -29dB.

[0121] Therefore, in this embodiment, the automatic gain adjustment range of the entire link is -29dB to +22dB, and the gain range is 51dB.

[0122] This application provides a satellite terminal, including a receiving radio frequency link conditioning circuit as described above.

[0123] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. Furthermore, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Additionally, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some communication interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.

[0124] Furthermore, the units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0125] Furthermore, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0126] In this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, without necessarily requiring or implying any such actual relationship or order between these entities or operations.

[0127] The above description is merely an embodiment of this application and is not intended to limit the scope of protection of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A receiving radio frequency link conditioning circuit, characterized in that, include: Numerical control attenuator, adjustment module, detector, signal coupler, and baseband processor; The signal coupler is used for: radio frequency signals passing through the signal coupler to reach the digitally controlled attenuator, and simultaneously, the coupled signal of the signal coupler enters the detector; The detector is used to determine the corresponding voltage signal based on the signal strength of the coupled signal; and to output the voltage signal to the adjustment module when an indication signal is received. The adjustment module is used to adjust the gain of the digitally controlled attenuator according to the voltage signal; The baseband processor is used to send an indication signal to the detector at a time before the start of the baseband signal cyclic prefix; the indication signal is used to indicate the voltage signal corresponding to the previous cycle of the detector output radio frequency signal.

2. The circuit as described in claim 1, characterized in that, The baseband processor is also configured to instruct the detector to output the voltage signal corresponding to the current cycle of the radio frequency signal when there is no voltage signal corresponding to the previous cycle of the radio frequency signal.

3. The circuit as described in claim 1, characterized in that, The set time T: T = T2 + T1; Where T1 is the time from the start point of the cyclic prefix input of the RF signal to the start point of the cyclic prefix of the baseband signal in the same period, and T2 is the time from the start point of the cyclic prefix of the baseband signal to the adjustment taking effect in the same period.

4. The circuit as described in claim 1, characterized in that, Also includes: A low-noise amplifier with bypass; the radio frequency signal passes sequentially through the signal coupler and the digitally controlled attenuator to reach the low-noise amplifier; The adjustment module is also used to adjust the gain of the low-noise amplifier according to the voltage signal.

5. The circuit as described in claim 4, characterized in that, Also includes: Radio frequency transceiver chip; the radio frequency signal passes sequentially through the signal coupler, digitally controlled attenuator, and low-noise amplifier to reach the radio frequency transceiver chip; The radio frequency transceiver chip is used to convert the analog signal output by the low noise amplifier into a digital baseband signal and transmit the baseband signal to the baseband processor; The baseband processor is also used to determine the starting point of the baseband signal cyclic prefix based on the baseband signal.

6. The circuit as described in claim 5, characterized in that, The adjustment module includes a comparator; The comparator is used to compare the voltage signal output by the detector with the comparison voltage, and output a control level to the controlled terminal of the digitally controlled attenuator or the low-noise amplifier.

7. The circuit as described in claim 6, characterized in that, The adjustment module includes a first comparator, a second comparator, a third comparator, and a fourth comparator; The first comparator is used to compare the voltage signal output by the detector with a first comparison voltage, and output a first control level to the first controlled terminal of the digitally controlled attenuator; The second comparator is used to compare the voltage signal output by the detector with the second comparison voltage, and output a second control level to the second controlled terminal of the digitally controlled attenuator; The third comparator is used to compare the voltage signal output by the detector with the third comparison voltage, and output the third control level to the third controlled terminal of the digitally controlled attenuator; The fourth comparator is used to compare the voltage signal output by the detector with the fourth comparison voltage, and output the fourth control level to the controlled terminal of the low noise amplifier. Wherein, 0 < first comparison voltage < second comparison voltage < fourth comparison voltage < third comparison voltage.

8. The circuit as described in claim 5, characterized in that, The adjustment module includes a MOSFET; The MOS transistor is used to obtain and output a corresponding control level to the controlled terminal of the digitally controlled attenuator or the low-noise amplifier based on the voltage signal output by the detector.

9. The circuit as described in claim 8, characterized in that, The adjustment module includes: a first MOSFET, a second MOSFET, a third MOSFET, and a fourth MOSFET; The first MOS transistor is used to obtain and output a first control level to the first controlled terminal of the digitally controlled attenuator based on the voltage signal output by the detector. The second MOS transistor is used to obtain and output a second control level to the second controlled terminal of the digitally controlled attenuator based on the voltage signal output by the detector. The third MOS transistor is used to obtain and output a third control level to the third controlled terminal of the digitally controlled attenuator based on the voltage signal output by the detector. The fourth MOS transistor is used to obtain and output a fourth control level to the controlled terminal of the low-noise amplifier based on the voltage signal output by the detector.

10. A satellite terminal, characterized in that, Includes a receiving radio frequency link conditioning circuit as described in any one of claims 1-9 above.

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