Display panel, preparation method thereof and display device

Abstract

The embodiment of the invention provides a display panel, a preparation method thereof and a display device, relates to the technical field of display, and is used for improving the reliability of the display panel. The display panel comprises a substrate, a color film layer, a first electrode layer and a pixel defining layer, the color film layer is arranged on one side of the substrate; the first electrode layer is arranged on the side, away from the substrate, of the color film layer; the first electrode layer comprises a plurality of first electrode parts which are arranged at intervals, and each first electrode part comprises a main body part and an edge part which surrounds at least part of the main body part and is connected with the main body part; at least part of the pixel defining layer is located on the side, away from the substrate, of the first electrode part and covers the surface, away from the substrate, of the edge part, and at least part of the pixel defining layer is further located on the side, close to the substrate, of the edge part. The display panel is used for displaying images.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] Organic Light-Emitting Diode (OLED) display panels have gradually become a mainstream product in the display industry due to their excellent performance, including self-luminescence, lack of backlighting, high contrast, thinness, wide viewing angle, fast response time, flexibility, wide operating temperature range, and simple structure and manufacturing process. Improving the reliability of display panels is a pressing technical issue in display panel manufacturing. Summary of the Invention

[0003] An object of the embodiments of the present disclosure is to provide a display panel, a method for manufacturing the same, and a display device, so as to improve the reliability of the display panel.

[0004] To achieve the above objectives, the embodiments of the present disclosure provide the following technical solutions:

[0005] In one aspect, a display panel is provided. The display panel includes a substrate, a color filter layer, a first electrode layer, and a pixel defining layer. The color filter layer is disposed on one side of the substrate. The first electrode layer is disposed on a side of the color filter layer away from the substrate. The first electrode layer includes a plurality of spaced-apart first electrode portions, each of which includes a main portion and an edge portion surrounding at least a portion of the main portion and connected to the main portion. At least a portion of the pixel defining layer is located on a side of the first electrode portion away from the substrate, covering a surface of the edge portion away from the substrate, and at least a portion of the pixel defining layer is also located on a side of the edge portion closer to the substrate.

[0006] In the above-mentioned display panel, the first electrode layer is arranged on the side of the color filter layer away from the substrate, so that the display panel is a bottom-emitting display panel. In the bottom-emitting display panel, when light is emitted from the first electrode layer through the substrate, the light generated by adjacent pixels is prone to lateral diffusion during the propagation process. Since the first electrode portion includes a main body portion and an edge portion surrounding at least part of the main body portion and connected to the main body portion, at least part of the pixel defining layer is located on the side of the first electrode portion away from the substrate, and covers the surface of the edge portion away from the substrate. At least part of the pixel defining layer is also located on the side of the edge portion close to the substrate. Since the pixel defining layer has low visible light transmittance and wraps the edge portion of the first electrode portion, this can limit the diffusion path of light, block the lateral propagation of light, avoid optical crosstalk between pixels and adjacent pixels when the display panel is emitting light, and prevent the display panel from displaying uneven brightness due to optical crosstalk, thereby improving the reliability of the display panel.

[0007] In some embodiments, the width of a portion of the pixel defining layer covering the surface of the edge portion away from the substrate is greater than the width of a portion of the pixel defining layer located on a side of the edge portion close to the substrate; the width is a dimension perpendicular to the thickness direction of the substrate.

[0008] In some embodiments, the thickness of the portion of the pixel defining layer covering the edge portion away from the surface of the substrate is greater than the thickness of the portion of the pixel defining layer located on the side of the edge portion close to the substrate; the thickness is the dimension along the thickness direction of the substrate.

[0009] In some embodiments, it also includes: a first flat layer, arranged between the color filter layer and the first electrode layer; a plurality of grooves are provided in the first flat layer, the orthographic projection of the main body on the surface of the substrate is located between adjacent grooves, and the edge portion forms a first cantilever at the groove.

[0010] In some embodiments, the first planar layer further covers at least a portion of the surface of the edge portion close to the substrate.

[0011] In some embodiments, a portion of the first planar layer that covers at least a portion of the edge portion close to the surface of the substrate is an extension portion; and the pixel defining layer further covers the surface of the extension portion close to the substrate.

[0012] In some embodiments, the pixel defining layer has a first opening, at least a portion of the main body is located at a bottom of the first opening, and the edge portion is embedded in a sidewall of the first opening.

[0013] In some embodiments, visible light transmittance of the pixel defining layer is less than visible light transmittance of the first planar layer.

[0014] In some embodiments, the visible light transmittance of the pixel defining layer is 0-90%.

[0015] In some embodiments, the first electrode layer further includes: a plurality of connection portions arranged at intervals, one of the connection portions being connected to one of the first electrode portions; the display panel further includes: a pixel circuit, provided between the substrate and the color filter layer, the connection portion being electrically connected to the pixel circuit through the first flat layer.

[0016] In some embodiments, an edge of the connecting portion away from the first electrode portion forms a second cantilever at the groove, and the pixel defining layer further covers a surface of the second cantilever away from the substrate and a side of the second cantilever close to the substrate.

[0017] In another aspect, a display device is provided, comprising the display panel according to any one of the above embodiments; and a circuit board electrically connected to the display panel.

[0018] The above-mentioned display device has the same structure and beneficial technical effects as the display panels provided in some of the above-mentioned embodiments, which will not be described in detail here.

[0019] On the other hand, a method for preparing a display panel is provided, comprising: forming a color filter layer on one side of a substrate; forming a first electrode layer on a side of the color filter layer away from the substrate, the first electrode layer comprising a plurality of first electrode portions spaced apart, the first electrode portion comprising a main portion, and an edge portion surrounding at least a portion of the main portion and connected to the main portion; forming a pixel defining layer, at least a portion of the pixel defining layer being located on a side of the first electrode portion away from the substrate and covering a surface of the edge portion away from the substrate, and at least a portion of the pixel defining layer being also located on a side of the edge portion close to the substrate.

[0020] In some embodiments, before forming the color filter layer on one side of the substrate, it also includes: forming a circuit structure layer on one side of the substrate, the circuit structure layer including a plurality of pixel circuits; after forming the color filter layer on one side of the substrate, forming an initial first flat layer on a side of the color filter layer away from the substrate, the initial first flat layer having a second opening penetrating the initial first flat layer; forming the first electrode layer on a side of the initial first flat layer away from the substrate, the first electrode layer being electrically connected to the pixel circuit through the second opening; and ashing the initial first flat layer using the first electrode layer as a mask to form a plurality of grooves in the initial first flat layer, and the edges of the first electrode layer form cantilevers at the grooves. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] To more clearly illustrate the technical solutions of the present disclosure, the following briefly introduces the drawings required for use in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure, and those skilled in the art can also derive other drawings based on these drawings. Furthermore, the drawings described below are schematic diagrams and are not intended to limit the actual dimensions of the products, actual processes of the methods, actual timing of signals, and the like involved in the embodiments of the present disclosure.

[0022] Figure 1 A structural diagram of a display device provided for some embodiments of the present disclosure;

[0023] Figure 2 A top view of a display panel provided for some embodiments of the present disclosure;

[0024] Figure 3 for Figure 2 A cross-sectional view of a local structure of the display panel along the AA direction;

[0025] Figure 4 for Figure 2 A cross-sectional view of another partial structure of the display panel along the AA direction;

[0026] Figure 5 A structural diagram of a display device provided for some embodiments of the present disclosure;

[0027] Figure 6 A schematic flow chart of a method for manufacturing a display panel provided in some embodiments of the present disclosure;

[0028] Figures 7 to 10 A schematic diagram of a process of manufacturing a display panel provided in some embodiments of the present disclosure. DETAILED DESCRIPTION

[0029] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the embodiments described are only some embodiments of the present disclosure, not all embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of the present disclosure.

[0030] Unless the context requires otherwise, throughout the specification and claims, the term "including" is to be interpreted as having an open, inclusive meaning, that is, "including, but not limited to." In the description of the specification, the terms "one embodiment," "some embodiments," "exemplary embodiments," "examples," or "some examples" are intended to indicate that a particular feature, structure, material, or characteristic associated with the embodiment or example is included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the particular features, structures, materials, or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0031] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0032] When describing some embodiments, the expressions "coupled" and "connected" and their derivatives may be used. The term "connected" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium. The term "coupled" indicates, for example, that two or more components are in direct physical or electrical contact. The term "coupled" or "communicatively coupled" may also refer to two or more components that are not in direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents of this document.

[0033] “At least one of A, B and C” has the same meaning as “at least one of A, B or C” and both include the following combinations of A, B and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B and C.

[0034] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0035] The use of "adapted to" or "configured to" herein is intended to be open and inclusive language that does not exclude devices adapted or configured to perform additional tasks or steps.

[0036] Additionally, the use of “based on” is meant to be open and inclusive, as a process, step, calculation, or other action “based on” one or more stated conditions or values ​​may, in practice, be based on additional conditions or values ​​beyond those stated.

[0037] As used herein, "about," "substantially," or "approximately" includes the stated value and an average value that is within an acceptable range of deviation from the particular value as determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0038] As used herein, "parallel", "perpendicular", and "equal" include the situations described and situations similar to the situations described, and the range of the similar situations is within an acceptable deviation range, wherein the acceptable deviation range is as determined by a person of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of the specific quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, wherein the acceptable deviation range of approximate parallelism can be, for example, a deviation within 5°; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, wherein the acceptable deviation range of approximate perpendicularity can also be, for example, a deviation within 5°. "Equal" includes absolute equality and approximate equality, wherein the acceptable deviation range of approximate equality can be, for example, that the difference between the two equals is less than or equal to 5% of either one.

[0039] It will be understood that when a layer or element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present therebetween.

[0040] Exemplary embodiments are described herein with reference to cross-sectional and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Therefore, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include deviations in shape due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0041] refer to Figure 1 Embodiments of the present disclosure provide a display device 1000, which is a product having an image display function. For example, the display device 1000 may be any device that displays either moving (e.g., video) or fixed (e.g., still images), and whether text or images.

[0042] For example, the display device 1000 can be any product or component with a display function, such as a television, a laptop computer, a tablet computer, a personal digital assistant (PDA), a mobile phone (cell phone), a watch, a clock, a calculator, a GPS receiver / navigator, a camera, a camera view display (for example, a display of a rearview camera in a vehicle), a wearable device, an augmented reality (AR) device, a virtual reality (VR) device, a vehicle display, an aircraft display, etc. For example, Figure 1 As shown, the display device 1000 may be a mobile phone.

[0043] From the perspective of the light-emitting type of the display device 1000, the display device 1000 may be an OLED display device. From the perspective of the form of the display device 1000, the display device 1000 may be a flat display device, a curved display device, or a foldable display device. From the perspective of the shape of the display device 1000, the display device 1000 may be rectangular or circular, etc. The embodiments of the present disclosure do not specifically limit this. The following takes an organic light-emitting diode display device that is rectangular and flat as an example to schematically illustrate some embodiments of the present disclosure, but the embodiments of the present disclosure are not limited thereto, and any other display devices may also be considered, as long as the same technical ideas are applied.

[0044] The display device 1000 includes a display panel. When the display device 1000 is an OLED display device, the display panel is an OLED display panel. Figure 2 Some embodiments of the present disclosure provide a display panel 1001. The display panel 1001 includes a display area Q1 and a peripheral area Q2 adjacent to the display area Q1. The peripheral area Q2 may surround the display area Q1, or may partially surround the display area Q1.

[0045] The display area Q1 is an area on the display panel 1001 for displaying images. The display area Q1 is provided with sub-pixels P, which can emit light to support image display.

[0046] The peripheral area Q2 can be used to set up a gate driver on array (GOA) and control signal lines (such as clock signal lines, power supply voltage signal lines, etc.) etc. The peripheral area Q2 does not set up sub-pixels P, so the peripheral area Q2 is not used for image display.

[0047] In some embodiments, reference Figure 3The display panel 1001 includes a substrate 10, a color filter layer 20, a first electrode layer 30, and a pixel definition layer (PDL). The color filter layer 20 is disposed on one side of the substrate; the first electrode layer 30 is disposed on the side of the color filter layer 20 away from the substrate 10; the first electrode layer 30 includes a plurality of first electrode portions 31 spaced apart from each other. The first electrode portion 31 includes a main portion 311 and an edge portion 312 surrounding at least a portion of the main portion 311 and connected to the main portion 311; at least a portion of the pixel definition layer (PDL) is located on the side of the first electrode portion 31 away from the substrate 10, and covers the surface of the edge portion 312 away from the substrate 10. At least a portion of the pixel definition layer (PDL) is also located on the side of the edge portion 312 closer to the substrate 10.

[0048] The display panel 1001 provided in this embodiment has a first electrode layer 30 disposed on a side of the color filter layer 20 away from the substrate 10. Thus, the display panel 1001 is a bottom-emitting display panel. In a bottom-emitting display panel, when light is emitted from the first electrode layer 30 through the substrate 10, light generated by adjacent pixels is prone to lateral diffusion during propagation. Since the first electrode portion 31 includes a main portion 311 and an edge portion 312 surrounding at least a portion of the main portion 311 and connected to the main portion 311, at least a portion of the pixel definition layer PDL is located on the side of the first electrode portion 31 away from the substrate 10. The pixel defining layer 310 is located on one side of the bottom 10 and covers the edge portion 312 away from the surface of the substrate 10. At least part of the pixel defining layer PDL is also located on the side of the edge portion 312 close to the substrate 10. Since the visible light transmittance of the pixel defining layer PDL is low and it wraps the edge portion 312 of the first electrode portion 31, it can limit the diffusion path of light and block the lateral propagation of light, thereby avoiding optical crosstalk between pixels and adjacent pixels when the display panel 1001 is emitting light, and will not cause uneven brightness of the display panel 1001 due to optical crosstalk, thereby improving the reliability of the display panel 1001.

[0049] Continue to refer Figure 3 The display panel 1001 further includes a light-emitting functional layer EL and a second electrode layer 60. The light-emitting functional layer EL is disposed on the side of the pixel defining layer PDL and the main portion 311 away from the substrate 10, as well as on the sidewalls of the first opening K1 in the pixel defining layer PDL. The second electrode layer 60 is disposed on the side of the light-emitting functional layer EL away from the substrate 10. The main portion 311 of the first electrode portion 31, the light-emitting functional layer EL, and the second electrode layer 60 form a plurality of light-emitting units.

[0050] In the display panel 1001 , the substrate 10 may be made of a transparent material such as polyimide or glass.

[0051] In some embodiments, the light-emitting functional layer EL includes a light-emitting layer. In other examples, the light-emitting functional layer EL includes, in addition to the light-emitting layer, one or more of an electron transporting layer (ETL), an electron injection layer (EIL), a hole transporting layer (HTL), and a hole injection layer (HIL).

[0052] The color filter layer 20 includes color filter portions 201 corresponding to the light emitting units one by one. The color filter portions 201 include color filter portions 201 of multiple colors. The color of the color filter portion 201 is the same as the color of the light emitted by the corresponding light emitting unit.

[0053] In the embodiment of the present disclosure, the display panel 1001 can be a bottom-emitting display panel, and the light emitting direction of the bottom-emitting display panel is toward the substrate 10. In this case, the second electrode layer 60 is an electrode layer that can reflect light, and the first electrode layer 30 is a translucent electrode layer or a semi-transparent and semi-reflective electrode layer.

[0054] For example, the material of the first electrode layer 30 may be indium tin oxide (ITO).

[0055] In some embodiments, reference Figure 3 The width L1 of the portion of the pixel defining layer PDL covering the edge portion 312 away from the surface of the substrate 10 is greater than the width L2 of the portion of the pixel defining layer PDL located on the side of the edge portion 312 closer to the substrate 10; the widths L1 and L2 are dimensions perpendicular to the thickness direction X of the substrate 10. The larger width L1 of the portion of the pixel defining layer PDL covering the edge portion 312 away from the surface of the substrate 10 can more effectively block lateral scattering of light between adjacent pixels, thereby improving the contrast of the display panel 1001.

[0056] In some embodiments, continue to refer to Figure 3The thickness H1 of the portion of the pixel defining layer (PDL) covering the edge portion 312 away from the surface of the substrate 10 is greater than the thickness H2 of the portion of the pixel defining layer (PDL) located on the side of the edge portion 312 closer to the substrate 10; thicknesses H1 and H2 are dimensions along the thickness direction X of the substrate 10. The thicker thickness H1 of the portion of the pixel defining layer (PDL) covering the edge portion 312 away from the surface of the substrate 10 ensures continuous coverage of the second electrode layer 60 thin film at the edge of the pixel defining layer (PDL), preventing direct contact between the second electrode layer 60 and the first electrode portion 31, thereby reducing the risk of short circuits. Furthermore, this extends the water and oxygen permeation path, slowing the intrusion of moisture from the edge of the pixel defining layer (PDL) into the light-emitting layer and extending the life of the display panel 1001.

[0057] In some embodiments, the display panel 1001 further includes a first planar layer 40 disposed between the color filter layer 20 and the first electrode layer 30. A plurality of grooves C are defined in the first planar layer 40. The orthographic projections of the main body 311 on the surface of the substrate 10 are located between adjacent grooves C, and the edge portion 312 forms a first cantilever X1 at the grooves C. The grooves C ensure that the first cantilever X1 covers only the non-luminescent area, thereby improving the utilization of the luminescent area of ​​the display panel 1001 and enhancing the overall brightness of the display panel 1001.

[0058] Here, "the edge portion 312 forms a first cantilever X1 at the groove C" means that the portion of the first electrode layer 30 extending beyond the groove C forms a suspended structure. The edge portion 312 forms the first cantilever X1 at the groove C, which may be supported and encapsulated by other structures. In this embodiment, the first cantilever X1 is encapsulated and supported by the pixel definition layer (PDL).

[0059] In some embodiments, reference Figure 4 The first planar layer 40 also covers at least a portion of the edge portion 312 close to the surface of the substrate 10. This is because the first planar layer 40 close to the surface of the substrate 10 at the edge portion 312 is not completely removed during the formation of the groove C.

[0060] In some embodiments, the portion of the first planar layer 40 that covers at least a portion of the edge portion 312 near the surface of the substrate 10 is an extension portion 41. The pixel defining layer (PDL) further covers the surface of the extension portion 41 near the substrate 10. Because the pixel defining layer (PDL) has a low visible light transmittance, it can limit the diffusion path of light, block lateral light propagation, and prevent optical crosstalk between adjacent pixels when the display panel 1001 emits light.

[0061] In some embodiments, continue to refer to Figure 3The pixel definition layer (PDL) defines a first opening K1, which corresponds to the light-emitting area of ​​the display panel 1001. At least a portion of the main portion 311 is located at the bottom of the first opening K1, and the edge portion 312 is embedded in the sidewall of the first opening K1. In other words, the first cantilever X1 is embedded in the pixel definition layer (PDL), which wraps around the edge portion 312. Because the pixel definition layer (PDL) has a low visible light transmittance, it blocks the path of lateral light propagation, preventing crosstalk between adjacent pixels and thereby improving the reliability of the display panel 1001.

[0062] In some embodiments, the visible light transmittance of the pixel defining layer (PDL) is lower than that of the first planar layer 40. This low visible light transmittance of the pixel defining layer (PDL) effectively blocks light leakage or diffusion between adjacent pixels, preventing color mixing. The high transmittance of the first planar layer 40 maximizes the light extraction efficiency of the light-emitting functional layer (EL), minimizing light loss and ensuring that light is emitted vertically only from the designed light-emitting area, maintaining the color brightness and accuracy of the display panel 1001.

[0063] In some embodiments, the visible light transmittance of the pixel definition layer (PDL) is 0-90%. For example, 4%, 5%, 70%, or 90%. Such a low visible light transmittance of the pixel definition layer (PDL) can effectively block light leakage or light diffusion between adjacent pixels, prevent color mixing, and improve the reliability of the display panel 1001. In particular, when the transmittance of blue light and green light is low, the diffusion of blue light and green light to adjacent pixels can be prevented, thereby avoiding optical crosstalk.

[0064] For example, when the visible light transmittance of the pixel defining layer PDL is 5%, the corresponding visible light wavelength may be 340 nm to 360 nm, for example, 340 nm, 350 nm, or 360 nm.

[0065] For example, when the visible light transmittance of the pixel defining layer PDL is 4%, the corresponding visible light wavelength may be 440 nm to 460 nm, for example, 440 nm, 450 nm, or 460 nm.

[0066] For example, when the visible light transmittance of the pixel definition layer PDL is 70%, the corresponding visible light wavelength may be 540 nm to 560 nm, for example, 540 nm, 550 nm, or 560 nm.

[0067] In some embodiments, the first electrode layer 30 further includes: a plurality of spaced-apart connecting portions 32, one connecting portion 32 being connected to one first electrode portion 31; a second opening K2 being provided in the first flat layer 40, a portion of the connecting portion 32 covering the second opening K2, and a portion of the connecting portion 32 being located on the upper surface of the first flat layer 40 and surrounding the second opening K2.

[0068] Continue to refer Figure 3 The display panel 1001 also includes a circuit structure layer 50 disposed on the substrate 10. The circuit structure layer 50 is disposed between the substrate 10 and the color filter layer 20. The circuit structure layer 50 includes multiple pixel circuits. The connection portion 32 passes through the first planar layer 40 to electrically connect to the pixel circuit. Each pixel circuit includes at least one transistor, and the first electrode layer 30 is connected to one of the transistors. For example, the first electrode layer 30 can be connected to the driving transistor TFT. Specifically, the connection portion 32 is electrically connected to the driving transistor TFT at the bottom of the second opening K2. In this way, the first electrode portion 31 is connected to the driving transistor TFT via the connection portion 32, ensuring that the current of each sub-pixel can be precisely controlled.

[0069] The driving transistor TFT includes a gate 501, an active layer 502, a source 503 and a drain 504. In addition, in some examples, such as Figure 3 As shown, the circuit structure layer 50 further includes a gate insulating layer GI separating the gate electrode 501 from the active layer 502, and a passivation layer PVX covering the source electrode 503 and the drain electrode 504. A via g is provided on the passivation layer PVX, and the connecting portion 32 is electrically connected to the drain electrode 504 through the via g in the passivation layer PVX, so that the light-emitting functional layer EL can be driven to emit light through the driving transistor TFT.

[0070] The display area Q1 of the display panel 1001 includes a light-emitting area and a driving area. The driving transistor TFT is located in the driving area, and the light-emitting unit is also located in the light-emitting area. Since only the light-emitting unit is arranged in the light-emitting area, it can prevent non-light-emitting components such as the driving transistor TFT and wiring from blocking light. The driving transistor TFT and circuit wiring are concentrated in the non-light-emitting driving area (such as the pixel edge or the sub-pixel gap). This can reduce interference with the light output of the display panel 1001, increase the effective light-emitting area of ​​the display panel 1001, and thus enhance the brightness of the display panel 1001 or reduce power consumption.

[0071] In some embodiments, continue to refer to Figure 3 The edge of the connection portion 32 away from the first electrode portion 31 forms a second cantilever X2 at the groove C. The pixel defining layer PDL covers the surface of the second cantilever X2 away from the substrate 10 and is located on the side of the second cantilever X2 close to the substrate 10 .

[0072] Exemplary, reference Figure 3 The pixel defining layer PDL covers the surface of the second cantilever X2 close to the substrate 10 .

[0073] Exemplary, reference Figure 4, the first flat layer 40 also covers the surface of the second cantilever X2 close to the substrate 10. This is because the first flat layer 40 on the surface of the second cantilever X2 close to the substrate 10 is not completely removed during the formation of the groove C. In some embodiments, continue to refer to Figure 3 The display panel 1001 further includes a light shielding layer 70 disposed between the substrate 10 and the circuit structure layer 50, wherein the orthographic projection of the gate electrode 501 on the substrate 10 is located within the orthographic projection of the light shielding layer 70 on the substrate 10. Since the light shielding layer 70 is made of metal or an opaque material, it can block light from directly irradiating the channel of the driving transistor TFT, significantly reducing photoinduced leakage current and ensuring the driving accuracy of the driving transistor TFT.

[0074] When the display panel 1001 includes a light shielding layer 70, the display panel 1001 also includes a buffer layer. The buffer layer is disposed between the substrate 10 and the circuit structure layer 50 and covers the light shielding layer 70. This buffer layer not only serves as a stress buffer, absorbing thermal or mechanical stress and preventing cracking of the circuit structure layer 50, but also prevents direct contact between the metal edges of the light shielding layer 70 and the circuit structure layer 50, reducing the risk of short circuits. Furthermore, the buffer layer covering the light shielding layer 70 can prevent metal ions from contaminating the semiconductor layer.

[0075] The embodiment of the present disclosure further provides a display device 1000, referring to Figure 5 , including the display panel 1001 described in any of the above embodiments, and a circuit board 1002 connected to the display panel 1001, the circuit board 1002 is provided with a driving chip and a power chip, which are used to output driving signals and power signals to the display panel 1001 to control the display panel 1001 to display pictures.

[0076] The display device 1000 provided in this embodiment has the same structure and beneficial technical effects as the display panel provided in any of the above embodiments, and will not be described in detail here.

[0077] The present disclosure also provides a method for manufacturing a display panel. Figure 6 , including the following steps:

[0078] Step S1: Reference Figure 7 , a light shielding layer 70 is formed on one side of the substrate 10.

[0079] Here, the light shielding layer 70 includes metal or a light-impermeable material.

[0080] In some embodiments, the preparation process of the light shielding layer 70 may include a thin film deposition process and an etching process.

[0081] Step S2: Continue to refer Figure 7, a buffer layer buffer covering the light shielding layer 70 is formed on one side of the substrate 10 .

[0082] Step S3: Continue to refer Figure 7 A circuit structure layer 50 is formed on one side of the substrate 10 , and the circuit structure layer 50 includes a plurality of pixel circuits.

[0083] Here, each pixel circuit includes at least one drive transistor (TFT). The drive transistor (TFT) is located in the drive region of the display panel. The specific structure of the circuit structure layer 50 can be found in the previous description and will not be repeated here. If the display panel includes a light shielding layer 70 and a buffer layer, the circuit structure layer 50 is located on the side of the buffer layer away from the substrate 10.

[0084] Step S4: Continue to refer Figure 7 , the color filter layer 20 is formed on one side of the substrate 10. Specifically, the color filter layer 20 is formed on the side of the circuit structure layer 50 away from the substrate 10.

[0085] Here, the color filter layer 20 includes color filter portions 201 of multiple colors, such as red, green, and blue, which are all located in the light-emitting area of ​​the display panel.

[0086] Step S5: Continue to refer Figure 7 An initial first planar layer 400 is formed on a side of the color filter layer 20 away from the substrate 10 , and the initial first planar layer 400 has a second opening K2 penetrating the initial first planar layer 400 .

[0087] Here, the initial first planar layer 400 is an organic film layer, mainly C / H / O organic polymer.

[0088] Step S6: Continue to refer Figure 7 A first electrode layer 30 is formed on a side of the initial first planar layer 400 away from the substrate 10 , and the first electrode layer 30 is electrically connected to the pixel circuit through the second opening K2 .

[0089] Here, the first electrode layer 30 includes a plurality of first electrode portions 31 disposed at intervals. The first electrode portion 31 includes a main portion 311 and an edge portion 312 surrounding the main portion 311 and connected to the main portion 311 .

[0090] Among them, the first electrode layer 30 also includes: a plurality of spaced-apart connecting portions 32, one connecting portion 32 is connected to one first electrode portion 31; a portion of the connecting portion 32 covers the second opening K2 and is electrically connected to the pixel circuit, and a portion of the connecting portion 32 is located on the upper surface of the initial first flat layer 400 and surrounds the second opening K2.

[0091] Step S7: Combine with reference Figure 7 and Figure 8 The initial first planar layer 400 is ashed using the first electrode layer 30 as a mask to form a plurality of grooves C in the initial first planar layer 400 , and edges of the first electrode layer 30 form cantilevers at the grooves C.

[0092] Here, the ashing process for the initial first planar layer 400 using the first electrode layer 30 as a mask may be performed by reacting O 2 with CF 4 , wherein the content of CF 4 is ≤10%.

[0093] Among them, since the initial first flat layer 400 is an organic film layer, when the organic film layer is ashed, the first electrode layer 30 cannot be ashed and etched, and the low bias power is combined, so the ashing is isotropic, so that the edge portion 312 forms a first cantilever X1 at the groove C, and the edge of the connecting portion 32 away from the first electrode portion 31 forms a second cantilever X2 at the groove C.

[0094] In some embodiments, the lengths of the first cantilever X1 and the second cantilever X2 can be adjusted by adjusting the ashing time. For example, the lengths of the first cantilever X1 and the second cantilever X2 are 0.5 μm to 1 μm.

[0095] Step S8: Reference Figure 9 A pixel defining layer PDL is formed on the side of the first electrode layer 30 away from the substrate 10, at least a portion of the pixel defining layer PDL is located on the side of the first electrode portion 31 away from the substrate 10, and covers the surface of the edge portion 312 away from the substrate 10, and at least a portion of the pixel defining layer PDL is also located on the side of the edge portion 312 close to the substrate 10.

[0096] That is, the pixel defining layer PDL is at least located between adjacent first electrode portions 31 and wraps around the surface of the edge portion 312. In addition, the pixel defining layer PDL also wraps around the surface of the second cantilever X2.

[0097] Here, due to the flat glue flow property of the pixel defining layer PDL, the glue of the pixel defining layer PDL will flow below the plane of the first electrode layer 30 . After the pixel defining layer PDL is formed, it will fill the groove C and wrap the edge portion 312 .

[0098] Step S9: Reference Figure 10 , and the light emitting functional layer EL and the second electrode layer 60 are formed in sequence.

[0099] Here, the process of forming the light emitting functional layer EL includes an evaporation process.

[0100] The process of forming the second electrode layer 60 includes a sputtering process.

[0101] The above description is merely a specific embodiment of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Any changes or substitutions that a person skilled in the art can conceive within the technical scope disclosed in the present disclosure should be included within the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope of protection of the claims.

Claims

1. A display panel, characterized in that: include: substrate; A color filter layer is provided on one side of the substrate; A first electrode layer is provided on a side of the color filter layer away from the substrate; The first electrode layer includes a plurality of first electrode portions spaced apart from each other, each of the first electrode portions including a main portion and an edge portion surrounding at least a portion of the main portion and connected to the main portion; A pixel defining layer, at least part of which is located on a side of the first electrode portion away from the substrate and covers a surface of the edge portion away from the substrate, and at least part of which is also located on a side of the edge portion close to the substrate.

2. The display panel according to claim 1, wherein: The width of a portion of the pixel defining layer covering the edge portion away from the surface of the substrate is greater than the width of a portion of the pixel defining layer located on a side of the edge portion close to the substrate; The width is a dimension perpendicular to the thickness direction of the substrate.

3. The display panel according to claim 1, wherein: The thickness of the portion of the pixel defining layer covering the edge portion away from the surface of the substrate is greater than the thickness of the portion of the pixel defining layer located on the side of the edge portion close to the substrate; the thickness is the dimension along the thickness direction of the substrate.

4. The display panel according to any one of claims 1 to 3, wherein: Also includes: The first flat layer is provided between the color filter layer and the first electrode layer; a plurality of grooves are provided in the first flat layer, the orthographic projection of the main body on the substrate surface is located between adjacent grooves, and the edge portion forms a first cantilever at the groove.

5. The display panel according to claim 4, wherein: The first planar layer further covers at least a portion of the surface of the edge portion close to the substrate.

6. The display panel according to claim 5, wherein: The portion of the first flat layer that covers at least a portion of the edge portion close to the surface of the substrate is an extension portion; The pixel defining layer further covers a surface of the extension portion close to the substrate.

7. The display panel according to any one of claims 1 to 3, wherein: The pixel defining layer is provided with a first opening, at least a portion of the main body is located at the bottom of the first opening, and the edge portion is embedded in the sidewall of the first opening.

8. The display panel according to claim 4, wherein: The visible light transmittance of the pixel defining layer is lower than the visible light transmittance of the first planar layer.

9. The display panel according to claim 8, wherein: The visible light transmittance of the pixel defining layer is 0-90%.

10. The display panel according to claim 4, wherein: The first electrode layer further includes: a plurality of connection portions arranged at intervals, wherein one of the connection portions is connected to one of the first electrode portions; The display panel further includes a pixel circuit provided between the substrate and the color filter layer, and the connecting portion passes through the first flat layer and is electrically connected to the pixel circuit.

11. The display panel according to claim 10, wherein: An edge of the connecting portion away from the first electrode portion forms a second cantilever at the groove, and the pixel defining layer further covers a surface of the second cantilever away from the substrate and a side of the second cantilever close to the substrate.

12. A display device, characterized in that: include: The display panel according to any one of claims 1 to 11; as well as, A circuit board is electrically connected to the display panel.

13. A method for preparing a display panel, characterized in that: include: forming a color film layer on one side of the substrate; forming a first electrode layer on a side of the color filter layer away from the substrate, the first electrode layer comprising a plurality of first electrode portions spaced apart from each other, the first electrode portions comprising a main portion and an edge portion surrounding at least a portion of the main portion and connected to the main portion; A pixel defining layer is formed, wherein at least a portion of the pixel defining layer is located on a side of the first electrode portion away from the substrate and covers a surface of the edge portion away from the substrate. At least a portion of the pixel defining layer is also located on a side of the edge portion close to the substrate.

14. The method for manufacturing a display panel according to claim 13, wherein: Before forming the color filter layer on one side of the substrate, the method further includes: forming a circuit structure layer on one side of the substrate, the circuit structure layer including a plurality of pixel circuits; after forming the color filter layer on one side of the substrate, forming an initial first flat layer on a side of the color filter layer away from the substrate, the initial first flat layer having a second opening penetrating the initial first flat layer; forming the first electrode layer on a side of the initial first flat layer away from the substrate, wherein the first electrode layer is electrically connected to the pixel circuit through the second opening; The initial first planar layer is ashed using the first electrode layer as a mask to form a plurality of grooves in the initial first planar layer, and edges of the first electrode layer form cantilevers at the grooves.

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