Data transmission method and apparatus, electronic device, and computer-readable storage medium

Abstract

The application provides a data transmission method and device, electronic equipment and computer readable storage medium, comprising: obtaining a data transmission request sent to a port of a router node; based on a matrix row in a polling matrix matched with the router node, polling arbitration is performed on the data transmission request, and data processed by a target port of the router node is determined; the matrix row and the matrix element in the matrix column corresponding to the target port are updated, and the next arbitration is performed; wherein each matrix row represents a port in a transmission direction of the router node; different matrix rows represent different transmission directions, and the matrix element in each matrix row is used to reflect the blocking condition of the port corresponding to the matrix row. The application can improve arbitration efficiency, improve the stability and fairness of the on-chip interconnection network.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a data transmission method, apparatus, electronic device, and computer-readable storage medium. Background Technology

[0002] Network-on-chip (NOC) is a key technology in multiprocessor architectures. It serves as the interconnect and communication network within the processor, responsible for message passing and forming the basis for processor collaboration. In NOCs, polling arbitration is a method for managing packet routing and transmission. It uses certain rules to determine which port of a router node should handle data transmission requests.

[0003] The current polling arbitration method involves checking each port in a predefined order to see if there is a data transmission request, and then determining the first port with a data transmission request to process the data.

[0004] However, the current polling arbitration method has a complex logic, which prevents the chip's main frequency from being increased and consumes a lot of time and resources. Summary of the Invention

[0005] This application provides a data transmission method, apparatus, electronic device, and computer-readable storage medium to solve problems in related technologies.

[0006] In a first aspect, embodiments of this application provide a data transmission method, which is applied to any router node in an on-chip network, the method comprising:

[0007] Obtain data transmission requests sent to the port of the router node;

[0008] Based on the rows in the polling matrix that match the router node, the data transmission request is polled and arbitrated to determine the data to be processed by the target port of the router node.

[0009] Update the matrix elements in the matrix rows and columns corresponding to the target port, and then proceed with the next arbitration.

[0010] Each matrix row represents a port in one transmission direction of the router node; different matrix rows represent different transmission directions, and the matrix elements in each matrix row are used to reflect the congestion status of the port corresponding to the matrix row.

[0011] Secondly, embodiments of this application provide a data transmission apparatus, the apparatus comprising:

[0012] The acquisition unit is used to acquire data transmission requests sent to the ports of the router node;

[0013] The arbitration unit is used to perform polling arbitration based on the matrix rows in the polling matrix that match the router node and the data transmission request, and to determine the data of the data transmission request corresponding to the target port of the router node.

[0014] The update unit is used to update the matrix rows and columns corresponding to the target port and to perform the next arbitration.

[0015] Each matrix row represents a port in one transmission direction of the router node; different matrix rows represent different transmission directions, and the matrix elements in each matrix row are used to reflect the congestion status of the port corresponding to the matrix row.

[0016] Thirdly, embodiments of this application also provide an electronic device, including a processor;

[0017] Memory used to store the processor's executable instructions;

[0018] The processor is configured to execute the instructions to implement the method of the first aspect.

[0019] Fourthly, embodiments of this application also provide a computer-readable storage medium that, when the instructions in the computer-readable storage medium are executed by a processor of an electronic device, enables the electronic device to perform the method of the first aspect.

[0020] In this embodiment, data transmission requests sent to the port of the router node are acquired. Then, based on the matrix rows in the polling matrix matching the router node, the data transmission requests are polled and arbitrated to determine the data to be processed by the target port of the router node. The matrix structure allows for fast querying, improving arbitration efficiency. Furthermore, the matrix structure is simple and can be implemented using combinational logic. The arbitration logic is linear search or simple polling, without complex state machines or pipelines, resulting in extremely low logic depth and a short critical path. This allows for stable operation at higher frequencies, increasing the chip's clock speed. Finally, after determining the data to be processed by the target port, the matrix elements in the corresponding matrix rows and columns of the target port are updated, reducing the target port's priority to the lowest level before proceeding to the next arbitration. This effectively prevents the output port from continuously processing requests from the same input port, improving system stability and fairness. Dynamically updating matrix elements also enhances resource scheduling flexibility, thereby improving resource utilization.

[0021] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a flowchart illustrating a data transmission method provided in an embodiment of this application;

[0024] Figure 2 This is a schematic diagram of a polling matrix matched with router nodes provided in an embodiment of this application;

[0025] Figure 3 This is a schematic diagram of the updated polling matrix provided in the embodiments of this application;

[0026] Figure 4 This is another schematic diagram of a polling matrix that matches router nodes, provided in an embodiment of this application;

[0027] Figure 5 This is a schematic diagram of a successful arbitration output provided in an embodiment of this application;

[0028] Figure 6 This is a schematic diagram of an implementation scenario provided by an embodiment of this application;

[0029] Figure 7 This is a block diagram of a data transmission device provided in an embodiment of this application;

[0030] Figure 8 This is a block diagram of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0031] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0032] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and are not limited in number; for example, a first object can be one or more. Furthermore, the term "and / or" in the specification and claims is used to describe the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. In the embodiments of this application, the term "multiple" refers to two or more, and other quantifiers are similar.

[0033] Network-on-a-chip (NAT) is a modular, scalable, network-communication-based interconnect architecture used to connect various functional modules within a System-on-a-Chip (SoC), such as the central processing unit (CPU), graphics processing unit (GPU), digital signal processor (DSP), direct memory access (DMA), and memory controller. NAT is a key technology in multiprocessor architectures, serving as the interconnection path and communication network within the processor, responsible for message passing, and fundamental to processor collaboration. In NAT, polling arbitration is a method for managing packet routing and transmission, using certain rules to determine which port of a router node should handle data transmission requests.

[0034] Round-robin arbitration is a resource allocation mechanism commonly used when multiple devices or request sources share the same resource. The core of round-robin arbitration is to sequentially check the requests of each device, ensuring that each device can fairly obtain resource access rights. In this embodiment, round-robin arbitration is used to manage packet routing and transmission; it determines, through certain rules, which port of the router node should handle the data transmission request.

[0035] In related technologies, polling arbitration involves checking each port sequentially for data transmission requests according to a predefined order, and determining the first port with a data transmission request in each round to process the data. This polling arbitration method has complex combinational logic, which limits the chip's clock speed and consumes significant time and resources, making it unsuitable for high-performance on-chip network designs.

[0036] In related technologies, polling arbitration also includes using absolute priority. In this method, each port has a preset fixed priority, and polling is performed in descending order of priority to determine which port of the router node should handle the data transmission request. While this method is logically simple, it carries the risk of introducing livelock, causing a sharp increase in the lifecycle of some packet transmissions and undermining fairness in the internetwork. Livelock is a special type of "non-blocking but unable to proceed" state, where processes or components in the system remain active (e.g., continuously performing operations), but due to conflicts in their interactions, they are unable to complete the expected goal, causing the overall task to stall.

[0037] Against this background, embodiments of this application provide a data transmission method that can improve arbitration efficiency and enhance the stability and fairness of on-chip interconnects.

[0038] Figure 1 This is a schematic flowchart of a data transmission method provided in an embodiment of this application. Figure 1 As shown, the data transmission method may include steps 101-103.

[0039] Step 101: Obtain the data transmission request sent to the port of the router node.

[0040] In this embodiment, the router is a basic component of the Network-on-Chip (NoC) used for data storage and transmission. Each router includes multiple input ports and output ports. The input ports are used to receive data, and the output ports are used to forward the data received by the input ports to the next node.

[0041] Step 102: Based on the rows in the polling matrix that match the router node, poll and arbitrate the data transmission request, and determine the data to be processed by the target port of the router node.

[0042] In this embodiment, each matrix row represents a port of the router node in one transmission direction; different matrix rows represent different transmission directions, and the matrix elements in each matrix row are used to reflect the congestion status of the port corresponding to the matrix row. Based on the matrix rows in the polling matrix matched with the router node, after polling arbitration of the data transmission request, it can be determined that the target port of the router node will process the data transmission request data. This can also be understood as determining that the target port of the router node will receive the data transmission request data and transmit it to the output port, and the output port will send the data transmission request data corresponding to the target port to the downstream router.

[0043] Data transmission requests can be represented by a binary sequence. Each bit in the binary sequence corresponds to a port in one transmission direction of the router node, and the value of the bit is used to reflect whether there is a data transmission request on the port corresponding to the bit.

[0044] For example, for a 4×4 matrix, the binary sequence of the data transmission request can contain 4 binary bits, i.e., 4 bits. Based on the hardware characteristics, the first binary bit in the binary sequence of the data transmission request from left to right corresponds to the third row of the matrix, the second binary bit corresponds to the second row of the matrix, the third binary bit corresponds to the first row of the matrix, and the fourth binary bit corresponds to the zeroth row of the matrix.

[0045] A polling matrix can represent the polling arbitration of multiple input ports to a single output port. It can also be understood as the instantiation of n polling matrices that match the router node when the router node has n output ports.

[0046] For example, when a router node includes input port 1, input port 2, input port 3, input port 4, output port a, output port b, output port c, and output port d, for output port a, if the data received by input ports 1, 2, 3, and 4 all request data transmission from output port a (i.e., all input ports 1, 2, 3, and 4 have data transmission requests), then a polling arbitration can be performed on the aforementioned data transmission requests based on the rows in the polling matrix matching the router node to determine which input port's data output port a will transmit. For example, when it is determined that output port a will transmit data from input port 1, input port 1 becomes the target port.

[0047] Step 103: Update the matrix elements in the matrix rows and columns corresponding to the target port, and perform the next arbitration.

[0048] In this embodiment of the application, after determining that the data for which the data transmission request is to be processed by the target port, the matrix elements in the matrix row and matrix column corresponding to the target port can be updated to reduce the priority of the target port to the lowest level and proceed to the next arbitration.

[0049] For example, suppose a router has four input ports, denoted as I1, I2, I3, and I4. I1 corresponds to row 1 of the polling matrix, I2 to row 2, I3 to row 3, and I4 to row 4. I1, I2, I3, and I4 all have data transmission requests. During the first arbitration, the router arbitrator polls and arbitrates the data transmission requests based on the row in the polling matrix that matches the router node. It determines that router node I1 will handle the data transmission request; that is, input port I1 will receive the corresponding data transmission request and send it to the output port, which then forwards the data to the downstream router node. At this point, input port I1 has the highest priority. After this data transmission is completed, the matrix elements of the row corresponding to input port I1, as well as the matrix elements of the column containing the equal-row elements in the row corresponding to input port I1, can be updated to update the polling matrix. This reduces the priority of input port I1 to the lowest level, achieving a fair allocation of port resources and preventing a single port from monopolizing resources due to frequent requests, thus ensuring efficient and orderly data transmission in the on-chip network. The routing arbitrator is a logical function block that determines, according to certain rules, which of the multiple data channel data transmission requests should be authorized to use the output channel.

[0050] This application embodiment acquires data transmission requests sent to the ports of router nodes, and then performs polling arbitration on the data transmission requests based on the matrix rows in the polling matrix matching the router nodes. It determines the data for which the target port of the router node will handle the data transmission request. The matrix structure allows for fast querying, improving arbitration efficiency. Furthermore, the matrix structure is simple and can be implemented using combinational logic, resulting in extremely low arbitration logic depth. The polling arbitration logic depth achieved in this embodiment is only log2 (number of arbitration ports) + 1, resulting in a shorter critical path and stable operation at higher frequencies, thus increasing the chip's clock speed. Finally, after determining the data for which the target port will handle the data transmission request, the matrix elements in the corresponding matrix rows and columns of the target port can be updated, reducing the target port's priority to the lowest level and proceeding to the next arbitration. This prevents output ports from continuously processing requests from the same input port, improving the stability and fairness of the on-chip interconnect network.

[0051] In some embodiments, step 102 may specifically include sub-steps 1021-1023.

[0052] Sub-step 1021: Perform an AND gate operation on each row of the polling matrix and the data transmission request in sequence to obtain the calculation result.

[0053] Sub-step 1022: Take the port corresponding to the matrix row where each value in the calculation result is the first value as the target port of the router node.

[0054] Sub-step 1023: Determine the data of the data transmission request corresponding to the target port of the router node.

[0055] In the embodiments of this application, the first value can be 0 and the second value can be 1. In other optional embodiments, the first value and the second value can also be other values, and the embodiments of this application do not specifically limit them.

[0056] For example, Figure 2 This is a schematic diagram of a polling matrix matched with router nodes provided in an embodiment of this application. Figure 2 As shown, REQ represents the data transmission request signal. Each value in the data transmission request corresponds to whether the port represented by each row of the polling matrix has a data transmission request. "0" indicates that the port represented by the corresponding row of the polling matrix has no data transmission request, and "1" indicates that the port represented by the corresponding row of the polling matrix has no data transmission request. Figure 2 In the sequence, REQ is 0011. From left to right, this sequence represents: the port represented by the third row of the polling matrix has no data transmission request; the port represented by the second row of the polling matrix has no data transmission request; the port represented by the first row of the polling matrix has a data transmission request; and the port represented by the zeroth row of the polling matrix has a data transmission request. Based on the correspondence between data transmission requests and the polling matrix in the above embodiment, we can calculate [1, 1, 0, 0] AND [0, 0, 0, 0] to obtain [0, 0, 0, 0], [1, 1, 0, 0] AND [1, 0, 0, 0] to obtain [1, 0, 0, 0], [1, 1, 0, 0] AND [1, 1, 0, 0] to obtain [1, 1, 0, 0], and [1, 1, 0, 0] AND [1, 1, 1, 0] to obtain [1, 1, 0, 0]. Here, "AND" represents the AND gate logic operator. After calculation, the zeroth row of the matrix is ​​[0, 0, 0, 0]. This indicates that the port represented by this row is not blocked. Therefore, the 0th bit of REQ has the highest arbitration priority. The value of the 0th bit of REQ is 1, which means that the port represented by the matrix row corresponding to the 0th bit of REQ has a data transmission request. Thus, the arbitration result Grant=0001, that is, the data corresponding to the data transmission request of the input port corresponding to the zeroth row is sent to the downstream port.

[0057] This embodiment performs AND gate operations on each row of the polling matrix and the data transmission request sequentially to obtain the calculation result. The port corresponding to the matrix row where every value in the calculation result is the first value is taken as the target port of the router node. The AND gate operation can quickly filter out matrix rows that simultaneously meet the two conditions of having a request at the input port and the path not being blocked, thereby quickly determining the target port. Then, the target port of the router node is determined to process the corresponding data transmission request. The AND gate operation is a basic logic operation that can be directly implemented in hardware, without the need for complex timing control. It can quickly complete arbitration, improve arbitration efficiency, and is also suitable for high-throughput scenarios (e.g., on-chip network routers).

[0058] In some embodiments, step 103 may specifically include: setting all values ​​in the matrix row corresponding to the target port, except for values ​​with equal rows and columns, to a second value, and setting all values ​​in the column containing values ​​with equal rows and columns in the matrix row corresponding to the target port to a first value, so as to update the polling matrix and perform the next arbitration.

[0059] For example, Figure 3 This is a schematic diagram of the updated polling matrix provided in an embodiment of this application. Based on the above embodiment, the polling matrix can be updated after one round of arbitration. When the first value is 0 and the second value is 1, 0 can represent a no-blocking situation, and 1 can represent a blocking situation. Figure 3 As shown, all values ​​in the zeroth row of the polling matrix except for the zeroth column can be updated to 1, and all values ​​in the zeroth column except for the zeroth row can be updated to 0. Since the value in the zeroth row and zeroth column is 0 and remains unchanged, it can also be understood as updating all values ​​in the zeroth column to 0.

[0060] This embodiment defines the specific method for updating the polling matrix as follows: all values ​​in the matrix row corresponding to the target port, except for values ​​with equal rows and columns, are set to the second value; all values ​​in the column containing values ​​with equal rows and columns in the matrix row corresponding to the target port are set to the first value. By actively reducing the priority of the target port that has just been successfully arbitrated, other ports are given the opportunity to be selected. This effectively prevents the unfair problem of a port continuously occupying resources due to its better initial state. At the same time, it can automatically balance the load of each port and prevent a port from becoming overloaded due to continuous data processing (e.g., buffer overflow, increased latency).

[0061] In some embodiments, the above data transmission method further includes: constructing a polling matrix.

[0062] In this polling matrix, all elements are binary values, representing whether the port corresponding to the row is blocked. The symmetric structure of the polling matrix ensures symmetric fairness among ports, reducing unfair scheduling caused by one-way blocking. Simultaneously, the binary (or specific numerical) markers can be quickly identified by the polling algorithm, efficiently determining whether a port can participate in the current poll, ensuring the orderly transmission of data.

[0063] Specifically, constructing the polling matrix may include steps 201-202.

[0064] Step 201: Determine the number of rows and columns of the polling matrix, and set the value corresponding to the binary bits with equal rows and columns in the polling matrix as the first value.

[0065] Step 202: Using the binary bits with equal rows and columns in the polling matrix as boundaries, set each value above and to the second value in the upper left of the boundary in the polling matrix, and set each value below and to the first value in the lower right of the boundary in the polling matrix, to obtain the polling matrix.

[0066] In this embodiment, a polling matrix can be constructed based on the input and output ports of the router nodes. The number of input ports of the router nodes is equal to the number of rows in the polling matrix, and the number of columns in the polling matrix is ​​equal to the number of rows, thus determining the number of rows and columns of the polling matrix. The value corresponding to the binary bits with equal rows and columns in the polling matrix is ​​set as the first value. Using the binary bits with equal rows and columns as the boundary, the value of each matrix element above and to the left of the boundary is set as the second value, and the value of each matrix element below and to the right of the boundary is set as the first value, thus obtaining the polling matrix. Here, each matrix element above and to the left of the boundary can also be understood as a matrix element whose row number is greater than its column number; similarly, each matrix element below and to the right of the boundary can be understood as a matrix element whose row number is less than its column number.

[0067] This embodiment proposes a specific method for constructing the polling matrix, providing data support for subsequent arbitration. Simultaneously, the value corresponding to the binary bits with equal rows and columns is always the first value, avoiding logical confusion caused by uncertain values.

[0068] In some embodiments, the above-described construction of the polling matrix may further include steps 301-303.

[0069] Step 301: Determine the number of rows and columns of the polling matrix, and set the value corresponding to the binary bits with equal rows and columns in the polling matrix as the first value.

[0070] Step 302: Using the binary bits with equal rows and columns in the polling matrix as boundaries, set the value of each matrix element above and to the left of the boundary in the polling matrix to the second value.

[0071] For example, the specific methods for determining the number of rows and columns of the polling matrix and setting the value of each matrix element above the left of the boundary line in the polling matrix can be found in the specific method for constructing the polling matrix described above, and will not be repeated here.

[0072] Step 303: Transpose the value at the upper left of the boundary line in the polling matrix to obtain the value at the lower right of the boundary line in the polling matrix, so as to construct the polling matrix.

[0073] For example, Figure 4 This is another schematic diagram of a polling matrix matching router nodes provided in an embodiment of this application. When the first value is 0 and the second value is 1, as shown... Figure 4 As shown, the binary bits with equal rows and columns are always 0. We can use these equal binary bits in the polling matrix as boundaries, setting the value of each matrix element above and to the left of these boundaries to 1. Then, we transpose the value of each matrix element above and to the left of these boundaries, resulting in a value of 0 below and to the right of these boundaries. This constructs a polling matrix that matches the router nodes. Figure 4 The value within the dashed box is the result of the transpose calculation.

[0074] This embodiment determines the number of rows and columns of the polling matrix and sets the value corresponding to the binary bits with equal rows and columns in the polling matrix as the first value. Using the binary bits with equal rows and columns in the polling matrix as the boundary, the value of each matrix element above and to the left of the boundary in the polling matrix is ​​set as the second value. The value above and to the left of the boundary in the polling matrix is ​​transposed to obtain the value below and to the right of the boundary in the polling matrix, thus constructing the polling matrix. At any time, the value of the lower right half of the matrix is ​​the transpose of the upper left half. Therefore, in actual hardware applications, only the registers of the upper left half need to be instantiated, reducing the instantiation operation of the registers of the lower right half, which can save hardware resources and reduce power consumption.

[0075] In some embodiments, step 103 may further include sub-steps 1031 and 1032.

[0076] Sub-step 1031: Obtain the configuration parameters of the weight register.

[0077] In this embodiment, a weight register can be configured. The weight register can be located in the core area of ​​the arbitration logic circuit and tightly coupled with components such as the counter and the polling matrix. The configuration parameters of the weight register can also be understood as weight thresholds, which can be determined based on the actual hardware application scenario. These parameters represent the maximum number of times the target port of the router node can obtain arbitration priority.

[0078] For example, if the system configures the weight register parameter to 3 according to the actual hardware application scenario, then after sending the data corresponding to the three consecutive data transmission requests of the target port to the port of the downstream router node, the polling matrix is ​​updated. For example, taking the initial state where port 1 has the highest priority and the configuration parameter is 2 as an example: Port 1 receives data and sends a data transmission request to the output port. The output port sends the data received by port 1 to the port of the downstream router node. At this time, the consecutive processing count is 1, 1 < 2, the parameter value of the configuration parameter has not been reached, the priority of port 1 remains unchanged, and the processing state continues. During the second processing, port 1 receives data and sends a data transmission request to the output port. The output port again sends the data received by port 1 to the port of the downstream router node. At this time, the count becomes 2, 2 = the parameter value of the configuration parameter 2, triggering the update condition and updating the polling matrix.

[0079] Sub-step 1032: When the number of times the data of the corresponding data transmission request is processed continuously on the target port of the router node is equal to the configuration parameters of the weight register, update the matrix row and matrix column corresponding to the target port, and perform the next arbitration.

[0080] In this embodiment, a counter can be added for each port's data transmission request. The counter can record the number of successful arbitrations for each port's data transmission request. The matrix rows and columns are updated by clamping the counter. Specifically, during each arbitration, it can first check whether the value recorded by the counter has reached the weight threshold. If it has not reached the threshold, arbitration is carried out according to the current priority. After a successful arbitration, the counter is incremented by 1. When the threshold is reached, the polling matrix is ​​updated and the counter is reset.

[0081] For example, Figure 5 This is a schematic diagram illustrating a successful arbitration output provided in an embodiment of this application. For example... Figure 5 As shown, Grant=0001(0) indicates that the port corresponding to the zeroth row of the polling matrix has successfully requested arbitration once, Grant=0001(1) indicates that the port corresponding to the zeroth row of the polling matrix has successfully requested arbitration twice, and Grant=0001(2) indicates that the port corresponding to the zeroth row of the polling matrix has successfully requested arbitration three times. Cnt=weight(i) indicates that the value recorded by the counter is equal to the configuration parameter of the weight register, where i represents the configuration parameter of the weight register. When the configuration parameter of the weight register is configured to 3, after the port corresponding to the zeroth row of the polling matrix has successfully requested arbitration three times, the matrix row and matrix column corresponding to that port can be updated, and the next arbitration can be performed.

[0082] Optionally, if the target port has not reached the number of successful arbitrations equal to the weight threshold, other ports can still obtain arbitration priority if the target port has no data transmission request. For example, if the weight register is configured with a parameter of 3, and the target port obtains arbitration priority in the first arbitration, it can be understood as the target port successfully arbitrating once. Because the weight register is configured with a parameter of 3, the target port still has arbitration priority in the next arbitration. However, if the target port has no data transmission request at this time, a port with a data transmission request and a non-blocked path can be selected according to the polling matrix, and that port is determined to obtain arbitration priority. That is, the port is determined to handle the data transmission request corresponding to the data transmission request. When the target port has a data transmission request, the target port is given priority to obtain arbitration priority again, until the target port obtains arbitration priority 3 times. Then, the polling matrix is ​​updated to ensure the continuous and stable operation of the system.

[0083] For example, in a specific arbitration process, assuming a router node has four ports, denoted as port 1, port 2, port 3, and port 4, with port 1 having the highest priority initially and the weight register configured with parameter 3: In the first arbitration, port 1 makes a request, with a cumulative success count of 0. Since port 1 has the highest priority initially, it gains arbitration priority, and the cumulative success count increases from 0 to 1. However, this does not reach configuration parameter 3, so port 1 retains the highest priority. In the second arbitration, port 1 makes no request, while ports 2 and 3 make requests. Port 2 has a higher priority than port 3, so port 2 gains arbitration priority. Port 1 does not process the request, and its cumulative success count remains 1. In the third arbitration, port 1 makes a request, and its cumulative success count reaches 1. Port 1 gains arbitration priority, and its cumulative success count increases from 1 to 2. This does not reach configuration parameter 3, so port 1 retains the highest priority. Understandably, when the cumulative success count reaches 3, configuration parameter 3 is met, the polling matrix can be updated, and the next arbitration can be initiated.

[0084] This embodiment can obtain the configuration parameters of the weight register and flexibly configure them through software, thereby dynamically adjusting the arbitration weight allocation of the route and dynamically controlling the data flow allocation in the on-chip network to adapt to different service data flow characteristics and improve the service operation performance of the interconnection network. When the number of times the corresponding data transmission request is processed continuously at the target port of the router node equals the configuration parameters of the weight register, the matrix row and column corresponding to the target port are updated, and the next arbitration is performed. The priority is adjusted after multiple processing cycles. This ensures the continuity of critical services, avoids service interruptions caused by frequent priority switching, reduces the resources occupied by priority switching, and improves the overall system operating efficiency.

[0085] In some embodiments, the above data transmission method may further include: determining whether there is an empty space in the buffer of the downstream receiving port of the router node based on the receiving ready signal; if not, pausing data transmission.

[0086] In this embodiment, the receive-ready signal can also be called the ready signal. In digital circuits, processor interfaces, or communication protocols, the ready signal is a status indication signal used to indicate that the sending or receiving end is ready to transmit data, execute operations, or switch states. It is a core control signal that ensures timing coordination and data integrity in asynchronous or synchronous communication. While performing polling arbitration, it can check whether there is an empty space in the buffer area of ​​the downstream router's receiving port. When there is an empty space in the buffer area of ​​the downstream router's receiving port, the router node's output port can send data transmission request data to the downstream router's receiving port; when there is no empty space in the buffer area of ​​the downstream router's receiving port, the data transmission request can be paused, and arbitration does not occur. The arbitration result, Grant, is 0000.

[0087] This embodiment determines whether there is empty space in the buffer of the downstream receiving port of the router node based on the receive-ready signal. If not, data transmission is paused. This ensures that data is sent only when the buffer is free, preventing data loss due to buffer overflow. It also avoids the problem of downstream routers having to process invalid data (such as checksums or data dropping) and consuming computing resources when sending data when the buffer is empty.

[0088] In one specific embodiment, the above data transmission method can be used in a 4×4 network to adjust the arbitration weights of different routing directions. Figure 6 This is a schematic diagram of an implementation scenario provided by an embodiment of this application. For example... Figure 6 As shown, cross-DIE module components often generate significant traffic spikes in the network. In such cases, adjusting the arbitration weight of the route direction they connect to can help reduce the traffic spikes in the south (i.e.,...) Figure 6 The packets received on the south side of the route (S) have a higher weight in the arbitration process to increase the bandwidth of devices on the south side of the route. Tests showed that increasing the weight of the south side of the route to 3 resulted in a 23% increase in cross-DIE bandwidth compared to the original on-chip network using round-robin arbitration.

[0089] In summary, in this embodiment, by acquiring data transmission requests sent to the ports of router nodes, and then polling and arbitrating the data transmission requests based on the matrix rows in the polling matrix matching the router nodes, the data to be processed by the target port of the router node is determined. This allows for rapid querying using a matrix structure, improving arbitration efficiency. Furthermore, the matrix structure is simple and can be implemented using combinational logic, resulting in extremely low arbitration logic depth. The polling and arbitration logic depth achieved in this embodiment is only log2 (number of arbitration ports) + 1, resulting in a shorter critical path and stable operation at higher frequencies, thus increasing the chip's clock speed. Finally, after determining that the target port will process the data transmission request, the matrix elements in the corresponding matrix rows and columns can be updated, reducing the target port's priority to the lowest level and proceeding to the next arbitration. This prevents output ports from continuously processing requests from the same input port, improving the stability and fairness of the on-chip interconnect network.

[0090] This application also provides a data transmission device. Figure 7 This is a block diagram of a data transmission device provided in an embodiment of this application. The device 700 includes: an acquisition unit 701, an arbitration unit 702, and an update unit 703.

[0091] The acquisition unit 701 is used to acquire data transmission requests sent to the port of the router node;

[0092] Arbitration unit 702 is used to perform polling arbitration based on the matrix rows in the polling matrix that match the router node and the data transmission request, and to determine the data of the data transmission request corresponding to the target port of the router node.

[0093] Update unit 703 is used to update the matrix rows and columns corresponding to the target port and to perform the next arbitration;

[0094] Each matrix row represents a port in one transmission direction of the router node; different matrix rows represent different transmission directions, and the matrix elements in each matrix row are used to reflect the congestion status of the port corresponding to the matrix row.

[0095] Optionally, the data transmission request is a binary sequence, where each bit in the binary sequence corresponds to a port in one transmission direction of the router node, and the value of the bit is used to reflect whether there is a data transmission request on the port corresponding to the bit.

[0096] Optionally, the arbitration unit 702 is specifically used to perform an AND gate calculation on each row of the polling matrix and the data transmission request in sequence to obtain the calculation result; take the port corresponding to the matrix row where each value in the calculation result is the first value as the target port of the router node; and determine the data of the corresponding data transmission request to be processed by the target port of the router node.

[0097] Optionally, the data transmission device 700 further includes a construction unit 704.

[0098] Construction unit 704 is used to construct a polling matrix, wherein all matrix elements in the polling matrix are binary values, and the binary values ​​represent whether the port corresponding to the matrix row is blocked.

[0099] Optionally, the construction unit 704 is specifically used to determine the number of rows and columns of the polling matrix, and set the value corresponding to the binary bits with equal rows and columns in the polling matrix as the first value; taking the binary bits with equal rows and columns in the polling matrix as the boundary, set each value above the boundary in the polling matrix as the second value, and set each value below the boundary in the polling matrix as the first value, to obtain the polling matrix.

[0100] Optionally, the construction unit 704 is specifically used to determine the number of rows and columns of the polling matrix, and set the value corresponding to the binary bits with equal rows and columns in the polling matrix as the first value; taking the binary bits with equal rows and columns in the polling matrix as the boundary, set each value above and to the left of the boundary in the polling matrix as the second value; and transpose the value above and to the right of the boundary in the polling matrix to obtain the value below and to the right of the boundary in the polling matrix, so as to construct the polling matrix.

[0101] Optionally, the update unit 703 is specifically used to set all values ​​in the matrix row corresponding to the target port, except for values ​​with equal rows and columns, to the second value, and to set all values ​​in the column containing values ​​with equal rows and columns in the matrix row corresponding to the target port to the first value, so as to update the polling matrix and perform the next arbitration.

[0102] Optionally, the update unit 703 is specifically used to obtain the configuration parameters of the weight register; when the number of times the data of the corresponding data transmission request is continuously processed on the target port of the router node is equal to the configuration parameters of the weight register, the matrix row and matrix column corresponding to the target port are updated, and the next arbitration is performed.

[0103] Optionally, the data transmission device 700 further includes a judgment unit 705.

[0104] The judgment unit 705 is used to determine whether there is an empty space in the buffer of the downstream receiving port of the router node based on the receiving ready signal. If there is no empty space, the data transmission is paused.

[0105] As the device embodiment is basically similar to the method embodiment, the description is relatively simple, and relevant parts can be found in the description of the method embodiment.

[0106] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0107] Regarding the apparatus in the above embodiments, the specific manner in which each module performs its operation has been described in detail in the embodiments related to the method, and will not be elaborated upon here.

[0108] This application also provides a data transmission apparatus, including a memory and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by one or more processors, the one or more programs comprising methods for performing the methods described in one or more of the above embodiments.

[0109] This application also provides an electronic device. See also... Figure 8 , Figure 8 This is a block diagram illustrating an electronic device 800 according to an exemplary embodiment. For example, the electronic device 800 may be a mobile phone, computer, digital broadcasting terminal, messaging device, game console, tablet device, medical device, fitness equipment, personal digital assistant, etc.

[0110] Reference Figure 8 The electronic device 800 may include one or more of the following components: a processing component 802, a memory 804, a power supply component 806, a multimedia component 808, an audio component 810, an input / output (I / O) interface 812, a sensor component 814, and a communication component 816.

[0111] Processing component 802 typically controls the overall operation of electronic device 800, such as operations associated with display, telephone calls, data communication, camera operation, and recording operations. Processing component 802 may include one or more processors 820 to execute instructions to complete all or part of the steps of the methods described above. Furthermore, processing component 802 may include one or more modules to facilitate interaction between processing component 802 and other components. For example, processing component 802 may include a multimedia module to facilitate interaction between multimedia component 808 and processing component 802.

[0112] Memory 804 is used to store various types of data to support the operation of electronic device 800. Examples of this data include instructions for any application or method operating on electronic device 800, contact data, phonebook data, messages, pictures, multimedia, etc. Memory 804 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0113] Power supply component 806 provides power to various components of electronic device 800. Power supply component 806 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to electronic device 800.

[0114] Multimedia component 808 includes a screen that provides an output interface between the electronic device 800 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may not only sense the boundaries of touch or swipe actions but also detect the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 808 includes a front-facing camera and / or a rear-facing camera. When the electronic device 800 is in an operating mode, such as a shooting mode or a multimedia mode, the front-facing camera and / or the rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0115] Audio component 810 is used to output and / or input audio signals. For example, audio component 810 includes a microphone (MIC) used to receive external audio signals when electronic device 800 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 804 or transmitted via communication component 816. In some embodiments, audio component 810 also includes a speaker for outputting audio signals.

[0116] I / O interface 812 provides an interface between processing component 802 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.

[0117] Sensor assembly 814 includes one or more sensors for providing state assessments of various aspects of electronic device 800. For example, sensor assembly 814 can detect the on / off state of electronic device 800, the relative positioning of components such as the display and keypad of electronic device 800, changes in position of electronic device 800 or a component of electronic device 800, the presence or absence of user contact with electronic device 800, orientation or acceleration / deceleration of electronic device 800, and temperature changes of electronic device 800. Sensor assembly 814 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 814 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 814 may also include an accelerometer, gyroscope, magnetometer, pressure sensor, or temperature sensor.

[0118] Communication component 816 facilitates wired or wireless communication between electronic device 800 and other devices. Electronic device 800 can access wireless networks based on communication standards, such as WiFi, carrier networks (such as 2G, 3G, 4G, or 5G), or combinations thereof. In one exemplary embodiment, communication component 816 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 816 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0119] In an exemplary embodiment, the electronic device 800 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to implement the methods provided in the embodiments of this application.

[0120] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 804 including instructions, which can be executed by a processor 820 of an electronic device 800 to perform the above-described method. For example, the non-transitory storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.

[0121] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the methods described in the above embodiments.

[0122] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.

[0123] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A data transmission method, characterized in that, The method is applied to any router node in an on-chip network, and the method includes: Obtain data transmission requests sent to multiple input ports of the router node; the data transmission request is a binary sequence, where each binary bit in the binary sequence corresponds to an input port of the router node, and a value of 0 for a binary bit indicates that there is no data transmission request for the input port represented by the matrix row in the polling matrix, and a value of 1 for a binary bit indicates that there is a data transmission request for the input port represented by the matrix row in the polling matrix. Based on the rows of the polling matrix matching the router node, the data transmission request is polled and arbitrated to determine the data to be processed by the target port of the router node. This includes: performing an AND gate operation on each row of the polling matrix and the data transmission request to obtain a calculation result; the row with each value of 0 in the calculation result has the highest arbitration priority; if the input port corresponding to the row has a data transmission request, then the input port corresponding to the row is taken as the target port of the router node; the binary bits with equal rows and columns in the polling matrix correspond to 0 values; using the binary bits with equal rows and columns in the polling matrix as boundaries, each value above the boundary is 1, and each value below the boundary is 0; determining the data to be processed by the target port of the router node for the corresponding data transmission request; the target port is a port with a data transmission request and a non-blocking path; the polling matrix is ​​constructed based on the input ports and output ports of the router node; the polling matrix is ​​used to represent the polling arbitration of multiple input ports to one output port. The configuration parameters of the weight register are used to update the matrix elements in the matrix row and column corresponding to the target port, and the next arbitration is performed; the configuration parameters are used to indicate the maximum number of times the target port of the router node can obtain arbitration priority; Each matrix row represents an input port of the router node; different matrix rows represent different input ports, and the matrix elements in each matrix row are used to reflect the blocking status of the input port corresponding to the matrix row.

2. The method according to claim 1, characterized in that, The process of constructing the polling matrix is ​​as follows: Determine the number of rows and columns of the polling matrix, and set the value corresponding to the binary bits with equal rows and columns in the polling matrix to 0; Using the binary bits with equal rows and columns in the polling matrix as boundaries, set each value above and to the left of the boundary in the polling matrix to 1, and set each value below and to the right of the boundary in the polling matrix to 0, to obtain the polling matrix.

3. The method according to claim 1, characterized in that, The process of constructing the polling matrix is ​​as follows: Determine the number of rows and columns of the polling matrix, and set the value corresponding to the binary bits with equal rows and columns in the polling matrix to 0; Using the binary bits with equal rows and columns in the polling matrix as boundaries, set each value above and to the left of the boundary in the polling matrix to 1; The value at the upper left of the boundary in the polling matrix is ​​transposed to obtain the value at the lower right of the boundary in the polling matrix, thereby constructing the polling matrix.

4. The method according to claim 1, characterized in that, The process of updating the matrix rows and columns corresponding to the target port and performing the next arbitration includes: Set all values ​​in the matrix row corresponding to the target port, except for values ​​with equal row and column values, to 1, and set all values ​​in the column containing values ​​with equal row and column values ​​in the matrix row corresponding to the target port to 0, in order to update the polling matrix and perform the next arbitration.

5. The method according to claim 1, characterized in that, The configuration parameters based on the weight register update the matrix rows and columns corresponding to the target port, and perform the next arbitration, including: Obtain the configuration parameters of the weight register; When the number of times the target port of the router node continuously processes the data of the corresponding data transmission request is equal to the configuration parameters of the weight register, the matrix row and matrix column corresponding to the target port are updated, and the next arbitration is performed.

6. The method according to claim 1, characterized in that, The method further includes: Based on the receive ready signal, determine whether there is an empty space in the buffer of the downstream receiving port of the router node. If not, pause the data transmission.

7. A data transmission device, characterized in that, The device is applied to any router node in an on-chip network, and the device includes: The acquisition unit is used to acquire data transmission requests sent to multiple input ports of the router node; the data transmission request is a binary sequence, where each binary bit in the binary sequence corresponds to an input port of the router node, and a value of 0 for a binary bit is used to reflect that there is no data transmission request for the input port corresponding to the binary bit, and a value of 1 for a binary bit is used to reflect that there is a data transmission request for the input port corresponding to the binary bit. An arbitration unit is used to perform polling arbitration based on the rows of a polling matrix matching the router node and the data transmission request, and to determine the data of the data transmission request corresponding to the target port of the router node. This includes: performing an AND gate operation on each row of the polling matrix and the data transmission request sequentially to obtain a calculation result; the row with each value of 0 in the calculation result has the highest arbitration priority; if the input port corresponding to this row has a data transmission request, then the input port corresponding to this row is taken as the target port of the router node; the binary bits corresponding to equal rows and columns in the polling matrix are 0; using the binary bits corresponding to equal rows and columns in the polling matrix as boundaries, each value above the boundary is 1, and each value below the boundary is 0; determining the data of the data transmission request corresponding to the target port of the router node; the target port is a port with a data transmission request and a non-blocking path; the polling matrix is ​​constructed based on the input ports and output ports of the router node; the polling matrix is ​​used to represent polling arbitration of multiple input ports against one output port. The update unit is used to update the matrix rows and columns corresponding to the target port based on the configuration parameters of the weight register, and to perform the next arbitration; the configuration parameters are used to indicate the maximum number of times the target port of the router node can obtain arbitration priority; Each matrix row represents an input port of the router node; different matrix rows represent different input ports, and the matrix elements in each matrix row are used to reflect the blocking status of the input port corresponding to the matrix row.

8. An electronic device, characterized in that, The electronic device is applied to any router node of the on-chip network and includes: a processor; Memory used to store the processor's executable instructions; The processor is configured to execute the instructions to implement the method as described in any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that, When the instructions in the computer-readable storage medium are executed by the processor of the electronic device, the electronic device is enabled to perform the method as described in any one of claims 1 to 6; the electronic device is applied to any router node of a network-on-a-chip.

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