Display panel and driving method thereof

Abstract

The application discloses a display panel and a driving method thereof. The display panel comprises a plurality of first switches and a plurality of second switches, a first display area is provided with N columns of pixels, and a second display area is provided with M columns of pixels; a first scan line is connected with the N columns of pixels in the first display area and the M columns of pixels in the second display area, and a second scan line is connected with the N columns of pixels in the first display area; each first switch is connected with two data lines corresponding to sub-pixels of the same color in the first display area and the second display area; and each second switch is connected with a data driving chip and a data line corresponding to a pixel in the first display area; wherein N and M are natural numbers greater than or equal to 2. The application realizes the display of different display modes by making the two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area respectively receive the same data signal or different data signals through the conduction or disconnection of the first switch and the second switch, thereby improving the insufficient charging under a high refresh rate.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel and a driving method thereof. BACKGROUND

[0002] Liquid Crystal Display (LCD) has many advantages such as thin body, power saving, no radiation, etc., and has been widely applied. In the LCD display industry, in order to reduce the cost, a dual rate driver (DRD) driving mode can be used. When the DRD driving mode is used, two groups of scanning signals are used to drive the pixels in the same row. Two adjacent signals are used to drive the pixels in the first row. The product using the DRD driving mode can reduce the number of data lines and the number of COF (Chip On Film), so as to achieve the purpose of reducing the cost. Therefore, the DRD design is applied more and more.

[0003] The DRD design uses different scanning lines to address by sharing one data line for the left and right adjacent pixels, so as to achieve the purpose of reducing the number of data lines by half. However, at the same time, the charging time of the pixels is halved due to the doubling of the scanning lines. In the case of higher brushing, the charging is insufficient. With the development of high resolution and high refresh rate of the display panel, the display abnormality caused by the insufficient charging is more obvious. SUMMARY

[0004] The purpose of the present application is to provide a display panel and a driving method thereof, which can improve the display abnormality caused by the insufficient charging of the DRD display panel in the high brushing.

[0005] The present application discloses a display panel, which comprises a first switch circuit and a second switch circuit. The first switch circuit comprises a plurality of first switches, and the second switch circuit comprises a plurality of second switches. In the extension direction of the scanning lines, the display area of the display panel is divided into a first display area and a second display area. N columns of sub-pixels are arranged in each first display area, and M columns of sub-pixels are arranged in the second display area. In the extension direction of the data lines, the display panel is divided into a plurality of rows of sub-pixels. Each row of sub-pixels is provided with two scanning lines, which are a first scanning line and a second scanning line. The first scanning line is connected to N columns of pixels in the first display area and M columns of sub-pixels in the second display area. The second scanning line is connected to N columns of sub-pixels in the first display area.

[0006] Each first switch is connected to two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area. Each second switch is connected to a data line corresponding to a pixel in the first display area and a data line corresponding to a pixel in the second display area.

[0007] Wherein, N and M are natural numbers greater than or equal to 2, by controlling the conduction or disconnection of the first switch and the second switch, two data lines corresponding to the same color sub-pixels in the first display area and the second display area respectively receive the same data signal or different data signals to realize the display of different display modes.

[0008] Optionally, the display panel comprises a refresh rate detection module, the refresh rate detection module is connected with the first switch circuit and the second switch circuit respectively, the refresh rate detection module detects the refresh rate of the next frame, and outputs a first level signal and a second level signal to the first switch or the second switch according to the refresh rate of the next frame respectively;

[0009] If the refresh rate of the next frame is less than the preset refresh rate, the first level signal is output to the first switch to control the first switch to be turned on, the second level signal is output to the second switch to control the second switch to be turned off, two data lines corresponding to the same color sub-pixels in the first display area and the second display area receive the same data signal, and the first scan line is turned on to charge the sub-pixels in the second display area, and the second scan line is turned on to charge the sub-pixels in the first display area;

[0010] If the refresh rate of the next frame is greater than or equal to the preset refresh rate, the second level signal is output to the first switch to control the first switch to be turned off, the first level signal is output to the second switch to control the second switch to be turned on, two data lines corresponding to the same color sub-pixels in the first display area and the second display area receive different data signals, and the first scan line is turned on to charge the pixels in the first display area and the second display area.

[0011] Optionally, the first display area is provided with a first thin film transistor and a second thin film transistor corresponding to each sub-pixel, the control end of the first thin film transistor is connected with a third level signal output end, the input end is connected with a first scan line, the output end is connected with the control end of the second thin film transistor, the control end of the second thin film transistor is connected with a second scan line, the input end is connected with a data line, and the output end is connected with a pixel electrode; the third thin film transistor is provided corresponding to each pixel in the second display area, the control end of the third thin film transistor is connected with the first scan line, the input end is connected with the data line, and the output end is connected with the pixel electrode;

[0012] The first switch circuit is controlled to be turned on, the second switch circuit is controlled to be turned off, two data lines corresponding to the same color sub-pixels in the first display area and the second display area receive the same data signal, the first scan line opens the third thin film transistor of the sub-pixel in the second display area to charge the pixel in the second display area, the third level signal turns off the first thin film transistor of the sub-pixel in the first display area, the second scan line opens the second thin film transistor of the sub-pixel in the first display area to charge the pixel in the first display area, and the display in the first display mode is realized; and

[0013] The first switch circuit is controlled to be turned off, the second switch circuit is controlled to be turned on, two data lines corresponding to the same color sub-pixels in the first display area and the second display area receive different data signals, the first scan line opens to charge the sub-pixel in the first display area and the second display area, and the second scan line turns off the second thin film transistor of the sub-pixel in the first display area, so that the display in the second display mode is realized.

[0014] Optionally, the first display area and the second display area are each provided with a plurality of first switches, control ends of all the first switches are connected to the same control signal line and receive the same control signal, control ends of all the second switches are connected to the same control signal line and receive the same control signal, values of N and M in each display area are equal, and the values of N and M are multiples of 3 and odd numbers, gate drive unit connected to the scan line of the odd number row is cascaded, and gate drive unit connected to the scan line of the even number row is cascaded.

[0015] When the first switch circuit is turned on and the second switch circuit is turned off, two data lines corresponding to the same color sub-pixels in the first display area and the second display area receive the same data signal, the odd number row scan line opens to charge the pixel in the second display area, and the even number row scan line opens to charge the pixel in the first display area; when the first switch circuit is turned off and the second switch circuit is turned on, two data lines corresponding to the same color sub-pixels in the first display area and the second display area receive different data signals, the odd number row scan line opens to charge the sub-pixel in the first display area and the second display area, and the even number row scan line is closed.

[0016] Optionally, the display panel further comprises a third switch circuit, the third switch circuit is arranged on a side of the data line away from the data driving chip, the third switch circuit comprises a plurality of third switches, each third switch is connected to two data lines corresponding to the same color sub-pixels in the first display area and the second display area, the two data lines connected to the third switch are the same two data lines connected to the first switch, when the first switch is turned on, the third switch is turned on, and the first switch, the third switch and the two data lines connected thereto form a loop.

[0017] Optionally, the first switch circuit, the second switch circuit and the third switch circuit are arranged in a non-display area of the display panel, and the first switch, the second switch and the third switch are formed on a glass substrate in the same process.

[0018] Optionally, along the extension direction of the data line, each row of sub-pixels includes a plurality of sub-pixels, and the plurality of sub-pixels are red sub-pixels, green sub-pixels and blue sub-pixels respectively, and in each row of sub-pixels, the red sub-pixels, the green sub-pixels and the blue sub-pixels are arranged in sequence.

[0019] The two scan lines corresponding to each row of sub-pixels are arranged above and below each row of sub-pixels respectively, or the two scan lines corresponding to each row of sub-pixels are arranged above or below each row of sub-pixels.

[0020] Optionally, the first display area and the second display area are each provided with a plurality of first switches, the control ends of all the first switches are connected to the same control signal line and receive the same control signal, and the control ends of all the second switches corresponding to the data line of each first display area are connected to different control signal lines and receive different control signals.

[0021] The application further discloses a driving method of the display panel, which is used for driving the display panel as any one of the above, and the driving method comprises the following steps:

[0022] The first switch circuit is controlled to be turned on, the second switch circuit is controlled to be turned off, the two data lines corresponding to the same color sub-pixels in the first display area and the second display area receive the same data signal, the first scan line is turned on to charge the sub-pixels in the second display area, the second scan line is turned on to charge the sub-pixels in the first display area, and the display in the first display mode is realized; and

[0023] The first switch circuit is controlled to be turned off, the second switch circuit is controlled to be turned on, the two data lines corresponding to the same color sub-pixels in the first display area and the second display area receive different data signals, the first scan line is turned on to charge the sub-pixels in the first display area and the second display area, and the display in the second display mode is realized.

[0024] The refresh rate of the first display mode is different from the refresh rate of the second display mode.

[0025] Optionally, the display panel comprises a refresh rate detection module, and the refresh rate detection module is connected with the first switch circuit and the second switch circuit respectively.

[0026] The first switch circuit is controlled to be turned on, the second switch circuit is controlled to be turned off, two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area receive the same data signal, the first scanning line is turned on to charge the sub-pixels in the second display area, the second scanning line is turned on to charge the sub-pixels in the first display area, and the step of realizing the display in the first display mode comprises:

[0027] The refresh rate detection module detects the refresh rate of the next frame, and generates a first level signal and a second level signal according to the refresh rate of the next frame;

[0028] If the refresh rate of the next frame is less than the preset refresh rate, the first level signal is output to the first switch to control the first switch to be turned on, the second level signal is output to the second switch to control the second switch to be turned off, two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area receive the same data signal, the first scanning line is turned on to charge the sub-pixels in the second display area, and the second scanning line is turned on to charge the sub-pixels in the first display area;

[0029] The first switch circuit is controlled to be turned on, the second switch circuit is controlled to be turned off, two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area receive the same data signal, the first scanning line is turned on to charge the sub-pixels in the second display area, the second scanning line is turned on to charge the sub-pixels in the first display area, and the step of realizing the display in the first display mode comprises:

[0030] The refresh rate detection module detects the refresh rate of the next frame, and generates a first level signal and a second level signal according to the refresh rate of the next frame;

[0031] If the refresh rate of the next frame is greater than or equal to the preset refresh rate, the second level signal is output to the first switch to control the first switch to be turned off, the first level signal is output to the second switch to control the second switch to be turned on, two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area receive different data signals, and the first scanning line is turned on to charge the sub-pixels in the first display area and the second display area.

[0032] Compared with the DRD display panel without the switch circuit, the application provides a new DRD display panel, the display panel includes two switch circuits, each of which includes a plurality of switches, which are first switches and second switches, each of the first switches is connected with two data lines corresponding to the same color sub-pixel in the first display area and the second display area, and each of the second switches is connected with a data line corresponding to a pixel in the first display area and a data driving chip; at a high refresh rate, by controlling the first switch to be turned off and the second switch to be turned on, the two data lines corresponding to the same color sub-pixel in the first display area and the second display area receive different data signals to realize display, and the problem of insufficient charging in the DRD mode is improved. BRIEF DESCRIPTION OF DRAWINGS

[0033] The accompanying drawings, which are included to provide a further understanding of the embodiments of the application and constitute a part of the specification, illustrate the embodiments of the application and together with the text description serve to explain the principles of the application. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative labor on the basis of these drawings, in which:

[0034] Figure 1 is a structural schematic diagram of the display panel of the first embodiment of the application;

[0035] Figure 2 is a structural schematic diagram of the display panel of the second embodiment of the application;

[0036] Figure 3 is a cascade structure schematic diagram of the gate driving circuit of the display panel of the second embodiment of the application;

[0037] Figure 4 is a clock signal waveform schematic diagram of the third embodiment of the application;

[0038] Figure 5 is a pixel structure diagram in the first display area of the display panel of the third embodiment of the application;

[0039] Figure 6 is a pixel structure diagram in the second display area of the display panel of the third embodiment of the application;

[0040] Figure 7 is a structural schematic diagram of the display panel of the fourth embodiment of the application;

[0041] Figure 8a is a structural schematic diagram of the display panel of the fifth embodiment of the application;

[0042] Figure 8b is a color structure diagram of the display panel of the fifth embodiment of the application;

[0043] Figure 9a is a structural color diagram of another display panel of the fifth embodiment of the present application;

[0044] Figure 9b is a structural schematic diagram of another display panel of the fifth embodiment of the present application;

[0045] Figure 10 is a driving method flowchart of a display panel of the sixth embodiment of the present application;

[0046] Figure 11 is a driving method flowchart of a display panel of the seventh embodiment of the present application.

[0047] wherein, 100, display panel; 101, display area; 1011, first display area; 1012, second display area; 102, non-display area; 110, sub-pixel; 120, scanning line; 130, data line; 140, first switch circuit; 150, second switch circuit; 160, refresh rate detection module; 170, control signal line; 180, gate drive unit; 190, third switch circuit; 200, data drive chip; G1-first scanning line; G2-second scanning line; S1-first switch; S2-second switch; S3-third switch; T1-first thin film transistor; T2-second thin film transistor; T3-third thin film transistor. DETAILED DESCRIPTION

[0048] It should be understood that the terms used herein, the specific structures and functional details disclosed, are only for the purpose of describing specific embodiments, and are representative, but the present application can be embodied in many alternative forms, and should not be interpreted as being limited to the embodiments set forth herein.

[0049] The present application will be described in detail below with reference to the accompanying drawings and optional embodiments.

[0050] As Figure 1As shown, as the first embodiment of the present application, a display panel 100 is disclosed, the display panel 100 comprises a first switch circuit 140 and a second switch circuit 150, the first switch circuit 140 comprises a plurality of first switches S1, the second switch circuit 150 comprises a plurality of second switches S2, along the extension direction of the scan line 120, the display area 101 of the display panel 100 is divided into a first display area 1011 and a second display area 1012, generally, m data lines are arranged in the display area 101, N columns of sub-pixels 110 are arranged in each of the first display area 1011, and M columns of sub-pixels 110 are arranged in the second display area 1012, generally, a plurality of first display areas 1011 and a plurality of second display areas 1012 are arranged and spaced apart, and three data lines are arranged in each of the first display area 1011 and the second display area 1012, starting from the first data line D1, the three data lines corresponding to the first display area 1011 are D1, D2 and D3, the three data lines corresponding to the second display area 1012 are D4, D5 and D6, the three data lines corresponding to the last first display area 1011 are Dm-5, Dm-4 and Dm-3, and the three data lines corresponding to the last second display area 1012 are Dm-2, Dm-1 and Dm; along the extension direction of the data line 130, the display panel 100 is divided into a plurality of rows of sub-pixels 110, two scan lines 120 are arranged corresponding to each row of sub-pixels 110, and the two scan lines 120 are a first scan line G1 and a second scan line G2, the first scan line G1 is connected to N columns of sub-pixels 110 in the first display area 1011 and M columns of sub-pixels 110 in the second display area 1012, and the second scan line G2 is connected to N columns of sub-pixels 110 in the first display area 1011; each of the first switches S1 is connected to two data lines 130 corresponding to the same color sub-pixels 110 in the first display area 1011 and the second display area 1012, each of the second switches S2 is connected to the data line 130 corresponding to the pixel in the first display area 1011 and the data driving chip 200; wherein N and M are natural numbers greater than or equal to 2, by controlling the conduction or disconnection of the first switch S1 and the second switch S2, the two data lines 130 corresponding to the same color sub-pixels 110 in the first display area 1011 and the second display area 1012 respectively receive the same data signal or different data signals to realize the display of different display modes.

[0051] In the embodiment, the display panel 100 is provided with a first switch circuit 140 and a second switch circuit 150, the first switch circuit 140 includes a plurality of first switches S1, the second switch circuit 150 includes a plurality of second switches S2, by controlling the first switch circuit 140 to be turned on and the second switch circuit 150 to be turned off, so that the two data lines 130 corresponding to the sub-pixels 110 of the same color in the first display area 1011 and the second display area 1012 receive the same data signal, the first scan line G1 is turned on to charge the sub-pixels 110 in the second display area 1012, and the second scan line G2 is turned on to charge the sub-pixels 110 in the first display area 1011, to realize the display of the first display mode, that is, the DRD mode display; in the case of high refresh rate, the first switch circuit 140 is controlled to be turned off and the second switch circuit 150 is controlled to be turned on, the two data lines 130 corresponding to the sub-pixels 110 of the same color in the first display area 1011 and the second display area 1012 receive different data signals, and the first scan line G1 is turned on to charge the sub-pixels 110 in the first display area 1011 and the second display area 1012, to realize the display of the second display mode, that is, the 1G1D mode display, to avoid the uneven charging of the DRD display panel 100, the scheme of the application can be switched to the DRD mode, and the DLG mode (double gate line driving mode) switching can be performed in the 1G1D and DRD modes.

[0052] As a second embodiment of the application, it is a further refinement of the above-mentioned first embodiment, referring to Figure 2 and Figure 3As shown, the display panel 100 comprises a refresh rate detection module 160 connected with the first switch circuit 140 and the second switch circuit 150 respectively. The refresh rate detection module 160 detects the refresh rate of the next frame and outputs a first level signal and a second level signal to the first switch S1 or the second switch S2 according to the refresh rate of the next frame. The first level signal is generally a high level signal (DG) and the second level signal is generally a low level signal (DL). Before mode switching, the refresh rate of the next frame of display picture is detected and compared with a preset refresh rate. If the refresh rate of the next frame is less than the preset refresh rate, the first level signal is output to the first switch S1 to control the first switch S1 to be turned on, and the second level signal is output to the second switch S2 to control the second switch S2 to be turned off. The two data lines 130 corresponding to the sub-pixels 110 of the same color in the first display area 1011 and the second display area 1012 receive the same data signal. The first scan line G1 is turned on to charge the sub-pixels 110 in the second display area 1012, and the second scan line G2 is turned on to charge the sub-pixels 110 in the first display area 1011. If the refresh rate of the next frame is greater than or equal to the preset refresh rate, the second level signal is output to the first switch S1 to control the first switch S1 to be turned off, and the first level signal is output to the second switch S2 to control the second switch S2 to be turned on. The two data lines 130 corresponding to the sub-pixels 110 of the same color in the first display area 1011 and the second display area 1012 receive different data signals. The first scan line G1 is turned on to charge the pixels in the first display area 1011 and the second display area 1012.

[0053] Before mode switching, the refresh rate of the next frame of display picture is detected and compared with a preset refresh rate. When the refresh rate of the next frame of display picture is greater than or equal to the preset refresh rate, it is determined that the next frame of display picture is a high refresh picture. When the display panel 100 is in a high refresh rate state, there is a problem of insufficient charging. Therefore, the 1G1D display mode state is automatically converted to solve the problem of insufficient charging. When the refresh rate of the next frame of display picture is less than the preset refresh rate, the DRD display mode state is adopted. The present application can freely switch between DRD and 1G1D to display multiple modes on one screen and improve product competitiveness.

[0054] Generally, the preset refresh rate is 60-90Hz, for example, when the preset refresh rate is equal to 60Hz, greater than or equal to 60Hz is high refresh rate, for example, when the preset refresh rate is equal to 90Hz, greater than or equal to 90Hz is high refresh rate, which can be adjusted as needed, and the refresh rate is also not fixed for the same display panel, for example, within one or two years after the display panel is shipped, greater than the preset refresh rate is 90Hz, and then as the service life increases, the preset refresh rate gradually decreases. Among them, the first display area 1011 and the second display area 1012 are provided with a plurality of first switches S1, and the control ends of all the first switches S1 are connected to the same control signal line 170 and receive the same control signal. The control ends of all the second switches S2 are connected to the same control signal line 170 and receive the same control signal; the values of N and M in each display area 101 are equal, and the values of N and M are multiples of 3, the scan lines 120 of the odd rows are connected to the gate drive units 180 in cascade, and the scan lines 120 of the even rows are connected to the gate drive units 180 in cascade; taking N and M equal to 3 as an example, the first display area 1011 and the second display area 1012 are provided with 3 columns of pixels, the first switch circuit 140 is provided with 3 first switches S1, the first first switch S1 is connected to the data line 130 corresponding to the first column of sub-pixels 110 of the first display area 1011 and the data line 130 corresponding to the first column of sub-pixels 110 of the second display area 1012, and the second first switch S1 is connected to the data line 130 corresponding to the second column of sub-pixels 110 of the first display area 1011 and the data line 130 corresponding to the second column of sub-pixels 110 of the second display area 1012; wherein the first display area 1011 and the second display area 1012 are provided with a plurality of and are arranged at intervals, and each first display area 1011 and each second display area 1012 are provided with 3 data lines, counted from the first data line D1, the three data lines corresponding to the first first display area 1011 are D1, D2 and D3, the three data lines corresponding to the first second display area 1012 are D4, D5 and D6, the three data lines corresponding to the last first display area 1011 are Dm-5, Dm-4 and Dm-3, and the three data lines corresponding to the last second display area 1012 are Dm-2, Dm-1 and Dm.

[0055] When the first switch circuit 140 is turned on, the second switch circuit 150 is turned off, the two data lines 130 corresponding to the same color sub-pixels 110 in the first display area 1011 and the second display area 1012 receive the same data signal, the odd-numbered row scanning lines 120 are turned on to charge the pixels in the second display area 1012, and the even-numbered row scanning lines 120 are turned on to charge the pixels in the first display area 1011. When the first switch circuit 140 is turned off, the second switch circuit 150 is turned on, the two data lines 130 corresponding to the same color sub-pixels 110 in the first display area 1011 and the second display area 1012 receive different data signals, the odd-numbered row scanning lines 120 are turned on to charge the sub-pixels 110 in the first display area 1011 and the second display area 1012, and the even-numbered row scanning lines 120 are turned off.

[0056] In addition, the stage transmission mode of the gate drive unit 180 (GOA) connected with the scanning lines 120 is designed as odd-odd cascade and even-even cascade, the output end of the first gate unit is used as the input end of the third gate drive unit, the output end of the second gate drive unit is used as the input end of the fourth gate drive unit, the first gate drive unit and the second gate drive unit simultaneously receive a frame start signal STV, so that the odd-numbered row scanning lines 120 and the even-numbered row scanning lines 120 can be controlled and worked independently, and the even-numbered row switching can be controlled by using the timing. When the even-numbered row needs to be turned on, the even-numbered CK gives the corresponding high-level timing, when the even-numbered row needs to be turned off, the even-numbered CK does not give timing or gives low-level timing, and the phase of the odd-numbered row CK is adjusted, which does not affect the output of the odd-numbered row while the even-numbered row is in the off state.

[0057] Generally, the first display area 1011 and the second display area 1012 are each provided with a plurality of first display areas, the control ends of all the first switches S1 are connected with the same control signal line 170 and receive the same control signal, such as simultaneously receiving a first-level signal or a second-level signal, and the control ends of all the second switches S2 corresponding to the data lines 130 of each first display area 1011 are connected with different control signal lines 170 and receive different control signals, or are connected with the same control signal line 170 and receive the same control signal, which can be selected and set as required.

[0058] As a third embodiment of the present application, any of the above embodiments is further limited and improved, referring to Figures 2 to 6 As shown in FIG. 10, each sub-pixel 110 of the first display area 1011 is provided with a first thin film transistor T1 and a second thin film transistor T2. Figure 5As shown, the control terminal of the first thin film transistor T1 is connected to the third level signal output terminal, the third level signal output terminal and the control terminal of the first switch receive the same level signal (DG), the input terminal is connected to the first scan line G1, and the output terminal is connected to the control terminal of the second thin film transistor T2. The control terminal of the second thin film transistor T2 is connected to the second scan line G2, the input terminal is connected to the data line 130, and the output terminal is connected to the pixel electrode. Each pixel of the second display area 1012 is provided with a third thin film transistor T3, as shown in Figure 6 As shown, the control terminal of the third thin film transistor T3 is connected to the first scan line G1, the input terminal is connected to the data line 130, and the output terminal is connected to the pixel electrode.

[0059] Generally, when displaying a low refresh rate picture, the first switch circuit 140 is turned on, the second switch circuit 150 is turned off, the two data lines 130 corresponding to the same color sub-pixel 110 in the first display area 1011 and the second display area 1012 receive the same data signal, the first scan line G1 turns on the third thin film transistor T3 of the sub-pixel 110 in the second display area 1012 to charge the pixel in the second display area 1012, the third level signal turns off the first thin film transistor T1 of the sub-pixel 110 in the first display area 1011, the second scan line G2 turns on the second thin film transistor T2 of the sub-pixel 110 in the first display area 1011 to charge the pixel in the first display area 1011, and the first display mode is realized, i.e. the DRD display mode. When displaying a high refresh rate picture, the first switch circuit 140 is turned off, the second switch circuit 150 is turned on, the two data lines 130 corresponding to the same color sub-pixel 110 in the first display area 1011 and the second display area 1012 receive different data signals, the first scan line G1 turns on to charge the sub-pixel 110 in the first display area 1011 and the second display area 1012, and the second scan line G2 turns off the second thin film transistor T2 of the sub-pixel 110 in the first display area 1011, and the second display mode is realized, i.e. the 1G1D display mode. DRD and 1G1D are freely switched, one screen displays multiple modes, and the situation of insufficient charging of the sub-pixel 110 when using the DRD mode at a high refresh rate can be avoided.

[0060] As shown in Figure 7 As a fourth embodiment of the present application, any of the above embodiments is further improved, as shown in Figures 5 to 7As shown, the display panel 100 further comprises a third switch circuit 190, which is arranged on the side of the data line 130 away from the data driving chip 200. The third switch circuit 190 comprises a plurality of third switches S3, each of which is connected to two data lines 130 corresponding to the same color of the sub-pixel 110 in the first display area 1011 and the second display area 1012. The two data lines 130 connected by the third switch S3 and the two data lines 130 connected by the first switch S1 are the same two data lines 130. When the first switch S1 is turned on, the third switch S3 is turned on. The first switch S1, the third switch S3, and the two data lines 130 connected thereby form a loop.

[0061] The first switch circuit 140, the second switch circuit 150, and the third switch circuit 190 are arranged in the non-display area 102 of the display panel 100, so as to avoid affecting the aperture ratio of the display panel 100. The first switch S1, the second switch S2, and the third switch S3 are formed on the glass substrate in the same process, so as to avoid using different types of switches, thereby avoiding process complexity and cost increase.

[0062] The third switch circuit 190 is added in the embodiment. In the third embodiment, when displaying a low refresh rate image, the first switch circuit 140 and the third switch circuit 190 are turned on, and the second switch circuit 150 is turned off. The two data lines 130 corresponding to the same color of the sub-pixel 110 in the first display area 1011 and the second display area 1012 receive the same data signal. The first switch S1, the third switch S3, and the two data lines 130 connected thereby form a loop, so as to avoid voltage difference on the two data lines 130, thereby avoiding uneven charging. Meanwhile, the first scan line G1 turns on the first thin film transistor T1 of the sub-pixel 110 in the second display area 1012 to charge the pixel in the second display area 1012. The third level signal turns off the first thin film transistor T1 of the sub-pixel 110 in the first display area 1011. The second scan line G2 turns on the second thin film transistor T2 of the sub-pixel 110 in the first display area 1011 to charge the pixel in the first display area 1011. The first display mode is realized, i.e., the DRD display mode, so as to avoid insufficient charging.

[0063] As a fifth embodiment of the present application, a display panel 100 is disclosed, which is a further refinement of any of the above embodiments, mainly limiting the arrangement of sub-pixels 110 and the setting of scan lines 120. Along the extension direction of the data lines 130, each row of sub-pixels 110 includes a plurality of sub-pixels 110, and the plurality of sub-pixels 110 are respectively red sub-pixels 110, green sub-pixels 110 and blue sub-pixels 110. In each row of sub-pixels 110, the red sub-pixels R, the green sub-pixels G and the blue sub-pixels B are arranged in sequence; the two scan lines 120 corresponding to each row of sub-pixels 110 are respectively arranged above and below each row of sub-pixels 110, as shown in Figure 8a and Figure 8b ; or the two scan lines 120 corresponding to each row of sub-pixels 110 are both arranged below each row of sub-pixels 110, as shown in Figure 9a and Figure 9b ; or the two scan lines 120 corresponding to each row of sub-pixels 110 can also be both arranged below each row of sub-pixels 110.

[0064] In this embodiment, in each row of sub-pixels 110, the red sub-pixels, the green sub-pixels and the blue sub-pixels are arranged in sequence, such as RGBRGB, which can be specifically referred to Figure 8a and Figure 8b . Taking N and M equal to 6 as an example, both the first display area 1011 and the second display area 1012 are provided with 6 columns of pixels, and the first switch circuit 140 is provided with 6 first switches S1. The first first switch S1 connects the data line 130 corresponding to the first column of red sub-pixels 110 of the first display area 1011 and the data line 130 corresponding to the first column of red sub-pixels 110 of the second display area 1012, and the second first switch S1 connects the data line 130 corresponding to the first column of green sub-pixels 110 of the first display area 1011 and the data line 130 corresponding to the first column of green sub-pixels 110 of the second display area 1012.

[0065] In the high refresh rate display picture, the control end of the first switch circuit 140 and the third switch circuit 190 receives the first level signal DL, controls the first switch S1 and the third switch S3 to be off, the second switch circuit 150 receives the second level signal, controls the second switch S2 to be on, the two data lines 130 corresponding to the sub-pixels 110 of the same color in the first display area 1011 and the second display area 1012 receive different data signals, at the same time, the first scan line G1 opens the third thin film transistor T3 of the sub-pixel 110 in the second display area 1012 to charge the pixel in the second display area 1012, the second scan line G2 opens the first thin film transistor T1 and the second thin film transistor T2 of the sub-pixel 110 in the first display area 1011 to charge the pixel in the first display area 1011, the display of the second display mode is realized, that is, the 1G1D display mode, and the situation of insufficient charging is avoided; in the low refresh rate display picture, the control signal line 170 connected with the first switch circuit 140 and the third switch circuit 190 receives the second level signal DG to be on, the control signal line 170 of the second switch circuit 150 receives the first level signal DL to be off, the two data lines 130 corresponding to the sub-pixels 110 of the same color in the first display area 1011 and the second display area 1012 receive the same data signal, the first switch S1, the third switch S3 and the two data lines 130 connected form a loop, the voltage difference on the two data lines 130 is avoided, which leads to uneven charging, at the same time, the first scan line G1 opens the third thin film transistor T3 of the sub-pixel 110 in the second display area 1012 to charge the pixel in the second display area 1012, the third level signal turns off the first thin film transistor T1 of the sub-pixel 110 in the first display area 1011, the second scan line G2 opens the second thin film transistor T2 of the sub-pixel 110 in the first display area 1011 to charge the pixel in the first display area 1011, and the display of the first display mode is realized, that is, the DRD display mode.

[0066] As shown in Figure 10 As a sixth embodiment of the present application, a driving method of a display panel is disclosed, the driving method is used for driving the display panel as any one of the above embodiments, the driving method comprises the steps of:

[0067] S1: controlling the first switch circuit to be on and the second switch circuit to be off, the two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area receive the same data signal, the first scan line opens to charge the sub-pixel in the second display area, the second scan line opens to charge the sub-pixel in the first display area, and the display of the first display mode is realized; and

[0068] S2: controlling the first switch circuit to be off and the second switch circuit to be on, the two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area receiving different data signals, the first scan line being turned on to charge the sub-pixels in the first display area and the second display area, and the second display mode being displayed.

[0069] Because the charging time is relatively short when the DRD display panel is at a high refresh rate, two switch circuits are arranged, and the two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area receive different data signals or the same data signal by controlling the first switch circuit and the second switch circuit to be on or off, so that the display panel displays different display modes, the DRD display mode is automatically converted when the display panel is at a high refresh rate, the problem of insufficient charging is solved, and the DRD display mode is adopted when the refresh rate of the next frame is less than the preset refresh rate, that is, the refresh rate of the next frame is less than the preset refresh rate, and a plurality of modes are displayed on one screen.

[0070] Further, referring to FIG. 6, as a sixth embodiment of the present application, the fifth embodiment is further refined, and referring to FIG. 7, the display panel comprises a refresh rate detection module, the refresh rate detection module is connected with the first switch circuit and the second switch circuit respectively. Figure 11 Figures 2 to 11 Further, referring to FIG. 6, as a sixth embodiment of the present application, the fifth embodiment is further refined, and referring to FIG. 7, the display panel comprises a refresh rate detection module, the refresh rate detection module is connected with the first switch circuit and the second switch circuit respectively.

[0071] The step S1 comprises:

[0072] S11: the refresh rate detection module detects the refresh rate of the next frame, and generates a first level signal and a second level signal according to the refresh rate of the next frame; and

[0073] S12: if the refresh rate of the next frame is less than the preset refresh rate, the first level signal is output to the first switch to control the first switch to be on, the second level signal is output to the second switch to control the second switch to be off, the two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area receive the same data signal, the first scan line is turned on to charge the sub-pixels in the second display area, and the second scan line is turned on to charge the sub-pixels in the first display area.

[0074] The step S2 comprises:

[0075] S21: the refresh rate detection module detects the refresh rate of the next frame, and generates a first level signal and a second level signal according to the refresh rate of the next frame; and

[0076] ​S22: If the refresh rate of the next frame is greater than or equal to the preset refresh rate, outputting a second level signal to the first switch, controlling the first switch to be turned off, outputting a first level signal to the second switch, and controlling the second switch to be turned on. The two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area receive different data signals, and the first scan line charges the sub-pixels in the first display area and the second display area.

[0077] In the embodiment, the refresh rate detection module generates the first level signal and the second level signal according to the comparison result of the refresh rate of the next frame and the preset refresh rate, and outputs different signals to the corresponding switches under different comparison results, so that the refresh rate can be changed, the DRD mode and the 1G1D mode can be freely switched, and the problem of insufficient charging of the DRD display panel under high refresh rate can be improved.

[0078] Further, if the third switch circuit is added, when the DRD mode display is performed, the corresponding level signal is input to the control end of the third switch at the same time when the first switch is turned on, the third switch is controlled to be turned on, and the first switch, the third switch and the two data lines connected therewith form a loop.

[0079] It should be noted that the steps involved in the present scheme are not limited to the order of execution, and the steps written in the front can be executed first, or executed later, or even executed simultaneously, as long as the scheme can be implemented, it should be considered as belonging to the protection scope of the present application.

[0080] It should be noted that the inventive concept of the present application can form a very large number of embodiments, but the length of the application file is limited and cannot be listed one by one, therefore, on the premise of not conflicting, the above described various embodiments or technical features can be combined to form new embodiments, and the combination of each embodiment or technical feature will enhance the original technical effect.

[0081] The technical solution of the present application can be widely used in driving circuits of various display panels, such as driving circuits of TN (Twisted Nematic) display panels, IPS (In-Plane Switching) display panels, VA (Vertical Alignment) display panels, MVA (Multi-Domain Vertical Alignment) display panels, and of course, driving circuits of other types of display panels, such as OLED (Organic Light-Emitting Diode) display panels, all of which can be applied to the above solution.

[0082] The above is a further detailed description of the present application in combination with specific optional embodiments, and cannot be deemed to limit the specific implementation of the present application to these descriptions. For ordinary skilled persons in the technical field to which the present application belongs, some simple deductions or replacements can be made without departing from the concept of the present application, and all of which shall be deemed to fall within the protection scope of the present application.

Claims

1. A display panel, characterized by, The display panel comprises a first switch circuit and a second switch circuit, the first switch circuit comprises a plurality of first switches, the second switch circuit comprises a plurality of second switches, along the extension direction of the scan line, the display area of the display panel is divided into a first display area and a second display area, each first display area is provided with N columns of sub-pixels, and the second display area is provided with M columns of sub-pixels; along the extension direction of the data line, the display panel is divided into a plurality of rows of sub-pixels, each row of sub-pixels is provided with two scan lines, and the two scan lines are a first scan line and a second scan line, the first scan line is connected with N columns of pixels in the first display area and M columns of sub-pixels in the second display area, and the second scan line is connected with N columns of sub-pixels in the first display area; Each first switch is connected with two data lines corresponding to the same color sub-pixels in the first display area and the second display area, and each second switch is connected with a data line corresponding to a pixel in the first display area and a data line corresponding to a pixel in the second display area; Wherein, N and M are natural numbers greater than or equal to 2, by controlling the conduction or disconnection of the first switch and the second switch, the two data lines corresponding to the same color sub-pixels in the first display area and the second display area respectively receive the same data signal or different data signals to realize the display of different display modes.

2. The display panel of claim 1, wherein, The display panel comprises a refresh rate detection module, the refresh rate detection module is connected with the first switch circuit and the second switch circuit respectively, the refresh rate detection module detects the refresh rate of the next frame, and outputs a first level signal and a second level signal to the first switch or the second switch according to the refresh rate of the next frame; If the refresh rate of the next frame is less than a preset refresh rate, the first level signal is output to the first switch to control the first switch to be turned on, the second level signal is output to the second switch to control the second switch to be turned off, the two data lines corresponding to the same color sub-pixels in the first display area and the second display area receive the same data signal, and the first scan line is turned on to charge the sub-pixels in the second display area, and the second scan line is turned on to charge the sub-pixels in the first display area; If the refresh rate of the next frame is greater than or equal to the preset refresh rate, the second level signal is output to the first switch to control the first switch to be turned off, the first level signal is output to the second switch to control the second switch to be turned on, the two data lines corresponding to the same color sub-pixels in the first display area and the second display area receive different data signals, and the first scan line is turned on to charge the pixels in the first display area and the second display area.

3. The display panel of claim 1, wherein, The first display area is provided with a first thin film transistor and a second thin film transistor corresponding to each sub-pixel, the control end of the first thin film transistor is connected with a third level signal output end, the input end is connected with a first scanning line, the output end is connected with the control end of the second thin film transistor, the control end of the second thin film transistor is connected with a second scanning line, the input end is connected with a data line, and the output end is connected with a pixel electrode; the second display area is provided with a third thin film transistor corresponding to each pixel, the control end of the third thin film transistor is connected with the first scanning line, the input end is connected with the data line, and the output end is connected with the pixel electrode; The first switch circuit is controlled to be turned on, the second switch circuit is controlled to be turned off, the two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area receive the same data signal, the first scanning line opens the third thin film transistor of the sub-pixel in the second display area to charge the pixel in the second display area, the third level signal turns off the first thin film transistor of the sub-pixel in the first display area, the second scanning line opens the second thin film transistor of the sub-pixel in the first display area to charge the pixel in the first display area, and the display in the first display mode is realized; And The first switch circuit is controlled to be turned off, the second switch circuit is controlled to be turned on, the two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area receive different data signals, the first scanning line opens to charge the sub-pixel in the first display area and the second display area, and the second scanning line turns off the second thin film transistor of the sub-pixel in the first display area, so that the display in the second display mode is realized.

4. The display panel of claim 1, wherein, The first display area and the second display area are each provided with a plurality of first switches, the control ends of all the first switches are connected with the same control signal line and receive the same control signal, the control ends of all the second switches are connected with the same control signal line and receive the same control signal, the values of N and M in each display area are equal, and the values of N and M are multiples of 3, the gate drive unit connected with the scanning line of the odd-numbered row is cascaded, and the gate drive unit connected with the scanning line of the even-numbered row is cascaded; When the first switch circuit is turned on and the second switch circuit is turned off, the two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area receive the same data signal, the odd-numbered row scanning line opens to charge the pixel in the second display area, and the even-numbered row scanning line opens to charge the pixel in the first display area; when the first switch circuit is turned off and the second switch circuit is turned on, the two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area receive different data signals, the odd-numbered row scanning line opens to charge the sub-pixel in the first display area and the second display area, and the even-numbered row scanning line is turned off.

5. The display panel according to any one of claims 1 to 4, wherein The display panel further comprises a third switch circuit, which is arranged on the side of the data line away from the data driving chip, and comprises a plurality of third switches, each of which is connected to two data lines corresponding to a pair of sub-pixels of the same color in the first display area and the second display area, the two data lines connected by the third switch and the two data lines connected by the first switch are the same two data lines, the first switch is turned on, the third switch is turned on, and the first switch, the third switch and the two data lines form a loop.

6. The display panel of claim 5, wherein, The first switch circuit, the second switch circuit and the third switch circuit are arranged in the non-display area of the display panel, and the first switch, the second switch and the third switch are formed on the glass substrate in the same process.

7. The display panel of claim 5, wherein, In the extension direction of the data line, each row of sub-pixels comprises a plurality of sub-pixels, and the plurality of sub-pixels are red sub-pixels, green sub-pixels and blue sub-pixels respectively, and in each row of sub-pixels, the red sub-pixels, the green sub-pixels and the blue sub-pixels are arranged in sequence. The two scanning lines corresponding to each row of sub-pixels are arranged above and below each row of sub-pixels respectively, or the two scanning lines corresponding to each row of sub-pixels are arranged above or below each row of sub-pixels.

8. The display panel of claim 1, wherein, The first display area and the second display area are provided with a plurality of first switches, and the control ends of all the first switches are connected to the same control signal line and receive the same control signal, and the control ends of all the second switches corresponding to the data line of each first display area are connected to different control signal lines and receive different control signals.

9. A driving method of a display panel, for driving the display panel according to any one of claims 1 to 8, characterized by, The driving method comprises the steps of: controlling the first switch circuit to be turned on and the second switch circuit to be turned off, so that the two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area receive the same data signal, the first scanning line is turned on to charge the sub-pixels in the second display area, and the second scanning line is turned on to charge the sub-pixels in the first display area, thereby realizing the display of the first display mode; and controlling the first switch circuit to be turned off and the second switch circuit to be turned on, so that the two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area receive different data signals, and the first scanning line is turned on to charge the sub-pixels in the first display area and the second display area, thereby realizing the display of the second display mode.

10. The driving method of a display panel according to claim 9, wherein The display panel comprises a refresh rate detection module, which is connected to the first switch circuit and the second switch circuit respectively. The step of controlling the first switch circuit to be turned on and the second switch circuit to be turned off, so that the two data lines corresponding to the sub-pixels of the same color in the first display area and the second display area receive the same data signal, the first scanning line is turned on to charge the sub-pixels in the second display area, and the second scanning line is turned on to charge the sub-pixels in the first display area, thereby realizing the display of the first display mode, comprises: The refresh rate detection module detects the refresh rate of the next frame and generates a first level signal and a second level signal according to the refresh rate of the next frame. If the refresh rate of the next frame is less than the preset refresh rate, a first level signal is output to the first switch to control the first switch to turn on, a second level signal is output to the second switch to control the second switch to turn off, two data lines corresponding to the same color sub-pixels in the first display area and the second display area receive the same data signal, the first scan line opens to charge the sub-pixels in the second display area, and the second scan line opens to charge the sub-pixels in the first display area. The step of controlling the first switch circuit to turn off and the second switch circuit to turn on, the two data lines corresponding to the same color sub-pixels in the first display area and the second display area receiving different data signals, and the first scan line opening to charge the sub-pixels in the first display area and the second display area to realize the display of the second display mode comprises: The refresh rate detection module detects the refresh rate of the next frame and generates the first level signal and the second level signal according to the refresh rate of the next frame. If the refresh rate of the next frame is greater than or equal to the preset refresh rate, a second level signal is output to the first switch to control the first switch to turn off, a first level signal is output to the second switch to control the second switch to turn on, the two data lines corresponding to the same color sub-pixels in the first display area and the second display area receiving different data signals, and the first scan line opening to charge the sub-pixels in the first display area and the second display area.

Images