A hardware scheduler-based system and method for dynamic allocation of heterogeneous computing resources

Abstract

This invention discloses a heterogeneous computing resource dynamic allocation system and method based on a hardware scheduler. It includes a heterogeneous computing resource pool comprising CPU, GPU, and FPGA, a hardware scheduler, and a control module. The hardware scheduler integrates a chaos testing engine, which directly controls the physical parameters of heterogeneous resources through a hardware interface during system operation, injecting minor resource fluctuations, including reducing CPU core frequency, limiting GPU memory bandwidth, and temporarily overloading FPGA logic units. A real-time monitoring module collects task execution stability indicators. This invention improves the stability and anti-interference capability of heterogeneous computing resource scheduling. By directly controlling the physical parameters of heterogeneous resources through the chaos testing engine integrated in the hardware scheduler, it achieves proactive injection and monitoring of hardware-level resource fluctuations. Combined with a robustness policy library generated by reinforcement learning, the system can quickly invoke pre-simulated optimization strategies when encountering hardware anomalies or sudden loads, controlling performance loss within a preset threshold.

Description

Technical Field

[0001] This invention belongs to the field of computer technology, and in particular relates to a system and method for dynamic allocation of heterogeneous computing resources based on a hardware scheduler. Background Technology

[0002] Existing systems and methods for dynamic allocation of heterogeneous computing resources based on hardware schedulers typically monitor and allocate the status of heterogeneous resources such as CPUs, GPUs, and FPGAs through a hardware scheduler. Resource scheduling is mainly achieved using static rules or simple dynamic adjustment strategies (such as resource migration based on real-time load). These systems rely on pre-defined resource allocation logic (such as fixed priority sorting and load threshold-triggered migration) and can, to some extent, meet the task execution requirements of typical scenarios, such as allocating highly parallel tasks to GPUs and serial tasks to CPUs. Basic monitoring modules collect metrics such as resource load rate and latency to assist the scheduler in making resource allocation decisions.

[0003] However, existing technologies have the following shortcomings: First, they lack the ability to proactively anticipate and resist hardware resource anomalies, and can only passively respond to existing faults or load fluctuations, making it difficult to cope with unknown hardware anomalies (such as momentary failures or sudden loads), which can easily lead to task interruptions or performance drops. Second, anomaly response relies on manual intervention or fixed rules, resulting in slow response speeds and an inability to quickly match resource requirements in complex scenarios. Third, a dynamic balance mechanism between energy efficiency and performance has not been established, and energy consumption often surges due to the blind activation of redundant resources during fault tolerance. Fourth, resource scheduling strategies have weak adaptability to Service Level Agreements (SLAs), making it difficult to dynamically adjust scheduling logic based on task priorities, which can easily lead to problems such as chaotic testing disrupting service levels or resource allocation not meeting SLA requirements. Fifth, they lack robustness, as the strategy library cannot dynamically evolve with hardware iterations or scenario changes, making it difficult to adapt to the expansion of heterogeneous resource pools and complex load changes, resulting in limited service capabilities throughout the system's lifecycle. Summary of the Invention

[0004] To overcome the aforementioned deficiencies of the prior art, embodiments of the present invention provide a heterogeneous computing resource dynamic allocation system and method based on a hardware scheduler, which solves the problems of weak anti-interference, slow response, energy efficiency imbalance, poor SLA adaptation, and insufficient robustness of the prior art.

[0005] To achieve the above objectives, the present invention provides the following technical solution:

[0006] A heterogeneous computing resource dynamic allocation system based on a hardware scheduler includes a heterogeneous computing resource pool containing CPUs, GPUs, and FPGAs, a hardware scheduler, and a control module, comprising:

[0007] The hardware scheduler integrates a chaos testing engine and an intelligent scheduler chip (including a task parsing engine, a hardware routing matrix, and a policy execution unit). The task parsing engine is configured to extract task computation features (such as the proportion of SIMD instructions), data dependencies, and QoS requirements (latency / throughput) in real time. The hardware routing matrix implements low-latency task routing based on silicon photonic interconnects. The chaos testing engine directly controls the physical parameters of heterogeneous resources through a hardware interface, injecting slight resource fluctuations.

[0008] The real-time monitoring module collects stability indicators of task execution (including latency jitter, error rate, and throughput fluctuation);

[0009] The reinforcement learning policy generation unit generates and updates the robust policy library based on the injected fluctuation type and the corresponding task stability response. The policy generation unit works in conjunction with the pre-built rule library (such as "convolution operation → GPU") of the intelligent scheduler chip and the lightweight ML model to achieve dynamic policy updates.

[0010] A unified memory architecture is implemented, which realizes global shared memory for heterogeneous resource pools through the CXL2.0 protocol, eliminating the overhead of data copying between computing units;

[0011] When a hardware anomaly is detected or a risk is predicted, the hardware scheduler prioritizes invoking the matching robustness policy and performs resource reallocation through the hardware routing matrix to ensure that the system performance degradation does not exceed the preset threshold bound to the task service level agreement.

[0012] Preferably, the chaos testing engine is connected to the heterogeneous resource pool through a dynamic resource slicing interface, and can selectively inject resource fluctuations of different dimensions (including CPU computing resource fluctuations, GPU memory bandwidth fluctuations, and FPGA logic bandwidth fluctuations). The injection parameters (amplitude, duration, and trigger interval) are configurable and adapted to the task service level protocol. At the same time, it can be injected in a targeted manner based on the QoS features extracted by the task parsing engine (such as prioritizing the testing of FPGA logic fluctuations for low-latency tasks).

[0013] Preferably, the state space constructed by the reinforcement learning policy generation unit includes the current task load type, injected fluctuation parameters, real-time stability indicators, and computational features (such as data dependencies) output by the task parsing engine; the action space includes task migration path selection (implemented through a hardware routing matrix), dynamic adjustment of resource redundancy, and voltage frequency adjustment level switching, and the action selection is related to the performance requirements of the task service level protocol.

[0014] Preferably, the robust strategy library supports dynamic evolution, automatically runs chaos experiments through periodic chaos injection tests, continuously updates the optimal response strategy, and performs strategy pre-verification in conjunction with the task service level protocol during system idle periods. Furthermore, the strategy library loads the pre-set rule library of the intelligent scheduler chip during initialization, reducing the learning cost.

[0015] Preferably, the hardware scheduler further includes a multi-objective energy efficiency-performance optimization module, which incorporates energy efficiency weights into the reward function of reinforcement learning and balances minimizing task efficiency loss with controllable incremental resource energy consumption during policy generation. The optimization module is linked with the hardware-level clock gating mechanism of the intelligent scheduler chip to trigger the computing unit to sleep when resources are idle, thereby reducing total energy consumption.

[0016] A preferred method for dynamically allocating heterogeneous computing resources based on a hardware scheduler includes the following steps:

[0017] Step 1: Initialization configuration: Set the range of fluctuation injection parameters for the chaos test engine (adapted to the task service level protocol), the task stability monitoring threshold, the initial reinforcement learning strategy, and load the pre-set rule library of the intelligent scheduler chip (such as "low latency task → FPGA").

[0018] Step 2: Chaos Injection and Monitoring: During task scheduling intervals or preset time periods, the hardware scheduler directly controls the physical parameters of heterogeneous resources through the hardware interface, randomly injecting slight resource fluctuations (including temporary CPU frequency reduction and GPU bandwidth limitation), and simultaneously adjusting the injection dimension based on the features extracted by the task parsing engine.

[0019] Step 3: Data Acquisition and Status Assessment: The real-time monitoring module synchronously collects task execution data, calculates stability indicators, and generates an injection fluctuation-response dataset. The dataset is associated with task service level protocol parameters and interaction latency data of the unified memory architecture.

[0020] Step 4: Policy Learning and Optimization: The reinforcement learning unit updates the robustness policy library based on the dataset, forms resource fluctuation response rules through experience replay and online gradient descent iteration, and combines the lightweight ML model of the intelligent scheduler chip to adapt to load changes in real time. When generating rules, priority is given to meeting the core indicators of the task service level agreement.

[0021] Step 5: Anomaly Response Mechanism: When the system detects a hardware anomaly or predicts a task risk, the scheduler uses the hardware routing matrix to call the matching policy in the policy library to perform resource reallocation (including diverting some tasks to the CPU and enabling memory prefetching) to compensate for performance loss and ensure compliance with the task service level agreement.

[0022] Preferably, in step 5, the scheduler policy invocation is based on a fuzzy matching mechanism, which compares the real-time abnormal parameters (fault type, scope of impact) with the injected fluctuation feature vectors in the policy library, selects the response policy with the highest similarity, and implements 5μs-level task redirection through a hardware routing matrix to ensure that the response time does not exceed the preset threshold bound to the task service level agreement.

[0023] Preferably, in step 4, the robustness strategy library supports hierarchical adaptation at the task granularity level. For microsecond-level fine-grained real-time tasks, a small-size FPGA slice compensation scheme is adopted, and for coarse-grained batch processing tasks, a multi-GPU cluster redundancy rule is adopted. Furthermore, the hierarchical adaptation logic is optimized through the feature classification results of the task parsing engine and associated with the task type and service level agreement of the chaos injection test.

[0024] Preferably, the hardware routing matrix includes silicon photonics interconnect switches and dynamic routing algorithms, which can adjust the physical connection paths between heterogeneous computing units in real time according to the amount of task data output by the task parsing engine and the transmission path requirements, and control the data transmission latency across resource pools to within 5μs.

[0025] Preferably, in step 3, the unified memory architecture achieves address space sharing through the CXL2.0 protocol. When tasks migrate between heterogeneous computing units, there is no need to copy data. The page table mapping relationship is updated only through the hardware scheduler. The memory access order is optimized by combining the data dependency features extracted by the task parsing engine, so that the additional overhead of task migration is reduced to less than 10% of the traditional PCIe solution.

[0026] The technical effects and advantages of the heterogeneous computing resource dynamic allocation system and method based on hardware scheduler of this invention are as follows:

[0027] 1. This invention improves the stability and anti-interference capability of heterogeneous computing resource scheduling. By directly controlling the physical parameters of heterogeneous resources through the chaotic testing engine integrated in the hardware scheduler, it realizes the active injection and monitoring of hardware-level resource fluctuations. Combined with the robustness policy library generated by reinforcement learning, the system can quickly call the pre-exercise optimization strategy when encountering hardware anomalies or sudden loads, and control the performance loss within the preset threshold. This avoids the task interruption or performance drop caused by the lack of pre-exercise mechanism in traditional static scheduling.

[0028] 2. This invention accelerates the response speed to anomalies and reduces the impact of faults. Relying on the fuzzy matching mechanism of the reinforcement learning strategy library, the system can quickly locate the appropriate strategy and execute resource reallocation by comparing real-time anomaly features with historical chaotic injection feature vectors. This significantly shortens the response time from anomaly detection to recovery and solves the problem of response lag caused by traditional scheduling relying on manual intervention or fixed rules.

[0029] 3. This invention optimizes the balance between energy efficiency and performance. By incorporating energy efficiency weights into the reinforcement learning reward function through a multi-objective energy efficiency-performance optimization module, it simultaneously balances task efficiency loss and resource energy consumption increment during policy generation. This enables heterogeneous resources to meet performance requirements while reducing total energy consumption, avoiding the surge in energy consumption caused by blindly activating redundant resources in traditional fault-tolerant solutions.

[0030] 4. This invention enhances the dynamic adaptability to Service Level Agreements (SLAs). The chaos injection magnitude, performance degradation threshold, and policy verification standards are all dynamically bound to the SLA, ensuring that chaos testing does not violate the service level baseline while enabling resource scheduling strategies to accurately match the priorities of different tasks, thereby improving the system's adaptability to diverse service requirements.

[0031] 5. This invention improves the robustness and scalability of the system. The robustness strategy library evolves dynamically through periodic chaos experiments and is combined with pre-testing and verification during idle periods to continuously optimize the strategy reserves for dealing with unknown faults. This enables the system to adapt to hardware iterations and load changes in heterogeneous resource pools, solves the limitation of traditional static rules in covering complex scenarios, and extends the effective service capability during the system's life cycle.

[0032] 6. This invention improves the utilization rate of heterogeneous resources. The reinforcement learning strategy generation unit dynamically adjusts the task allocation path and resource redundancy based on the correlation analysis between task load type and resource fluctuation characteristics, avoiding resource idleness or overload, maximizing resource utilization while meeting performance requirements, and reducing hardware resource waste. Attached Figure Description

[0033] Figure 1 This is a schematic diagram of the system flow of the heterogeneous computing resource dynamic allocation system and method based on hardware scheduler proposed in this invention;

[0034] Figure 2 This is a schematic diagram of the process flow of the heterogeneous computing resource dynamic allocation system and method based on a hardware scheduler proposed in this invention. Detailed Implementation

[0035] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0036] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0037] Example 1

[0038] refer to Figure 1-2 This embodiment provides a system and method for dynamic allocation of heterogeneous computing resources based on a hardware scheduler, used for the implementation of a dynamic scheduling system for heterogeneous resources in a cloud computing center. Specific implementation details include:

[0039] Implementation objective: To verify the effectiveness of the hardware scheduler integrating a chaos engine and the entire process of chaos injection initialization → policy learning, to solve the problem of task interruption and SLA default caused by sudden resource fluctuations in a mixed load environment, and to achieve the optimization goal of throughput loss ≤5% and energy consumption reduction ≥8% through hardware native chaos testing and reinforcement learning to generate robust policies.

[0040] System Architecture:

[0041] Hardware scheduler: Implemented using a Xilinx Alveo U280 FPGA chip, it directly connects to the control bus of the CPU (Intel Xeon 8380), GPU (NVIDIA A100), and local FPGA resource pool via a PCIe Gen5 bus. The FPGA integrates a chaos testing engine module, which can directly control physical parameters such as CPU frequency (dynamic downclocking / overclocking), GPU memory bandwidth (limiting / releasing), and FPGA logic unit activation rate. Corresponding hardware interfaces directly control the physical parameters of heterogeneous resources.

[0042] Real-time monitoring module: Each computing node is equipped with a dedicated hardware probe (such as a current / voltage sensor + microcontroller) to collect CPU frequency fluctuations (±0.8GHz), GPU bandwidth (300–900GB / s dynamic), task latency jitter (accuracy ≤0.1ms), and SLA default status (such as real-time transcoding task jitter >5ms) to achieve real-time monitoring of stability indicators.

[0043] Reinforcement learning unit: It uses the NVIDIA Jetson AGX edge AI chip (ARM architecture) to run an improved PPO (proximal policy optimization) algorithm. The state space includes the current task load type (real-time transcoding / offline training), injected fluctuation parameters (amplitude / duration) and jitter rate; the action space includes task migration path (FPGA-assisted transcoding), resource redundancy adjustment (CPU downclocking compensation) and voltage adjustment level, which conforms to the state / action space definition.

[0044] Robust policy library: stored on NVMeSSD, built on the ARMOR two-stage training framework (teacher encoder pre-rehearses privileged attacks + student encoder online adaptation), supports automatic running of chaos experiments and policy updates every morning, synchronously verifies SLA compliance (migration latency test), and reflects the dynamic evolution of the policy library.

[0045] Implementation steps:

[0046] Initialize chaos injection:

[0047] Set injection rules: During off-peak hours (2-4 AM), randomly select CPU frequency reduction (3.2GHz → 2.4GHz for 50ms), GPU bandwidth limitation (900GB / s → 600GB / s for 100ms), and FPGA logic unit overload (activation rate 80% → 100% for 30ms), with an injection frequency of 10 seconds / time; During peak hours (6-10 PM), the reduction is reduced to 10% and the frequency is 60 seconds / time. Real-time transcoding tasks are injected only in the early morning and the reduction is ≤10% of the baseline performance, bound to the SLA threshold (jitter ≤5ms).

[0048] Initial strategy loading: basic migration rules (e.g., GPU overload → CPU take over 50% of tasks) and voltage compensation strategy.

[0049] Chaos Injection and Monitoring:

[0050] After injecting CPU frequency reduction fluctuations, the video transcoding task latency jitter was monitored in real time, increasing from 2ms to 8ms (exceeding the SLA threshold of 5ms), and a fluctuation-response dataset (timestamp + injection type + performance change + SLA priority parameter) was generated.

[0051] Strategy learning and optimization:

[0052] The PPO algorithm triggers policy iteration: some transcoding subtasks are migrated to the FPGA (10% of logic units are pre-allocated) and the frequency of the remaining CPU cores is increased to 3.0GHz; the policy is optimized through experience replay, and the reward function balances jitter improvement (0.6 weight) with energy consumption increment (0.4 weight). After correction, the jitter is reduced to 4ms (meeting the target), and this policy is written into the policy library.

[0053] Real exception response:

[0054] When the GPU experiences a sudden memory controller failure (bandwidth drops to 400GB / s), fuzzy matching is used to inject experimental feature vectors (similarity > 0.9) and apply the matching strategy:

[0055] Distribute 30% of the training tasks to the CPU cluster;

[0056] Enable GPU memory prefetching (preload factor 1.2);

[0057] Reserve 20% of redundant GPU resources to cope with secondary failures.

[0058] Implementation results:

[0059] Performance stability: The throughput loss in GPU failure scenarios is only 3% (compared to 25%+ loss in traditional static scheduling), the task interruption rate is <1% (compared to over 30% timeout in traditional solutions), and the response speed constraint is met (<100ms vs. traditional 500ms+ detection time).

[0060] Energy efficiency benefits: The chaotic pre-simulation strategy reduces GPU idle power consumption and CPU redundancy switching power consumption, reducing the total energy consumption of AI training scenarios by 8-15%, which is in line with the linkage design of the preset range of energy consumption reduction.

[0061] SLA reliability: The SLA compliance rate in mixed load scenarios is 99.7% (the default rate of traditional scheduling exceeds 30% due to the lag of static rules), and the robustness advantage is verified by dynamic adjustment and pre-drill mechanism.

[0062] Example 2

[0063] This embodiment provides a system and method for dynamic allocation of heterogeneous computing resources based on a hardware scheduler, for implementation in industrial edge computing nodes (SLA binding and fine-grained hardware fluctuation control). Specific implementation details include:

[0064] Purpose of implementation:

[0065] The study verifies the effectiveness of the correlation between hardware fluctuation amplitude and SLA, high-priority task attenuation injection, and SLA-driven threshold correction. It addresses the extreme requirements of industrial real-time detection tasks for latency jitter (≤10ms) and availability (99.99%) by generating an SLA elastic strategy through hardware-level controllable chaotic injection.

[0066] System Architecture:

[0067] The edge gateway is deployed with an ARM Cortex-A76 CPU and an FPGA. The hardware scheduler is directly connected to the FPGA logic unit (such as the AXI bus) through a dedicated management interface. The chaos engine injects the FPGA logic unit with transmission delay (increased by 20ns for 20ms) or overload signal (simulating a local fault).

[0068] Preset thresholds are dynamically bound to SLA: performance degradation baseline = current load capacity × 5% (corresponding to latency threshold of 10.5ms), chaos injection amplitude ≤ 8% of baseline (actual jitter increment < 1ms), injection intensity is attenuated during high-priority task periods to achieve priority coordination logic.

[0069] Implementation steps:

[0070] Initialization injection and threshold binding:

[0071] Set the FPGA logic cell delay injection (20ns), frequency 20 seconds / time, allow amplitude ≤10% during off-peak periods, but attenuate to within 8% during SLA task operation.

[0072] Monitoring baseline: Detection task latency of 8ms (SLA upper limit of 10ms), set performance degradation threshold of 5% (corresponding to policy learning triggered when latency is ≤10.5ms).

[0073] Chaos Injection and Response Triggering:

[0074] After the fluctuations were injected, the detection task latency increased to 11ms (exceeding the threshold). The real-time monitoring module marked the SLA default risk and uploaded the fluctuation-jitter dataset to the reinforcement learning unit.

[0075] Strategy generation and verification:

[0076] PPO generates an "FPGA task splitting + CPU-assisted computing" solution: image feature extraction is split into FPGA (edge ​​detection) + CPU (feature selection), and the migration path latency is verified to be <9.8ms (meeting the standard) through hardware probe. This strategy is written into the strategy library.

[0077] Real-world fault response:

[0078] When a local logic unit failure occurs in the FPGA, the scheduler matches and injects experimental feature vectors (similarity 0.95) to quickly execute the strategy, maintaining a latency of 9.8ms without task interruption.

[0079] Implementation results:

[0080] Real-time performance guarantee: Chaotic injection does not violate the SLA baseline (jitter increment during injection <1ms), real fault response speed <100ms (fuzzy matching accelerates the call), availability reaches 99.99%, and response efficiency is verified.

[0081] Flexible scaling: By dynamically adjusting the linkage between injection amplitude and SLA threshold, the system can easily cope with the implicit degradation caused by FPGA cell aging or process fluctuations, and continuously meet industrial-grade reliability requirements.

[0082] Example 3

[0083] This embodiment provides a system and method for dynamic allocation of heterogeneous computing resources based on a hardware scheduler, used for multi-objective optimization of energy efficiency and performance in AI training clusters. Specific implementation details include:

[0084] Purpose of implementation:

[0085] The effectiveness of incorporating energy efficiency weights into the multi-objective energy efficiency optimization module and reinforcement learning reward function is verified. In high-energy-consumption scenarios such as Transformer model training, the optimal energy consumption (single epoch ≤ 100kWh) under SLA constraints is achieved by injecting chaos to pre-simulate fluctuations and establishing an energy efficiency-performance trade-off strategy.

[0086] System Architecture:

[0087] Cluster configuration: 8×AMDMI250GPU + 16×AMDEPYC7763CPU, with a built-in energy efficiency module in the scheduler.

[0088] Reward function design: Reinforcement learning adopts a reward function = 0.6 × performance loss + 0.4 × energy consumption increment, and the policy space covers operations such as GPU downclocking (300W → 240W continuous 5 minutes of chaotic injection) and CPU / GPU collaborative task migration.

[0089] Implementation steps:

[0090] Chaos Injection Energy Efficiency Stress Test:

[0091] Randomly select a GPU and inject power limits (300W→240W for 5 minutes) to simulate power fluctuations or heat dissipation bottlenecks.

[0092] Performance-energy consumption data collection:

[0093] After injection, the monitoring throughput decreased by 15% and energy consumption was reduced by 20% (but the total time exceeded the limit, resulting in SLA default). Energy efficiency-loss sample pairs were generated to train the PPO network.

[0094] Multi-objective strategy learning:

[0095] PPO generation trade-off strategy: GPU downclocked to 2.0GHz (240W power consumption) + 2×CPU take over redundant computing tasks (to balance the computing power gap).

[0096] Verification adjustments: Single epoch time increased to 62 minutes (SLA allows for a loss of ≤5%), energy consumption reduced to 92kWh (saving 8%), and both metrics met and were written into the strategy library.

[0097] Implementation results:

[0098] Pareto Front Optimization: By exploring the energy efficiency-performance boundary through chaotic injection, the optimization strategy reduces cluster energy consumption by 8–15% (improved PUE) while keeping performance loss within the allowable range of SLA (3.3% vs. traditional blind frequency reduction loss >15% and energy consumption increased by 15%), proving the effectiveness of the preset range.

[0099] Robustness Improvement: When the real GPU power supply module fails, the same strategy is called, and the throughput loss is only slightly higher than the value in the chaos experiment, avoiding the risk of training interruption caused by emergency speed reduction.

[0100] Example 4

[0101] This embodiment provides a system and method for dynamic allocation of heterogeneous computing resources based on a hardware scheduler, for use in an in-vehicle computing platform (priority-coordinated chaotic injection and security response). Specific implementation details include:

[0102] Purpose of implementation:

[0103] Verify the effectiveness of binding the priority fluctuation attenuation ratio to SLA and fuzzy matching to accelerate abnormal response, resolve the resource conflict between high-priority safety tasks (LiDAR point cloud processing) and low-priority entertainment tasks in the autonomous driving domain controller, and ensure that the SLA latency of safety tasks is ≤20ms without any problems.

[0104] System Architecture:

[0105] The domain controller integrates heterogeneous resources such as CPU / GPU / ASIC, and the hardware scheduler injects controllable chaos through a dedicated interface: when high-priority tasks are running, the CPU frequency is only allowed to be reduced by 0.5% (within the baseline value, the measured latency increment is <0.5ms); during the cabin entertainment period, the injection frequency is increased to the 5-second level to achieve attenuation ratio binding.

[0106] The real-time monitoring module captures sudden characteristics of ASIC computing power decline (abnormal current fluctuations), and the reinforcement learning unit constructs a subset of strategies specific to security tasks.

[0107] Implementation steps:

[0108] Hierarchical Chaos Injection Strategy:

[0109] When the point cloud processing task is activated, a slight CPU frequency reduction (0.5%) is injected, and during the cockpit entertainment task period, GPU overload chaos is injected (due to memory bandwidth limitation).

[0110] Anomaly Response Training:

[0111] When the ASIC's computing power suddenly drops by 20%, a similar fluctuation is injected (the chaos engine injects FPGA latency), and the monitored point cloud latency increases to 19.5ms (approaching the SLA limit) → PPO generates a "pause entertainment + GPU take over point cloud processing" strategy:

[0112] Pause cockpit missions to free up 10% of GPU resources;

[0113] Point cloud processing retains ASIC core detection + offloading GPU acceleration (migration path latency verification <19.5ms).

[0114] Real-world fault response:

[0115] When an ASIC hardware failure occurs, the strategy is invoked by fuzzy matching of historical injected feature vectors (similarity 0.93), with a delay of 19.5ms, which meets the safety requirements and does not exceed the limit for entertainment service interruption.

[0116] Implementation results:

[0117] Safety baseline guarantee: The impact of chaos injection on high-priority tasks is negligible (latency increment < SLA error margin), and the actual fault response speed is <50ms (better than the industry average response time), avoiding the risk of traffic accident-level interruption.

[0118] Fair resource allocation: The mechanism of prioritizing low-priority tasks over security is normalized, improving the overall system resource utilization while ensuring zero security compromise.

[0119] Example 5

[0120] This embodiment provides a system and method for dynamic allocation of heterogeneous computing resources based on a hardware scheduler, used for cross-data center collaborative scheduling. Specific implementation details include:

[0121] Purpose of implementation:

[0122] To verify the effectiveness of periodic experimental updates and strategy pre-run verification of the strategy library, in a financial two-site three-center architecture, daily chaos injection is used to simulate disaster scenarios, continuously evolving robust strategies to improve disaster recovery coordination accuracy (transaction interruption ≤20ms financial-grade SLA).

[0123] System Architecture:

[0124] The data centers in Location A and Location B deploy heterogeneous resource pools, and the schedulers in the two locations are interconnected via a dedicated line. The chaos engine automatically injects the fluctuation of "the GPU computing power of Location A returning to zero" at 3:00 AM every day. The robust policy library is dynamically evolved based on cross-center experiments (migration + incremental synchronization scheme), and SLA compliance is verified weekly (synchronization latency stress test).

[0125] Implementation steps:

[0126] Chaos experiments drive evolution:

[0127] The daily automatic injection of simulated local A GPU failure chaos → local B center takeover demand trigger strategy generation: "local B GPU incremental synchronous takeover of local A training tasks + asynchronous log compensation".

[0128] Initial strategy delay 50ms → Weekly optimization of synchronization algorithm to compress to 30ms (RTO target ≤ 20ms).

[0129] Real-world fault response:

[0130] When a hardware failure occurs in the local AGPU cluster, the latest policy is invoked: the local B central GPU immediately takes over and enables incremental data synchronization (log replay coefficient 1.2), with a synchronization latency of 30ms (approaching the SLA limit).

[0131] Implementation results:

[0132] A qualitative leap in disaster recovery efficiency: After the strategy library was iterated in March, it covered 100% of potential cross-center fault types. The actual fault RTO was reduced from the traditional minute level to within the second level (interruption ≤20ms), and the SLA compliance rate was 99.99%, verifying the dynamic evolution closed loop.

[0133] Cost-effectiveness: Pre-rehearsal replaces full disaster recovery drills, saving resources while ensuring uncompromising financial-grade reliability.

[0134] Comparative Example 1

[0135] It provides a traditional static scheduling system (without chaotic training and dynamic strategies).

[0136] System Comparison:

[0137] The hardware resource pool is the same as in Implementation Example 1, but resources are allocated based on preset rules: there is no hardware chaos engine, reinforcement learning unit, or SLA linkage strategy library.

[0138] Test scenario:

[0139] Reproduce the sudden GPU memory failure (bandwidth drops to 400GB / s) under the same load conditions as in Example 1.

[0140] Failure symptoms:

[0141] Slow response: Without a pre-drill strategy, it takes 500ms+ for manual fault detection and backup process initiation; 30% of real-time transcoding tasks time out and fail.

[0142] Performance crash: Throughput drops by 25% (far exceeding the SLA threshold of 5%), training tasks are interrupted and need to be rolled back, resulting in wasted time.

[0143] Energy efficiency out of control: Blindly activating full backup resources leads to a 15-20% surge in energy consumption.

[0144] Compared with Examples 1-5 and Comparative Example 1, the core difference of the present invention lies in whether or not a "hardware-level chaos injection + reinforcement learning policy library" architecture is adopted. The specific comparison is summarized as follows:

[0145] Performance Stability: In Examples 1-5, the robust strategies generated through chaotic pre-simulation kept performance losses within SLA thresholds during hardware anomalies (e.g., 3% loss due to GPU failure in cloud computing centers and 2.5% loss due to ASIC failure in automotive applications). In contrast, the comparative examples, lacking pre-simulation strategies, experienced performance drops exceeding 25% and 30% of tasks timed out due to similar failures. The key difference lies in the fact that the hardware schedulers in the examples can directly control resource physical parameters (e.g., CPU throttling and FPGA logic latency), covering potential failure modes through chaotic experiments. The comparative examples, relying on static rules, cannot handle unknown anomalies.

[0146] Response speed: The implementation example utilizes a fuzzy matching strategy library (feature vector similarity ≥ 0.9), achieving anomaly response times of <100ms (fastest 50ms in automotive scenarios). In contrast, the comparative example requires over 500ms to detect faults and initiate backups, far exceeding the tolerance threshold for real-time tasks. This is thanks to the implementation example's transformation of chaotically injected "fault-response" data into directly invoked strategies, saving the comparative example's time-consuming dynamic decision-making.

[0147] Energy efficiency optimization: The example uses multi-objective reinforcement learning (reward function with energy efficiency weights) to reduce energy consumption by 8%-15% (AI training cluster, cloud computing center data) while meeting performance requirements. The comparison example, due to blindly starting a full backup, saw energy consumption increase by 15%-20%. The core difference is that the strategy library of the example was verified to reach an energy efficiency-performance balance point through chaos experiments, while the comparison example did not have such pre-simulation optimization.

[0148] SLA Adaptability: In this embodiment, the chaos injection amplitude and policy thresholds are dynamically bound to the SLA (e.g., fluctuation amplitude of industrial edge tasks ≤8%, and decay to 0.5% for automotive safety tasks) to ensure that injection does not damage the service level. In contrast, due to the lack of a tiered injection mechanism, chaos testing often leads to SLA defaults. In cross-data center scenarios, this embodiment reduces disaster recovery RTO from minutes to within 20ms through daily policy evolution, but this cannot meet financial-grade availability requirements.

[0149] The above embodiments can be implemented in whole or in part by software, hardware, firmware or other arbitrary combinations. When implemented by software, the above embodiments can be implemented in whole or in part in the form of a computer program product.

[0150] Those skilled in the art will recognize that the modules and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0151] In addition, the functional modules in the various embodiments of this application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module.

[0152] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of protection of the claims.

[0153] In conclusion, the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A heterogeneous computing resource dynamic allocation system based on a hardware scheduler, comprising a heterogeneous computing resource pool including CPU, GPU, and FPGA, a hardware scheduler, and a control module, characterized in that, include: The hardware scheduler integrates a chaos testing engine and an intelligent scheduler chip, wherein the intelligent scheduler chip includes a task parsing engine, a hardware routing matrix, and a policy execution unit. The task parsing engine is configured to extract task computation features, data dependencies and QoS requirements in real time. The hardware routing matrix is ​​based on silicon photonics interconnect to achieve low-latency task routing. The chaos testing engine directly controls the physical parameters of heterogeneous resources through a hardware interface, injecting slight resource fluctuations. The real-time monitoring module collects stability indicators of task execution, including latency jitter, error rate, and throughput fluctuation. The reinforcement learning strategy generation unit generates and updates the robustness strategy library based on the injected fluctuation type and the corresponding task stability response. The strategy generation unit works in conjunction with the pre-built rule library and lightweight ML model of the intelligent scheduler chip to achieve dynamic policy updates. The state space constructed by the reinforcement learning strategy generation unit includes the current task load type, injected fluctuation parameters, real-time stability indicators and computational features output by the task parsing engine. The action space includes task migration path selection, dynamic adjustment of resource redundancy, and voltage and frequency adjustment level switching, and the action selection is related to the performance requirements of the task service level agreement. The robust strategy library supports dynamic evolution. It automatically runs chaos experiments through periodic chaos injection tests to continuously update the optimal response strategy. During system idle periods, it performs strategy pre-performance verification in conjunction with the task service level protocol. Furthermore, the strategy library loads the pre-set rule library of the intelligent scheduler chip during initialization to reduce learning costs. A unified memory architecture is implemented, which realizes global shared memory for heterogeneous resource pools through the CXL2.0 protocol, eliminating the overhead of data copying between computing units; When a hardware anomaly is detected or a risk is predicted, the hardware scheduler prioritizes invoking the matching robustness policy and performs resource reallocation through the hardware routing matrix to ensure that the system performance degradation does not exceed the preset threshold bound to the task service level agreement.

2. The heterogeneous computing resource dynamic allocation system based on a hardware scheduler as described in claim 1, characterized in that, The chaos testing engine connects to the heterogeneous resource pool through a dynamic resource slicing interface, and can selectively inject resource fluctuations of different dimensions, including CPU computing resource fluctuations, GPU memory bandwidth fluctuations, and FPGA logic bandwidth fluctuations. The injection parameters are configurable and adapted to the task service level protocol. At the same time, it can be injected in a targeted manner in combination with the QoS features extracted by the task parsing engine.

3. The heterogeneous computing resource dynamic allocation system based on a hardware scheduler as described in claim 1, characterized in that, The hardware scheduler also includes a multi-objective energy efficiency-performance optimization module, which incorporates energy efficiency weights into the reward function of reinforcement learning and balances minimizing task efficiency loss with controllable incremental resource energy consumption during policy generation. The optimization module is linked with the hardware-level clock gating mechanism of the intelligent scheduler chip to trigger the computing unit to sleep when resources are idle, thereby reducing total energy consumption.

4. A method for dynamic allocation of heterogeneous computing resources based on a hardware scheduler, characterized in that: Includes the following steps: Step 1: Initialization configuration: Set the range of fluctuation injection parameters for the chaos test engine, the threshold for task stability monitoring, the initial strategy for reinforcement learning, and load the pre-set rule library of the intelligent scheduler chip; Step 2: Chaos Injection and Monitoring: During task scheduling intervals or preset periods, the hardware scheduler directly controls the physical parameters of heterogeneous resources through the hardware interface, randomly injecting slight resource fluctuations, and simultaneously adjusting the injection dimension based on the features extracted by the task parsing engine. Step 3: Data Acquisition and Status Assessment: The real-time monitoring module synchronously collects task execution data, calculates stability indicators, and generates an injection fluctuation-response dataset. The dataset is associated with task service level protocol parameters and interaction latency data of the unified memory architecture. Step 4: Policy Learning and Optimization: The reinforcement learning unit updates the robustness policy library based on the dataset. It forms resource fluctuation response rules through experience replay and online gradient descent iteration, and combines the lightweight ML model of the intelligent scheduler chip to adapt to load mutations in real time. When generating rules, the core indicators of the task service level agreement are given priority. The robustness policy library supports hierarchical adaptation at the task granularity. For microsecond-level fine-grained real-time tasks, a small-size FPGA slice compensation scheme is adopted, and for coarse-grained batch processing tasks, a multi-GPU cluster redundancy rule is adopted. The hierarchical adaptation logic is optimized through the feature classification results of the task parsing engine and is associated with the task type and service level agreement of the chaotic injection test. Step 5: Anomaly Response Mechanism: When the system detects a hardware anomaly or predicts a task risk, the scheduler uses the hardware routing matrix to call the matching policy in the policy library to perform resource reallocation, compensate for performance loss, and ensure compliance with the task service level agreement.

5. The method for dynamic allocation of heterogeneous computing resources based on a hardware scheduler as described in claim 4, characterized in that, In step 5, the scheduler policy invocation is based on a fuzzy matching mechanism. It compares the real-time abnormal parameters with the injected fluctuation feature vectors in the policy library, selects the response policy with the highest similarity, and achieves 5μs-level task redirection through a hardware routing matrix to ensure that the response time does not exceed the preset threshold bound to the task service level agreement. The unified memory architecture achieves address space sharing through the CXL2.0 protocol. When tasks migrate between heterogeneous computing units, there is no need to copy data. Instead, the hardware scheduler updates the page table mapping relationship and optimizes the memory access order by combining the data dependency features extracted by the task parsing engine. This reduces the additional overhead of task migration to less than 10% of that of traditional PCIe solutions.

6. The method for dynamic allocation of heterogeneous computing resources based on a hardware scheduler as described in claim 5, characterized in that, The hardware routing matrix includes silicon photonics interconnect switches and dynamic routing algorithms. It can adjust the physical connection paths between heterogeneous computing units in real time according to the amount of task data output by the task parsing engine and the transmission path requirements, and control the data transmission latency across resource pools to within 5μs.

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