Variable frequency series resonant withstand voltage test system

Abstract

The application relates to the technical field of power equipment detection, in particular to a variable-frequency series resonance withstand voltage test system, which comprises a test parameter generation module, a steady-state test achievement module, an exit index construction module and a backtracking review execution module. The test parameter generation module is used for obtaining the equivalent capacitance and loss factor of a test object, generating required series reactance and expected resonance current according to the equivalent capacitance and loss factor; the steady-state test achievement module is used for constructing an exponential boost law and generating a test terminal voltage, obtaining the time of reaching a steady state based on the test terminal voltage, and calculating a fine-tuned working frequency according to the time of reaching the steady state; the exit index construction module is used for performing steady-state endurance based on the fine-tuned working frequency, constructing an exit index, and performing parameter backtracking and device capacity review based on the exit index, and generating a backtracking review result. The application can reduce the breakdown risk and solve the problem of non-strict test basis criterion.

Description

Technical Field

[0001] This application relates to the field of power equipment testing technology, and in particular to a variable frequency series resonant withstand voltage test system. Background Technology

[0002] In AC withstand voltage tests of large-capacity electrical equipment such as power cables, transformers, and generators, power frequency withstand voltage or series resonant methods are commonly used. Traditional power frequency withstand voltage test methods require extremely large test power supply capacity, especially in the testing of long-distance cables or ultra-high voltage transformers, often requiring thousands of kilovolt-amperes of power. The test equipment is bulky, has poor mobility, and is difficult to implement under field conditions.

[0003] Existing power frequency power supply output waveforms are susceptible to grid interference and have high distortion, failing to accurately reflect the equipment's operating status. Furthermore, while some existing series resonant test methods can reduce power supply capacity, their voltage boosting process often employs a fixed slope or segmented voltage regulation, which can easily cause voltage overshoot, leading to excessive electrical stress on the test sample and thus posing a potential breakdown risk.

[0004] More importantly, existing methods rely on a single indicator (such as test time or partial discharge) for steady-state maintenance and exit criteria, failing to uniformly constrain dielectric loss, partial discharge, and withstand time, which can easily lead to insufficient rigor in test criteria. Summary of the Invention

[0005] Therefore, it is necessary to provide a variable frequency series resonant withstand voltage test system that can reduce the risk of breakdown and address the problem of imprecise test criteria, in order to solve the above-mentioned technical problems.

[0006] The technical solution of this invention is as follows:

[0007] A variable frequency series resonant withstand voltage test system, the system comprising:

[0008] The test parameter generation module is used to obtain the equivalent capacitance and loss factor of the test sample, and generate the required series reactance and expected resonant current based on the equivalent capacitance and loss factor.

[0009] The steady-state test achievement module is used to construct an exponential boost law and generate the voltage at the test terminal, obtain the time to reach the steady state based on the voltage at the test terminal, and calculate the fine-tuned operating frequency based on the time to reach the steady state.

[0010] The exit criterion construction module is used to perform steady-state tolerance based on the fine-tuned operating frequency and construct an exit criterion.

[0011] The backtracking and verification execution module is used to respond to the test determination based on the exit indicators, perform parameter backtracking and device capacity verification, and generate backtracking and verification results.

[0012] Optionally, the test parameter generation module further includes:

[0013] The breakdown constraint test module is used to obtain the equivalent capacitance and loss factor of the test sample under the premise of low voltage without breakdown.

[0014] The expected parameter acquisition module is used to select a target resonant frequency within the allowed resonant frequency window, and generate the required series reactance and expected resonant current based on the target resonant frequency, the equivalent capacitance and the loss factor.

[0015] Optionally, the breakdown constraint test module is further used for:

[0016] The test parameters are injected into the test sample, and the steady-state current amplitude and the active power during the first injection are obtained.

[0017] The equivalent capacitance and loss factor of the test specimen are obtained based on the test parameters, the steady-state current amplitude, and the active power.

[0018] Optionally, the expected parameter acquisition module is further configured to:

[0019] Select a target resonant frequency within the allowed resonant frequency window, and generate the required series reactance based on the target resonant frequency and the equivalent capacitance;

[0020] The expected resonant current is generated based on the target resonant frequency, the equivalent capacitance, and the preset target test voltage.

[0021] Optionally, the steady-state test achievement module is further configured to:

[0022] An exponential boost law is constructed without prior establishment of a steady-state tolerance criterion, and the test terminal voltage is generated based on the exponential boost law.

[0023] The steady-state determination threshold ratio is set based on the voltage of the test terminal, and the time to reach the steady state is obtained based on the steady-state determination threshold ratio and the voltage of the test terminal. The fine-tuned operating frequency is calculated based on the time to reach the steady state.

[0024] Optionally, the steady-state test achievement module is further configured to:

[0025] The boost rate coefficient is set without prior determination of steady-state tolerance criteria;

[0026] An exponential boost law is constructed based on the boost rate coefficient, and the test terminal voltage is generated based on the exponential boost law.

[0027] Optionally, the steady-state test achievement module is further configured to:

[0028] The initial value of the steady-state current is obtained based on the time to reach the steady state.

[0029] A single frequency correction is generated based on the initial steady-state current value, and the fine-tuned operating frequency is calculated based on the single frequency correction.

[0030] Optionally, the exit indicator construction module is further configured to:

[0031] Once the frequency stabilizes at the finely tuned operating frequency and the voltage remains at the target test voltage, steady-state withstand test is performed and the equivalent conductance and steady-state loss factor are calculated.

[0032] The exit index is constructed based on the steady-state loss factor.

[0033] Optionally, the retrospective verification results include relative drift rate, dielectric load index, maximum apparent capacity, and capacity margin;

[0034] The backtracking review execution module is also used for:

[0035] In response to the test determination based on the exit criteria, parameter backtracking is performed to generate relative drift rate and medium load index;

[0036] Perform a capacity verification of the device to generate the maximum apparent capacity and capacity margin.

[0037] Optionally, the maximum apparent capacity and capacity margin are generated based on the following formula:

[0038]

[0039]

[0040] in, For maximum apparent capacity, For the target test voltage, This is the termination current at the end of the test. For capacity margin, This is the rated capacity of the test power supply.

[0041] Optionally, a computer device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps performed by each module in the above-described variable frequency series resonant withstand voltage test system.

[0042] Optionally, a computer-readable storage medium is also provided, on which a computer program is stored, which, when executed by a processor, implements the steps performed by each module in the above-described variable frequency series resonant withstand voltage test system.

[0043] This invention relates to fault prediction and health management technology, and its technical effects are as follows:

[0044] 1. The above-mentioned variable frequency series resonant withstand voltage test system sequentially obtains the equivalent capacitance and loss factor of the test specimen, generates the required series reactance and expected resonant current based on the equivalent capacitance and loss factor; constructs an exponential voltage boosting law and generates the test terminal voltage, obtains the time to reach steady state based on the test terminal voltage, calculates the fine-tuned operating frequency based on the time to reach steady state, and then obtains the equivalent parameters of the test specimen by introducing low voltage multi-frequency point identification, and realizes the controllable voltage boosting process by using the exponential voltage boosting law, thereby realizing dynamic constraints on the entire voltage application process;

[0045] 2. Based on the fine-tuned operating frequency, steady-state withstand is performed, and exit criteria are constructed. Specifically, when the frequency stabilizes at the fine-tuned operating frequency and the voltage remains at the target test voltage, steady-state withstand is performed and the equivalent conductance and steady-state loss factor are calculated. Only then are exit criteria constructed, thereby unifying risk judgment under the same scale, facilitating one-time comparison and realizing simple and reliable protection logic.

[0046] 3. In response to the test determination based on the exit indicators, parameter backtracking and device capacity verification are performed, and backtracking verification results are generated. This enables the inversion of equivalent parameters after the test and the quantification of the dielectric load index, providing a calculable closed-loop basis for the reactance preset and capacity selection of the next test, reducing the risk of breakdown during the test, and solving the problem of the test basis judgment being not rigorous. Attached Figure Description

[0047] Figure 1 This is a flowchart illustrating a variable frequency series resonant withstand voltage test method in one embodiment;

[0048] Figure 2 This is a structural block diagram of a variable frequency series resonant withstand voltage test system in one embodiment;

[0049] Figure 3 This is a structural block diagram of a computer device in one embodiment. Detailed Implementation

[0050] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.

[0051] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0052] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0053] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if detected [the described condition or event]" may be interpreted, depending on the context, as meaning "once determined," "in response to determination," "once detected [the described condition or event]," or "in response to detection [the described condition or event]."

[0054] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0055] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0056] In one embodiment, such as Figure 1 As shown, a method for a variable frequency series resonant withstand voltage test is provided, the method comprising:

[0057] Step S100: Obtain the equivalent capacitance and loss factor of the test sample, and generate the required series reactance and expected resonant current based on the equivalent capacitance and loss factor;

[0058] Step S200: Construct an exponential boost law and generate the test terminal voltage, obtain the time to reach steady state based on the test terminal voltage, and calculate the fine-tuned operating frequency based on the time to reach steady state;

[0059] Step S300: Perform steady-state tolerance based on the fine-tuned operating frequency and construct an exit criterion;

[0060] Step S400: In response to the completion of the test determination based on the exit indicators, perform parameter backtracking and device capacity verification, and generate backtracking verification results.

[0061] In this embodiment, the equivalent capacitance and loss factor of the test sample are obtained, and the required series reactance and expected resonant current are generated based on the equivalent capacitance and loss factor. An exponential boost law is constructed and the test terminal voltage is generated. The time to reach steady state is obtained based on the test terminal voltage, and the fine-tuned operating frequency is calculated based on the time to reach steady state. Then, the equivalent parameters of the test sample are obtained by introducing low-voltage multi-frequency point identification, and the controllable boost process is realized by using the exponential boost law, thereby realizing dynamic constraints on the entire voltage application process.

[0062] Next, steady-state withstand is performed based on the fine-tuned operating frequency, and exit criteria are constructed. Specifically, when the frequency stabilizes at the fine-tuned operating frequency and the voltage remains at the target test voltage, steady-state withstand is performed and the equivalent conductance and steady-state loss factor are calculated. Only then are exit criteria constructed, thereby unifying risk judgment under the same scale, facilitating one-time comparison and realizing simple and reliable protection logic.

[0063] Then, in response to the test determination based on the exit indicators, parameter backtracking and device capacity verification are performed, and backtracking verification results are generated. This realizes the inversion of equivalent parameters after the test and the quantification of dielectric load index, providing a calculable closed-loop basis for reactance presetting and capacity selection for the next test. This reduces the risk of breakdown during the test, solves the problem of insufficient test criteria, avoids the risk of breakdown caused by voltage overshoot, and improves the comprehensiveness and rigor of test criteria, enabling a more realistic and reliable assessment of the insulation withstand level of power equipment.

[0064] In one embodiment, step S100: obtaining the equivalent capacitance and loss factor of the test sample, and generating the required series reactance and expected resonant current based on the equivalent capacitance and loss factor, further includes:

[0065] Step S110: Under the premise that the low voltage will not cause breakdown, obtain the equivalent capacitance and loss factor of the test sample;

[0066] Step S120: Select the target resonant frequency within the allowed resonant frequency window, and generate the required series reactance and expected resonant current based on the target resonant frequency, the equivalent capacitance and the loss factor.

[0067] In this embodiment, to avoid the risk of breakdown caused by voltage overshoot, under the premise that low voltage will not cause breakdown, the equivalent capacitance and loss factor of the test object are obtained, the target resonant frequency is selected within the allowable resonant frequency window, and the required series reactance and expected resonant current are generated based on the target resonant frequency, the equivalent capacitance and the loss factor.

[0068] In one embodiment, step S110, obtaining the equivalent capacitance and loss factor of the test sample under the premise that the low voltage will not cause breakdown, further includes:

[0069] Step S111: Inject the test parameters into the test sample and obtain the steady-state current amplitude and the active power during the first injection;

[0070] Step S112: Obtain the equivalent capacitance and loss factor of the test sample based on the test parameters, the steady-state current amplitude, and the active power.

[0071] In this embodiment, the test parameters are a sinusoidal voltage with a preset amplitude and two-point frequency. Specifically, a sinusoidal voltage with a preset amplitude is injected into the test sample. (V, power frequency or near power frequency), the two point frequencies (Hz) are respectively , and The sinusoidal voltage is recorded, and the steady-state current amplitude is recorded. (A) and the active power during a single injection. (W), and construct the following recognition model:

[0072]

[0073]

[0074]

[0075] in, This is the equivalent capacitance, measured in F. The model consists of capacitor current. The linear incremental relationship is derived robustly under unknown cable lengths or distribution parameters. ;

[0076] Equivalent conductance, measured in s (S). The model originates from ;

[0077] It is the loss factor (equivalent to the commonly used loss tangent), and is dimensionless.

[0078] Here, "one injection" refers to the power value measured during a single injection at any given frequency. The first injection point (e.g., the first injection point) is typically chosen. The active power measured at this frequency is defined as P1. Therefore, "once" does not mean that the power is measured only once in the entire experiment, but rather that one of two injections at different frequencies is selected, usually the first frequency. The measured power value is used as use.

[0079] To reduce measurement bias when using this model, the following selection is made. , Located in the neighborhood of the two endpoints of the subsequent allowable resonant frequency window; Take the allowable identification voltage for the subject, such as 5%-10% of the rated phase voltage, to ensure that partial discharge is not triggered.

[0080] The permissible resonant frequency window refers to the range of resonant frequencies available, specified according to different equipment under test and relevant standards. For example, cables typically require AC withstand voltage testing within the range of 30-300Hz, while transformers are limited to 45-65Hz. The setting of the permissible resonant frequency window takes into account both the insulation characteristics of the equipment and standard requirements, while also ensuring stable output from the test device and avoiding unnecessary detuning risks.

[0081] In one embodiment, step S120, which involves selecting a target resonant frequency within an allowed resonant frequency window and generating the required series reactance and expected resonant current based on the target resonant frequency, the equivalent capacitance, and the loss factor, further includes:

[0082] Step S121: Select the target resonant frequency within the allowed resonant frequency window, and generate the required series reactance based on the target resonant frequency and the equivalent capacitance;

[0083] Step S122: Generate the expected resonant current based on the target resonant frequency, the equivalent capacitance, and the preset target test voltage.

[0084] In this embodiment, the target resonant frequency is selected within the allowed resonant frequency window. And synthesize the required series reactance. ;

[0085] The series resonance condition is Select back,

[0086] Required series reactance (H) and the expected resonant current That is, at the target test voltage The steady-state current is calculated using the following formula:

[0087]

[0088]

[0089]

[0090] in, It is an engineering approximation of the quality factor, dimensionless, and reciprocal of the loss factor, which facilitates the design of subsequent boosting strategies.

[0091] The effective value of the target test voltage selected according to the relevant standard (e.g., for cables, it can be 1.4 to 2.5 times the rated phase voltage, etc., as determined by the applicable standard).

[0092] In this step, we first use the result obtained in step S1. rough match This ensures that the device falls within the adjustable range upon initial power-on; then use... Estimate the rated capacity of the resonant device (kVA) to verify equipment margin:

[0093]

[0094] In this invention, the rated capacity of the resonant device needs to be checked before and after the test to ensure the safety and reliability of the test process. Before the test, according to V2 and The estimated capacity requirement is calculated using a formula and compared with the rated capacity of the test power supply. If the rated capacity is greater than... If the capacity is sufficient, it indicates that the device has enough margin to carry out the test; if it is insufficient, measures need to be taken before the test, such as adjusting the target frequency to reduce the current, or reconfiguring the test device.

[0095] The coefficient 1.25 in the formula represents the margin. The calculation result of this formula is used to estimate and verify the test power supply capacity. By adding a 25% margin to the target apparent capacity, sufficient capacity can be ensured during the test, both in the boost and steady-state phases, avoiding voltage drops or current overloads due to insufficient capacity, thereby improving the safety and reliability of the test.

[0096] In one embodiment, step S200: constructing an exponential boost law and generating a test terminal voltage, obtaining the time to reach steady state based on the test terminal voltage, and calculating the fine-tuned operating frequency based on the time to reach steady state; including:

[0097] Step S210: Construct an exponential boost law without prior implementation of steady-state tolerance criteria, and generate the test terminal voltage based on the exponential boost law;

[0098] Step S220: Set a steady-state determination threshold ratio based on the voltage of the test terminal, obtain the time to reach steady state based on the steady-state determination threshold ratio and the voltage of the test terminal, and calculate the fine-tuned operating frequency based on the time to reach steady state.

[0099] In this embodiment, to ensure the safety of the experiment, an exponential boost law is constructed without prior implementation of steady-state tolerance criteria, and the test terminal voltage is generated based on the exponential boost law; a steady-state determination threshold ratio is set based on the test terminal voltage, and the time to reach steady state is obtained based on the steady-state determination threshold ratio and the test terminal voltage, and the fine-tuned operating frequency is calculated based on the time to reach steady state.

[0100] In one embodiment, step S210 includes: step S211: setting the boost rate coefficient without prior implementation of the steady-state tolerance criterion;

[0101] Step S212: Construct an exponential boost law based on the boost rate coefficient, and generate the test terminal voltage based on the exponential boost law.

[0102] In this embodiment, without prior implementation of steady-state withstand criteria, only the time-domain control law for the voltage boost process is applied to ensure that the resonance sharpness decreases from the previous state. Under certain conditions, the charging current will not exceed the device limit. Furthermore, since voltage overshoot is controllable, the following exponential boost law is proposed:

[0103]

[0104]

[0105]

[0106] in,

[0107] This represents the boost rate coefficient, in seconds (s⁻¹); it also represents the allowable current margin. With detuning sensitivity The composite is a single rate parameter;

[0108] The voltage at the test terminal is the voltage during the voltage boosting process, and the voltage converges monotonically over time.

[0109] To correspond to the resonant current, the voltage trajectory is mapped to the current trajectory for easy real-time comparison. Hard constraints.

[0110] Device limits It is set in advance before the test. The setting is mainly based on the rated current capability of the test power supply and the resonant reactor, while also referring to the allowable insulation current value of the equipment under test. Generally, 1.1-1.2 times the current I1 is taken as the limit value to ensure that normal fluctuations are covered while avoiding damage to the power supply or test object due to overcurrent.

[0111] In this step, during the boost operation, the controller cycles... refresh Reference value and closed-loop tracking; if near The set threshold is lowered by Real-time slope reduction; while maintaining To avoid prematurely involving steady-state maintenance and frequency fine-tuning.

[0112] In one embodiment, step S220 includes: step S221: obtaining the corresponding initial value of steady-state current based on the time to reach steady state;

[0113] Step S222: Generate a single frequency correction amount based on the initial value of the steady-state current, and calculate the fine-tuned operating frequency based on the single frequency correction amount.

[0114] In this embodiment, the tolerance criterion is not executed in advance; only steady-state determination and frequency fine-tuning are completed to lock the circuit near the target resonant point and suppress slight detuning caused by dielectric loss.

[0115] As given in step S210 For reference, a steady-state determination threshold ratio is set. (Dimensionless), when the voltage at the tested terminal satisfies The time taken to reach steady state is considered as the time to enter steady state, and thus the time (s) to reach steady state is obtained:

[0116]

[0117] Record Current under As the initial value of the steady-state current, the sensitivity of the resonant current to frequency is considered. The constraints provide a frequency fine-tuning amount. The frequency fine-tuning amount is constructed using the normalized current deviation and... The simplified frequency deviation law of proportional suppression term is used for on-site tuning:

[0118]

[0119]

[0120] in, This is the single frequency correction amount, in Hz; This is the fine-tuned operating frequency, in Hz; if ,but Indicates no correction is needed; when When there is slight detuning or increased loss, Slightly increase the frequency to boost the capacitive current; conversely, decrease it accordingly. Iterate the above formula 1–2 times with a step cycle to avoid over-adjustment.

[0121] In one embodiment, step S300: performing steady-state tolerance based on the fine-tuned operating frequency and constructing an exit criterion; including:

[0122] Step S310: After the frequency stabilizes at the fine-tuned operating frequency and the voltage remains at the target test voltage, perform steady-state withstand test and calculate the equivalent conductance and steady-state loss factor.

[0123] Step S320: Construct an exit index based on the steady-state loss factor.

[0124] In this embodiment, when the frequency stabilizes at And the voltage remains at the target test voltage. Afterwards, steady-state tolerance is tested, and threshold coupling exit criteria are given.

[0125] In the steady-state event interval Inside, To meet the minimum tolerance time requirement, active power is measured in real time. (Using the wattmeter method), calculate the target test voltage. Equivalent conductance and steady-state loss factor under the following conditions:

[0126]

[0127]

[0128] in, This is the steady-state equivalent conductance, measured in seconds (S).

[0129] The steady-state loss factor is dimensionless.

[0130] To characterize the actual adequacy of the withstand capability, an effective stress-time integral is set. :

[0131]

[0132] If the closed loop will Stable at ,but If there is a short-term drop, the integral will naturally reduce the effective tolerance time; at the same time, the peak value or upper limit of the count rate of the partial discharge monitoring value will be recorded as... (Consistent with the definition of the instrument used, units are normalized to pC or cycles / s before being included in the ratio) and the minimum time required to withstand. Construct exit indicators .

[0133] The exit indicators The construction method is as follows:

[0134]

[0135] in, This is the upper limit of the steady-state loss factor, i.e., the set threshold; This is the maximum allowable value for partial discharge monitoring, i.e., the set threshold; when If the inequality is still satisfied at the end of the interval, then the test is passed; if at any time... This triggers controlled bucking and exits.

[0136] The advantage of this coupling form is that the three risks are unified under the same scale in the manner of "dominant maximum value", which facilitates one-time comparison and implementation of simple and reliable protection logic.

[0137] In one embodiment, the retrospective verification result includes relative drift rate, dielectric load index, maximum apparent capacity, and capacity margin; Step S400: In response to completing the test determination based on the exit indicators, perform parameter retrospective and device capacity verification, and generate retrospective verification results; including:

[0138] Step S410: In response to completing the test determination based on the exit index, perform parameter backtracking to generate the relative drift rate and medium load index;

[0139] Step S420: Perform device capacity verification to generate maximum apparent capacity and capacity margin.

[0140] In this embodiment, after the test is passed or the device is exited under controlled conditions, parameter backtracking and device capacity verification are performed. By inverting the equivalent parameters after the test and quantifying the dielectric load index, a calculable closed-loop basis is provided for the reactance preset and capacity selection of the next test.

[0141] Specifically, parameter backtracking includes:

[0142] Firstly, at the termination time Reading current Estimate the equivalent capacitance after the test. With corresponding reactance :

[0143]

[0144]

[0145] based on and Obtain the relative drift rate (Dimensionless), used to characterize the state of the medium or the effect of temperature rise:

[0146]

[0147] Meanwhile, the steady-state loss factor in the test Integral with effective stress time Structural medium load index (Dimensionless):

[0148]

[0149] The larger the value, the heavier the wear and tear while meeting the tolerance time requirement, which can be used as a reference for subsequent derating or frequency window selection.

[0150] The device capacity verification specifically includes calculating the maximum apparent capacity and capacity margin for the current test:

[0151]

[0152]

[0153] in, Maximum apparent capacity, in VA; The target test voltage; The termination current at the end of the test This is a capacity margin, dimensionless. The rated capacity of the test power supply is expressed in VA.

[0154] like If the percentage exceeds a preset threshold (e.g., 2%), then in the next test... Resetting the reactance shortens the frequency fine-tuning time. The 2% threshold is based on engineering experience and standard practice: the capacitance of the insulating medium fluctuates slightly due to temperature, humidity, etc., but generally should not exceed 2%-3%. Therefore, using 2% as the judgment threshold can filter out normal minor fluctuations and promptly detect abnormal equipment status. If the deviation does not exceed the threshold, it is considered that no adjustment is needed, and the original configuration can continue.

[0155] like If the voltage is too high, prioritize shortening the detuning search or increasing the cooling interval at the same voltage. If the threshold is exceeded, it is considered "too high," indicating that while the tolerance time is met, the medium loss level is too high, and the sample is under heavy load. In this case, measures need to be taken, such as shortening the detuning search process or increasing the cooling interval. The threshold is 1.1-1.2 times the threshold. .

[0156] like If the value is close to 1, then increase the device capacity or reduce the primary boost rate (by reducing the rate of increase in step S200). accomplish).

[0157] In one embodiment, the system described in Embodiment 1 is practically applied in a 64 / 110kV cross-linked polyethylene cable line (commissioning test, newly commissioned):

[0158] When conducting acceptance tests on 64 / 110kV cables, equivalent parameter identification is first performed under low voltage conditions. The identification frequency is selected using a dual-frequency injection method. and In voltage The currents were measured below respectively. And record the active power. The equivalent capacitance is calculated from this. Equivalent conductivity and loss factor .

[0159] Based on this, select the target resonant frequency. Hz, and determine the test voltage according to the standard. kV (RMS). The series reactance is calculated based on the resonance condition. H; The steady-state resonant current is calculated using the formula. A; The quality factor is converted from the loss factor to... .

[0160] To ensure the safety of the boost voltage, a maximum allowable current is set. A, and select the steady-state determination threshold ratio. From the formula, we get At this point, the time required for the pressure to rise to near steady state is s.

[0161] After reaching steady state, the current was measured. A, slightly lower than the theoretical value, indicates a minor mistuning. The frequency correction amount is obtained using the fine-tuning formula. Hz, making the fine-tuned operating frequency Hz. This allows for precise resonance.

[0162] During the steady-state tolerance phase, a threshold for the loss factor is set. Partial discharge threshold Tolerance time s. Measured active power kW, to obtain steady-state conductance and loss factor The partial discharge peak value is far below the threshold value. pC, after normalization Effective stress integral s, all three criteria are met, and the overall unified indicator is adopted. The experiment was successful.

[0163] At the end of the test, the current was terminated. A, calculate the capacitance in reverse. relative deviation This indicates that the capacitance is basically stable. Dielectric load index This indicates that the dielectric loss is at a normal level. The maximum apparent capacity of this test... MVA, rated capacity of the test power supply MVA, Capacity Margin It meets safety requirements.

[0164] In one embodiment, the system described in the previous embodiment is practically applied in a 110 kV oil-immersed power transformer (commissioning test, line-end measurement):

[0165] In the commissioning test of a 110 kV transformer, the resonant frequency is selected. Hz, and determine the test voltage according to the items specified in the standard. kV. Using a low-voltage identification method, at frequency... , The measured current and power The equivalent capacitance was calculated. loss factor Thus, the quality factor is obtained. .

[0166] The required series reactance is calculated based on the resonance condition. H, steady-state resonant current A. Set the maximum allowable current. A, Steady-state determination threshold ratio 4. Obtained from the formula Steady-state time is approximately s.

[0167] Current measured during steady state A, slightly lower The correction amount is obtained based on the frequency fine-tuning formula. Hz, so that the fine-tuned frequency is Hz, further improving the resonance matching accuracy.

[0168] Set loss factor threshold during the tolerance phase Partial discharge threshold Tolerance time s. Measured steady-state power kW, to obtain the loss factor The value is significantly smaller than the threshold; the partial discharge peak value is significantly smaller than the threshold. pC, normalized value Below the threshold value. Effective stress integral. s, all three criteria are met, unified indicators The experiment was successfully completed.

[0169] After the test, based on the termination current The capacitance is obtained by reverse calculation. relative deviation Smaller; calculate the medium load index This is also within a reasonable range. The maximum capacity required for this experiment... MVA, if the rated capacity of the test power supply MVA, then capacity margin If the requirements are met, it indicates that the device configuration is reasonable.

[0170] In one embodiment, such as Figure 2 As shown, a variable frequency series resonant withstand voltage test system is provided, the system comprising:

[0171] The test parameter generation module is used to obtain the equivalent capacitance and loss factor of the test sample, and generate the required series reactance and expected resonant current based on the equivalent capacitance and loss factor.

[0172] The steady-state test achievement module is used to construct an exponential boost law and generate the voltage at the test terminal, obtain the time to reach the steady state based on the voltage at the test terminal, and calculate the fine-tuned operating frequency based on the time to reach the steady state.

[0173] The exit criterion construction module is used to perform steady-state tolerance based on the fine-tuned operating frequency and construct an exit criterion.

[0174] The backtracking and verification execution module is used to respond to the test determination based on the exit indicators, perform parameter backtracking and device capacity verification, and generate backtracking and verification results.

[0175] In one embodiment, the test parameter generation module further includes:

[0176] The breakdown constraint test module is used to obtain the equivalent capacitance and loss factor of the test sample under the premise of low voltage without breakdown.

[0177] The expected parameter acquisition module is used to select a target resonant frequency within the allowed resonant frequency window, and generate the required series reactance and expected resonant current based on the target resonant frequency, the equivalent capacitance and the loss factor.

[0178] In one embodiment, the breakdown constraint test module is further configured to: inject test parameters into the test specimen and obtain the steady-state current amplitude and the active power during a single injection; and obtain the equivalent capacitance and loss factor of the test specimen based on the test parameters, the steady-state current amplitude, and the active power.

[0179] In one embodiment, the expected parameter acquisition module is further configured to: select a target resonant frequency within an allowed resonant frequency window; generate a required series reactance based on the target resonant frequency and the equivalent capacitance; and generate an expected resonant current based on the target resonant frequency, the equivalent capacitance, and a preset target test voltage.

[0180] In one embodiment, the steady-state test achievement module is further configured to: construct an exponential boost law without prior implementation of a steady-state tolerance criterion, and generate a test terminal voltage based on the exponential boost law; set a steady-state determination threshold ratio based on the test terminal voltage, obtain the time to reach steady state based on the steady-state determination threshold ratio and the test terminal voltage, and calculate the fine-tuned operating frequency based on the time to reach steady state.

[0181] In one embodiment, the steady-state test achievement module is further configured to: set a boost rate coefficient without prior implementation of a steady-state tolerance criterion; construct an exponential boost law based on the boost rate coefficient; and generate the test terminal voltage based on the exponential boost law.

[0182] In one embodiment, the steady-state test achievement module is further configured to: obtain the corresponding initial value of steady-state current based on the time to reach steady state; generate a single frequency correction amount based on the initial value of steady-state current; and calculate the fine-tuned operating frequency based on the single frequency correction amount.

[0183] In one embodiment, the exit index construction module is further configured to: perform steady-state withstand and calculate the equivalent conductance and steady-state loss factor after the frequency stabilizes at the fine-tuned operating frequency and the voltage remains at the target test voltage; and construct an exit index based on the steady-state loss factor.

[0184] In one embodiment, the retrospective review results include relative drift rate, dielectric load index, maximum apparent capacity, and capacity margin;

[0185] The backtracking verification execution module is also used to: in response to completing the test determination based on the exit index, perform parameter backtracking to generate relative drift rate and medium load index; and perform device capacity verification to generate maximum apparent capacity and capacity margin.

[0186] In one embodiment, such as Figure 3As shown, a computer device is also provided, including a memory and a processor. The memory stores a computer program and an operating system. When the processor executes the computer program, it implements the steps performed by each module in the aforementioned variable frequency series resonant withstand voltage test system. The computer device also includes a system bus, internal memory, network structure, display screen, and input devices.

[0187] In one embodiment, a computer-readable storage medium is also provided, on which a computer program is stored, which, when executed by a processor, implements the steps performed by each module in the above-described variable frequency series resonant withstand voltage test system.

[0188] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application.

[0189] This application also provides a network device, which includes: at least one processor, a memory, and a computer program stored in the memory and executable on the at least one processor, wherein the processor executes the computer program to implement the steps in any of the above embodiments.

[0190] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps described in the various embodiments above.

[0191] This application provides a computer program product that, when run on a mobile terminal, enables the mobile terminal to execute the steps described in the above embodiments.

[0192] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include at least: any entity or device capable of carrying the computer program code to a photographing device / terminal device, a recording medium, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium. Examples include USB flash drives, portable hard drives, magnetic disks, or optical disks. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be electrical carrier signals or telecommunication signals.

[0193] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0194] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0195] In the embodiments provided in this application, it should be understood that the disclosed apparatus / network devices and methods can be implemented in other ways. For example, the apparatus / network device embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0196] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0197] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

[0198] One embodiment of this application also provides a computer device, which includes: at least one processor, a memory, and a computer program stored in the memory and executable on the at least one processor, wherein the processor executes the computer program to implement the steps in any of the above embodiments.

[0199] The computer device may include, but is not limited to, a processor and memory. Those skilled in the art will understand that the above description is an example of a computer device and does not constitute a limitation on the computer device. It may include more or fewer components than described above, or a combination of certain components, or different components, such as input / output devices, network access devices, etc.

[0200] The processor can be a Central Processing Unit (CPU), but it can also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor.

[0201] In some embodiments, the memory may be an internal storage unit of the computer device, such as a hard drive or RAM. In other embodiments, the memory may be an external storage device of the computer device, such as a plug-in hard drive, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card. Furthermore, the memory may include both internal and external storage units of the computer device. The memory is used to store the operating system, applications, bootloader, data, and other programs, such as the program code of the computer program. The memory can also be used to temporarily store data that has been output or will be output.

[0202] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0203] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A variable frequency series resonant withstand voltage test system, characterized in that, The system includes: The test parameter generation module is used to obtain the equivalent capacitance and loss factor of the test sample, and generate the required series reactance and expected resonant current based on the equivalent capacitance and loss factor. The steady-state test achievement module is used to construct an exponential boost law and generate the voltage at the test terminal, obtain the time to reach the steady state based on the voltage at the test terminal, and calculate the fine-tuned operating frequency based on the time to reach the steady state. The exit criterion construction module is used to perform steady-state tolerance based on the fine-tuned operating frequency and construct an exit criterion. The backtracking and verification execution module is used to respond to the test determination based on the exit indicators, perform parameter backtracking and device capacity verification, and generate backtracking and verification results; The test parameter generation module also includes: The breakdown constraint test module is used to obtain the equivalent capacitance and loss factor of the test sample under the premise of low voltage without breakdown. The expected parameter acquisition module is used to select a target resonant frequency within the allowed resonant frequency window, and generate the required series reactance and expected resonant current based on the target resonant frequency, the equivalent capacitance and the loss factor; The steady-state test achievement module is also used for: An exponential boost law is constructed without prior establishment of a steady-state tolerance criterion, and the test terminal voltage is generated based on the exponential boost law. The steady-state determination threshold ratio is set based on the voltage of the test terminal, and the time to reach the steady state is obtained based on the steady-state determination threshold ratio and the voltage of the test terminal. The fine-tuned operating frequency is calculated based on the time to reach the steady state. The exit indicator construction module is also used for: Once the frequency stabilizes at the finely tuned operating frequency and the voltage remains at the target test voltage, steady-state withstand test is performed and the equivalent conductance and steady-state loss factor are calculated. Construct an exit index based on the steady-state loss factor; The retrospective verification results include relative drift rate, dielectric load index, maximum apparent capacity, and capacity margin; The backtracking review execution module is also used for: In response to the test determination based on the exit criteria, parameter backtracking is performed to generate relative drift rate and medium load index; Perform device capacity verification to generate maximum apparent capacity and capacity margin; The exponential boost law is as follows: ； ； ； in, This is the boost rate coefficient, in units of s⁻¹; The target resonant frequency; The quality factor is an engineering approximation and is dimensionless. For device limits, To accommodate the expected resonant current, a current margin will be allowed. With detuning sensitivity The composite is a single rate parameter; The voltage at the test terminal is the voltage during the voltage boosting process, and the voltage converges monotonically over time. The target test voltage; To correspond to the resonant current, the voltage trajectory is mapped to the current trajectory for easy real-time comparison. Hard constraints; Equivalent capacitance; Exit Indicators The construction method is as follows: ； in, The steady-state loss factor is dimensionless. The upper limit of the steady-state loss factor is denoted as the upper limit of the peak value or count rate of the partial discharge monitoring value. That is, the set threshold; To the minimum time required for tolerance, For the effective stress-time integral, This is the maximum allowable value for partial discharge monitoring, i.e., the set threshold; when If the inequality is still satisfied at the end of the interval, then the test is passed; if at any time... This triggers controlled bucking and exits.

2. The variable frequency series resonant withstand voltage test system according to claim 1, characterized in that, The breakdown constraint test module is also used for: The test parameters are injected into the test sample, and the steady-state current amplitude and the active power during the first injection are obtained. The equivalent capacitance and loss factor of the test specimen are obtained based on the test parameters, the steady-state current amplitude, and the active power.

3. The variable frequency series resonant withstand voltage test system according to claim 1, characterized in that, The expected parameter acquisition module is also used for: Select a target resonant frequency within the allowed resonant frequency window, and generate the required series reactance based on the target resonant frequency and the equivalent capacitance; The expected resonant current is generated based on the target resonant frequency, the equivalent capacitance, and the preset target test voltage.

4. The variable frequency series resonant withstand voltage test system according to claim 1, characterized in that, The steady-state test achievement module is also used for: The boost rate coefficient is set without prior determination of steady-state tolerance criteria; An exponential boost law is constructed based on the boost rate coefficient, and the test terminal voltage is generated based on the exponential boost law.

5. The variable frequency series resonant withstand voltage test system according to claim 4, characterized in that, The steady-state test achievement module is also used for: The initial value of the steady-state current is obtained based on the time to reach the steady state. A single frequency correction is generated based on the initial steady-state current value, and the fine-tuned operating frequency is calculated based on the single frequency correction.

6. The variable frequency series resonant withstand voltage test system according to claim 1, characterized in that, The maximum apparent capacity and capacity margin are generated based on the following formulas: ； ； in, For maximum apparent capacity, For the target test voltage, This is the termination current at the end of the test. For capacity margin, This is the rated capacity of the test power supply.

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