A data packet packaging method and device, electronic equipment, storage medium and computer program product

Abstract

The present disclosure relates to a data packetting method and device, electronic equipment, storage medium and computer program product. The method comprises: determining a plurality of RRNS groups according to a target packet length, wherein the plurality of RRNS groups are used for RRNS encoding of to-be-encoded data; distributing the to-be-encoded data to the plurality of RRNS groups according to a preset interleaving arrangement mode; and obtaining a data transmission packet with the target packet length based on RRNS encoding of the data distributed in the plurality of RRNS groups by an RRNS encoder. The embodiments of the present disclosure can obtain a data transmission packet with the target packet length based on RRNS encoding, and effectively correct a plurality of continuous code errors that may occur in a channel transmission process.

Description

Technical Field

[0001] This disclosure relates to the field of computer technology, and in particular to a data packet assembly method and apparatus, electronic equipment, storage medium and computer program product. Background Technology

[0002] Forward Error Correction (FEC) is a technique used in high-speed transmission systems to improve transmission reliability. It can detect and automatically correct bit errors occurring during channel transmission at the data receiver without requiring data retransmission. Retransmission is costly, leading to low communication efficiency and transmission delays. Existing commonly used FEC codes suitable for multi-ary symbols, such as RS(544, 514) and RS(528, 514) codes, require 5140 bits of raw data, making them unsuitable for high-speed transmission systems with longer packet lengths. Summary of the Invention

[0003] This disclosure presents a technical solution for a data packetization method and apparatus, electronic device, storage medium, and computer program product.

[0004] According to one aspect of this disclosure, a data packet assembly method is provided, comprising: determining a plurality of RRNS groups based on a target packet length, wherein the plurality of RRNS groups are used for RRNS encoding of data to be encoded; distributing the data to be encoded to the plurality of RRNS groups according to a preset interleaving arrangement; and performing RRNS encoding on the data distributed in the plurality of RRNS groups based on an RRNS encoder to obtain a data transmission packet having the target packet length.

[0005] In one possible implementation, the data transmission packet with the target packet length includes: the data to be encoded, and check data generated from the check data bits in each RRNS group; the step of obtaining the data transmission packet with the target packet length by performing RRNS encoding on the data allocated in the plurality of RRNS groups based on the RRNS encoder includes: for any RRNS group, using the RRNS encoder, performing RRNS encoding on the information data of the information data bits allocated to the RRNS group of the data to be encoded, and generating check data for the check data bits in the RRNS group.

[0006] In one possible implementation, the data to be encoded includes: a valid data DATE field, a data link protocol (DLP) field, and a cyclic redundancy check (CRC) field.

[0007] In one possible implementation, the target packet length is M1 bytes, the RRNS encoder corresponds to n moduli, and the maximum data bit width corresponding to each moduli is m1 bits, where M1, n, and m1 are all positive integers; determining multiple RRNS groups according to the target packet length includes: determining N RRNS groups, where N is a positive integer, and n×m1×N is greater than M1×8.

[0008] In one possible implementation, the method further includes: in 1 to 2 m1 Select n pairs of coprime numbers to determine the n modulo numbers, wherein the n modulo numbers include k information modulo numbers and nk redundant modulo numbers, where k is a positive integer less than n; in each RRNS group, determine k information data bits corresponding one-to-one with the k information modulo numbers and nk check data bits corresponding one-to-one with the nk redundant modulo numbers.

[0009] In one possible implementation, the data to be encoded is M2 bytes, and the maximum data bit width of each information data bit in each RRNS group is m2 bits, where M2 is a positive integer less than M1, m2 is a positive integer less than or equal to m1, and k×m2×N is greater than or equal to M2×8.

[0010] In one possible implementation, the part in 1 to 2 m1 Choose n pairs of relatively prime numbers from 1 to 2 to determine the n moduli, including those between 1 and 2. m1 Select n pairs of relatively prime numbers from largest to smallest to determine the n moduli; and / or, determine the k moduli from the n moduli in ascending order to determine the k information moduli.

[0011] In one possible implementation, the step of distributing the data to be encoded to the plurality of RRNS groups according to a preset interleaving arrangement includes: constructing an interleaving matrix of size k×N, wherein each column of the interleaving matrix corresponds to k information data bits in an RRNS group, and each row of the interleaving matrix includes one information data bit in each RRNS group; and distributing the data to be encoded row by row to the interleaving matrix in bit order.

[0012] In one possible implementation, the target packet length is M1 = 256 bytes, the data to be encoded is M2 = 232 bytes, and the RRNS encoder corresponds to k = 24 information moduli and nk = 2 redundant moduli. The step of determining multiple RRNS groups according to the target packet length includes: determining 11 RRNS groups, wherein each RRNS group includes 24 information data bits that correspond one-to-one with the 24 information moduli, and the 24 information data bits include 23 7-bit information data bits and 1 8-bit information data bit.

[0013] In one possible implementation, the step of distributing the data to be encoded to the plurality of RRNS groups according to a preset interleaving arrangement includes: constructing a 24×11 interleaving matrix, wherein each column of the interleaving matrix corresponds to 24 information data bits in an RRNS group, and each row of the interleaving matrix includes one information data bit from each RRNS group; distributing the data to be encoded row by row to the interleaving matrix in bit order, wherein after the data distribution is completed, each row and each column includes one 8-bit information data, and there is a 23-bit 7-bit information data interval between two adjacent 8-bit information data.

[0014] In one possible implementation, the method further includes: selecting three target columns in the interleaving matrix with the required spacing; and setting the highest bit of the 8-bit information data in the three target columns to 0.

[0015] In one possible implementation, the method further includes: for each RRNS group, before encoding the information data allocated to the information data bits in the RRNS group using the RRNS encoder, adjusting the 8-bit information data in the RRNS group to the 24th information data bit.

[0016] According to one aspect of this disclosure, a data packet assembly apparatus is provided, comprising: a grouping module, configured to determine multiple RRNS groups according to a target packet length, wherein the multiple RRNS groups are used for RRNS encoding of data to be encoded; a data arrangement module, configured to distribute the data to be encoded to the multiple RRNS groups according to a preset interleaving arrangement; and an encoding module, configured to encode the data allocated in the multiple RRNS groups based on an RRNS encoder to obtain a data transmission packet having the target packet length.

[0017] According to one aspect of this disclosure, an electronic device is provided, comprising: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to invoke the instructions stored in the memory to perform the method described above.

[0018] According to one aspect of this disclosure, a computer-readable storage medium is provided that stores computer program instructions thereon, which, when executed by a processor, implement the above-described method.

[0019] According to one aspect of this disclosure, a computer program product is provided, including a computer program or a non-volatile computer-readable storage medium carrying the computer program, wherein the computer program implements the above-described method when executed by a processor.

[0020] In this embodiment of the disclosure, multiple RRNS groups are determined according to the target packet length. These multiple RRNS groups are used to perform RRNS encoding on the data to be encoded. The data to be encoded is distributed to the multiple RRNS groups according to a preset interleaving arrangement. This allows the RRNS encoder to perform RRNS encoding on the data distributed in the multiple RRNS groups, resulting in a data transmission packet with the target packet length. The data transmission packet with the target packet length obtained after RRNS encoding can effectively correct multiple consecutive bit errors that may occur during channel transmission.

[0021] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Other features and aspects of this disclosure will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. Attached Figure Description

[0022] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the specification, serve to illustrate the technical solutions of this disclosure.

[0023] Figure 1 A flowchart illustrating a data packetization method according to an embodiment of the present disclosure is shown.

[0024] Figure 2 A schematic diagram of the data arrangement of 11 RRNS groups according to an embodiment of the present disclosure is shown.

[0025] Figure 3 A schematic diagram of the data arrangement of 11 RRNS groups according to an embodiment of the present disclosure is shown.

[0026] Figure 4 A target data transmission packet with a fixed packet length of 256 bytes is shown according to an embodiment of the present disclosure.

[0027] Figure 5 A block diagram of a data packet assembly apparatus according to an embodiment of the present disclosure is shown.

[0028] Figure 6 A block diagram of an electronic device according to an embodiment of the present disclosure is shown. Detailed Implementation

[0029] Various exemplary embodiments, features, and aspects of this disclosure will now be described in detail with reference to the accompanying drawings. The same reference numerals in the drawings denote elements that have the same or similar functions. Although various aspects of the embodiments are shown in the drawings, they are not necessarily drawn to scale unless specifically indicated otherwise.

[0030] The term “exemplary” as used herein means “serving as an example, embodiment, or illustration.” Any embodiment illustrated herein as “exemplary” is not necessarily to be construed as superior to or better than other embodiments.

[0031] In this document, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A alone, A and B simultaneously, and B alone. Furthermore, the term "at least one" in this document means any combination of at least two of any one or more elements. For example, including at least one of A, B, and C can mean including any one or more elements selected from the set consisting of A, B, and C.

[0032] Furthermore, to better illustrate this disclosure, numerous specific details are set forth in the following detailed description. Those skilled in the art will understand that this disclosure can be practiced without certain specific details. In some instances, methods, means, components, and circuits well known to those skilled in the art have not been described in detail in order to highlight the main points of this disclosure.

[0033] The Residue Number System (RNS) can be viewed as both a representation of numbers and an encoding. An RNS consists of a set of pairwise coprime moduli: m1 <m2<m3<…<m k Definition: If an integer 0 ≤ X <M, Then the integer X can be represented by the remainder vector (x1, x2, ..., xn) determined based on RNS. k ) represents X with respect to modulus m. i The remainder can be expressed as: , i = 1, 2, ..., k.

[0034] Correspondingly, the Chinese Remainder Theory (CRT) formula shown in formula (1) can also be used, based on the remainder vector (x1, x2, ..., x...). k Reconstruct the integer X:

[0035] (1).

[0036] in, , For M i Regarding module m i The reverse of the model.

[0037] Based on the RNS system, add r=nk redundant modules m. k+1 , ..., m nA Redundant Remainder System (RRNS) is constructed, where an integer X is increased by the corresponding remainder x. k+1 , ..., x n That is, an integer X can be determined by the remainder vector (x1, x2, ..., x) of RRNS. k x k+1 , ..., x n This means that, at this point, the n-ary remainder vector obtained by encoding the k-ary remainder vector through RRNS becomes a type of FEC encoding, which has the ability to correct... The ability of the remainder component to produce errors. Therefore, RRNS-FEC is also a systematic code, with the information remainder component first and the added check remainder component second.

[0038] This disclosure provides a data packet assembly method that applies an RRNS encoder to data transmission packets in a high-speed transmission system to correct multiple consecutive bit errors that may occur during the transmission of a data transmission packet through the channel. The data packet assembly method provided by this disclosure is described in detail below.

[0039] Figure 1 A flowchart illustrating a data packet assembly method according to an embodiment of this disclosure is shown. This method can be executed by an electronic device such as a terminal device or a server. The terminal device can be a user equipment (UE), mobile device, user terminal, terminal, cellular phone, cordless phone, personal digital assistant (PDA), handheld device, computing device, in-vehicle device, wearable device, etc. This method can be implemented by a processor calling computer-readable instructions stored in memory. Alternatively, the method can be executed by a server. Figure 1 As shown, the method includes:

[0040] In step S11, multiple RRNS groups are determined based on the target packet length, wherein the multiple RRNS groups are used to perform RRNS encoding on the data to be encoded.

[0041] The number of multiple RRNS groups is determined based on the target packet length to ensure that after RRNS encoding of the data to be encoded based on multiple RRNS groups, a data transmission packet of the target packet length can be obtained by assembling the packets.

[0042] The following sections will describe in detail the specific process of determining multiple RRNS groups based on the target packet length, taking into account the possible implementation methods of this disclosure; these details will not be elaborated upon here.

[0043] In step S12, the data to be encoded is distributed to multiple RRNS groups according to a preset interleaving arrangement.

[0044] After determining multiple RRNS groups, the data to be encoded is allocated to these groups according to a preset interleaving arrangement, preparing for subsequent RRNS coding. This preset interleaving arrangement ensures that RRNS coding based on multiple RRNS groups can correct for multiple consecutive bit errors that may occur during channel transmission.

[0045] The following sections will describe in detail the specific process of how to distribute the data to be encoded to multiple RRNS groups according to a preset interleaving arrangement, based on possible implementation methods of this disclosure. These details will not be elaborated upon here.

[0046] In step S13, after RRNS encoding of the data allocated in multiple RRNS groups based on the RRNS encoder, a data transmission packet with the target packet length is obtained.

[0047] Based on the RRNS encoder, data allocated in multiple RRNS groups can be encoded using RRNS, ultimately resulting in a data transmission packet with the target packet length to be sent to the channel for transmission.

[0048] In this embodiment of the disclosure, multiple RRNS groups are determined according to the target packet length. These multiple RRNS groups are used to perform RRNS encoding on the data to be encoded. The data to be encoded is distributed to the multiple RRNS groups according to a preset interleaving arrangement. This allows the RRNS encoder to perform RRNS encoding on the data distributed in the multiple RRNS groups, resulting in a data transmission packet with the target packet length. The data transmission packet with the target packet length obtained after RRNS encoding can effectively correct multiple consecutive bit errors that may occur during channel transmission.

[0049] In related technologies, the RRNS encoder corresponds to the module set (m1, m2, ..., m...). k m k+1 , ..., m n ), where (m1, m2, ..., m k ) is the information module, (m k+1 , ..., m n When the modulus is redundant, the process of obtaining an n-ary remainder vector by performing RRNS encoding on the k-ary remainder vector is as follows: Based on the input k-ary remainder vector (x1, x2, ..., x...), ... k ) and information modules (m1, m2, ..., m k X is reconstructed using the above formula (1), and then X is used to compare the redundant modulus (m). k+1 , ..., m n The remainder component (x) is obtained by taking the remainder. k+1 , ..., x n Finally, we obtain an n-ary remainder vector (x1, x2, ..., x...). k xk+1 , ..., x n This completes the RRNS encoding. However, when the selected modulus m... i When the value of X is large and the number of X is large, reconstructing X using the above formula (1) will involve multiplying large numbers and taking the remainder of large numbers, which is very inconvenient for the implementation of digital circuits.

[0050] Formula (1) above can be expressed using the base-extension (BEX) method shown in Formula (2) below:

[0051] (2).

[0052] in,

[0053] (3).

[0054] According to the above formulas (2) and (3), it can be seen that for an integer X, the remainder x is the basis for... i and based on weight a i The two expressions can be derived from each other. To simplify the expression, the above formula (3) can be derived from the remainder x. i Obtain weight a i The process is called r2a, which is the weight a shown in the above formula (2). i The remainder x is obtained i The process is called a2r.

[0055] In one possible implementation, the data transmission packet with the target packet length includes: data to be encoded and check data generated from the check data bits in each RRNS group; after RRNS encoding of the data allocated in multiple RRNS groups based on the RRNS encoder, a data transmission packet with the target packet length is obtained, including: for any RRNS group, using the RRNS encoder, RRNS encoding of the information data allocated to the information data bits in that RRNS group of the data to be encoded, generating check data for the check data bits in that RRNS group.

[0056] For any given RRNS group, the data allocated to the information data bits in that RRNS group can be used as a remainder vector. The RRNS encoder uses the r2a and a2r processes to perform RRNS encoding on the remainder vector corresponding to that RRNS group, obtaining the check data for the check data bits in that RRNS group. Furthermore, the data to be encoded, and the check data generated from the check data bits in each RRNS group, together constitute a data transmission packet with the target packet length.

[0057] In one possible implementation, the target packet length is M1 bytes, the RRNS encoder corresponds to n moduli, and the maximum data bit width corresponding to each moduli is m1 bits, where M1, n, and m1 are all positive integers; based on the target packet length, multiple RRNS groups are determined, including: determining N RRNS groups, where N is a positive integer, and n×m1×N is greater than M1×8.

[0058] When the RRNS encoder is an RRNS(n,k) encoder, the RRNS(n,k) encoder corresponds to n moduli (symbols). Assuming that the maximum data bit width corresponding to each symbol is m1 bits, that is, a maximum of n×m1 bits of data corresponds to one RRNS group. In order to achieve the final data transmission packet with a target packet length of M1 bytes, the specific values ​​of the N RRNS groups need to ensure that n×m1×N is greater than M1×8.

[0059] In one example, the target packet length is 256 bytes, and the RRNS encoder is an RRNS (n=26, k=24) encoder, with a maximum data bit width of m1=8 bits for each modulus. Therefore, N=10 RRNS groups need to be determined, since 26×8×10>256×8. Each RRNS group can generate (nk)×m1=2×8 bits=2 bytes of check data, so 10 RRNS groups correspond to 20 bytes of check data. The maximum amount of data to be encoded is 256-20=236 bytes. At this point, the first 9 RRNS groups can each be allocated the maximum k×m1=24×8 bits=24 bytes of data to be encoded, totaling 236-24×9=20 bytes. The last RRNS group only needs to be allocated 20 bytes of data to be encoded (4 bytes of 0 can be padded to fill the k=24 information data bits).

[0060] The specific length of the target packet can be flexibly set according to the actual situation. For example, the target packet length can be 256 bytes, 512 bytes, etc. This disclosure does not make a specific limit on it.

[0061] The error correction capability of the RRNS(n,k) encoder is p symbols, where p = (nk) / 2 rounded down. Therefore, after RRNS encoding N RRNS groups based on the RRNS(n,k) encoder, it is possible to correct consecutive bit errors of p×N symbols in a data transmission packet with a target packet length.

[0062] For example, the error correction capability of the RRNS (n=26, k=24) encoder is p=1 symbol. Therefore, after RRNS encoding of N=10 RRNS groups based on the RRNS (n=26, k=24) encoder, it is possible to correct consecutive errors of 10 symbols in a data transmission packet with a target packet length.

[0063] In one possible implementation, the method further includes: in 1 to 2 m1 Select n pairs of coprime numbers to determine n modulo numbers. Among the n modulo numbers, there are k information modulo numbers and nk redundant modulo numbers, where k is a positive integer less than n. In each RRNS group, determine k information data bits that correspond one-to-one with the k information modulo numbers and nk check data bits that correspond one-to-one with the nk redundant modulo numbers.

[0064] For the RRNS(n,k) encoder, in 1 to 2 m1 Select n pairwise coprime numbers to determine the k information modulo numbers and nk redundant modulo numbers corresponding to the RRNS(n,k) encoder. Then, in each RRNS group, determine k information data bits corresponding one-to-one with the k information modulo numbers and nk check data bits corresponding one-to-one with the nk redundant modulo numbers. This allows the k information data bits in each RRNS group to be encoded using the k information modulo numbers and nk redundant modulo numbers of the RRNS(n,k) encoder, resulting in check data for the nk check data bits in each RRNS group.

[0065] Since the n modules of the RRNS(n,k) encoder are between 1 and 2 m1 Within this range, a larger n means that many small and densely packed moduli must be selected. Since small moduli are more sensitive to errors, a single symbol error can cause a significant deviation in the recovered value, potentially exceeding the correction limit of redundant moduli, thus increasing the probability of decoding failure. Therefore, the larger the value of n, the weaker the error correction capability.

[0066] The RRNS(n,k) encoder needs to encode each of the N RRNS groups. Therefore, the larger the value of N, the longer the encoding time and the lower the encoding efficiency.

[0067] In one possible implementation, in 1 to 2 m1 Choose n pairwise coprime numbers from between 1 and 2 to determine n moduli, including those in the range 1 to 2. m1 Select n pairs of relatively prime numbers from largest to smallest to determine the n moduli; and / or, select the first k moduli from the n moduli in ascending order to determine the k information moduli.

[0068] Because smaller moduli are more sensitive to errors, a single symbol error can cause a significant deviation in the recovered value, potentially exceeding the correction limit of redundant moduli, thus increasing the probability of decoding failure. Therefore, to improve error correction capability, in 1 to 2 m1We select n pairs of coprime numbers from largest to smallest to determine n modulo numbers, thus avoiding the impact of small modulo numbers on error correction capability. Furthermore, we determine the first k modulo numbers from the n modulo numbers in ascending order as k information modulo numbers, and the remaining nk modulo numbers as nk redundant modulo numbers.

[0069] In one possible implementation, the data to be encoded is M2 bytes, and the maximum data bit width of each information data bit in each RRNS group is m2 bits, where M2 is a positive integer less than M1, m2 is a positive integer less than or equal to m1, and k×m2×N is greater than or equal to M2×8.

[0070] Since the maximum data width of each information data bit in each RRNS group is m2 bits, meaning that the maximum amount of data that each RRNS group can encode is k×m2 bits, and the maximum amount of data that N RRNS groups can encode is k×m2×N bits, when a data transmission packet with a target packet length includes M2 bytes of data to be encoded, it is necessary to ensure that k×m2×N is greater than or equal to M2×8 in order to ensure that N RRNS groups can complete the encoding of all the data to be encoded.

[0071] In one possible implementation, the data to be encoded includes: a valid data DATE field, a data link protocol (DLP) field, and a cyclic redundancy check (CRC) field.

[0072] The Valid Data (DATE) field contains the valid data information that needs to be transmitted during the transmission process. The Data Link Protocol (DLP) field contains the control information for the transmission process. The Cyclic Redundancy Check (CRC) field contains the error detection information for the transmission process.

[0073] In addition to the DATE, DLP, and CRC fields mentioned above, the data to be encoded may also include other fields depending on the actual situation. This disclosure does not impose specific limitations on this.

[0074] After determining N RRNS groups, the data to be encoded is distributed to multiple RRNS groups according to a preset interleaving arrangement.

[0075] In one possible implementation, the data to be encoded is distributed to multiple RRNS groups according to a preset interleaving arrangement, including: constructing an interleaving matrix of size k×N, wherein each column of the interleaving matrix corresponds to k information data bits in an RRNS group, and each row of the interleaving matrix includes one information data bit in each RRNS group; and distributing the data to be encoded row by row to the interleaving matrix in bit order.

[0076] By distributing the data to be encoded row by row into the interleaving matrix in bit order, it can be ensured that RRNS coding based on N RRNS groups can correct consecutive bit errors of N symbols that may occur during channel transmission.

[0077] When the RRNS encoder is an RRNS (n=26, k=24) encoder, and the maximum data bit width corresponding to each symbol is m1=8 bits, the embodiments of this disclosure are as follows: 1 to 2 8 =26 pairs of relatively prime numbers between 256 and 137 are selected from largest to smallest to determine the n=26 modules corresponding to the RRNS (n=26, k=24) encoder. That is, 26 pairs of relatively prime numbers between 137 and 255 are selected as the n=26 modules corresponding to the RRNS (n=26, k=24) encoder. Table 1 shows the n=26 modules corresponding to the RRNS (n=26, k=24) encoder.

[0078]

[0079] As shown in Table 1, the first 24 modules from smallest to largest are determined as the k=24 information modules m1 to m2 corresponding to the RRNS (n=26, k=24) encoder. 24 The remaining two modules are determined as RRNS (n=26, k=24) encoders, corresponding to nk=2 redundant modules m. 25 and m 26 .

[0080] The error correction capability of the RRNS (n=26, k=24) encoder is p=1 symbol. At this point, one RRNS group at the data transmitter can encode 24 symbols of information data based on the RRNS (n=26, k=24) encoder, generating 2 symbols of check data; the data receiver has the capability to correct one symbol error for a received RRNS group.

[0081] During RRNS encoding, when one symbol corresponds to 8 bits of data, performing a modulo operation on the modulus set in Table 1 above may result in two different 8-bit data mappings yielding the same remainder, i.e., a 2→1 mapping error. For example, 8-bit data with a decimal value of 1 and 8-bit data with a decimal value of 254 will both produce a remainder of 1 when modulo 253. In this case, the decoder can determine the final decoding result by calculating the Hamming distance (the sum of all bits after XORing) between the decoded 8-bit data and the original 8-bit data.

[0082] For example, if the decoded result is 1 (00000001 in 8-bit form) and the original data is 16 (00010000 in 8-bit form), then the Hamming distance between them is 0^0 + 0^0 + 0^0 + 0^1 + 0^0 + 0^0 + 0^0 + 1^0 = 2. The Hamming distance between another possible decoded result, 254 (11111110 in 8-bit form), and the original data 16 (00010000 in 8-bit form), is 1^0 + 1^0 + 1^0 + 1^1 + 1^0 + 1^0 + 1^0 + 0^0 = 6. Clearly, the final decoded result is 1, and the decoder determines that decoded result 254 is incorrect and corrects it to 1. This method of determining the final decoded result using Hamming distance can improve encoding efficiency, but if an 8-bit data has an error greater than 4 bits during transmission, the decoder will fail.

[0083] If one symbol corresponds to 7 bits, then the maximum value of the 7 bits is 127, which is less than all 26 coprime moduli in Table 1 above. Therefore, there will be no 2→1 mapping error problem.

[0084] Based on this, when the information data bits in the RRNS group are m2=7 bits, the error correction capability is stronger than when the information data bits in the RRNS group are m2=8 bits, but the coding utilization will be reduced.

[0085] In one possible implementation, the target packet length is M1 = 256 bytes, the data to be encoded is M2 = 232 bytes, and the RRNS encoder corresponds to k = 24 information moduli and nk = 2 redundant moduli. Based on the target packet length, multiple RRNS groups are determined, including: determining 11 RRNS groups, wherein each RRNS group includes 24 information data bits that correspond one-to-one with the 24 information moduli, and the 24 information data bits include 23 7-bit information data bits and 1 8-bit information data bit.

[0086] Based on 11 RRNS groups, it can correct errors of up to 11 consecutive symbols.

[0087] In order to encode the M2=232×8=1856 bits of data to be encoded and to minimize the 2→1 mapping error problem, each RRNS group includes 24 information data bits that correspond one-to-one with the 24 information moduli. The 24 information data bits include 23 7-bit information data bits and 1 8-bit information data bit.

[0088] At this point, the maximum amount of data that each RRNS group can encode is 23 × 7 + 8 = 169 bits, and the maximum total amount of data that 11 RRNS groups can encode is 11 × 169 = 1859 bits, which is greater than the amount of data to be encoded (1856 bits). Furthermore, since each RRNS group only includes one 8-bit information data bit, each RRNS group can only potentially experience one 2→1 mapping error at most.

[0089] In one possible implementation, the data to be encoded is distributed to multiple RRNS groups according to a preset interleaving arrangement, including: constructing a 24×11 interleaving matrix, wherein each column of the interleaving matrix corresponds to 24 information data bits in an RRNS group, and each row of the interleaving matrix includes one information data bit from each RRNS group; and distributing the data to be encoded row by row to the interleaving matrix in bit order, wherein after the data distribution is completed, each row and each column includes one 8-bit information data, and there is a 23-bit 7-bit information data interval between two adjacent 8-bit information data.

[0090] By distributing the data to be encoded row by row into the interleaving matrix in bit order, it is possible to ensure that RRNS coding based on multiple RRNS groups can correct consecutive bit errors of multiple symbols that may occur during channel transmission.

[0091] Figure 2 A schematic diagram of the data arrangement of 11 RRNS groups according to an embodiment of this disclosure is shown. The original data includes: 220 Byte Data (bits 1759:0) + 2 Byte Reserved (bits 1775:1760) + 4 Byte DLP (bits 1807:1776) + 8 Byte CRC (bits 1871:1808) = 1872 bits, where the 2 Byte Reserved does not participate in RRNS encoding, that is, only 1856 bits of data to be encoded are in the 1872 bits of original data. Figure 2 As shown, the 1856 bits of data to be encoded from the 1872 bits of original data are distributed row by row to the interleaving matrix in bit order, that is, distributed to 11 RRNS groups. Each RRNS group includes one 8-bit information data, and there is a gap of 23 7-bit information data between two adjacent 8-bit information data.

[0092] Since each RRNS group includes one 8-bit information data, each 8-bit information data in each RRNS group is susceptible to 2→1 mapping errors. Therefore, it is important to distribute the 8-bit information data as widely as possible to address the issue of consecutive bit errors during channel transmission. Figure 2As shown, there are 23 7-bit information data intervals between each two adjacent 8-bit information data.

[0093] In one possible implementation, the method further includes: selecting three target columns in the interleaving matrix with the required spacing; and setting the highest bit of the 8-bit information data in the three target columns to 0.

[0094] Only 1856 bits of data to be encoded are in the original data. The total amount of data that can be encoded by 11 RRNS groups is 11 × 169 = 1859 bits, which is 3 bits more than the 1856 bits of data to be encoded. Therefore, if Figure 2 As shown, by fixing the high-order bits of the 8-bit information data in the 2nd, 5th, and 10th RRNS groups to 0, only 7 bits of data to be encoded are actually used, thus avoiding the 2→1 mapping error problem. The three 8-bit information data with high-order bits set to 0 are also spaced as far apart as possible to break up any potential consecutive errors.

[0095] In one possible implementation, the method further includes: for each RRNS group, before encoding the information data allocated to the information data bits in the RRNS group using the RRNS encoder, adjusting the 8 bits of information data in the RRNS group to the 24th information data bit.

[0096] In the RRNS encoding process, the larger the modulus corresponding to the information data, the stronger the error correction capability when a 2→1 mapping error occurs. Therefore, the 8 bits of information data in each RRNS group are adjusted to the 24th information data bit corresponding to the maximum information modulus to reduce the probability of bit error.

[0097] Figure 3 A schematic diagram showing the data arrangement of 11 RRNS groups according to an embodiment of this disclosure is provided. Figure 3 As shown, the 8-bit information data in each RRNS group is adjusted to the 24th information data bit corresponding to the maximum information modulus m in Table 1 above. 24 =251.

[0098] For any given RRNS group, the RRNS encoder performs RRNS encoding on the information data bits allocated to that RRNS group to obtain the check data bits for that RRNS group. Based on the original data (or data to be encoded) and the check data generated from the check data bits in each RRNS group, the final data transmission packet with the target packet length is obtained and transmitted in the high-speed transmission system.

[0099] by Figure 2The original data shown includes: 220 Bytes Data + 2 Bytes Reserved + 4 Bytes DLP + 8 Bytes CRC = 234 Bytes. For example, each RRNS group generates 2 8-bit (2-byte) check data, and finally generates a data transmission packet with a target packet length of 256 bytes.

[0100] Figure 4 This illustrates a data transmission packet with a target packet length of 256 bytes according to an embodiment of this disclosure. For example... Figure 4 As shown, D0 to D219 are 220 bytes of data, with a 2-byte space in between representing reserved data; DLP0 to DLP3 are 4 bytes of DLP data; CRC0 to CRC7 are 8 bytes of CRC data; and FEC00 to FEC100 are 11 RRNS groups based on the redundancy modulus m in Table 1. 25 The generated 11-byte checksum data, FEC01 to FEC101, consists of 11 RRNS groups based on the redundancy modulus m in Table 1. 26 The generated 11-byte checksum data.

[0101] In this embodiment of the disclosure, multiple RRNS groups are determined according to the target packet length. These multiple RRNS groups are used to perform RRNS encoding on the data to be encoded. The data to be encoded is distributed to the multiple RRNS groups according to a preset interleaving arrangement. This allows the RRNS encoder to perform RRNS encoding on the data distributed in the multiple RRNS groups, resulting in a data transmission packet with the target packet length. The data transmission packet with the target packet length obtained after RRNS encoding can effectively correct multiple consecutive bit errors that may occur during channel transmission.

[0102] It is understood that the various method embodiments mentioned above in this disclosure can be combined with each other to form combined embodiments without violating the principle and logic. Due to space limitations, this disclosure will not elaborate further. Those skilled in the art will understand that in the above methods of specific implementation, the specific execution order of each step should be determined by its function and possible internal logic.

[0103] In addition, this disclosure also provides a data packet assembly apparatus, electronic device, computer-readable storage medium, and program, all of which can be used to implement any of the data packet assembly methods provided in this disclosure. The corresponding technical solutions and descriptions are described in the corresponding descriptions in the method section and will not be repeated here.

[0104] Figure 5 A block diagram of a data packet assembly apparatus according to an embodiment of the present disclosure is shown. Figure 5 As shown, the device 50 includes:

[0105] Grouping module 51 is used to determine multiple RRNS groups based on the target packet length, wherein the multiple RRNS groups are used for RRNS encoding of the data to be encoded;

[0106] Data arrangement module 52 is used to distribute the data to be encoded to multiple RRNS groups according to a preset interleaving arrangement method;

[0107] The encoding module 53 is used to encode the data allocated in multiple RRNS groups based on the RRNS encoder to obtain a data transmission packet with the target packet length.

[0108] In one possible implementation, the data transmission packet with the target packet length includes: data to be encoded, and check data generated from the check data bits in each RRNS group;

[0109] Encoding module 53 is specifically used for:

[0110] For any given RRNS group, the RRNS encoder is used to encode the information data of the information data bits allocated to that RRNS group, generating the check data of the check data bits in that RRNS group.

[0111] In one possible implementation, the data to be encoded includes: a valid data DATE field, a data link protocol (DLP) field, and a cyclic redundancy check (CRC) field.

[0112] In one possible implementation, the target packet length is M1 bytes, the RRNS encoder corresponds to n moduli, and the maximum data bit width corresponding to each moduli is m1 bits, where M1, n, and m1 are all positive integers;

[0113] Grouping module 51 is specifically used for:

[0114] Determine N RRNS groups, where N is a positive integer and n×m1×N is greater than M1×8.

[0115] In one possible implementation, encoding module 53 is also used for 1 to 2 m1 Choose n pairs of relatively prime numbers to determine n modulo numbers. Among the n modulo numbers, there are k information modulo numbers and nk redundant modulo numbers, where k is a positive integer less than n.

[0116] The grouping module 51 is also used to determine, in each RRNS group, k information data bits corresponding one-to-one with k information moduloes, and nk check data bits corresponding one-to-one with nk redundant moduloes.

[0117] In one possible implementation, the data to be encoded is M2 bytes, and the maximum data bit width of each information data bit in each RRNS group is m2 bits, where M2 is a positive integer less than M1, m2 is a positive integer less than or equal to m1, and k×m2×N is greater than or equal to M2×8.

[0118] In one possible implementation, encoding module 53 is specifically used for:

[0119] In 1 to 2 m1 Choose n pairs of relatively prime numbers from largest to smallest to determine the n moduli; and / or,

[0120] The first k moduli from the n moduli, arranged in ascending order, are determined as the k information moduli.

[0121] In one possible implementation, the data arrangement module 52 is specifically used for:

[0122] Construct a k×N interleaving matrix, where each column of the interleaving matrix corresponds to k information data bits in an RRNS group, and each row of the interleaving matrix includes one information data bit from each RRNS group;

[0123] The data to be encoded is distributed to the interleaving matrix row by row in bit order.

[0124] In one possible implementation, the target packet length is M1=256 bytes, the data to be encoded is M2=232 bytes, and the RRNS encoder corresponds to k=24 information modules and nk=2 redundant modules;

[0125] Grouping module 51 is specifically used for:

[0126] Eleven RRNS groups are identified, each containing 24 information data bits that correspond one-to-one with the 24 information moduli. These 24 information data bits include 23 seven-bit information data bits and 1 eight-bit information data bit.

[0127] In one possible implementation, the data arrangement module 52 is specifically used for:

[0128] Construct a 24×11 interleaving matrix, where each column of the interleaving matrix corresponds to 24 information data bits in an RRNS group, and each row of the interleaving matrix includes one information data bit from each RRNS group;

[0129] The data to be encoded is distributed to the interleaving matrix row by row in bit order. After the data is distributed, each row and each column contains an 8-bit information data, and there is a 23-bit interval between two adjacent 8-bit information data.

[0130] In one possible implementation, the data arrangement module 52 is also used for:

[0131] Select three target columns in the interleaving matrix whose spacing meets the requirements;

[0132] Set the highest bit of the 8-bit information data in the three target columns to 0.

[0133] In one possible implementation, the data arrangement module 52 is also used for:

[0134] For each RRNS group, before encoding the information data allocated to the information data bits in that RRNS group using the RRNS encoder, the 8 bits of information data in that RRNS group are adjusted to the 24th information data bit.

[0135] This method is specifically technically related to the internal structure of computer systems and can solve technical problems of how to improve hardware computing efficiency or execution performance (including reducing data storage, reducing data transmission, and increasing hardware processing speed), thereby achieving technical effects that improve the internal performance of computer systems in accordance with natural laws.

[0136] In some embodiments, the functions or modules of the apparatus provided in this disclosure can be used to perform the methods described in the above method embodiments. The specific implementation can be referred to the description of the above method embodiments, and for the sake of brevity, it will not be repeated here.

[0137] This disclosure also proposes a computer-readable storage medium storing computer program instructions that, when executed by a processor, implement the above-described method. The computer-readable storage medium can be volatile or non-volatile.

[0138] This disclosure also proposes an electronic device, including: a processor; and a memory for storing processor-executable instructions; wherein the processor is configured to invoke the instructions stored in the memory to execute the above-described method.

[0139] This disclosure also provides a computer program product, including computer-readable code, or a non-volatile computer-readable storage medium carrying computer-readable code, wherein when the computer-readable code is run in a processor of an electronic device, the processor in the electronic device performs the above-described method.

[0140] Electronic devices can be provided as terminals, servers, or other forms of devices.

[0141] Figure 6 A block diagram of an electronic device according to an embodiment of the present disclosure is shown. (Refer to...) Figure 6The electronic device 1900 can be provided as a server or a terminal device. (See reference...) Figure 6 The electronic device 1900 includes a processing component 1922, which further includes one or more processors, and memory resources represented by memory 1932 for storing instructions, such as application programs, that can be executed by the processing component 1922. The application programs stored in memory 1932 may include one or more modules, each corresponding to a set of instructions. Furthermore, the processing component 1922 is configured to execute instructions to perform the methods described above.

[0142] Electronic device 1900 may also include a power supply component 1926 configured to perform power management of electronic device 1900, a wired or wireless network interface 1950 configured to connect electronic device 1900 to a network, and an input / output interface 1958. Electronic device 1900 can operate on an operating system stored in memory 1932, such as a Microsoft Server operating system (Windows Server). TM Apple's graphical user interface-based operating system (Mac OS X) TM ), a multi-user, multi-process computer operating system (Unix) TM Linux is a free and open-source Unix-like operating system. TM ), an open-source Unix-like operating system (FreeBSD) TM (or similar.)

[0143] In an exemplary embodiment, a non-volatile computer-readable storage medium is also provided, such as a memory 1932 including computer program instructions that can be executed by a processing component 1922 of an electronic device 1900 to perform the above-described method.

[0144] This disclosure can be a system, method, and / or computer program product. A computer program product may include a computer-readable storage medium having computer-readable program instructions loaded thereon for causing a processor to implement various aspects of this disclosure.

[0145] Computer-readable storage media can be tangible devices capable of holding and storing instructions for use by an instruction execution device. Computer-readable storage media can be, for example, (but not limited to) electrical storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of computer-readable storage media include: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disc read-only memory (CD-ROM), digital multifunction disc (DVD), memory sticks, floppy disks, mechanical encoding devices, such as punch cards or recessed protrusions storing instructions thereon, and any suitable combination of the foregoing. The computer-readable storage media used herein are not to be construed as transient signals themselves, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., light pulses through fiber optic cables), or electrical signals transmitted through wires.

[0146] The computer-readable program instructions described herein can be downloaded from computer-readable storage media to various computing / processing devices, or downloaded via a network, such as the Internet, local area network, wide area network, and / or wireless network, to an external computer or external storage device. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to the computer-readable storage media in the respective computing / processing device.

[0147] Computer program instructions used to perform the operations of this disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, status setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, etc., and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, electronic circuitry, such as programmable logic circuitry, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), is personalized by utilizing the status information of the computer-readable program instructions to implement various aspects of this disclosure.

[0148] Various aspects of this disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this disclosure. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0149] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when executed by the processor of the computer or other programmable data processing apparatus, they create means for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to operate in a particular manner; thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.

[0150] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0151] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction containing one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than those shown in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0152] The computer program product can be implemented specifically through hardware, software, or a combination thereof. In one alternative embodiment, the computer program product is specifically embodied in a computer storage medium; in another alternative embodiment, the computer program product is specifically embodied in a software product, such as a software development kit (SDK), etc.

[0153] The description of the various embodiments above tends to emphasize the differences between the various embodiments. The similarities or similarities between them can be referred to, and for the sake of brevity, they will not be repeated here.

[0154] Those skilled in the art will understand that, in the above-described method of the specific implementation, the order in which each step is written does not imply a strict execution order and does not constitute any limitation on the implementation process. The specific execution order of each step should be determined by its function and possible internal logic.

[0155] If the technical solution of this application involves personal information, the product using this technical solution has clearly informed the user of the personal information processing rules and obtained the user's voluntary consent before processing the personal information. If the technical solution of this application involves sensitive personal information, the product using this technical solution has obtained the user's separate consent before processing the sensitive personal information, and also meets the requirement of "express consent". For example, at personal information collection devices such as cameras, clear and prominent signs are set up to inform users that they have entered the scope of personal information collection and that personal information will be collected. If an individual voluntarily enters the collection scope, it is deemed that they have agreed to the collection of their personal information; or on the personal information processing device, with clear signs / information informing users of the personal information processing rules, authorization is obtained from the individual through pop-up information or by asking the individual to upload their personal information; wherein, the personal information processing rules may include information such as the personal information processor, the purpose of personal information processing, the processing method, and the types of personal information processed.

[0156] The various embodiments of this disclosure have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or improvement of the technology in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A data packet assembly method, characterized in that, include: Based on the target packet length, multiple RRNS groups are determined, wherein the multiple RRNS groups are used for RRNS encoding of the data to be encoded; The data to be encoded is distributed to the multiple RRNS groups according to a preset interleaving arrangement; After the data allocated in the multiple RRNS groups is encoded using the RRNS encoder, a data transmission packet with the target packet length is obtained.

2. The method according to claim 1, characterized in that, A data transmission packet having the target packet length includes: the data to be encoded, and check data generated from the check data bits in each RRNS group; After performing RRNS encoding on the data allocated in the plurality of RRNS groups based on the RRNS encoder, a data transmission packet with the target packet length is obtained, including: For any given RRNS group, the RRNS encoder is used to encode the information data of the information data bits allocated to the RRNS group of the data to be encoded, thereby generating the check data of the check data bits in the RRNS group.

3. The method according to claim 2, characterized in that, The data to be encoded includes: a valid data DATE field, a data link protocol (DLP) field, and a cyclic redundancy check (CRC) field.

4. The method according to claim 2, characterized in that, The target packet is M1 bytes long, the RRNS encoder has n moduli, and the maximum data bit width of each moduli is m1 bits, where M1, n, and m1 are all positive integers; The determination of multiple RRNS groups based on the target packet length includes: Determine N RRNS groups, where N is a positive integer and n×m1×N is greater than M1×8.

5. The method according to claim 4, characterized in that, The method further includes: In 1 to 2 m1 Select n pairs of coprime numbers to determine the n modulo numbers, wherein the n modulo numbers include k information modulo numbers and nk redundant modulo numbers, where k is a positive integer less than n; In each RRNS group, k information data bits corresponding one-to-one with the k information moduloes and nk check data bits corresponding one-to-one with the nk redundant moduloes are determined.

6. The method according to claim 5, characterized in that, The data to be encoded is M2 bytes. The maximum data bit width of each information data bit in each RRNS group is m2 bits, where M2 is a positive integer less than M1, m2 is a positive integer less than or equal to m1, and k×m2×N is greater than or equal to M2×8.

7. The method according to claim 5, characterized in that, The above in 1 to 2 m1 Select n pairwise coprime numbers from the given set to determine the n moduli, including: In 1 to 2 m1 Select n pairs of relatively prime numbers from largest to smallest to determine the n moduli; and / or, The first k moduli from the n moduli in ascending order are determined as the k information moduli.

8. The method according to claim 5, characterized in that, The step of distributing the data to be encoded to the multiple RRNS groups according to a preset interleaving arrangement includes: Construct a k×N interleaving matrix, wherein each column of the interleaving matrix corresponds to k information data bits in an RRNS group, and each row of the interleaving matrix includes one information data bit from each RRNS group; The data to be encoded is distributed to the interleaving matrix row by row in bit order.

9. The method according to claim 6, characterized in that, The target packet length is M1=256 bytes, the data to be encoded is M2=232 bytes, and the RRNS encoder corresponds to k=24 information modules and nk=2 redundant modules; The determination of multiple RRNS groups based on the target packet length includes: Eleven RRNS groups are identified, each containing 24 information data bits that correspond one-to-one with the 24 information moduli. These 24 information data bits include 23 seven-bit information data bits and 1 eight-bit information data bit.

10. The method according to claim 9, characterized in that, The step of distributing the data to be encoded to the multiple RRNS groups according to a preset interleaving arrangement includes: Construct a 24×11 interleaving matrix, wherein each column of the interleaving matrix corresponds to 24 information data bits in an RRNS group, and each row of the interleaving matrix includes one information data bit from each RRNS group; The data to be encoded is distributed to the interleaving matrix row by row in bit order. After the data distribution is completed, each row and each column includes an 8-bit information data, and there is a 23-bit interval between two adjacent 8-bit information data.

11. The method according to claim 10, characterized in that, The method further includes: Select three target columns in the interleaving matrix whose spacing meets the requirements; Set the highest bit of the 8-bit information data in the three target columns to 0.

12. The method according to claim 10, characterized in that, The method further includes: For each RRNS group, before encoding the information data allocated to the information data bits in that RRNS group using the RRNS encoder, the 8 bits of information data in that RRNS group are adjusted to the 24th information data bit.

13. A data packet assembly device, characterized in that, include: The grouping module is used to determine multiple RRNS groups based on the target packet length, wherein the multiple RRNS groups are used for RRNS encoding of the data to be encoded; The data arrangement module is used to distribute the data to be encoded to the multiple RRNS groups according to a preset interleaving arrangement method; The encoding module is used to encode the data allocated in the plurality of RRNS groups based on the RRNS encoder to obtain a data transmission packet with the target packet length.

14. An electronic device, characterized in that, include: processor; Memory used to store processor-executable instructions; The processor is configured to invoke instructions stored in the memory to execute the method according to any one of claims 1 to 12.

15. A computer-readable storage medium having computer program instructions stored thereon, characterized in that, When the computer program instructions are executed by the processor, they implement the method described in any one of claims 1 to 12.

16. A computer program product comprising a computer program, or a non-volatile computer-readable storage medium carrying a computer program, characterized in that, When the computer program is executed by a processor, it implements the method described in any one of claims 1 to 12.

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