Composite substrate and method for producing a composite substrate

Abstract

Embodiments of the present application provide a composite substrate and a preparation method of the composite substrate. The composite substrate comprises a carrier substrate, a transition layer, the transition layer being a non-oxide ceramic layer, the transition layer being stacked on one side of the carrier substrate in the thickness direction, and a donor substrate, the donor substrate being stacked on the side of the transition layer away from the carrier substrate. The transition layer can withstand higher temperature, avoiding the melting or decomposition of the transition layer in the annealing process, and thus avoiding the case that the structure of the first interface and the second interface is destroyed to cause the rapid increase of the resistivity. Moreover, the cleanliness of the surface of the carrier substrate or the surface of the donor substrate or the process environment can be ensured by high temperature assistance, which can assist in eliminating impurities on one hand and avoiding the entry of impurities on the other hand, and thus the internal defects of the first interface and the second interface can be reduced, so as to improve the effect of reducing the resistivity between the carrier substrate and the donor substrate.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a composite substrate and a method for preparing the composite substrate. Background Technology

[0002] Conventional composite substrates are made by bonding an upper substrate and a lower substrate, with the side of the upper substrate facing away from the lower substrate used to form various functional layers.

[0003] In some cases, current needs to flow between the upper and lower substrates. However, in current composite substrates, the bonding interface between the upper and lower substrates has a high resistivity, which affects the performance of the composite substrate. Summary of the Invention

[0004] This application provides a composite substrate and a method for preparing the composite substrate. The transition layer can reduce the resistivity between the carrier substrate and the donor substrate, thereby optimizing the performance of the composite substrate.

[0005] In a first aspect, embodiments of this application provide a composite substrate, comprising,

[0006] carrier substrate;

[0007] A transition layer, wherein the material of the transition layer includes at least one of metal carbide, metal nitride and metal diboride; the transition layer is stacked on one side of the carrier substrate in the thickness direction;

[0008] A donor substrate, which is stacked on the side of the transition layer opposite to the carrier substrate.

[0009] In one possible implementation, the melting point of the transition layer is not lower than 2200 degrees Celsius; and / or, the resistivity of the transition layer is less than 0.1 mΩ·cm.

[0010] In one possible implementation, the transition layer includes at least three sub-transition layers; the at least three sub-transition layers include a first sub-transition layer, a second sub-transition layer, and a third sub-transition layer stacked sequentially along the thickness direction of the carrier substrate;

[0011] The resistivity of the first sub-transition layer and the third sub-transition layer is lower than that of the second sub-transition layer; the melting point of the first sub-transition layer and the third sub-transition layer is lower than that of the second sub-transition layer.

[0012] In one possible implementation, the transition layer is made of at least one of zirconium carbide, titanium carbide, hafnium carbide, tantalum carbide, niobium carbide, titanium nitride, zirconium nitride, zirconium diboride, titanium diboride, and hafnium diboride.

[0013] In one possible implementation, a passivation layer is provided on the side of the transition layer facing the carrier substrate; or, a passivation layer is provided on the side of the transition layer away from the carrier substrate.

[0014] In one possible implementation, the passivation layer is made of silicon dioxide or aluminum oxide.

[0015] In one possible implementation, the thickness of the transition layer along the thickness direction of the carrier substrate is greater than or equal to 5 nm and less than or equal to 500 nm.

[0016] In one possible implementation, the carrier substrate is a 3C-SiC polycrystalline substrate; the donor substrate is a 4H-SiC single-crystal substrate.

[0017] Secondly, embodiments of this application provide a method for preparing a composite substrate, including,

[0018] Provide carrier substrates and sacrificial substrates;

[0019] A transition layer is formed on one side of the carrier substrate in the thickness direction; the material of the transition layer includes at least one of metal carbide, metal nitride and metal diboride, and is treated by an annealing process;

[0020] A donor substrate and a sacrificial layer are sequentially formed on the sacrificial substrate along the thickness direction of the carrier substrate;

[0021] The transition layer is bonded to the donor substrate;

[0022] Remove the sacrificial layer.

[0023] In one possible implementation, after forming the transition layer but before forming the donor substrate, the process further includes:

[0024] The surface of the transition layer that faces away from the carrier substrate is passivated.

[0025] In one possible implementation, forming the transition layer specifically includes,

[0026] The transition layer is formed on the carrier substrate using low-pressure chemical vapor deposition, plasma-enhanced chemical vapor deposition, magnetron sputtering, or atomic layer deposition processes.

[0027] Thirdly, embodiments of this application provide a method for preparing a composite substrate, including,

[0028] Provide carrier substrates and sacrificial substrates;

[0029] A donor substrate and a sacrificial layer are sequentially formed on the sacrificial substrate along the thickness direction of the carrier substrate;

[0030] A transition layer is formed on the side of the donor substrate opposite to the sacrificial layer; the material of the transition layer includes at least one of metal carbide, metal nitride and metal diboride, and is treated by an annealing process;

[0031] The transition layer is bonded to the carrier substrate;

[0032] Remove the sacrificial layer.

[0033] In one possible implementation, after forming the transition layer, prior to bonding the transition layer to the carrier substrate, the process further includes:

[0034] The surface of the transition layer facing away from the donor substrate is passivated.

[0035] In one possible implementation, forming the transition layer specifically includes,

[0036] The transition layer is formed on the donor substrate using low-pressure chemical vapor deposition, plasma-enhanced chemical vapor deposition, magnetron sputtering, or atomic layer deposition processes.

[0037] The composite substrate and its fabrication method provided in this application embodiment involve an annealing process for the transition layer. Since the transition layer is a non-oxide ceramic layer, and the annealing process involves high temperatures, the transition layer exhibits good thermal stability during annealing. It can withstand higher temperatures, preventing melting or decomposition during annealing and thus avoiding structural damage to the first and second interfaces that could lead to a sudden increase in resistivity. Furthermore, during the fabrication of the transition layer, such as on a carrier substrate or a donor substrate, the transition layer can withstand higher temperatures. In some cases, high temperatures can help eliminate impurities on the surface of the carrier substrate, the donor substrate, or the process environment, ensuring cleanliness. When bonding the transition layer on the carrier substrate to the donor substrate, or vice versa, high temperatures can also help eliminate impurities on the surface of the carrier substrate, the donor substrate, or the process environment. Since high temperature can help ensure the cleanliness of the carrier substrate surface, donor substrate surface, or process environment, it can help eliminate impurities and prevent impurities from entering, thereby reducing internal defects at the first and second interfaces and improving the effect of reducing the resistivity between the carrier substrate and the donor substrate. Attached Figure Description

[0038] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0039] Figure 1 This is a schematic diagram of the structure of the composite substrate provided in some embodiments of this application;

[0040] Figure 2 This is a schematic diagram of the structure of the transition layer provided in some embodiments of this application;

[0041] Figure 3 This is a first flowchart of a method for preparing a composite substrate according to some embodiments of this application;

[0042] Figure 4 This is a second flowchart illustrating a method for preparing a composite substrate according to some embodiments of this application;

[0043] Figure 5 This is a flowchart illustrating a first fabrication process for a composite substrate provided in some embodiments of this application.

[0044] Figure 6 This is a third flowchart of a method for preparing a composite substrate provided in some embodiments of this application;

[0045] Figure 7 This is a second fabrication flowchart of the composite substrate provided in some embodiments of this application.

[0046] Explanation of reference numerals in the attached figures:

[0047] 100. Carrier substrate;

[0048] 200, Sacrificial substrate; 210, Donor substrate; 220, Sacrificial layer;

[0049] 300, Transition Layer; 310, First Sub-Transition Layer; 320, Second Sub-Transition Layer; 330, Third Sub-Transition Layer;

[0050] 400. First Interface;

[0051] 500, Second Interface.

[0052] The accompanying drawings have illustrated specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to specific embodiments. Detailed Implementation

[0053] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0054] Conventional composite substrates are made by bonding an upper substrate and a lower substrate, with the side of the upper substrate facing away from the lower substrate used to form various functional layers.

[0055] In some cases, current needs to flow between the upper and lower substrates. However, in current composite substrates, the bonding interface between the upper and lower substrates has a high resistivity, which affects the performance of the composite substrate.

[0056] The composite substrate and its fabrication method provided in this application involve an annealing process for the transition layer. Since the transition layer is a non-oxide ceramic layer, and the annealing process involves high temperatures, the transition layer exhibits good thermal stability during annealing. It can withstand higher temperatures, preventing melting or decomposition during annealing and thus avoiding structural damage to the first and second interfaces that could lead to a sudden increase in resistivity. Furthermore, during the fabrication of the transition layer, such as on a carrier substrate or a donor substrate, the transition layer can withstand higher temperatures. In some cases, this high temperature can help eliminate impurities on the surface of the carrier substrate, the donor substrate, or the process environment, ensuring cleanliness. When bonding the transition layer on the carrier substrate to the donor substrate, or vice versa, high temperatures can also help eliminate impurities on the surface of the carrier substrate, the donor substrate, or the process environment in some cases. Since high temperature can help ensure the cleanliness of the carrier substrate surface, donor substrate surface, or process environment, it can help eliminate impurities and prevent impurities from entering, thereby reducing internal defects at the first and second interfaces and improving the effect of reducing the resistivity between the carrier substrate and the donor substrate.

[0057] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.

[0058] Firstly, see [the following] Figure 1As shown, this application provides a composite substrate, which includes a carrier substrate 100, a transition layer 300 stacked on one side of the carrier substrate 100 in the thickness direction X, and a donor substrate 210 stacked on the side of the transition layer 300 away from the carrier substrate 100.

[0059] Since the transition layer 300 is located between the carrier substrate 100 and the donor substrate 210, a first interface 400 is formed between the transition layer 300 and the carrier substrate 100, and a second interface 500 is formed between the transition layer 300 and the donor substrate 210. In this embodiment, the resistivity of the transition layer 300 is less than 0.1 mΩ·cm. Due to the low resistivity of the transition layer 300, the first interface 400 between the transition layer 300 and the carrier substrate 100 has a low resistivity, and the second interface 500 between the transition layer 300 and the donor substrate 210 also has a low resistivity. In some cases, current flows between the carrier substrate 100 and the donor substrate 210 in the composite substrate. Because the transition layer 300, the first interface 400, and the second interface 500 in this embodiment have low resistivity, the conductivity between the carrier substrate 100 and the donor substrate 210 can be effectively improved, and energy loss can be reduced.

[0060] The transition layer 300 in this embodiment is a high-temperature resistant layer. That is, the transition layer 300 in this embodiment not only has low resistivity but also a high melting point, resulting in good thermal stability. Since high-temperature processes, such as high-temperature CVD epitaxy and high-temperature annealing, are unavoidably used in the fabrication or repair of composite substrates and semiconductor devices based on composite substrates, the high melting point of the transition layer 300 in this embodiment prevents melting or decomposition during high-temperature processes, ensuring the performance stability of the transition layer 300. This, in turn, prevents the structure of the first interface 400 and the second interface 500 from being damaged, leading to a sudden increase in resistivity. In other words, it improves the structural stability between the transition layer 300 and the carrier substrate 100 and the donor substrate 210, thereby ensuring the conductivity between the carrier substrate 100 and the donor substrate 210.

[0061] Furthermore, the transition layer 300 in this embodiment undergoes an annealing process. This can be understood as the use of annealing in the fabrication or repair of composite substrates, and in the fabrication or repair of semiconductor devices based on composite substrates. Therefore, the transition layer 300 undergoes an annealing process. Since the transition layer 300 is a high-temperature resistant layer, and the annealing process involves high temperatures, the transition layer 300 exhibits good thermal stability during annealing. It can withstand higher temperatures, preventing melting or decomposition of the transition layer 300 during annealing, thereby avoiding structural damage to the first interface 400 and the second interface 500 that could lead to a sudden increase in resistivity.

[0062] During the fabrication of the transition layer 300, such as on the carrier substrate 100 or on the donor substrate 210, the transition layer 300 can withstand higher temperatures. In some cases, this allows for the elimination of impurities on the surface of the carrier substrate 100, the donor substrate 210, or the process environment through high-temperature assistance, ensuring cleanliness. Similarly, when bonding the transition layer 300 on the carrier substrate 100 to the donor substrate 210, or vice versa, high temperatures can also help eliminate impurities on the surface of the carrier substrate 100, the donor substrate 210, or the process environment. Because high temperatures can help maintain the cleanliness of the surface of the carrier substrate 100 or the donor substrate 210, or the process environment, it not only helps eliminate impurities but also prevents their entry, thereby reducing internal defects at the first interface 400 and the second interface 500. This improves the effect of reducing the resistivity between the carrier substrate 100 and the donor substrate 210.

[0063] It is worth mentioning that, in this embodiment, a transition layer 300 is provided between the carrier substrate 100 and the donor substrate 210. Utilizing the low resistivity and high melting point of the transition layer 300, the problems of high resistivity between the carrier substrate 100 and the donor substrate 210, as well as insufficient compatibility with high-temperature processes, can be simultaneously solved. The transition layer 300 serves both as a low-resistivity conductive channel and as a stable support layer for high-temperature processes, thereby ensuring the reliability of semiconductor device manufacturing while reducing the resistivity between the carrier substrate 100 and the donor substrate 210.

[0064] In this embodiment, the carrier substrate 100 is a single-crystal substrate, but it can also be a polycrystalline substrate; the donor substrate 210 is a single-crystal substrate. The carrier substrate 100 can be N-type or P-type; the donor substrate 210 can be N-type or P-type. The materials of the carrier substrate 100 and the donor substrate 210 include, but are not limited to, silicon carbide, gallium nitride, gallium arsenide, silicon, and indium phosphide. Exemplarily, in this embodiment, the carrier substrate 100 is an N-type 3C-SiC polycrystalline substrate, and the donor substrate 210 is an N-type 4H-SiC single-crystal substrate.

[0065] In some embodiments, the transition layer 300 is a non-oxide ceramic layer.

[0066] Since non-oxide ceramic layers typically have higher melting points, they exhibit greater thermal stability. When a non-oxide ceramic layer is placed between the carrier substrate 100 and the donor substrate 210, the structural stability of the first interface 400 and the second interface 500 can be improved, preventing the structural damage of the first interface 400 and the second interface 500 from causing a sudden increase in resistivity.

[0067] Furthermore, the melting point of the transition layer 300 in this embodiment is not lower than 2200 degrees Celsius, thereby preventing the transition layer 300 from melting or decomposing during high-temperature processes.

[0068] Since non-oxide ceramic layers typically have low resistivity, when a non-oxide ceramic layer is disposed between the carrier substrate 100 and the donor substrate 210, the resistivity of the first interface 400 and the second interface 500 is low, thereby effectively improving the conduction efficiency between the carrier substrate 100 and the donor substrate 210 and reducing energy loss.

[0069] While conventional metal transition layers 300 possess low resistivity, their melting point is below 2200 degrees Celsius, making them prone to melting in high-temperature processes such as high-temperature CVD epitaxy or annealing. Conventional oxide transition layers 300 not only have melting points below 2200 degrees Celsius but also high resistivity. For example, when the carrier substrate 100 is a 3C-SiC polycrystalline substrate, the resistivity of the oxide transition layer 300 is much higher than that of the carrier substrate 100, failing to reduce the conductivity between the carrier substrate 100 and the donor substrate 210. Furthermore, achieving low resistivity in the oxide transition layer 300 requires doping to provide free charge carriers, but highly complex doping methods can easily lead to lattice distortion and defects. This embodiment of the application, by using a non-oxide ceramic layer as the transition layer 300, achieves a melting point of at least 2200 degrees Celsius while maintaining low resistivity without doping.

[0070] In some embodiments, the material of the transition layer 300 includes at least one of metal carbides, metal nitrides, and metal diborides.

[0071] Metal carbides include, but are not limited to, zirconium carbide, titanium carbide, hafnium carbide, tantalum carbide, and niobium carbide. Metal nitrides include, but are not limited to, titanium nitride and zirconium nitride. Metal diborides include, but are not limited to, zirconium diboride, titanium diboride, and hafnium diboride.

[0072] Zirconium carbide has a resistivity of 0.050-0.070 mΩ·cm and a melting point of 3540°C; titanium carbide has a resistivity of 0.050-0.070 mΩ·cm and a melting point of 3160°C; hafnium carbide has a resistivity of 0.045-0.070 mΩ·cm and a melting point of 3990°C; tantalum carbide has a resistivity of 0.025-0.045 mΩ·cm and a melting point of 3980°C; niobium carbide has a resistivity of 0.035-0.055 mΩ·cm and a melting point of 3600°C; nitrogen... Titanium diboride has a resistivity of 0.020-0.070 mΩ·cm and a melting point of 2950 degrees Celsius; zirconium nitride has a resistivity of 0.015-0.050 mΩ·cm and a melting point of 2982 degrees Celsius; zirconium diboride has a resistivity of 0.007-0.012 mΩ·cm and a melting point of 3240 degrees Celsius; titanium diboride has a resistivity of 0.009-0.015 mΩ·cm and a melting point of 3220 degrees Celsius; hafnium diboride has a resistivity of 0.010-0.015 mΩ·cm and a melting point of 3380 degrees Celsius.

[0073] For example, in the embodiments of this application, the material of the transition layer 300 includes one or more of zirconium carbide, titanium carbide, hafnium carbide, tantalum carbide, niobium carbide, titanium nitride, zirconium nitride, zirconium diboride, titanium diboride, and hafnium diboride, and there is no particular limitation thereto.

[0074] In some implementations, see Figure 1 and Figure 2 As shown, the transition layer 300 includes at least three sub-transition layers along the thickness direction X of the carrier substrate 100. The at least three sub-transition layers include a first sub-transition layer 310, a second sub-transition layer 320, and a third sub-transition layer 330. The first sub-transition layer 310 is stacked on one side of the carrier substrate 100 in the thickness direction X. The second sub-transition layer 320 is stacked on the side of the first sub-transition layer 310 away from the carrier substrate 100. The third sub-transition layer 330 is stacked on the side of the second sub-transition layer 320 away from the first sub-transition layer 310. The donor substrate 210 is stacked on the side of the third sub-transition layer 330 away from the second sub-transition layer 320.

[0075] Furthermore, the resistivity of both the first sub-transition layer 310 and the third sub-transition layer 330 is lower than that of the second sub-transition layer 320, and the melting point of both the first sub-transition layer 310 and the third sub-transition layer 330 is lower than that of the second sub-transition layer 320. For example, the first transition layer 300 is zirconium diboride, the second transition layer 300 is tantalum carbide, and the third transition layer 300 is titanium diboride.

[0076] It is understood that, since the first sub-transition layer 310 of the transition layer 300 has a first interface 400 with the carrier substrate 100, and the third sub-transition layer 330 of the transition layer 300 has a second interface 500 with the donor substrate 210, this embodiment sets the resistivity of both the first sub-transition layer 310 and the third sub-transition layer 330 to be lower than that of the second sub-transition layer 320. That is, the resistivity of the transition layer 300 along both sides of the thickness direction X of the carrier substrate 100 is lower, which makes the resistivity of the first interface 400 and the second interface 500 even lower, thereby improving the conductivity between the carrier substrate 100 and the donor substrate 210. Furthermore, the melting point of the second sub-transition layer 320 is higher than that of the first sub-transition layer 310 and the third sub-transition layer 330. That is, the melting point of the portion of the transition layer 300 farther from the first interface 400 and the second interface 500 is higher, which improves the overall thermal stability of the transition layer 300.

[0077] This application embodiment, through gradient design between the first sub-transition layer 310 and the second sub-transition layer 320, and between the third sub-transition layer 330 and the second sub-transition layer 320, can significantly reduce the problem of interface stress concentration, reduce the formation of microcracks and vacancy defects, and maintain the overall low resistivity of the transition layer 300. Furthermore, the gradient design can more uniformly distribute thermal stress, improve the structural stability of the transition layer 300 and the composite substrate based on the transition layer 300 under high-temperature processes, and avoid the risk of interface delamination caused by local thermal expansion mismatch.

[0078] In particular, when the material of the transition layer 300 includes metal nitrides, such as at least one of titanium nitride and zirconium nitride, the transition layer 300 can reduce the defects of the first interface 400 and the second interface 500 through the passivation effect of titanium nitride and zirconium nitride, thereby optimizing the resistivity of the first interface 400 and the second interface 500 and improving the conduction efficiency between the carrier substrate 100 and the donor substrate 210.

[0079] In some embodiments, the surface of the transition layer 300 facing away from the carrier substrate 100 is passivated, for example, by introducing a silicon dioxide or aluminum oxide nanofilm onto the surface of the transition layer 300 facing away from the carrier substrate 100, thereby modifying the surface of the transition layer 300 and reducing the surface dangling bond and defect state density of the transition layer 300. For example, the material of the transition layer 300 is zirconium carbide, and a 10-50 nm aluminum oxide passivation layer is deposited on the zirconium carbide surface facing away from the carrier substrate 100.

[0080] Since surface passivation can significantly reduce the electron scattering effect on the surface of the transition layer 300, it can further improve the conductivity of the second interface 500 between the transition layer 300 and the donor substrate 210. Simultaneously, the passivation layer can act as a thermal stress buffer layer, reducing the risk of cracking in the transition layer 300 due to surface oxidation or thermal expansion mismatch during high-temperature processing. Furthermore, the introduction of the passivation layer can suppress interfacial reactions between the transition layer 300 and the donor substrate 210, maintaining structural stability.

[0081] In some embodiments, the transition layer 300 is passivated on the surface facing the carrier substrate 100, for example, by introducing a silicon dioxide or aluminum oxide nanofilm onto the surface of the transition layer 300 facing the carrier substrate 100, thereby modifying the surface of the transition layer 300 and reducing the surface dangling bond and defect state density of the transition layer 300. Exemplarily, the material of the transition layer 300 is zirconium carbide, and a 10-50 nm aluminum oxide passivation layer is deposited on the zirconium carbide surface facing the carrier substrate 100.

[0082] Since surface passivation can significantly reduce the electron scattering effect on the surface of the transition layer 300, it can further improve the conductivity of the first interface 400 between the transition layer 300 and the carrier substrate 100. Simultaneously, the passivation layer can act as a thermal stress buffer layer, reducing the risk of cracking of the transition layer 300 due to surface oxidation or thermal expansion mismatch during high-temperature processing. Furthermore, the introduction of the passivation layer can suppress interfacial reactions between the transition layer 300 and the carrier substrate 100, maintaining structural stability.

[0083] In some embodiments, the thickness of the transition layer 300 along the thickness direction X of the carrier substrate 100 is greater than or equal to 5 nm and less than or equal to 500 nm, that is, the thickness of the transition layer 300 is 5 nm to 500 nm. For example, the thickness of the transition layer 300 can be 5 nm, 10 nm, 50 nm, 100 nm, 200 nm, 300 nm, 400 nm or 500 nm.

[0084] In some embodiments, the thickness of the donor substrate 210 along the thickness direction X of the carrier substrate 100 is greater than or equal to 500 nm and less than or equal to 20000 nm, that is, the thickness of the donor substrate 210 is 500 nm to 20000 nm. For example, the thickness of the donor substrate 210 can be 500 nm, 1000 nm, 5000 nm, 10000 nm, 15000 nm, or 20000 nm.

[0085] Secondly, this application provides a method for preparing a composite substrate, used to obtain the aforementioned composite substrate. See also... Figure 3 As shown, the method for preparing the composite substrate includes the following steps:

[0086] Step S100: Provide a carrier substrate 100.

[0087] In this step, the carrier substrate 100 can be a single-crystal substrate or a polycrystalline substrate; the carrier substrate 100 can be N-type or P-type; the material of the carrier substrate 100 includes, but is not limited to, silicon carbide, gallium nitride, gallium arsenide, silicon, and indium phosphide. Exemplarily, the carrier substrate 100 in this embodiment of the application is an N-type 3C-SiC polycrystalline substrate.

[0088] Step S200: A transition layer 300 is formed on one side of the carrier substrate 100 in the thickness direction X; the transition layer 300 is a non-oxide ceramic layer and is treated by an annealing process.

[0089] It should be noted that the transition layer 300 here has undergone an annealing process. This can be understood as the annealing process being used in the preparation or repair of composite substrates, as well as in the preparation or repair of semiconductor devices based on composite substrates. Therefore, the transition layer 300 has undergone an annealing process.

[0090] Step S300: A donor substrate 210 is formed on the side of the transition layer 300 away from the carrier substrate 100.

[0091] In this step, the donor substrate 210 is a single-crystal substrate; the donor substrate 210 can be N-type or P-type; the material of the donor substrate 210 includes, but is not limited to, silicon carbide, gallium nitride, gallium arsenide, silicon, and indium phosphide. Exemplarily, the donor substrate 210 in this embodiment is an N-type 4H-SiC single-crystal substrate.

[0092] This embodiment of the application provides a transition layer 300 between the carrier substrate 100 and the donor substrate 210. Utilizing the low resistivity and high melting point of the transition layer 300, the problems of high resistivity between the carrier substrate 100 and the donor substrate 210, as well as insufficient compatibility with high-temperature processes, can be simultaneously solved. The transition layer 300 serves both as a low-resistivity conductive channel and as a stable support layer for high-temperature processes, thereby ensuring the reliability of semiconductor device manufacturing while reducing the resistivity between the carrier substrate 100 and the donor substrate 210.

[0093] In some embodiments, in step S200 above, the transition layer 300 is a non-oxide ceramic layer, and the melting point of the transition layer 300 is not lower than 2200 degrees.

[0094] In some embodiments, in step S200 above, the material of the transition layer 300 includes at least one of metal carbide, metal nitride, and metal diboride.

[0095] Metal carbides include, but are not limited to, zirconium carbide, titanium carbide, hafnium carbide, tantalum carbide, and niobium carbide. Metal nitrides include, but are not limited to, titanium nitride and zirconium nitride. Metal diborides include, but are not limited to, zirconium diboride, titanium diboride, and hafnium diboride.

[0096] For example, in the embodiments of this application, the material of the transition layer 300 includes one or more of zirconium carbide, titanium carbide, hafnium carbide, tantalum carbide, niobium carbide, titanium nitride, zirconium nitride, zirconium diboride, titanium diboride, and hafnium diboride, and there is no particular limitation thereto.

[0097] In some implementations, in step S200 above, see... Figure 2 As shown, the transition layer 300 includes at least three sub-transition layers along the thickness direction X of the carrier substrate 100. The at least three sub-transition layers include a first sub-transition layer 310, a second sub-transition layer 320, and a third sub-transition layer 330. The first sub-transition layer 310 is stacked on one side of the carrier substrate 100 in the thickness direction X. The second sub-transition layer 320 is stacked on the side of the first sub-transition layer 310 away from the carrier substrate 100. The third sub-transition layer 330 is stacked on the side of the second sub-transition layer 320 away from the first sub-transition layer 310. The donor substrate 210 is stacked on the side of the third sub-transition layer 330 away from the second sub-transition layer 320.

[0098] Furthermore, the resistivity of both the first sub-transition layer 310 and the third sub-transition layer 330 is lower than that of the second sub-transition layer 320, and the melting point of both the first sub-transition layer 310 and the second sub-transition layer 320 is lower than that of the second sub-transition layer 320. For example, the first transition layer 300 is zirconium diboride, the second transition layer 300 is tantalum carbide, and the third transition layer 300 is titanium diboride.

[0099] In some embodiments, before step S300 and after step S200, the surface of the transition layer 300 facing away from the carrier substrate 100 is passivated. For example, a silicon dioxide or aluminum oxide nanofilm is introduced onto the surface of the transition layer 300 facing away from the carrier substrate 100, thereby modifying the surface of the transition layer 300 and reducing the surface dangling bond and defect state density of the transition layer 300. For example, the material of the transition layer 300 is zirconium carbide, and a 10-50 nm aluminum oxide passivation layer is deposited on the zirconium carbide surface facing away from the carrier substrate 100.

[0100] In some embodiments, in step S200 above, the thickness of the transition layer 300 along the thickness direction X of the carrier substrate 100 is greater than or equal to 5 nm and less than or equal to 500 nm, that is, the thickness of the transition layer 300 is 5 nm to 500 nm. For example, the thickness of the transition layer 300 can be 5 nm, 10 nm, 50 nm, 100 nm, 200 nm, 300 nm, 400 nm, or 500 nm.

[0101] In some embodiments, in step S300 above, the thickness of the donor substrate 210 along the thickness direction X of the carrier substrate 100 is greater than or equal to 500 nm and less than or equal to 20000 nm; that is, the thickness of the donor substrate 210 is 500 nm to 20000 nm. For example, the thickness of the donor substrate 210 can be 500 nm, 1000 nm, 5000 nm, 10000 nm, 15000 nm, or 20000 nm.

[0102] In some implementations, see Figure 5 As shown, in step S200 above, a transition layer 300 is prepared on one side of the carrier substrate 100 in the thickness direction X by processes such as low-pressure chemical vapor deposition (LPCVD), plasma-enhanced chemical vapor deposition (PECVD), magnetron sputtering or atomic layer deposition (ALD).

[0103] For example, the material of the transition layer 300 is zirconium carbide. When the transition layer 300 is prepared by low-pressure chemical vapor deposition (LPCVD), ZrCl4, CH4, and H2 are selected as raw materials, the deposition temperature is 1000-1300 degrees, the deposition pressure is 1-20 kPa, the carbon-zirconium atomic ratio of the carbon source and the zirconium source is in the range of 0.5:1 to 2:1, the ratio of H2 to CH4 is in the range of 5:1 to 50:1, and the deposition thickness is 5-500 nm.

[0104] For example, when the transition layer 300 is prepared on the carrier substrate 100, since the transition layer 300 can withstand higher temperatures, in some cases, high temperatures can be used to help eliminate impurities on the surface of the carrier substrate 100 and to help eliminate impurities in the process environment. This can prevent the introduction of impurities on the surface of the carrier substrate 100, thereby ensuring the cleanliness of the surface of the carrier substrate 100 and reducing internal defects of the first interface 400.

[0105] Further, see Figure 4 and Figure 5 As shown, step S300, forming a donor substrate 210 on the side of the transition layer 300 opposite to the carrier substrate 100, specifically includes the following steps:

[0106] Step S310: Provide a sacrificial substrate 200.

[0107] In this step, the sacrificial substrate 200 is a single-crystal substrate; the sacrificial substrate 200 can be N-type or P-type; the material of the sacrificial substrate 200 includes, but is not limited to, silicon carbide, gallium nitride, gallium arsenide, silicon, and indium phosphide. Exemplarily, the sacrificial substrate 200 in this embodiment of the application is an N-type 4H-SiC single-crystal substrate.

[0108] Step S320: A donor substrate 210 and a sacrificial layer 220 are sequentially formed on the sacrificial substrate 200 along the thickness direction X of the carrier substrate 100.

[0109] In this step, hydrogen ion implantation is performed on one side of the sacrificial substrate 200 in the thickness direction, wherein the implantation temperature is 60-90 degrees, so that the part implanted with hydrogen ions forms the donor substrate 210, and the part not implanted with hydrogen ions forms the sacrificial layer 220.

[0110] Step S330: Bond the donor substrate 210 to the transition layer 300.

[0111] In this step, a transition layer 300 is formed on one side of the thickness direction X of the carrier substrate 100, and a donor substrate 210 is formed on one side of the thickness direction of the sacrificial substrate 200. Based on this, the carrier substrate 100 and the sacrificial substrate 200 are bonded by an interface room temperature oxygen-free bonding process, so that the donor substrate 210 is bonded to the side of the transition layer 300 away from the carrier substrate 100. The bonding pressure is 5000N-500000N, and the activation gas is N2 or Ar.

[0112] For example, when the donor substrate 210 is bonded to the transition layer 300, since the transition layer 300 can withstand higher temperatures, in some cases, high temperatures can help eliminate impurities on the surface of the donor substrate 210 and the surface of the transition layer 300, as well as impurities in the process environment. This can prevent the introduction of impurities on the surface of the donor substrate 210 and the surface of the transition layer 300, thereby ensuring the cleanliness of the surface of the donor substrate 210 and the surface of the transition layer 300 and reducing internal defects in the second interface 500.

[0113] Step S340: Remove the sacrificial layer 220.

[0114] In this step, the carrier substrate 100 and the sacrificial substrate 200, which are bonded to the donor substrate 210 through the transition layer 300, are placed in an inert gas atmosphere such as N2 or Ar for high-temperature annealing. During this process, hydrogen gas is generated between the donor substrate 210 and the sacrificial layer 220 to separate the sacrificial layer 220 from the donor substrate 210. The annealing temperature is 700-1200 degrees Celsius and the annealing time is 6-10 hours.

[0115] It should be noted that in step S340, the transition layer 300 undergoes an annealing process.

[0116] It is worth mentioning that in step S320, hydrogen ion implantation is performed on one side of the sacrificial substrate 200 in the thickness direction, so that the portion implanted with hydrogen ions forms the donor substrate 210. Due to the use of hydrogen ion implantation, at least a portion of the formed donor substrate 210 has an amorphous structure. In step S340, a high-temperature annealing process can promote the crystallization of the amorphous structure of the donor substrate 210. Since the transition layer 300 can withstand higher temperatures, the process temperature of the high-temperature annealing process can be further increased, thereby improving the crystallization effect of the amorphous structure of the donor substrate 210. By crystallizing the amorphous structure of the donor substrate 210 through the high-temperature annealing process, the resistivity of the donor substrate 210 can be reduced.

[0117] In some implementations, see Figure 6 and Figure 7 As shown, steps S200 and S300 above, which involve forming a transition layer 300 on one side of the carrier substrate 100 in the thickness direction X, and forming a donor substrate 210 on the side of the transition layer 300 away from the carrier substrate 100, specifically include the following steps:

[0118] Step S10: Provide a sacrificial substrate 200.

[0119] In this step, the sacrificial substrate 200 is a single-crystal substrate; the sacrificial substrate 200 can be N-type or P-type; the material of the sacrificial substrate 200 includes, but is not limited to, silicon carbide, gallium nitride, gallium arsenide, silicon, and indium phosphide. Exemplarily, the sacrificial substrate 200 in this embodiment of the application is an N-type 4H-SiC single-crystal substrate.

[0120] Step S20: A donor substrate 210 and a sacrificial layer 220 are sequentially formed on the sacrificial substrate 200 along the thickness direction X of the carrier substrate 100.

[0121] In this step, hydrogen ion implantation is performed on one side of the sacrificial substrate 200 in the thickness direction, wherein the implantation temperature is 60-90 degrees, so that the part implanted with hydrogen ions forms the donor substrate 210, and the part not implanted with hydrogen ions forms the sacrificial layer 220.

[0122] Step S30: A transition layer 300 is formed on the side of the donor substrate 210 opposite to the sacrificial layer 220.

[0123] In this step, a transition layer 300 is prepared on the side of the donor substrate 210 away from the sacrificial layer 220 by processes such as low-pressure chemical vapor deposition (LPCVD), plasma-enhanced chemical vapor deposition (PECVD), magnetron sputtering, or atomic layer deposition (ALD).

[0124] For example, the material of the transition layer 300 is zirconium carbide. When the transition layer 300 is prepared by low-pressure chemical vapor deposition (LPCVD), ZrCl4, CH4, and H2 are selected as raw materials, the deposition temperature is 1000-1300 degrees, the deposition pressure is 1-20 kPa, the carbon-zirconium atomic ratio of the carbon source and the zirconium source is in the range of 0.5:1 to 2:1, the ratio of H2 to CH4 is in the range of 5:1 to 50:1, and the deposition thickness is 5-500 nm.

[0125] For example, when the transition layer 300 is fabricated on the donor substrate 210, since the transition layer 300 can withstand higher temperatures, in some cases, high temperatures can be used to help eliminate impurities on the surface of the donor substrate 210 and to help eliminate impurities in the process environment. This can prevent the introduction of impurities onto the surface of the donor substrate 210, thereby ensuring the cleanliness of the surface of the donor substrate 210 and reducing internal defects in the second interface 500.

[0126] Step S40: Bond the transition layer 300 to the carrier substrate 100.

[0127] In this step, a donor substrate 210 and a transition layer 300 are sequentially formed on one side of the thickness direction of the sacrificial substrate 200. On this basis, the carrier substrate 100 and the transition layer 300 are bonded by an interface room temperature oxygen-free bonding process, so that the transition layer 300 is bonded on one side of the thickness direction X of the carrier substrate 100. The bonding pressure is 5000N-500000N, and the activation gas is N2 or Ar.

[0128] For example, when the carrier substrate 100 is bonded to the transition layer 300, since the transition layer 300 can withstand higher temperatures, in some cases, high temperatures can help eliminate impurities on the surface of the carrier substrate 100 and the surface of the transition layer 300, as well as impurities in the process environment. This can prevent the introduction of impurities on the surface of the carrier substrate 100 and the surface of the transition layer 300, thereby ensuring the cleanliness of the surface of the carrier substrate 100 and the surface of the transition layer 300 and reducing internal defects of the first interface 400.

[0129] Step S50: Remove the sacrificial layer 220.

[0130] In this step, the sacrificial substrate 200 and the carrier substrate 100, which are bonded together by the transition layer 300 and the carrier substrate 100, are placed in an inert gas atmosphere such as N2 or Ar for high-temperature annealing. During this process, hydrogen gas is generated between the donor substrate 210 and the sacrificial layer 220 to separate the sacrificial layer 220 from the donor substrate 210. The annealing temperature is 700-1200 degrees Celsius and the annealing time is 6-10 hours.

[0131] It should be noted that in step S50, the transition layer 300 undergoes an annealing process.

[0132] It is worth mentioning that in step S20, hydrogen ion implantation is performed on one side of the sacrificial substrate 200 in the thickness direction, so that the portion implanted with hydrogen ions forms the donor substrate 210. Due to the use of hydrogen ion implantation, at least a portion of the formed donor substrate 210 has an amorphous structure. In step S50, a high-temperature annealing process can promote the crystallization of the amorphous structure of the donor substrate 210. Since the transition layer 300 can withstand higher temperatures, the process temperature of the high-temperature annealing process can be further increased, thereby improving the crystallization effect of the amorphous structure of the donor substrate 210. By crystallizing the amorphous structure of the donor substrate 210 through the high-temperature annealing process, the resistivity of the donor substrate 210 can be reduced.

[0133] In some embodiments, before step S40 and after step S30, the surface of the transition layer 300 facing away from the donor substrate 210 is passivated. For example, a silicon dioxide or aluminum oxide nanofilm is introduced onto the surface of the transition layer 300 facing away from the donor substrate 210, thereby modifying the surface of the transition layer 300 and reducing the surface dangling bond and defect state density of the transition layer 300. Exemplarily, the material of the transition layer 300 is zirconium carbide, and a 10-50 nm aluminum oxide passivation layer is deposited on the zirconium carbide surface facing away from the donor substrate 210.

[0134] Finally, it should be noted that other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein, and is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. A composite substrate, characterized in that: include, Carrier substrate (100); A transition layer (300) is made of at least one of metal carbides, metal nitrides and metal diborides; the transition layer (300) is stacked on one side of the carrier substrate (100) in the thickness direction; the transition layer (300) is bonded to the carrier substrate (100). A donor substrate (210) is stacked on the side of the transition layer (300) opposite to the carrier substrate (100); the donor substrate (210) is bonded to the transition layer (300). The melting point of the transition layer (300) is not lower than 2200 degrees; and / or the resistivity of the transition layer (300) is less than 0.1 mΩ·cm; The transition layer (300) is made of at least one of zirconium carbide, titanium carbide, hafnium carbide, tantalum carbide, niobium carbide, titanium nitride, zirconium nitride, zirconium diboride, titanium diboride, and hafnium diboride.

2. The composite substrate according to claim 1, characterized in that: The transition layer (300) includes at least three sub-transition layers; the at least three sub-transition layers include a first sub-transition layer (310), a second sub-transition layer (320) and a third sub-transition layer (330) stacked sequentially along the thickness direction of the carrier substrate. The resistivity of the first sub-transition layer (310) and the third sub-transition layer (330) is lower than that of the second sub-transition layer (320); the melting point of the first sub-transition layer (310) and the third sub-transition layer (330) is lower than that of the second sub-transition layer (320).

3. The composite substrate according to any one of claims 1-2, characterized in that: The transition layer (300) has a passivation layer on the side facing the carrier substrate (100); or, the transition layer (300) has a passivation layer on the side away from the carrier substrate (100).

4. The composite substrate according to claim 3, characterized in that: The passivation layer is made of silicon dioxide or aluminum oxide.

5. The composite substrate according to any one of claims 1-2, characterized in that: The thickness dimension of the transition layer (300) along the thickness direction of the carrier substrate (100) is greater than or equal to 5 nm and less than or equal to 500 nm.

6. The composite substrate according to any one of claims 1-2 and 4, characterized in that: The carrier substrate (100) is a 3C-SiC polycrystalline substrate; the donor substrate (210) is a 4H-SiC single crystal substrate.

7. A method for preparing a composite substrate, characterized in that: include, Provide carrier substrates and sacrificial substrates; A transition layer is formed on one side of the carrier substrate in the thickness direction; the transition layer is made of at least one of metal carbide, metal nitride, and metal diboride, and is treated by an annealing process; the transition layer is bonded to the carrier substrate; the melting point of the transition layer is not lower than 2200 degrees Celsius; and / or the resistivity of the transition layer is less than 0.1 mΩ·cm; the transition layer is made of at least one of zirconium carbide, titanium carbide, hafnium carbide, tantalum carbide, niobium carbide, titanium nitride, zirconium nitride, zirconium diboride, titanium diboride, and hafnium diboride. A donor substrate and a sacrificial layer are sequentially formed on the sacrificial substrate along the thickness direction of the carrier substrate; The transition layer is bonded to the donor substrate; The donor substrate is bonded to the transition layer; Remove the sacrificial layer.

8. The preparation method according to claim 7, characterized in that: Before forming the donor substrate and after forming the transition layer, the process further includes: The surface of the transition layer that faces away from the carrier substrate is passivated.

9. The preparation method according to claim 7 or 8, characterized in that: The formation of the transition layer specifically includes, The transition layer is formed on the carrier substrate using low-pressure chemical vapor deposition, plasma-enhanced chemical vapor deposition, magnetron sputtering, or atomic layer deposition processes.

10. A method for preparing a composite substrate, characterized in that: include, Provide carrier substrates and sacrificial substrates; A donor substrate and a sacrificial layer are sequentially formed on the sacrificial substrate along the thickness direction of the carrier substrate; A transition layer is formed on the side of the donor substrate opposite to the sacrificial layer; the transition layer is made of at least one of metal carbides, metal nitrides, and metal diborides, and is annealed; the donor substrate is bonded to the transition layer; the melting point of the transition layer is not lower than 2200 degrees Celsius; and / or the resistivity of the transition layer is less than 0.1 mΩ·cm; the transition layer is made of at least one of zirconium carbide, titanium carbide, hafnium carbide, tantalum carbide, niobium carbide, titanium nitride, zirconium nitride, zirconium diboride, titanium diboride, and hafnium diboride. The transition layer is bonded to the carrier substrate; the transition layer is bonded to the carrier substrate. Remove the sacrificial layer.

11. The preparation method according to claim 10, characterized in that: Before bonding the transition layer to the carrier substrate, after forming the transition layer, the process further includes: The surface of the transition layer facing away from the donor substrate is passivated.

12. The preparation method according to claim 10 or 11, characterized in that: The formation of the transition layer specifically includes, The transition layer is formed on the donor substrate using low-pressure chemical vapor deposition, plasma-enhanced chemical vapor deposition, magnetron sputtering, or atomic layer deposition processes.

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