Underwater sensor-bionic fish-unmanned aerial vehicle laser communication system

Abstract

The invention provides an underwater sensor-bionic fish-unmanned aerial vehicle laser communication system, and belongs to the technical field of laser communication. The underwater sensor-bionic fish-unmanned aerial vehicle cooperative system is constructed, the DPPM modulation and demodulation technology based on the FPGA is combined with the Raptor code error correction coding, the ambient light interference is effectively inhibited, and the weak signal recovery capability is improved. For a complex underwater environment, a corresponding anti-interference and tracking mechanism is designed for the system. When the communication modules of the underwater sensor, the bionic fish and the unmanned aerial vehicle face interference factors such as underwater turbulence and sea surface fluctuation, the stability of a laser communication link can be ensured through a staged tracking strategy, such as a real-time tracking mode and a recapture program. Blue-green laser is used as an information carrier, compared with traditional acoustic communication and radio communication, laser communication has higher bandwidth and data transmission rate, and the real-time transmission requirement of a large amount of data in marine environment monitoring can be met.

Description

Technical Field

[0001] This invention belongs to the field of laser communication technology, and in particular relates to a laser communication system for an underwater sensor-bionic fish-unmanned aerial vehicle. Background Technology

[0002] The need for real-time marine information is becoming increasingly urgent in numerous fields, including marine resource development, environmental monitoring, and military strategy. However, traditional marine monitoring and communication methods have many drawbacks. Acoustic communication, as the primary underwater communication method, has an extremely low data transmission rate of only a few kilobits per second, which is insufficient to meet the demand for real-time uploading of large amounts of sensor data. Moreover, sound waves are easily interfered with by marine environmental noise, such as current noise and noise generated by marine biological activity, which leads to an increased data transmission error rate. Radio communication performs even worse in the marine environment. Due to the absorption characteristics of seawater on radio waves, its effective transmission distance underwater is very limited, making direct communication between underwater and airborne platforms almost impossible.

[0003] With the development of marine monitoring technology, cross-air-water interface communication has become a research direction for solving the bottleneck problem of marine information transmission. Underwater sensor networks can sense various physical quantities in the marine environment in real time, such as temperature, salinity, pressure, and current velocity, as well as information on marine organisms and geology. The emergence of biomimetic fish technology has provided a new approach to underwater information transmission. Biomimetic fish can simulate the swimming behavior of real fish, move flexibly underwater, and have good maneuverability and stealth, serving as relay nodes between underwater sensors and aerial platforms. At the same time, the rapid development of UAV technology provides an efficient aerial information transmission platform for marine monitoring. UAVs have advantages such as rapid maneuverability and a wide field of view at high altitudes, enabling them to receive signals from the water surface or the air and further transmit them to land control centers, realizing the remote real-time acquisition of marine environmental monitoring data. Summary of the Invention

[0004] To address the aforementioned problems, this invention provides a laser communication system for an underwater sensor-bionic fish-UAV, comprising an underwater sensor communication module, a bionic fish communication module, and a UAV communication module. All three communication modules contain the same laser communication system, primarily including a transmitter circuit, a receiver circuit, and a main control circuit. The main control circuit comprises a Raptor code encoding unit, a Raptor code decoding unit, a DPPM modulation unit, a DPPM demodulation unit, a laser control unit, a receiver control unit, and a beam tracking unit. The Raptor code encoding unit encodes the preprocessed data, the Raptor code decoding unit is responsible for decoding the received encoded symbols and correcting errors using the Raptor error correction code; the DPPM modulation unit generates the modulated bit sequence according to the DPPM modulation rules; the DPPM demodulation unit demodulates the received pulse position signal to achieve reverse matching with the modulation process. The laser control unit is used to receive signals from the spot tracking unit, control the laser to send laser light, and control the rotation of the gimbal of the transmitting circuit to control the final direction of the laser. The receiving end control unit is used to control the PD array of the receiving end circuit. It uses FPGA to locate the signal intensity distribution of the PD array in real time and generates a spot offset output to the spot tracking unit. The spot tracking unit is used to receive the spot offset transmitted by the receiving control unit, calculate the direction that the MEMS needs to be adjusted, and send an adjustment signal to the MEMS mirror to drive the laser transmitting unit to adjust the laser emission direction, so as to ensure that the spot quickly returns to the center of the array and realize spot position tracking.

[0005] Preferably, the main control circuit of the underwater sensor communication module further includes a data preprocessing unit, which is used to preprocess the collected marine environmental data; the collected marine environmental data is subjected to noise filtering, outlier screening and format normalization processing in sequence, and the raw codeword U is formed after binary format conversion.

[0006] Preferably, the Raptor code encoding unit encodes the preprocessed data; the Raptor code constructs a sparse parity check matrix through the LDPC encoding module, maps the original data into information bits, and iteratively calculates the parity bits based on the belief propagation algorithm to generate intermediate codewords; the LT code encoding module constructs random connection relationships based on the robust solitary wave distribution, and performs distributed encoding on the intermediate codewords to form the final codeword M; The Raptor code decoding unit is responsible for decoding the received encoded symbols. First, it performs LT code decoding on the encoded symbols based on the belief propagation algorithm. It iteratively updates the symbol probability and corrects transmission errors by utilizing the random connection relationship between encoded symbols to generate intermediate codewords. Then, it performs LDPC code decoding by using the normalized minimum sum algorithm. It iteratively calculates the parity equation based on the pre-stored sparse parity check matrix, verifies the parity bits and corrects the information bits to obtain codeword U'. According to the DPPM modulation rules, the DPPM modulation unit first divides the encoded data into binary symbol segments of fixed length, and then maps each symbol segment to a pulse position on the time axis through a predefined mapping table. A single modulation period contains multiple equally spaced time slots, and each symbol segment corresponds to the activation state of a specific time slot, thereby generating a modulated bit sequence. The DPPM demodulation unit demodulates the received pulse position signal, identifies the time slot position of the pulse within the modulation period according to the DPPM modulation rules, reversely reconstructs a fixed-length binary symbol segment through a predefined mapping table, and concatenates it in sequence to obtain the encoded data, providing input to the Raptor code decoding unit and realizing reverse matching with the modulation process.

[0007] Preferably, the Raptor coding unit adopts a hybrid architecture of concatenated LDPC coding and LT coding, specifically including an LDPC coding module, an LT coding module and an interleaving module; The LDPC encoding module is based on A standard sparse parity-check matrix is ​​stored in RAM in a row-compressed manner, containing the indices of non-zero elements. During encoding, RAM reads the row data of the parity-check matrix, and in conjunction with the FPGA's parallel XOR tree architecture, the generated matrix is... The multiplication method is transformed into a pipelined XOR operation, iteratively generating a check bit. Bit information bits and The check bits are concatenated to form a check digit. Middle code character; The LT encoding module takes the codeword output from the interleaving module as input, randomly generates a degree d based on an optimized degree distribution function, and the FPGA quickly maps the degree distribution function through a ROM lookup table. It uses an LFSR linear feedback shift register to generate a random index, and in conjunction with a dual-port RAM, reads d elements of the intermediate codeword in parallel. A hierarchical pipeline architecture with a hardware parallel XOR tree performs an XOR operation on the selected elements to generate a redundant encoded packet sequence. The FPGA employs a pipelined hardware logic design, with the LFSR continuously outputting random numbers and the XOR tree performing operations periodically, achieving rapid XOR and random number generation to adapt to sudden errors and packet loss issues in underwater channels. The interleaving module is performed between the LDPC encoding module and the LT encoding module. It rearranges the input intermediate codewords by shuffling the data bit order using an interleaving matrix, thereby reducing the impact of consecutive errors.

[0008] Preferably, the Raptor code decoding unit adopts an architecture corresponding to the Raptor code encoding unit, including a deinterleaving module, an LT decoding module, and an LDPC decoding module; The deinterleaving module takes the output of the LT decoding module as input and restores the data bit order adjustment made by the interleaving module by rearranging the data bits in reverse order through the inverse interleaving matrix, so that the receiving end can correctly decode the transmitted data. The deinterleaved data will be passed to the subsequent LDPC decoding module for final information recovery. The LT decoding module takes the data received by the receiver as input. This module works based on the inverse process of the degree distribution at the encoder. First, it initializes the intermediate codeword confidence array and stores it in the FPGA dual-port RAM. Then, it processes each redundant encoded packet in sequence, parses the degree d and random index sequence in the packet header, and reconstructs the code selection logic at the encoder through LFSR. Using hardware parallel XOR units, it verifies in real time the consistency between the XOR result of the corresponding d codewords in RAM and the encoded packet data. If they match, it updates the confidence of the d codewords through the confidence propagation algorithm. The FPGA drives the iteration through a pipelined state machine, completing the parsing, XOR verification and confidence update of one encoded packet in each cycle. It continues to iterate until the codeword confidence converges, gradually recovering the intermediate codewords pre-encoded by LDPC. The LDPC decoding module receives the codewords output by the deinterleaving module and performs decoding operations based on the sparse parity-check matrix of the IEEE 802.16e standard. The RAM stores the non-zero element indices of the parity-check matrix in compressed rows. First, the log-likelihood ratio of the intermediate codewords is stored in the variable node RAM for initialization. The normalized minimum sum algorithm is used for iteration. In the variable node stage, according to the connection relationship of the parity-check matrix, the associated parity-check node messages are read to calculate the new LLR. In the parity-check node stage, the minimum sum operation is performed on the parity-check equation to generate feedback messages. The FPGA completes a node update once per cycle through RAM time-division multiplexing, sparse node parallel processing and pipeline architecture. Iteration continues until the threshold is reached. Finally, the hard decision is extracted from the variable node RAM to recover the original k-bit information bits.

[0009] Preferably, the DPPM modulation unit mainly consists of a data input buffer module, a symbol mapping module, a pulse waveform generation module, a synchronization header insertion module, and a digital-to-analog conversion interface module. The data input buffer module mainly receives the encoded data stream from the interleaving module and buffers it in groups according to the sign bit width; The symbol mapping module maps the data to N time slot symbol positions; The pulse waveform generation module is responsible for generating pulse signals in specific time slots based on the symbol mapping results; The synchronization header insertion module is responsible for adding a synchronization sequence to the header of the data frame; The digital-to-analog conversion interface module is responsible for converting digital pulse signals into analog drive signals.

[0010] Preferably, the DPPM demodulation unit mainly consists of an analog-to-digital conversion preprocessing module, a synchronization head detection module, a pulse energy integration module, a peak detection and symbol decision module, and a data reconstruction output module. The synchronization header detection module is responsible for detecting the frame synchronization position; The pulse energy integration module is responsible for calculating the energy value of each time slot within the symbol period; The peak detection and symbol determination module is mainly responsible for determining the time slot position of the pulse. The data reconstruction output module is mainly responsible for converting demodulated symbols into binary data streams.

[0011] Preferably, the LDPC encoding module consists of an information bit loading module, a check matrix storage module, a matrix multiplication module, a cyclic shift module, and a system code generation module; The information bit loading module is responsible for receiving the original k-bit information bits from the external interface and caching them inside the FPGA to prepare for subsequent encoding. The parity check matrix storage module uses the FPGA's single-port RAM to store the IEEE 802.16e standard sparse parity check matrix, and adopts a reasonable layout for easy and fast access. The matrix multiplication module utilizes the parallel computing capabilities of the FPGA to generate the matrix. Row data is stored in RAM. RAM reads matrix row data in parallel. Matrix elements are ANDed with their corresponding information bits bit by bit. Column-wise accumulation is completed using a carry-lookahead addition tree. If the accumulation result exceeds the bit width, the overflowing high bits are wrapped back to the low bits according to the encoding rules, thus achieving the AND operation between information bits. Multiplication, carry, and overflow; The cyclic shift module performs cyclic shift operations on the matrix multiplication results according to the encoding rules, which is implemented through shift registers and logic circuits; The system code generation module combines the information bits and the check bits into a system code containing both, and outputs it to the subsequent modules after correctly concatenating and arranging them.

[0012] Preferably, the LT encoding module consists of an intermediate codeword buffer module, a degree distribution function generation module, an element selection module, an XOR operation module, and an encoding packet output module; The intermediate codeword caching module is responsible for receiving and caching the intermediate codewords output by LDPC precoding, so that they can be quickly accessed in subsequent encoding operations. The degree distribution function generation module pre-stores the optimized degree distribution probability table in the FPGA's ROM, uses a linear feedback shift register to generate random numbers, and normalizes these random numbers to match the ROM address range, using them as the ROM's read address. The ROM outputs the corresponding degree value based on the input address. d Randomness is achieved through continuous iteration of pipeline logic.d Hardware-based generation; The element selection module is based on the generated degree d The corresponding element is randomly selected from the intermediate codeword cache using a random index; The XOR operation module receives randomly selected... d Each intermediate codeword element is internally constructed using a parallel XOR tree architecture within the FPGA hardware. d The input paths are grouped according to the binary tree hierarchy. Each level performs parallel operations using XOR gates implemented by LUTs, and the results are piped through the hierarchy. At the same time, the enable signal is dynamically adapted. d Each cycle completes a set of XOR operations to generate a redundant encoded packet sequence, achieving hardware parallel acceleration of computation. The encoding packet output module formats and encapsulates the encoding packet sequence obtained by the XOR operation and outputs it to the interleaving module or communication link.

[0013] Preferably, the deinterleaving module comprises a receive data buffer module, a deinterleaving operation module, and a deinterleaving data output module: The receiving data buffer module is responsible for receiving data that has been transmitted and interleaved through the underwater channel and buffering it inside the FPGA to provide a stable data source for subsequent deinterleaving operations. The deinterleaving operation module, based on the read interleaving rules, utilizes the logic circuits and storage resources inside the FPGA to restore the received data in the opposite interleaving mode through address mapping and data exchange, which is the opposite of the interleaving process. The deinterleaved data output module is responsible for formatting and encapsulating the deinterleaved data, and then outputting it to the subsequent LT decoding module.

[0014] Preferably, the deinterleaving module comprises a receive data buffer module, a deinterleaving operation module, and a deinterleaving data output module; The receiving data buffer module is responsible for receiving data that has been transmitted and interleaved through the underwater channel and buffering it inside the FPGA to provide a stable data source for subsequent deinterleaving operations. The deinterleaving operation module, based on the read interleaving rules, utilizes the logic circuits and storage resources inside the FPGA to restore the received data in the opposite interleaving mode through address mapping and data exchange, which is the opposite of the interleaving process. The deinterleaved data output module is responsible for formatting and encapsulating the deinterleaved data, and then outputting it to the subsequent LT decoding module.

[0015] Preferably, the LT decoding module consists of a deinterleaved data receiving module, a degree distribution inverse function module, an XOR relation parsing module, an intermediate codeword estimation and update module, and an intermediate codeword output module. The deinterleaving data receiving module is responsible for receiving the data output by the deinterleaving module and buffering it inside the FPGA to provide a data basis for subsequent decoding operations. The inverse degree distribution function module is responsible for using FPGA hardware logic to reverse the derivation of degree values, providing a basis for subsequent element selection and XOR relationship analysis; XOR relation parsing module: Parses the XOR relation and randomly selected information in the received encoded packet to identify the correlation between intermediate codeword elements; The intermediate codeword estimation and update module utilizes FPGA hardware logic to implement efficient XOR operations and iterative decoding algorithms. Based on the received encoded packets and the parsed XOR relationship, it continuously updates the estimation of the intermediate codewords output by the LDPC pre-encoding. The intermediate codeword output module outputs the estimated intermediate codeword to the subsequent LDPC decoding module.

[0016] Preferably, the LDPC decoding module consists of an intermediate codeword receiving module, a parity check matrix reading module, a message passing iteration module, and an information bit recovery module: The intermediate codeword receiving module will receive the intermediate codeword estimate output by the LT decoding module and cache it inside the FPGA to provide data for subsequent decoding operations; The parity check matrix reading module is responsible for reading the sparse parity check matrix of the IEEE 802.16e standard from the single-port RAM of the FPGA for subsequent verification and decoding operations. The message passing iteration module is responsible for using the verification relationship defined by the verification matrix, and through the iterative message passing algorithm, leveraging the parallel computing capabilities of the FPGA, to perform efficient matrix multiplication and XOR operations in the single-port RAM, to perform multiple iterative verifications and decodings on the intermediate codeword, and gradually correct any erroneous bits. The information bit recovery module is responsible for extracting the original k-bit information bits from the final intermediate codeword and outputting it as the decoding result.

[0017] Preferably, the laser is a narrow-line laser.

[0018] Preferably, the communication modules in the underwater sensor, the bionic fish, and the drone are identical; however, the communication module of the bionic fish contains a gimbal. The gimbal is controlled by a main control circuit. When the bionic fish communicates with the underwater sensor, the main control circuit controls the rotation of the gimbals in the transmitting and receiving circuits, allowing the laser beam hitting the pendulum mirror to be transmitted downwards to communicate with the underwater sensor, enabling the MEMS mirror to receive the laser beam from the underwater sensor. When the bionic fish communicates with the drone, the main control circuit controls the rotation of the gimbals in the transmitting and receiving circuits, allowing the laser beam hitting the pendulum mirror to be transmitted upwards to communicate with the drone, enabling the MEMS mirror to receive the laser beam from the drone.

[0019] Compared with the prior art, the present invention has the following beneficial effects: This invention constructs an underwater sensor-bionic fish-UAV collaborative system. The system employs FPGA-based DPPM modulation and demodulation technology combined with Raptor code error correction coding to effectively suppress ambient light interference and improve weak signal recovery capabilities. For complex underwater environments, the system is designed with corresponding anti-interference and tracking mechanisms. When facing interference factors such as underwater turbulence and sea surface fluctuations, the communication modules of the underwater sensor, bionic fish, and UAV can ensure the stability of the laser communication link through a phased tracking strategy, such as a real-time tracking mode and a re-acquisition procedure. Utilizing blue-green lasers as the information carrier, compared to traditional acoustic and radio communications, laser communication has higher bandwidth and data transmission rates, meeting the real-time transmission needs of large amounts of data in marine environmental monitoring. Attached Figure Description

[0020] To more clearly illustrate the technical solutions of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the following description is only one embodiment of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is the overall communication optical path diagram provided in the embodiments of the present invention.

[0022] Figure 2 This is a schematic diagram of laser communication between an underwater sensor, a biomimetic fish, and a drone, provided in an embodiment of the present invention.

[0023] Figure 3 This is a schematic diagram of the laser communication module structure provided in Embodiment 1 of the present invention.

[0024] Figure 4 This is a flowchart of the underwater sensor-bionic fish communication process provided in Embodiment 1 of the present invention.

[0025] Figure 5 This is a flowchart of laser communication tracking provided in Embodiment 1 of the present invention.

[0026] Figure 6 This is the first data flow diagram provided in Embodiment 1 of the present invention.

[0027] Figure 7 This is the second data flow diagram provided in Embodiment 1 of the present invention.

[0028] Figure 8 This is a graph showing the LT code decoding performance under different deletion rates provided in Embodiment 2 of the present invention.

[0029] Figure 9This is a schematic diagram of the LT code decoding recovery rate provided in Embodiment 2 of the present invention.

[0030] Figure 10 This is a schematic diagram illustrating the effect of wind speed on the center offset of the light spot, provided in Embodiment 2 of the present invention.

[0031] In the diagram: 1. Universal joint; 2. MEMS mirror; 3. Laser; 4. Beam expander; 5. PD array; 6. FPGA; 7. Transmitter circuit; 8. Main control circuit; 9. Receiver circuit; 10. Narrowband filter. Detailed Implementation

[0032] The invention will be further described below with reference to specific embodiments.

[0033] Example 1: The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0034] like Figure 1 As shown, the overall communication system mainly includes an underwater sensor communication module, a bionic fish communication module, and a drone communication module. The underwater sensor communication module collects data from different marine environments and transmits it to the bionic fish above via laser communication; the bionic fish communication module collects and integrates the underwater sensor data and then sends it to the drone above the water via laser communication; the drone communication module transmits the data to the land control center or other monitoring platforms.

[0035] like Figure 2 , Figure 3 As shown, the underwater sensor communication module, the biomimetic fish communication module, and the UAV communication module all contain the same laser communication system, including a transmitter circuit 7, a receiver circuit 9, and a main control circuit 8. The transmitter circuit includes a narrow-line laser 3, a beam expander 4, and a MEMS mirror 2; the main control circuit includes an FPGA board 6; and the receiver circuit includes a PD array 5. Narrow-band filters 10 are integrated into the optical paths of both the transmitter and receiver, placed before the PD array to filter out background light and improve the signal-to-noise ratio of the received signal.

[0036] The biomimetic fish communication module also includes a gimbal 1 in its transmitter and receiver circuits, which is controlled by the main control circuit. When communicating with an underwater sensor, the main control circuit controls the rotation of the gimbal 1 to transmit the laser downwards and receive the laser from the underwater sensor; when communicating with a drone, it controls the rotation of the gimbal 1 to transmit the laser upwards and receive the laser from the drone.

[0037] The MEMS mirror rotates based on the offset of the light spot position on the PD array. The main control circuit locates the centroid of the light spot image acquired by the PD array using the gray-scale centroid method, and uses FPGA hardware acceleration to realize the light spot position detection, generate MEMS mirror rotation control signals, and dynamically adjust the mirror angle to align with the target light source.

[0038] like Figure 4 As shown, in the initial stage of establishing a communication link, taking the communication between a bionic fish and an underwater sensor as an example: the bionic fish first emits a low-frequency sonar signal, and the underwater sensor receives it, verifies its identity, and turns on the laser and PD array. After swimming to the vicinity of the sensor, the bionic fish swims in a spiral pattern to search for the light spot. It adjusts its position by adjusting the light spot offset until it is aligned with the center of the PD array, and finally establishes a communication link and begins data transmission.

[0039] like Figure 5 As shown, to address the optical path jitter and offset caused by underwater turbulence and sea surface fluctuations, the system adopts a phased tracking strategy: in the initial stage of communication, precise alignment is used to lay the foundation; during continuous communication, the position of the light spot is detected in real time; if the offset is small and not lower than the light intensity threshold, communication continues; if the offset is large and lower than the threshold, the main control module calculates the offset and direction, and drives the MEMS mirror to adjust so that the light spot returns to the center of the PD array; if the light spot leaves the array range, the bionic fish initiates a recapture program, expanding the search and adjusting the laser parameters in a spiral path until the connection is re-established.

[0040] like Figure 6 and Figure 7 As shown, the system employs FPGA-based Differential Pulse Position Modulation (DPPM) technology, combined with Raptor codes for error correction coding, to achieve a modulation effect with low bit error rate and large communication bandwidth. DPPM modulation maps data to different pulse position signals to generate modulated bit sequences, effectively utilizing the time slot characteristics of optical signals and improving communication efficiency. Simultaneously, Raptor codes, through a hybrid architecture of cascaded LDPC coding and LT codes, preprocess and encode the data, generating codewords containing redundant information to enhance data transmission reliability. This coding and modulation method not only improves the system's anti-interference capability but also ensures that data can be transmitted at a high rate and low bit error rate in complex underwater environments.

[0041] The main control circuits of each module in the system all use FPGAs for DPPM modulation and demodulation, and Raptor code encoding and decoding. The main control circuit of the underwater sensor communication module includes a data preprocessing unit, a Raptor code encoding unit, a Raptor code decoding unit, a DPPM modulation unit, a DPPM demodulation unit, a laser control unit, and a receiver control unit; the main control circuits of the biomimetic fish and UAV communication modules mainly include a Raptor code encoding unit, a Raptor code decoding unit, a DPPM modulation unit, a DPPM demodulation unit, a laser control unit, and a receiver control unit.

[0042] The LDPC encoding module of the Raptor encoding unit is based on the IEEE 802.16e standard sparse parity-check matrix. It utilizes FPGA parallel computing and stores the parity-check matrix in a single-port RAM to generate system codes through matrix multiplication and XOR operations. The LT encoding module takes the intermediate codeword output from the LDPC precoding as input and randomly generates degrees based on the optimized degree distribution function. d The d elements are XORed to generate a redundant encoded packet sequence. The interleaving module performs interleaving processing on the encoded data. The Raptor code decoding unit adopts the corresponding architecture, the deinterleaving module restores the data according to the interleaving rules, and the LT decoding module and LDPC decoding module sequentially recover the intermediate codewords and the original information bits.

[0043] The DPPM modulation unit receives and buffers the encoded data stream packets, maps them to N time-slot symbol positions, generates specific time-slot pulse signals, adds synchronization sequences, and converts digital pulses into analog drive signals. The DPPM demodulation unit digitizes the received signal, detects frame synchronization positions, calculates the energy value of each time slot within the symbol period, determines the pulse time-slot position, and converts the demodulated symbols into a binary data stream. The laser control unit controls a 488nm laser to convert the modulated bit sequence into blue-green laser signals for transmission. The receiver control unit controls the MEMS mirrors and PD array in the receiver circuitry to ensure the signal is projected onto the PD array and adjusts it in real time.

[0044] The underwater sensor-bionic fish-UAV laser communication system proposed in this invention adopts dual-channel communication.

[0045] Example 2: Underwater sensors collect marine environmental data in real time. After preprocessing by the internal main control module, the data awaits transmission commands. Based on pre-stored GPS location information from the underwater sensors, the bionic fish swims to the vicinity. The main control module activates the laser to emit a laser signal, simultaneously controlling the PD array to enter receiving mode and emitting a low-frequency acoustic signal. The underwater sensor's piezoelectric sonar receives the acoustic signal. After successful decoding and verification, the main control module immediately activates the laser to emit a laser signal carrying environmental data, while simultaneously turning on the PD array to prepare for reception.

[0046] After receiving laser signals from an underwater sensor, the bionic fish calculates its swimming path and direction adjustment strategy based on the laser spot position data from the PD array. It then swims precisely using its pectoral fins and servos, continuously emitting laser signals carrying its own status information. The underwater sensor receives these signals and sends feedback laser signals, including status data such as the laser spot position. Based on this feedback, the bionic fish continues to adjust, aligning the laser spot with the center of gravity of the PD array. Upon confirmation, it notifies the sensor to begin transmitting data, completing the communication between the underwater sensor and the bionic fish.

[0047] The biomimetic fish integrates data from multiple sensors and, based on pre-stored optimal positions and times for communication with the drone, reaches a designated location. The main control module activates the laser emission and reception modules, controlling the MEMS mirror to rotate rapidly and precisely, emitting blue-green laser beams upwards and scanning for targets. Simultaneously, it slowly swims to monitor the laser signals returned by the drone. The drone reaches the designated airspace along a preset path and activates the laser reception module. Once the biomimetic fish receives and confirms the drone's laser signal, the drone sends a feedback laser signal containing status data such as the laser spot's position. The biomimetic fish adjusts its swimming direction and attitude based on the feedback. Through multiple interactions, a stable laser communication link is established, and the biomimetic fish sends the integrated data to the drone.

[0048] During communication, if the light spot shifts due to underwater turbulence or sea surface fluctuations, the system activates a tracking strategy. It continuously monitors the light spot position; if the shift is small and not below the light intensity threshold, communication continues. If the shift is large and below the threshold, the main control module calculates the shift and direction, driving the MEMS mirror to adjust and bring the light spot back to the center of the PD array. If the light spot is not on the PD array, the bionic fish initiates a recapture procedure, swimming slowly in a spiral path, adjusting the laser emission direction and parameters to expand the search. Upon receiving a feedback signal, it calculates a new alignment angle and swimming direction based on the signal strength and direction, approaches the target node, re-enters real-time tracking mode, and uses the PD array and MEMS mirror to collaboratively adjust the beam direction, restoring the communication link.

[0049] Simulation experiment: Conduct LT code decoding simulation. For example... Figure 8 The graph showing "LT code decoding performance at different deletion rates" indicates that when the deletion rate is ≤30%, the decoding success rate exceeds 95%; even at 35%, it still reaches approximately 83%. Combined with... Figure 9 The "LT code decoding recovery rate" graph shows that in low deletion rate scenarios, the recovery rate remains stable above 98%; while in high deletion rate scenarios of 45%, the recovery rate is around 85%. This demonstrates the significant advantages of the Raptor code architecture (cascaded LDPC and LT code). In high deletion rate channels, the LT code recovers over 80% of the data first, followed by LDPC repair, ensuring stable communication in complex underwater environments.

[0050] like Figure 10As shown, in a cross-air-water interface transmission scenario, the position of the receiver's light spot will shift due to wave action. The maximum mechanical deflection angle of the MEMS mirror used at the transmitter is ±5°. As shown in the simulation results below, the maximum offset of the beam transmission distance is 5 meters when the beam travels 120 meters in waves generated by different wind speeds. This offset is within the range that the MEMS mirror can compensate for, which meets the system design requirements.

[0051] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

[0052] While the specific embodiments of the present invention have been described above, they are not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art without creative effort based on the technical solutions of the present invention are still within the scope of protection of the present invention.

Claims

1. A laser communication system for an underwater sensor-bionic fish-UAV, comprising an underwater sensor communication module, a bionic fish communication module, and a UAV communication module, all three communication modules containing the same laser communication system, mainly including a transmitter circuit, a receiver circuit, and a main control circuit; characterized in that: The main control circuit includes a Raptor code encoding unit, a Raptor code decoding unit, a DPPM modulation unit, a DPPM demodulation unit, a laser control unit, a receiver control unit, and a spot tracking unit. The Raptor code encoding unit encodes the preprocessed data, the Raptor code decoding unit is responsible for decoding the received encoded symbols and correcting errors using the Raptor error correction code; the DPPM modulation unit generates the modulated bit sequence according to the DPPM modulation rules; the DPPM demodulation unit demodulates the received pulse position signal to achieve reverse matching with the modulation process. The laser control unit is used to receive signals from the spot tracking unit, control the laser to send laser light, and control the rotation of the gimbal of the transmitting circuit to control the final direction of the laser. The receiving end control unit is used to control the PD array of the receiving end circuit. It uses FPGA to locate the signal intensity distribution of the PD array in real time and generates a spot offset output to the spot tracking unit. The spot tracking unit is used to receive the spot offset transmitted by the receiving control unit, calculate the direction that the MEMS needs to be adjusted, and send an adjustment signal to the MEMS mirror to drive the laser transmitting unit to adjust the laser emission direction, so as to ensure that the spot quickly returns to the center of the array and realize spot position tracking.

2. The underwater sensor-bionic fish-UAV laser communication system as described in claim 1, characterized in that: The Raptor code encoding unit encodes the preprocessed data; the Raptor code constructs a sparse parity check matrix through the LDPC encoding module, maps the original data into information bits, and iteratively calculates the parity bits based on the belief propagation algorithm to generate intermediate codewords; the LT code encoding module constructs random connection relationships based on the robust solitary wave distribution, and performs distributed encoding on the intermediate codewords to form the final codeword M. The Raptor code decoding unit is responsible for decoding the received encoded symbols. First, it performs LT code decoding on the encoded symbols based on the belief propagation algorithm. It iteratively updates the symbol probability and corrects transmission errors by utilizing the random connection relationship between encoded symbols to generate intermediate codewords. Then, it performs LDPC code decoding by using the normalized minimum sum algorithm. It iteratively calculates the parity equation based on the pre-stored sparse parity check matrix, verifies the parity bits and corrects the information bits to obtain codeword U'. According to the DPPM modulation rules, the DPPM modulation unit first divides the encoded data into binary symbol segments of fixed length, and then maps each symbol segment to a pulse position on the time axis through a predefined mapping table. A single modulation period contains multiple equally spaced time slots, and each symbol segment corresponds to the activation state of a specific time slot, thereby generating a modulated bit sequence. The DPPM demodulation unit demodulates the received pulse position signal, identifies the time slot position of the pulse within the modulation period according to the DPPM modulation rules, reversely reconstructs a fixed-length binary symbol segment through a predefined mapping table, and concatenates it in sequence to obtain the encoded data, providing input to the Raptor code decoding unit and realizing reverse matching with the modulation process.

3. A laser communication system for an underwater sensor-bionic fish-UAV as described in claim 1 or 2, characterized in that: The Raptor coding unit adopts a hybrid architecture of concatenated LDPC coding and LT coding, specifically including an LDPC coding module, an LT coding module and an interleaving module; The LDPC encoding module is based on A standard sparse parity-check matrix is ​​stored in RAM in a row-compressed manner, containing the indices of non-zero elements. During encoding, RAM reads the row data of the parity-check matrix, and in conjunction with the FPGA's parallel XOR tree architecture, the generated matrix is... The multiplication method is transformed into a pipelined XOR operation, iteratively generating a check bit. Bit information bits and The check bits are concatenated to form a check digit. Middle code character; The LT encoding module takes the codeword output from the interleaving module as input, randomly generates a degree d based on an optimized degree distribution function, and the FPGA quickly maps the degree distribution function through a ROM lookup table. It uses an LFSR linear feedback shift register to generate a random index, and in conjunction with a dual-port RAM, reads d elements of the intermediate codeword in parallel. A hierarchical pipeline architecture with a hardware parallel XOR tree performs an XOR operation on the selected elements to generate a redundant encoded packet sequence. The FPGA employs a pipelined hardware logic design, with the LFSR continuously outputting random numbers and the XOR tree performing operations periodically, achieving rapid XOR and random number generation to adapt to sudden errors and packet loss issues in underwater channels. The interleaving module is performed between the LDPC encoding module and the LT encoding module. It rearranges the input intermediate codewords by shuffling the data bit order using an interleaving matrix, thereby reducing the impact of consecutive errors.

4. A laser communication system for an underwater sensor-bionic fish-UAV as described in claim 1 or 2, characterized in that: The Raptor code decoding unit adopts an architecture corresponding to the Raptor code encoding unit, including a deinterleaving module, an LT decoding module, and an LDPC decoding module; The deinterleaving module takes the output of the LT decoding module as input and restores the data bit order adjustment made by the interleaving module by rearranging the data bits in reverse order through the inverse interleaving matrix, so that the receiving end can correctly decode the transmitted data. The deinterleaved data will be passed to the subsequent LDPC decoding module for final information recovery. The LT decoding module takes the data received by the receiver as input. This module works based on the inverse process of the degree distribution at the encoder. First, it initializes the intermediate codeword confidence array and stores it in the FPGA dual-port RAM. Then, it processes each redundant encoded packet in sequence, parses the degree d and random index sequence in the packet header, and reconstructs the code selection logic at the encoder through LFSR. Using hardware parallel XOR units, it verifies in real time the consistency between the XOR result of the corresponding d codewords in RAM and the encoded packet data. If they match, it updates the confidence of the d codewords through the confidence propagation algorithm. The FPGA drives the iteration through a pipelined state machine, completing the parsing, XOR verification and confidence update of one encoded packet in each cycle. It continues to iterate until the codeword confidence converges, gradually recovering the intermediate codewords pre-encoded by LDPC. The LDPC decoding module receives the codewords output by the deinterleaving module and performs decoding operations based on the sparse parity-check matrix of the IEEE 802.16e standard. The RAM stores the non-zero element indices of the parity-check matrix in compressed rows. First, the log-likelihood ratio of the intermediate codewords is stored in the variable node RAM for initialization. The normalized minimum sum algorithm is used for iteration. In the variable node stage, according to the connection relationship of the parity-check matrix, the associated parity-check node messages are read to calculate the new LLR. In the parity-check node stage, the minimum sum operation is performed on the parity-check equation to generate feedback messages. The FPGA completes a node update once per cycle through RAM time-division multiplexing, sparse node parallel processing and pipeline architecture. Iteration continues until the threshold is reached. Finally, the hard decision is extracted from the variable node RAM to recover the original k-bit information bits.

5. A laser communication system for an underwater sensor-bionic fish-UAV as described in claim 1 or 2, characterized in that: The DPPM modulation unit mainly consists of a data input buffer module, a symbol mapping module, a pulse waveform generation module, a synchronization header insertion module, and a digital-to-analog conversion interface module. The data input buffer module mainly receives the encoded data stream from the interleaving module and buffers it in groups according to the sign bit width; The symbol mapping module maps the data to N time slot symbol positions; The pulse waveform generation module is responsible for generating pulse signals in specific time slots based on the symbol mapping results; The synchronization header insertion module is responsible for adding a synchronization sequence to the header of the data frame; The digital-to-analog conversion interface module is responsible for converting digital pulse signals into analog drive signals.

6. A laser communication system for an underwater sensor-bionic fish-UAV as described in claim 1 or 2, characterized in that: The DPPM demodulation unit mainly consists of an analog-to-digital conversion preprocessing module, a synchronization head detection module, a pulse energy integration module, a peak detection and symbol decision module, and a data reconstruction and output module. The synchronization header detection module is responsible for detecting the frame synchronization position; The pulse energy integration module is responsible for calculating the energy value of each time slot within the symbol period; The peak detection and symbol determination module is mainly responsible for determining the time slot position of the pulse. The data reconstruction output module is mainly responsible for converting demodulated symbols into binary data streams.

7. The underwater sensor-bionic fish-UAV laser communication system as described in claim 3, characterized in that: The LDPC encoding module consists of an information bit loading module, a check matrix storage module, a matrix multiplication module, a cyclic shift module, and a system code generation module. The information bit loading module is responsible for receiving the original k-bit information bits from the external interface and caching them inside the FPGA to prepare for subsequent encoding. The parity check matrix storage module uses the FPGA's single-port RAM to store the IEEE 802.16e standard sparse parity check matrix, and adopts a reasonable layout for easy and fast access. The matrix multiplication module utilizes the parallel computing capabilities of the FPGA to generate the matrix. Row data is stored in RAM. RAM reads matrix row data in parallel. Matrix elements are ANDed with their corresponding information bits bit by bit. Column-wise accumulation is completed using a carry-lookahead addition tree. If the accumulation result exceeds the bit width, the overflowing high bits are wrapped back to the low bits according to the encoding rules, thus achieving the AND operation between information bits. Multiplication, carry, and overflow; The cyclic shift module performs cyclic shift operations on the matrix multiplication results according to the encoding rules, which is implemented through shift registers and logic circuits; The system code generation module combines the information bits and the check bits into a system code containing both, and outputs it to the subsequent modules after correctly concatenating and arranging them.

8. The underwater sensor-bionic fish-UAV laser communication system as described in claim 3, characterized in that: The LT encoding module consists of an intermediate codeword buffer module, a degree distribution function generation module, an element selection module, an XOR operation module, and an encoding packet output module; The intermediate codeword caching module is responsible for receiving and caching the intermediate codewords output by LDPC precoding, so that subsequent encoding operations can quickly access them; The degree distribution function generation module pre-stores the optimized degree distribution probability table in the FPGA's ROM, uses a linear feedback shift register to generate random numbers, and normalizes these random numbers to match the ROM address range, using them as the ROM's read address. The ROM outputs the corresponding degree value based on the input address. d Randomness is achieved through continuous iteration of pipeline logic. d Hardware-based generation; The element selection module is based on the generated degree d The corresponding element is randomly selected from the intermediate codeword cache using a random index; The XOR operation module receives randomly selected... d Each intermediate codeword element is internally constructed using a parallel XOR tree architecture within the FPGA hardware. d The input paths are grouped according to the binary tree hierarchy. Each level performs parallel operations using XOR gates implemented by LUTs, and the results are piped through the hierarchy. At the same time, the enable signal is dynamically adapted. d Each cycle completes a set of XOR operations to generate a redundant encoded packet sequence, achieving hardware parallel acceleration of computation. The encoding packet output module formats and encapsulates the encoding packet sequence obtained by the XOR operation and outputs it to the interleaving module or communication link.

9. The underwater sensor-bionic fish-UAV laser communication system as described in claim 3, characterized in that: The deinterleaving module consists of a receive data buffer module, a deinterleaving operation module, and a deinterleaving data output module. The receiving data buffer module is responsible for receiving data that has been transmitted and interleaved through the underwater channel and buffering it inside the FPGA to provide a stable data source for subsequent deinterleaving operations. The deinterleaving operation module, based on the read interleaving rules, utilizes the logic circuits and storage resources inside the FPGA to restore the received data in the opposite interleaving mode through address mapping and data exchange, which is the opposite of the interleaving process. The deinterleaved data output module is responsible for formatting and encapsulating the deinterleaved data, and then outputting it to the subsequent LT decoding module.

10. The underwater sensor-bionic fish-UAV laser communication system as described in claim 1, characterized in that: The main control circuit of the underwater sensor communication module also includes a data preprocessing unit, which is used to preprocess the collected marine environmental data; the collected marine environmental data is subjected to noise filtering, outlier screening and format normalization in sequence, and the raw codeword U is formed after binary format conversion.

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