Back contact topcon crystalline silicon solar cell with local pn junction and preparation method thereof

Abstract

The application relates to the technical field of solar cells, in particular to a back contact TOPCon crystalline silicon solar cell with a local pn junction and a preparation method thereof. The method comprises the following steps: S1, forming a TOPCon structure on the back surface of an n-type silicon substrate; S2, forming a dielectric film on the front surface of the n-type silicon substrate and the back surface of the TOPCon structure; S3, printing a slurry containing aluminum metal on the dielectric film on the back surface and performing sintering treatment, so as to form a p + region in a local area of the n-type silicon substrate, so that the n-type silicon substrate is locally inverted in the corresponding area, a local pn junction is formed, and a depletion layer is formed between the p + region and the n-type silicon substrate; and S4, forming positive and negative electrode grid lines on the back surface, so as to obtain the back contact TOPCon crystalline silicon solar cell. By forming the local p + region in the local area of the back surface, the local inversion and junction formation are realized, the energy consumption and process complexity can be significantly reduced, and the silicon surface defect state density is reduced.

Description

Technical Field

[0001] This invention relates to the field of solar cell technology, specifically to a back-contact TOPCon crystalline silicon solar cell with a localized pn junction and its fabrication method. Background Technology

[0002] Crystalline silicon solar cells dominate the photovoltaic industry due to their high conversion efficiency, mature technology, and high reliability. Among them, the Tunnel Oxide Passivated Contact (TOPCon) technology, by introducing an ultra-thin tunneling oxide layer and a doped polycrystalline silicon layer on the silicon substrate surface, achieves highly efficient selective carrier transport and interface passivation, and is considered one of the mainstream technologies for crystalline silicon solar cells now and for some time to come. Existing TOPCon crystalline silicon solar cells typically use n-type silicon wafers as the substrate, with the front side formed into a planar p-type structure through a high-temperature boron diffusion process. + The / n junction utilizes a tunneling oxide / doped polycrystalline silicon structure on the back side to achieve fully passivated contacts. While this fabrication route achieves high photoelectric conversion efficiency, the light-shielding effect of the front-side grid electrodes is a bottleneck limiting further efficiency improvements. Therefore, back-contact TOPCon crystalline silicon solar cells (TBCs) fabricate both positive and negative grid electrodes on the back side of the cell, thereby further improving the light utilization and photoelectric conversion efficiency. However, the overall process flow of back-contact TOPCon crystalline silicon solar cells is relatively complex, with high manufacturing costs, and many technical challenges remain in practical applications.

[0003] Firstly, simultaneously fabricating p-regions and n-regions on the back side requires sophisticated patterning techniques, such as laser or photolithography. The high-temperature ablation of lasers can damage the battery substrate and film layers, while photolithography requires photoresist, a photolithography machine, and chemical cleaning, undoubtedly increasing the complexity and cost of the process.

[0004] Secondly, in terms of metallization, the current common practice is to screen-print silver paste grid lines and sinter them at high temperatures to form ohmic contacts with the silicon substrate. However, silver paste is expensive, which significantly increases the cost of metallization and limits the application of lower-cost silver-coated copper pastes.

[0005] Third, the p-region and n-region require a GAP (electrical isolation zone) for electrical isolation, but there is still a serious problem of edge leakage.

[0006] Therefore, there is an urgent need to provide a novel back-contact TOPCon crystalline silicon solar cell fabrication process to solve the above problems. Summary of the Invention

[0007] The purpose of this invention is to provide a back-contact TOPCon crystalline silicon solar cell and its preparation method, so as to solve the problems of complex preparation process, high cost and low overall cost performance of existing back-contact TOPCon crystalline silicon solar cells.

[0008] To achieve the above objectives, the present invention provides the following technical solution: a method for fabricating a back-contact TOPCon crystalline silicon solar cell with a localized pn junction, comprising the following steps:

[0009] S1. Provide an n-type silicon substrate and form a TOPCon structure on the back side of the n-type silicon substrate;

[0010] S2. A dielectric film is formed on the front side of the n-type silicon substrate and the back side of the TOPCon structure;

[0011] S3. On the back side of the n-type silicon substrate, an aluminum-containing paste is printed on a predetermined area of ​​the dielectric film and sintered. During sintering, the aluminum-containing paste selectively burns through the dielectric film and the TOPCon structure, and undergoes a localized alloying reaction with the n-type silicon substrate, forming a doping concentration of 10 in a localized region of the n-type silicon substrate. 19 cm -3 -10 22 cm -3 p + The region is such that the n-type silicon substrate undergoes local inversion in the corresponding region, forming a local pn junction, and in the p + A depletion layer is formed between the region and the n-type silicon substrate;

[0012] S4. On the back side of the n-type silicon substrate, a positive gate line and a negative gate line are formed at the local pn junction and at a position spaced apart from the local pn junction, respectively, thereby obtaining a back-contact TOPCon crystalline silicon solar cell.

[0013] Further, step S1 includes the following steps: forming a silicon oxide layer with a thickness of 1-2 nm on the back side of the n-type silicon substrate, and forming an n-type polycrystalline silicon layer with a thickness of 20-120 nm on the silicon oxide layer.

[0014] Further, step S2 includes the following steps: forming an AlOx layer with a thickness of 2nm-8nm on the front side of the n-type silicon substrate; forming a SiNx layer with a thickness of 60nm-100nm on the surface of the AlOx layer; and forming a SiNx layer with a thickness of 60nm-100nm on the back side of the TOPCon structure.

[0015] Further, in step S3, the printing thickness of the aluminum-containing metal paste is any value between 1 μm and 15 μm, and the printing width is any value between 10 and 500 μm; during the sintering process, the sintering temperature is any value between 700℃ and 950℃, and after sintering, part of the aluminum-containing metal paste reacts with the n-type silicon substrate to form p... + In the region, the remaining aluminum-containing slurry is cured to form the bottom metal of the positive electrode grid line.

[0016] Further, in step S4, on the back side of the n-type silicon substrate, with the p + The negative gate line is formed at the interval position.

[0017] Further, in step S4, in the p + The positive electrode grid line is formed by printing Ag paste or silver-coated copper paste on the area and sintering it to improve the conductivity and solderability of the positive electrode grid line. When printing Ag paste, the sintering temperature for forming the positive electrode grid line is any value between 700℃ and 850℃. When printing silver-coated copper paste, the sintering temperature for forming the positive electrode grid line is 200-300℃.

[0018] Furthermore, in step S4, the material of the negative electrode grid line is Ag paste, and the sintering temperature for forming the negative electrode grid line is 700-850℃.

[0019] This application also provides a back-contact TOPCon crystalline silicon solar cell, which is prepared by the above-described preparation method.

[0020] The beneficial effects of this invention are as follows: The method for fabricating a back-contact TOPCon crystalline silicon solar cell provided in this application involves printing an aluminum-containing paste in a localized area on the back side of an n-type silicon substrate and sintering it to form a localized p-type crystalline silicon solar cell. + This method enables local inversion and junction formation on n-type silicon substrates, eliminating the need for high-temperature boron diffusion to prepare p-type polysilicon layers (p-ploySi) and subsequent wet etching processes. This significantly reduces energy consumption, process complexity, and the density of defect states on the silicon surface.

[0021] Highly doped p-type silicon is formed in localized regions of a silicon substrate through high-temperature interdiffusion between trivalent Al and tetravalent silicon. + area, thus in p + A significant junction barrier and high-resistivity isolation region are introduced between the p-region and the adjacent n-region, giving the formed localized pn junction good electrical isolation capabilities. Under certain battery structure conditions, this can reduce or eliminate the need for additional GAP regions. Simultaneously, p + The region can significantly reduce the metal / silicon contact resistance, thereby improving carrier collection efficiency and cell fill factor, and promoting the improvement of photoelectric conversion efficiency.

[0022] In addition, to improve the conductivity and solderability of Al gate electrodes, low-cost conductive pastes such as silver-aluminum, silver-nickel, and silver-coated copper can be printed on them, significantly reducing silver consumption. Theoretically, this can reduce silver usage by more than 50%.

[0023] This preparation method is also compatible with existing TOPCon preparation processes, laser pre-patterning, and buried grating technologies, without the need to introduce complex new equipment, and has good process feasibility and industrial application prospects.

[0024] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, the preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings. Attached Figure Description

[0025] Figure 1 This is a schematic diagram of the structure of a TOPCon crystalline silicon solar cell according to an embodiment of the present invention;

[0026] Figure 2 As shown in one embodiment of the present invention, a printing paste containing aluminum metal is subjected to sintering treatment to form localized p + Cross-sectional scanning electron microscope image of the n-type silicon substrate in the region;

[0027] Figure 3 As shown in one embodiment of the present invention, p is formed after sintering treatment. + Results of energy-dispersive X-ray spectral surface scanning analysis of the local cross-section of the region;

[0028] Figure 4 As shown in one embodiment of the present invention, p is formed after sintering treatment. + Results of energy-dispersive X-ray spectral line scanning analysis of the local cross-section of the region;

[0029] Figure label:

[0030] 1. n-type silicon substrate; 2. TOPCon structure; 3. Dielectric film; 4. Depletion layer; 5. p-type silicon substrate + 6. Positive grid line; 7. Negative grid line. Detailed Implementation

[0031] The technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. In the description of the present invention, it should be noted that the terms "upper," "lower," "front," "back," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention. In the description of the present invention, it should be noted that the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. It should be noted that unless otherwise explicitly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two elements. Furthermore, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0032] like Figure 1 As shown in the preferred embodiment of this application, the method for fabricating a TOPCon crystalline silicon solar cell with a localized pn junction includes the following steps:

[0033] S1. Provide an n-type silicon substrate 1, and form a TOPCon structure 2 on the back side of the n-type silicon substrate 1;

[0034] S2. A dielectric film 3 is formed on the front side of the n-type silicon substrate 1 and the back side of the TOPCon structure 2;

[0035] S3. On the back side of the n-type silicon substrate 1, an aluminum-containing paste is printed on a predetermined area of ​​the dielectric film 3 and sintered. During the sintering process, the aluminum-containing paste selectively burns through the dielectric film 3 and the TOPCon structure 2, and undergoes a localized alloying reaction with the n-type silicon substrate 1, forming a doping concentration of 10 in a localized area of ​​the n-type silicon substrate 1. 19 cm -3 -10 22 cm -3 p + Region 5, so that the n-type silicon substrate 1 undergoes local inversion in the corresponding region, forming a local pn junction, and in p + A depletion layer 4 is formed between region 5 and the n-type silicon substrate 1; preferably, the doping concentration can reach 10. 20 cm-3 and above;

[0036] S4. On the back side of the n-type silicon substrate 1, a positive gate line 6 and a negative gate line 7 are formed on the local pn junction and at the position separated from the local pn junction, respectively, thereby obtaining a back-contact TOPCon crystalline silicon solar cell.

[0037] In step S1, by forming a TOPCon structure 2 on the back side of the n-type silicon substrate 1, a passivated contact structure can be constructed as an electron-selective contact layer. This allows majority carriers (electrons) to tunnel and transport laterally, effectively blocking minority carrier (hole) recombination, reducing recombination current in the metal contact area, and thus improving the battery's open-circuit voltage and short-circuit current. Simultaneously, it forms a high-quality ohmic contact with the n-type silicon substrate 1, reducing contact resistance and ensuring smooth current transmission.

[0038] In step S2, the dielectric film 3 serves multiple functions, including passivation, anti-reflection, and protection. Forming the dielectric film 3 on the front side of the n-type silicon substrate 1 helps reduce the surface load on the front side of the n-type silicon substrate 1, increases the open-circuit voltage, and helps reduce light reflection loss and enhance light absorption. It also protects the solar cell from external environmental corrosion. The dielectric film 3 formed on the back side of the TOPCon structure 2 primarily functions as an anti-reflection and protective agent, improving the light absorption efficiency on the back side of the cell and enhancing cell stability.

[0039] In step S3, during the sintering process, the aluminum element in the aluminum-containing slurry gains energy under high temperature, selectively burns through the dielectric film 3, and diffuses downwards to contact the n-type silicon substrate 1, where a chemical reaction occurs. Aluminum (Al) is a trivalent element, and silicon (Si) is a tetravalent element. When aluminum atoms diffuse into the silicon lattice at high temperature and replace silicon atoms, they provide a positively charged "hole," thereby forming a doping concentration of 10 in a local area of ​​the n-type silicon substrate 1. 19 cm -3 -10 22 cm -3 p + Region 5 causes local inversion in the corresponding region of the n-type silicon substrate 1, forming a local pn junction, and in p + A depletion layer 4 is formed between region 5 and the n-type silicon substrate 1. + Region 5 is a heavily doped aluminum region, which may contain an aluminum-doped silicon layer and / or an Al-Si alloy structure, the specific composition of which varies with sintering conditions. Based on this principle, during the high-temperature sintering of the aluminum-containing metal paste, aluminum and silicon undergo interdiffusion reaction at the interface. In the preset gate region, at p... + A depletion layer is formed at the interface between the p-region and the n-type silicon substrate, and the depletion layer mainly extends towards the n-region side. This depletion layer helps suppress carrier recombination in the local pn junction region, thereby improving carrier collection conditions; p +Region 5 exhibits excellent conductivity, providing a low-resistance path for current transmission and reducing energy loss. Through the interdiffusion of aluminum and silicon, local inversion occurs in the n-type silicon substrate 1, forming a local pn junction. This optimizes the battery's electrical performance, improving its conversion efficiency and stability.

[0040] In step S4, a suitable metal paste, such as silver paste, aluminum-containing paste, silver-aluminum paste, silver-nickel paste, or silver-coated copper paste, can be selected according to actual needs. This low-cost conductive paste is printed onto the local pn junction and, after sintering under specific process conditions, forms a positive gate line 6 with excellent conductivity and solderability. Simultaneously, a suitable metal paste, such as silver paste, is selected according to actual needs and printed onto a location spaced from the local pn junction. After sintering, this forms a negative gate line 7 with excellent conductivity and low contact resistance. These positive and negative gate lines are respectively connected to the pn junction... + The region and n-region / n-polySi construct a high-quality ohmic contact, ensuring that the current is not obstructed during transmission and achieving smooth current flow. This greatly reduces energy loss caused by poor contact, thereby effectively improving the overall conversion efficiency of the battery and providing a key guarantee for the optimization of battery performance.

[0041] In one embodiment, step S1 includes the following steps: forming a silicon oxide (SiOx) layer with a thickness of 1-2 nm on the back side of the n-type silicon substrate 1, forming an n-type polycrystalline silicon (n-polySi) layer with a thickness of 20 nm-120 nm on the silicon oxide layer, and then forming a TOPCon structure 2 on the back side of the n-type silicon substrate 1. In this embodiment and other embodiments, step S2 includes the following steps: forming an AlOx layer with a thickness of 2 nm-8 nm on the front side of the n-type silicon substrate 1. By limiting the thickness of the AlOx layer within this range, it is ensured that it can exert optimal passivation effect, effectively reduce surface state density, and reduce carrier recombination loss at the surface. Subsequently, a SiNx layer with a thickness of 60 nm-100 nm is formed on the surface of the AlOx layer. By controlling the SiNx layer within this thickness range, it works synergistically with the underlying AlOx layer to jointly undertake the dual functions of passivation and anti-reflection. The dielectric film 3, comprising the AlOx and SiNx layers, is stacked on the front side of the n-type silicon substrate 1. It acts as an effective barrier, protecting the internal structure of the battery from external environmental factors such as moisture and oxygen, thus enhancing the battery's reliability and stability. Simultaneously, a SiNx layer with a thickness of 60nm-100nm is formed on the back side of the TOPCon structure 2, serving as the dielectric film 3 stacked on the back side of the n-type silicon substrate 1. This thickness of SiNx layer on the back side of the n-type silicon substrate 1 provides anti-reflection and protection, improving the light absorption efficiency on the back side of the battery and enhancing its stability. Furthermore, this thickness of SiNx layer synergistically works with the sintering conditions in step S3 to ensure that the aluminum-containing slurry can penetrate the dielectric film 3 while simultaneously controlling the formation of p... + The thickness and doping concentration of region 5 make p + The parameters of Zone 5 reach their optimal state, thereby optimizing battery performance and improving the overall quality of the battery.

[0042] In one embodiment, in step S3, the printing thickness of the aluminum-containing paste is any value between 1 μm and 15 μm. By reasonably controlling the printing thickness of the aluminum-containing paste, sufficient and appropriate amounts of aluminum can be provided for subsequent processes. During the subsequent sintering process, these aluminum elements can fully participate in the reaction, ensuring the formation of p after sintering. + Zone 5 has sufficient thickness. Simultaneously, by controlling the printing thickness of the aluminum-containing paste, and combining this with its synergistic effect with the sintering process, the resulting p-type thickness after sintering is further ensured. + The doping concentration in zone 5 is 10 19 cm -3 -10 22 cm -3Within this range, it helps to reduce the contact resistance between the electrode and the n-type silicon substrate 1, thereby improving the electrical performance of the battery. Furthermore, by precisely controlling the printing thickness of the aluminum-containing paste, a series of problems caused by incomplete sintering of the paste during the sintering process can be effectively avoided, such as unstable performance in local areas and p-type silicon substrates. + Incomplete formation of zone 5, etc., ensures the stability and reliability of the entire process. Furthermore, the printing width of the aluminum-containing paste is any value between 10μm and 500μm. A reasonable printing width helps enhance the isolation effect of the local pn junction, thereby improving p... + The electrical isolation capability between region 5 and the adjacent n-region reduces the need for additional electrical isolation structures. During the sintering process, the sintering temperature is any value between 700℃ and 950℃. After sintering, part of the aluminum-containing slurry reacts with the n-type silicon substrate 1 to form p-type silicon. + In section 5, the remaining aluminum-containing metal paste solidifies to form the bottom metal of the positive electrode gate line 6. Controlling the sintering temperature within this range ensures that the aluminum-containing metal paste efficiently burns through the dielectric film 3, contacts the n-type silicon substrate 1, and reacts to form p-type silicon. + Zone 5 can also work in conjunction with key parameters such as the coating thickness and sintering time of aluminum-containing metal pastes to ensure p + The thickness of zone 5 reaches a preset value based on actual needs, such as any value within the range of 0.5μm-5μm. During the sintering process, the components in the aluminum-containing slurry can etch the dielectric film 3 and penetrate it, causing the aluminum elements in the slurry to contact and diffuse with the n-type silicon substrate 1. +A depletion layer is formed at the interface between the n-region and the n-type silicon substrate, and the depletion layer mainly extends towards the n-region side, causing local inversion of the n-type silicon substrate 1 and forming a local pn junction. Compared with the conventional process, this method does not require an additional pretreatment step to remove the dielectric film 3, which greatly simplifies the process flow, not only helps to improve product quality, but also significantly improves production efficiency, and has broad application prospects in the semiconductor manufacturing field. In other embodiments, in step S3, before printing the aluminum-containing paste, channels can be etched on the front or back of the TOPCon crystalline silicon solar cell before printing the aluminum-containing paste. Specifically, the gate line area on the front or back of the TOPCon crystalline silicon solar cell is first patterned to form a preset gate line pattern; then, the dielectric film 3 layer at the gate line pattern is removed by etching, forming a gate line pattern channel with precisely controlled size and shape on the front or back of the TOPCon crystalline silicon solar cell; then, the aluminum-containing paste is printed in the gate line pattern channel. The above method can further define the reaction area between aluminum and the n-type silicon substrate 1, which helps to improve the contact quality between the electrode and the n-type silicon substrate 1. However, compared with the method of directly printing aluminum-containing metal paste on the dielectric film 3 and achieving selective burn-through by sintering, this etching patterning process usually requires the introduction of additional patterning and etching steps. This not only causes a certain degree of damage to the n-type silicon substrate 1, affecting the overall performance and stability of the battery, but also makes the process relatively complex and requires extremely high equipment precision. Therefore, in the preferred embodiment of the present invention, it is preferable to use a method that does not require pre-etching of the dielectric film 3, but directly prints and sintersties the aluminum-containing metal paste to form localized p + The process scheme for Zone 5 aims to further simplify the process flow and control costs. In this embodiment and other embodiments, in step S4, at p + Ag paste or copper-plated silver paste is printed on zone 5, and after sintering, a composite positive grid line 6 is formed to improve the conductivity and solderability of the positive grid line 6. When printing Ag paste, the sintering temperature for forming the positive grid line 6 is any value between 700℃ and 850℃. When printing copper-plated silver paste, the sintering temperature for forming the positive grid line 6 is 200-300℃.

[0043] In one embodiment, in step S4, on the back side of the n-type silicon substrate 1, with p + A negative gate line 7 is formed at the interval position of region 5, that is, on the back side of the n-type silicon substrate 1, at the p +A positive gate line 6 is formed at location 5, and a negative gate line 7 is formed at location n outside the local pn junction. The positive gate line 6 and negative gate line 7 are located in the n-region and p-region on the back side of the n-type silicon substrate 1, respectively, and are spaced apart. This spaced electrode layout helps optimize the current distribution on the back side of the battery, reduces current congestion, lowers series resistance, and improves the battery's output performance. In this embodiment and other embodiments, in step S4, the material of the negative gate line 7 is Ag paste, and the sintering temperature for forming the negative gate line 7 is 700-800℃. The silver paste burns through the surface SiNx film and forms a good ohmic contact with n-ploySi. The silver paste has excellent conductivity and good weldability, ensuring effective electrical connection between the electrode and the battery interior, and reducing contact resistance. Limiting the sintering temperature within this range ensures that the paste fully melts and crystallizes during sintering, forming a dense, highly conductive gate electrode, while avoiding damage to the battery or affecting electrode performance due to excessively high or low temperatures.

[0044] In one embodiment, before forming the TOPCon structure 2 on the back side of the n-type silicon substrate 1, the back side of the n-type silicon substrate 1 is polished using a chain oxide process. Polishing removes the damaged layer and silicon dioxide on the back side, optimizing the surface quality and ensuring flatness for subsequent formation of the TOPCon structure 2 or deposition of a passivation protective layer. The chain oxide process is a highly efficient and stable polishing method. By placing the n-type silicon substrate 1 in a specific oxidizing environment, oxygen reacts chemically with the silicon surface to generate silicon dioxide. The generated silicon dioxide layer is then removed by mechanical friction, thereby polishing the back side of the n-type silicon substrate 1. This process exhibits strong process stability and good polishing uniformity, effectively improving the flatness of the back side of the n-type silicon substrate 1 and reducing surface roughness. In this embodiment and other embodiments, before forming the dielectric film 3 on the front side of the n-type silicon substrate 1, the front side of the n-type silicon substrate 1 is etched to remove the overlay coating and / or PSG layer on the front side of the n-type silicon substrate 1. The wraparound coating is a thin film that inevitably forms in non-deposition areas during deposition, while the PSG layer is a silicon oxide layer containing phosphorus formed under high-temperature conditions. These impurity layers can impair the photoelectric performance of the battery and must be removed using appropriate methods to avoid affecting the deposition quality of subsequent films. Chemical wet etching or plasma etching can be used to remove the wraparound coating and PSG layer. Chemical wet etching utilizes a chemical solution to react with the wraparound coating and PSG layer, dissolving and removing them. Plasma etching uses high-energy particles in plasma to physically and chemically etch the wraparound coating and PSG layer, offering high etching precision, good anisotropy, and minimal damage to the n-type silicon substrate. In actual production, the appropriate etching process can be selected based on specific requirements and process conditions.

[0045] This application also provides a back-contact TOPCon crystalline silicon solar cell, which is prepared using the above-described method. Through this unique preparation method, the back-contact TOPCon crystalline silicon solar cell exhibits high photoelectric conversion efficiency, good open-circuit voltage and fill factor, while also possessing a low surface recombination rate and good stability. It can stably and efficiently convert solar energy into electrical energy under both abundant and low-light conditions, making it widely applicable in solar photovoltaic power generation systems, distributed energy, and other fields, thus making a significant contribution to the utilization and development of renewable energy.

[0046] Example 1

[0047] S1. Obtain an n-type silicon substrate 1 with a thickness of 140 μm. First, immerse it in KOH solution at 85°C for 10 min to perform texturing. Then, use the RCA standard process, with HF and H2O2 as cleaning agents, to clean it, forming a pyramidal texturing structure on the front and back sides of the n-type silicon substrate 1. Next, use LPCVD process to deposit a 1 nm thick SiOx layer on the back side of the n-type silicon substrate 1 at 650°C in a mixed atmosphere including silane (SiH4) and nitrogen oxides (N2O). Then, use LPCVD process to deposit an 85 nm thick N2O layer on the SiOx layer in a mixed atmosphere including silane (SiH4) and phosphine (PH3). + - A polycrystalline silicon layer is formed on the back side of an n-type silicon substrate 1 to form a TOPCon structure 2.

[0048] S2. First, the n-type silicon substrate 1 is immersed in a 5% HF solution for 60 seconds to remove the overlay and PSG layer on the front side of the n-type silicon substrate 1. Then, using atomic layer deposition (ALD), a 5nm thick AlOx layer is deposited on the front side of the n-type silicon substrate 1 under a mixed atmosphere including a trimethylaluminum (TMA) precursor at 250°C. Next, using PECVD, a 90nm thick SiNx layer is deposited on both the front side of the n-type silicon substrate 1 and the back side of the TOPCon structure 2 under a mixed atmosphere including SiH4, N2O, and NH3 at 350°C. This forms a dielectric film 3 on both the front side of the n-type silicon substrate 1 and the back side of the TOPCon structure 2. The results are as follows: Figure 1 As shown in (a).

[0049] S3. First, a preset area is set on the dielectric film 3 on the back side of the n-type silicon substrate 1. Aluminum paste is screen-printed in the preset area with a thickness of 2 μm and a width of 200 μm. Then, the n-type silicon substrate 1 is sintered at 760℃. During sintering, aluminum elements in the paste diffuse downwards to contact the n-type silicon substrate 1 and react, causing local inversion of the n-type silicon substrate 1, forming a local pn junction and a p+ region 5 in the preset area. The result is as follows. Figure 2 As shown in the figure, the area marked by the arrow is p. + Zone 5. Meanwhile, regarding this p + Chemical composition analysis was performed on a local area of ​​Zone 5, and the results are as follows: Figure 3 and Figure 4 As shown. By Figure 3 , Figure 4 It can be seen that p + Zone 5 contains aluminum and silicon. Furthermore, testing showed that p... + The thickness of region 5 is approximately 5 μm, and the doping concentration reaches 10. 20 cm -3 above.

[0050] S4. On the back side of the n-type silicon substrate 1, at the formed p + Location 5 and p + Silver paste was screen-printed at intervals in zone 5, and sintered at 800℃. + A positive grid line 6 is formed on region 5, which is related to p. + A negative grid line 7 is formed at the position of the interval 5 in zone 5, such as Figure 1 As shown in (b), a back-contact TOPCon crystalline silicon solar cell is obtained.

[0051] Example 2

[0052] The difference between this embodiment and Embodiment 1 is that in step S4, on the back side of the n-type silicon substrate 1, at the p + Silver paste was screen-printed at the five phase-interval locations in zone 5 and sintered at 800℃, then combined with p + A negative gate line 7 is formed at the position of interval 5 in zone 5. At the formed p + At location 5, silver-plated copper paste is screen-printed and sintered at 240℃. + A positive grid line 6 is formed on region 5 to obtain a back-contact TOPCon crystalline silicon solar cell.

[0053] Comparative Example 1

[0054] Step 1, Preparation of TOPCon crystalline silicon solar cells:

[0055] The fabrication of this TOPCon crystalline silicon solar cell includes the following steps:

[0056] a. Obtain an n-type silicon substrate 1 with a thickness of 140 μm and texturize it in a KOH solution at 85 °C for 10 min to form a pyramidal textured structure on the front and back sides of the silicon substrate. Subsequently, the silicon substrate is cleaned (e.g., RCA cleaning) to remove impurities and native oxide layers remaining from the texturing process. b. Place the texturized n-type silicon substrate 1 in a mixed atmosphere containing a boron source (e.g., borane or BBr3) at 850 °C for 45 min to form a p-type textured structure on the front side of the n-type silicon substrate 1. + Emitter, forming a planar pn junction with the n-type silicon substrate 1. c. Forming a TOPCon passivation contact structure on the back side, including: depositing a 1nm thick SiOx tunneling oxide layer on the back side of the n-type silicon substrate 1 using LPCVD at 650℃ in a mixed atmosphere including silane (SiH4) and nitrogen oxide; and depositing an 85nm thick n-type pn junction on the SiOx layer using LPCVD at 700℃ in a mixed atmosphere including silane and phosphine (PH3). + d. Immerse the n-type silicon substrate 1 in a 5% HF solution for 60 seconds to remove the wrap-around coating and PSG layer on the front side of the n-type silicon substrate 1. e. Using atomic layer deposition (ALD) at 250°C in a mixed atmosphere including a trimethylaluminum (TMA) precursor, deposit a 5nm thick AlOx layer on the front side of the n-type silicon substrate 1 to achieve surface passivation. f. Using PECVD at 350°C in a mixed atmosphere including SiH4, N2O, and NH3, deposit a 90nm thick SiNx layer on both the front and back sides of the n-type silicon substrate 1 to obtain the TOPCon crystalline silicon solar cell.

[0057] Step 2, fabrication of positive grid line 6 and negative grid line 7:

[0058] Ag paste is screen-printed on the front and back sides of the TOPCon crystalline silicon solar cell and then sintered to form positive grid line 6 and negative grid line 7, thus obtaining the TOPCon crystalline silicon solar cell.

[0059] Comparative Example 2

[0060] Step 1, Fabrication of back-contact TOPCon (TBC) crystalline silicon solar cells:

[0061] The fabrication of this TBC crystalline silicon solar cell includes the following steps:

[0062] a. Obtain an n-type silicon substrate 1 with a thickness of 140 μm and texturize it in KOH solution at 85 °C for 10 min to form a pyramidal textured structure on the front and back sides of the silicon substrate. Subsequently, clean the silicon substrate (e.g., RCA cleaning) to remove impurities and native oxide layers remaining from the texturing process. b. Form a SiOx tunneling oxide layer on the back side of the silicon substrate, and deposit a polycrystalline silicon layer (poly-Si) on it. Then, p-type doping of the polycrystalline silicon is performed by boron source thermal diffusion to form a p-polySi layer, and the surrounding coating is etched away. c. Deposit an 80 nm SiNx mask layer on the back side of the silicon substrate using PECVD, and pattern the mask layer using a laser aperture process. Selectively remove the SiNx mask layer in a predetermined area to form an n-region window. Subsequently, within the n-region window, the p-polySi / SiOx structure in the corresponding area is removed or modified by laser processing. d. Deposit an n-type polycrystalline silicon layer within the n-region window, and form an n-polySi contact layer through phosphorus doping diffusion and annealing activation treatment, thus simultaneously forming a p-region and n-region polycrystalline silicon passivation contact structure on the back side. e. Pattern the poly-Si layer on the back side using laser ablation, forming isolation trenches between the p-region and n-region, so that the p-region and n-region are interdigitated and electrically isolated from each other on the back side. f. Deposit an AlOx / SiNx passivation and antireflection film structure on the front side of the silicon substrate using ALD and PECVD processes, and deposit a SiNx protective layer on the back side to obtain a TBC crystalline silicon solar cell.

[0063] Step 2, fabrication of positive grid line 6 and negative grid line 7:

[0064] Ag paste is screen-printed and sintered in the p and n regions on the back of the TBC crystalline silicon solar cell to form positive grid line 6 and negative grid line 7, thus obtaining the TBC crystalline silicon solar cell.

[0065] The TOPCon crystalline silicon solar cells prepared in Examples 1, 2, Comparative Example 1, and 2 were subjected to standard tests (test conditions: AM1.5G, 1000W / m). 2 (25℃), the test results are shown in Table 1.

[0066]

[0067] As shown in Table 1, compared to the conventional TOPCon and conventional TBC crystalline silicon solar cells prepared in Comparative Example 1 (traditional double-sided contact TOPCon) and Comparative Example 2 (conventional back-contact TBC), the back-contact TOPCon crystalline silicon solar cells prepared in Examples 1-2 exhibit superior electrical performance in terms of photoelectric conversion efficiency. This indicates that the preparation method provided in this application can achieve a steady improvement in the overall performance of the cell while simplifying the process. Analysis of electrical parameters shows that, compared to Comparative Examples 1-2, Examples 1-2 achieve a higher fill factor (FF) while maintaining the advantage of short-circuit current density (Jsc) brought by the back-contact structure. An improved fill factor typically reflects a reduction in losses related to series resistance within the cell, which helps reduce energy loss during current transmission, allowing more photogenerated carriers to be effectively collected and utilized, thereby improving the cell's output characteristics. The above results demonstrate that the preparation method provided in this application plays a positive role in optimizing the cell's electrical structure and improving the metal / silicon contact characteristics.

[0068] Therefore, in terms of structure and process, the preparation method provided in this application breaks through the limitations of traditional high-temperature boron diffusion processes. Through high-temperature interdiffusion of trivalent Al and tetravalent Si, highly doped p-type silicon atoms are formed in local regions of the n-type silicon substrate 1. + Zone 5, where the doping concentration can be as high as 10. 20 cm -3 and above, thus in p + A local pn junction is formed between region 5 and the adjacent n-region, introducing a significant junction barrier and a high-resistivity isolation region. The formation of this local pn junction eliminates the need for traditional high-temperature boron diffusion and complex patterning etching processes, effectively simplifying the pn junction construction process in back-contact TOPCon crystalline silicon solar cells. Furthermore, this doping distribution endows the formed local pn junction with excellent electrical isolation capabilities, reducing or replacing the need for traditional GAP region fabrication under certain cell structure conditions. This further simplifies the process flow, reduces energy consumption during manufacturing, and significantly improves production efficiency. Simultaneously, the optimized process can also improve the conversion efficiency of back-contact TOPCon crystalline silicon solar cells to a certain extent, resulting in superior energy conversion performance.

[0069] The metal / silicon contact performance of the TOPCon crystalline silicon solar cells prepared in Examples 1, 2, 1, and 2 was tested using the TLM method. The test results are shown in Table 2.

[0070]

[0071] Table 2 shows that the back-contact TOPCon crystalline silicon solar cells prepared in Examples 1-2 are superior to Comparative Example 1 in terms of metal / silicon contact performance. The test results indicate that by forming p in the predetermined region... + Zone 5 helps improve the contact characteristics between the metal and silicon, resulting in lower contact resistance and thus achieving stable ohmic contact. Even when using low-cost silver-coated copper paste as the positive electrode grid line 6, a low contact resistance level can still be maintained. Furthermore, compared to Comparative Examples 1-2, the grid line resistance levels of Examples 1-2 are comparable, showing no significant disadvantage. These results demonstrate that the fabrication method provided in this application not only improves the metal / silicon contact characteristics of back-contact TOPCon crystalline silicon solar cells but also provides a feasible path for the application of low-cost conductive pastes (such as silver-coated copper) in TOPCon metallization, helping to reduce the fabrication cost of TOPCon crystalline silicon solar cells, enhance their market competitiveness, and promote the further development of the solar photovoltaic industry.

[0072] The TOPCon crystalline silicon solar cells prepared in Examples 1, 2, Comparative Example 1, and 2 were placed under ultraviolet-enhanced irradiation conditions (equivalent UV dose ≥ 60 kWh / m²). 2 Accelerated aging tests were conducted, and the efficiency degradation results are shown in Table 3.

[0073]

[0074] As shown in Table 3, under the accelerated aging test conditions with enhanced ultraviolet light, the efficiency degradation of Examples 1-2 was less than that of Comparative Example 1. Comparative Example 1 used a planar boron-diffused pn junction structure, and its battery performance showed a significant degradation after ultraviolet irradiation. This may be related to factors such as the change in passivation performance of the front AlOx passivation layer under ultraviolet irradiation and the evolution of the interface state, leading to a substantial decrease in battery efficiency. In contrast, Examples 1-2 used a localized pn junction instead of a planar boron-diffused junction, and its carrier collection and transport mainly relied on the back localized pn junction. + The pn junction structure formed by region 5 and the n-type region reduces the sensitivity of the cell's energy to changes in the passivation state of the front AlOx to a certain extent. The localized pn junction may reduce the impact of defects caused by ultraviolet irradiation on cell performance by optimizing carrier collection and transport paths, thus exhibiting a lower efficiency degradation rate and significantly improving the long-term stability of the cell. Specifically, Example 2 further optimizes the metallization process based on Example 1, resulting in a lower efficiency degradation rate in aging tests and demonstrating superior long-term stability. The above results indicate that the preparation method provided in this application plays a positive role in improving the long-term stability of back-contact TOPCon crystalline silicon solar cells, providing a useful reference for further optimization of related preparation processes.

[0075] The p-values ​​of TOPCon crystalline silicon solar cells prepared in Examples 1, 2, Comparative Example 1, and Comparative Example 2 were analyzed using the ECV method. + The doping concentration of zone 5 was tested, and the test results and the built-in electric field calculation results are shown in Table 4.

[0076]

[0077] As shown in Table 4, compared with Comparative Examples 1-2, Examples 1-2, through screen printing of aluminum-containing metal paste and sintering, induced the formation of highly doped p-type metals locally below the metal gate lines. + Zone 5. Due to the high solid solubility of Al in Si, and the strong interdiffusion reaction between Al and Si during sintering, the local p... + The doping concentration in zone 5 can stably reach 10. 19 cm -3 The magnitude is at or above that of traditional high-temperature boron diffusion processes, significantly higher than that of high-doped p-type boron. + The localized pn junction formed between region 5 and the n-type silicon substrate 1 exhibits a significantly enhanced built-in electric field. This is due to the pn junction formed in Examples 1-2. + The doping concentration in region 5 is much higher than that in the n-type silicon substrate 1, and the resulting pn junction depletion layer 4 mainly extends towards the n-region side, causing the high-resistivity depletion region to be concentrated in the n-type silicon substrate 1. This distribution of the depletion layer 4 forms a localized high-resistivity barrier in the lateral direction of the metal gate line, thereby achieving electrical isolation under certain structural conditions without the need for additional patterned isolation trenches (GAPs). In contrast, although Comparative Example 2 also uses a back-contact structure, it still relies on an additional GAP region to achieve reliable isolation between its p-region and n-region, resulting in higher process complexity and greater sensitivity to process consistency. Based on the above-mentioned localized p-region... + With its strong built-in electric field structure, Zone 5 in Examples 1-2 effectively suppresses lateral leakage paths and reduces contact-related series losses while ensuring good metal / silicon ohmic contact. This structural feature is consistent with the aforementioned electrical performance structure, meaning that Examples 1-2 achieve higher fill factor and photoelectric conversion efficiency while maintaining a high short-circuit current density.

[0078] In summary, compared to conventional TOPCon crystalline silicon solar cell fabrication processes, the fabrication method provided in this application differs significantly in both technical principles and process feasibility. Conventional TOPCon fabrication processes typically employ high-temperature boron diffusion and other techniques for surface diffusion treatment, uniformly forming a p-type doped layer across the entire front or back of the cell, creating a planar pn junction with the n-type silicon substrate 1, resulting in a planar distribution. In contrast, the back-contact TOPCon crystalline silicon solar cell fabrication method provided in this application only involves screen printing an aluminum-containing paste into the silicon substrate below the metal grid lines where current collection is required. During sintering, the interdiffusion reaction between aluminum and silicon is utilized to form a highly doped localized p-type layer in the corresponding region. + Section 5. This p + The doping concentration in zone 5 can stably reach 10. 19 cm -3 Above the order of magnitude, thus in p + A localized pn junction is formed between region 5 and the adjacent n-type substrate, introducing a higher junction barrier and built-in electric field. Through this method, the formation of the pn junction changes from traditional surface diffusion to localized realization along the gate line, achieving a process innovation from "surface" to "line". This process helps reduce the introduction of high-temperature diffusion and complex patterning steps, lowers the stringent requirements for equipment precision and process parameter control, effectively improves the stability and repeatability of the fabrication process, and facilitates the simplification of the overall process flow. Furthermore, the fabrication method provided in this application, through localized pn junction formation... + The formation of metal contacts in zone 5 facilitates the application of low-cost conductive pastes such as silver-coated copper, significantly reducing the amount of silver used while ensuring a certain level of conductivity, thus substantially lowering the metallization cost of TOPCon crystalline silicon solar cells. Therefore, the preparation method provided in this application has excellent overall advantages in terms of process feasibility and cost control.

[0079] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0080] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A method for fabricating a back-contact TOPCon crystalline silicon solar cell with a localized pn junction, characterized in that, Includes the following steps: S1. Provide an n-type silicon substrate and form a TOPCon structure on the back side of the n-type silicon substrate; S2. A dielectric film is formed on the front side of the n-type silicon substrate and the back side of the TOPCon structure; S3. On the back side of the n-type silicon substrate, an aluminum-containing paste is printed on a predetermined area of ​​the dielectric film and sintered. During sintering, the aluminum-containing paste selectively burns through the dielectric film and the TOPCon structure, and undergoes a localized alloying reaction with the n-type silicon substrate, forming a doping concentration of 10 in a localized region of the n-type silicon substrate. 19 cm -3 -10 22 cm -3 p + The region is such that the n-type silicon substrate undergoes local inversion in the corresponding region, forming a local pn junction, and in the p + A depletion layer is formed between the region and the n-type silicon substrate; S4. On the back side of the n-type silicon substrate, a positive gate line and a negative gate line are formed at the local pn junction and at the position spaced apart from the local pn junction, respectively, thereby obtaining a back-contact TOPCon crystalline silicon solar cell. In step S3, the printing thickness of the aluminum-containing metal paste is any value between 1μm and 15μm, and the printing width is any value between 10 and 500μm; during the sintering process, the sintering temperature is any value between 700℃ and 950℃, and after sintering, part of the aluminum-containing metal paste reacts with the n-type silicon substrate to form p... + In the region, the remaining aluminum-containing slurry is cured to form the bottom metal of the positive electrode grid line.

2. The preparation method according to claim 1, characterized in that, Step S1 includes the following steps: forming a silicon oxide layer with a thickness of 1-2 nm on the back side of the n-type silicon substrate, and forming an n-type polycrystalline silicon layer with a thickness of 20-120 nm on the silicon oxide layer.

3. The preparation method according to claim 1, characterized in that, Step S2 includes the following steps: forming an AlOx layer with a thickness of 2nm-8nm on the front side of the n-type silicon substrate; forming a SiNx layer with a thickness of 60nm-100nm on the surface of the AlOx layer; and forming a SiNx layer with a thickness of 60nm-100nm on the back side of the TOPCon structure.

4. The preparation method according to claim 1, characterized in that, In step S4, on the back side of the n-type silicon substrate, with the p + The negative gate line is formed at the interval position.

5. The preparation method according to claim 4, characterized in that, In step S4, in the p + The positive electrode grid line is formed by printing Ag paste or silver-coated copper paste on the area and sintering it to improve the conductivity and solderability of the positive electrode grid line. When printing Ag paste, the sintering temperature for forming the positive electrode grid line is any value between 700℃ and 850℃. When printing silver-coated copper paste, the sintering temperature for forming the positive electrode grid line is 200-300℃.

6. The preparation method according to claim 4, characterized in that, In step S4, the material of the negative electrode grid line is Ag paste, and the sintering temperature for forming the negative electrode grid line is 700-850℃.

7. A back-contact TOPCon crystalline silicon solar cell, characterized in that, It is prepared by the preparation method according to any one of claims 1-6.

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