Micro-LED display equipment and preparation method thereof

Abstract

The invention discloses Micro-LED display equipment and a preparation method thereof. The Micro-LED display equipment comprises a display substrate, and the display substrate comprises a light-emitting epitaxial layer, a current blocking layer, a plurality of pixel transparent electrodes, a first medium reflecting layer and a plurality of extraction electrodes; the current blocking layer is arranged on one side of the first semiconductor layer of the light-emitting epitaxial layer and exposes the first semiconductor layer; the pixel transparent electrode comprises a first electrode area and a second electrode area, the first electrode area covers the exposed part of the first semiconductor layer and is conductively connected with the first semiconductor layer, and the second electrode area covers one side of the current blocking layer; the first dielectric reflecting layer covers the pixel transparent electrode and is provided with a plurality of first via holes, and the projections of the first via holes fall into the overlapping area of the second electrode area and the current blocking layer; the extraction electrode is arranged in the first via hole and is electrically connected with the second electrode area. According to the method, the emergent light collimation and the optical efficiency of the Micro-LED display equipment can be improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor light emitting diodes, in particular to a Micro-LED display device and a preparation method thereof. BACKGROUND

[0002] LED (Light Emitting Diode) is a kind of semiconductor component that can convert electrical energy into visible light, and is a lighting source widely used in modern indication, display, decoration, backlight, general lighting and urban night scene fields.

[0003] Nowadays, the light emitting demand of most LED devices is one side light emitting, and the light emitting angle of LED is usually 120-degree Lambert type light, which is relatively divergent. Moreover, the size of Micro-LED chip is smaller, the sidewall light emitting is stronger, and the light emitting angle is more divergent. Therefore, in some fields requiring collimated light emitting applications, the optical efficiency of Micro-LED device is not high. SUMMARY

[0004] Embodiments of the present application provide a Micro-LED display device and a preparation method thereof, which can improve the collimation of the light emitting angle of the Micro-LED display device and improve the optical efficiency of the Micro-LED display device.

[0005] In a first aspect, embodiments of the present application provide a Micro-LED display device, which comprises a display substrate, the display substrate comprising a light emitting epitaxial layer, a current blocking layer, a plurality of pixel transparent electrodes, a first dielectric reflective layer and a plurality of lead electrodes;

[0006] The light emitting epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer which are sequentially stacked along a predetermined stacking direction;

[0007] The current blocking layer is arranged on a side of the first semiconductor layer away from the active layer and partially exposes the first semiconductor layer;

[0008] The plurality of pixel transparent electrodes are spaced apart from each other and arranged in an array, each pixel transparent electrode comprising a first electrode region and a second electrode region, wherein the first electrode region covers and forms a conductive connection with the exposed part of the first semiconductor layer from the current blocking layer, and the second electrode region covers a side of the current blocking layer away from the first semiconductor layer;

[0009] The first dielectric reflective layer covers the plurality of pixel transparent electrodes and is provided with a plurality of first vias, each first via projects onto the overlapping area of the second electrode region of the corresponding pixel transparent electrode and the current blocking layer along the stacking direction;

[0010] Each of the lead-out electrodes is arranged in a corresponding first via hole, and the lead-out electrode is electrically connected with the corresponding second electrode area and supplies power to the corresponding first electrode area through the second electrode area.

[0011] In a second aspect, the embodiments of the present application provide a preparation method of a Micro-LED display device, which comprises:

[0012] forming a light-emitting epitaxial layer on a substrate, wherein the light-emitting epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer arranged in sequence along a predetermined stacking direction, and the first semiconductor layer is located on a side of the light-emitting epitaxial layer away from the substrate;

[0013] forming a current blocking layer on a side of the first semiconductor layer away from the active layer, wherein the current blocking layer is partially exposed to the first semiconductor layer;

[0014] forming a plurality of pixel transparent electrodes on a side of the first semiconductor layer away from the active layer, wherein the plurality of pixel transparent electrodes are spaced apart from each other and arranged in an array, each of the pixel transparent electrodes comprises a first electrode area and a second electrode area, the first electrode area covers the exposed part of the first semiconductor layer from the current blocking layer and forms an electrically conductive connection therewith, and the second electrode area covers a side of the current blocking layer away from the first semiconductor layer;

[0015] forming a first dielectric reflective layer covering the plurality of pixel transparent electrodes, and forming a plurality of first via holes on the first dielectric reflective layer, wherein a projection of each of the first via holes along the stacking direction falls in an overlapping area of the second electrode area of the corresponding pixel transparent electrode and the current blocking layer;

[0016] forming a lead-out electrode in each of the plurality of first via holes, wherein each of the lead-out electrodes is electrically connected with the corresponding second electrode area and supplies power to the corresponding first electrode area through the second electrode area.

[0017] The beneficial effects of the present application are: different from the prior art, the present application is provided with a plurality of pixel transparent electrodes on one side of the first semiconductor of the light-emitting epitaxial layer to supply power to the light-emitting epitaxial layer, wherein the plurality of pixel transparent electrodes have a plurality of first electrode regions and a plurality of second electrode regions, the plurality of first electrode regions are spaced apart from the current blocking layer, the first electrode region covers and is electrically connected to the first semiconductor layer to form a display pixel area of the Micro-LED display device, and the second electrode region of the pixel transparent electrode covers the side of the current blocking layer away from the first semiconductor layer. And the first dielectric reflective layer further covers the side of the pixel transparent electrode away from the first semiconductor layer, the first dielectric reflective layer can reflect light to the other side, so as to improve the collimation of the light-emitting angle of the Micro-LED display device and improve the optical efficiency of the Micro-LED display device. Moreover, a plurality of first vias are provided on the first dielectric reflective layer and overlap the plurality of second electrode regions and the current blocking layer, a plurality of lead electrodes are filled in the plurality of first vias and are electrically connected to the plurality of second electrode regions, and an external circuit can supply power to the plurality of second electrode regions through the plurality of lead electrodes, and the plurality of second electrode regions supply power to the plurality of first electrode regions. Therefore, the display pixel area of the light-emitting epitaxial layer corresponds to the first electrode region, and the side of the first electrode region opposite to the light-emitting epitaxial layer is completely covered by the first dielectric reflective layer, and the first electrode region contacts the current through the second electrode region not corresponding to the display pixel area and the lead electrode. Therefore, when the display pixel area corresponding to the plurality of first electrode regions emits light, the light will be reflected by the first dielectric reflective layer when conducting to the side of the first electrode region, and the light will be emitted from the light-emitting side, thereby reducing the light leakage and further improving the collimation of the light-emitting angle of the Micro-LED display device and improving the optical efficiency of the LED display device. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 is a structural schematic diagram of an embodiment of the Micro-LED display device of the present application;

[0019] Figure 2 is Figure 2 is a structural relationship schematic diagram of the current blocking layer, the pixel transparent electrode and the lead electrode in the Micro-LED display device embodiment shown in

[0020] Figure 3 is a structural schematic diagram of another embodiment of the Micro-LED display device of the present application;

[0021] Figure 4 is Figure 3 is a structural relationship schematic diagram of the current blocking layer, the pixel transparent electrode and the lead electrode in the Micro-LED display device embodiment shown in

[0022] Figure 5 is a flow step schematic diagram of an embodiment of the preparation method of the Micro-LED display device of the present application;

[0023] Figure 6 is Figure 5 is a preparation process schematic diagram of the manufacturing method of the Micro-LED display device shown in

[0024] Figure 7 is Figure 5 is a preparation process schematic diagram of the manufacturing method of the Micro-LED display device shown in

[0025] Figure 8 is another flow step schematic diagram of the preparation method of the Micro-LED display device of the present application;

[0026] Figure 9 is Figure 8 is a preparation process schematic diagram of the manufacturing method of the Micro-LED display device shown in

[0027] Figure 10 is Figure 8 is a preparation process schematic diagram of the manufacturing method of the Micro-LED display device shown in DETAILED DESCRIPTION

[0028] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0029] The present inventor has found that the light emission requirements of most LED devices nowadays are one-side light emission, and the light emission angle of the LED is usually 120-degree Lambertian light, which is relatively divergent. Moreover, the size of the Micro-LED chip is smaller, the sidewall light emission is stronger, and the light emission angle is more divergent. Therefore, in some fields requiring collimated light emission applications, the optical efficiency of the Micro-LED device is not high. In order to solve the above problems, the following embodiments are proposed.

[0030] The following is an exemplary description of the structure of the Micro-LED display device of the present application.

[0031] The Micro-LED display device 10 refers to a device capable of forming a plurality of display pixel points inside to generate light, and the generated light can be emitted from one side of the Micro-LED display device 10 to illuminate or display various information such as text, images, etc. For example, the Micro-LED display device 10 can be an LED display screen chip, an LED digital vehicle lamp chip, a digital lamp strip chip, or an AR / VR / MR chip, etc.

[0032] As shown in Figure 1 , the Micro-LED display device 10 can include a display substrate 100. The display substrate 100 is used to receive a driving current, and can convert electrical energy into optical energy, and can form a plurality of display pixel regions inside which can generate light.

[0033] In some embodiments, as shown in Figure 1 , the display substrate 100 can include a light-emitting epitaxial layer 110, a current blocking layer 120, a plurality of pixel transparent electrodes 130, a first dielectric reflective layer 140, and a plurality of lead electrodes 150.

[0034] The light-emitting epitaxial layer 110 can perform light emission by recombination of electrons and holes under the action of a driving current, and define a plurality of display pixel points inside.

[0035] In some embodiments, the light-emitting epitaxial layer 110 can include a first semiconductor layer 111, an active layer 112, and a second semiconductor layer 113 sequentially stacked along a predetermined stacking direction. The stacking direction can be indicated by arrow A in Figure 1 .

[0036] The first semiconductor layer 111 and the second semiconductor layer 113 can be one of an N-type semiconductor layer and the other can be a P-type semiconductor layer. The active layer 112 is a working medium layer, and the first semiconductor layer 111 and the second semiconductor layer 113 are respectively located on both sides of the active layer 112 and in contact with the active layer 112. The active layer 112 can form an N-i-P heterostructure together with the first semiconductor layer 111 and the second semiconductor layer 113 on both sides, and can perform recombination of electrons and holes to form a P-N junction to form one or more display pixel points.

[0037] Optionally, the first semiconductor layer 111, the active layer 112, and the second semiconductor layer 113 can be formed by doping from semiconductor materials such as AlN, AlGaN, GaN, InGaN, AlInGaN, GaAs, GaP, GaInN, GaAsP, AlGaAs, or AlGaInP, etc.

[0038] As shown in Figure 1As shown, the current blocking layer 120 can be disposed on the side of the first semiconductor layer 111 away from the active layer 112 and partially expose the first semiconductor layer 111. Specifically, the current blocking layer 120 is made of insulating material.

[0039] As an example, the current blocking layer 120 can be an oxide layer made of silicon dioxide (SiO2) or other insulating material.

[0040] Optionally, as shown in Figure 1 and Figure 2 As shown, the plurality of pixel transparent electrodes 130 can be spaced apart from each other and arranged in an array. Each pixel transparent electrode 130 can include a first electrode region 131 and a second electrode region 132. The first electrode region 131 can cover the portion of the first semiconductor layer 111 exposed from the current blocking layer 120 and form an electrically conductive connection therewith, and the second electrode region 132 can be disposed on the side of the current blocking layer 120 away from the first semiconductor layer 111.

[0041] Specifically, the plurality of pixel transparent electrodes 130 correspond to the current blocking layer 120, the first electrode region 131 covers the exposed portion of the current blocking layer 120, and the second electrode region 132 covers part of the current blocking layer 120. The first electrode region 131 and the second electrode region 132 are connected to each other.

[0042] Optionally, the pixel transparent electrode 130 can transmit current to the first semiconductor layer 111 through the first electrode region 131, so that the light-emitting epitaxial layer 110 can emit light under the action of the current. Therefore, the position corresponding to the light-emitting epitaxial layer 110 of the first electrode region 131 can define a plurality of display pixels.

[0043] In some embodiments, the pixel transparent electrode 130 can be an ITO layer, or a transparent metal layer doped with a multi-layer metal layer of nickel, silver, titanium, chromium, etc. and aluminum. The display pixels in the light-emitting epitaxial layer 110 can transmit light through the transparent first electrode region 131 after generating light.

[0044] In some embodiments, as shown in Figure 1 The first dielectric reflective layer 140 can cover the plurality of pixel transparent electrodes 130. The first dielectric reflective layer 140 is provided with a plurality of first vias 141. Each first via 141 projects onto the overlapping region of the second electrode region 132 of the corresponding pixel transparent electrode 130 and the current blocking layer 120 along the stacking direction. Each lead electrode 150 can be disposed in the corresponding first via 141, and the lead electrode 150 is electrically connected to the corresponding second electrode region 132 and supplies power to the corresponding first electrode region 131 through the second electrode region 132.

[0045] The first dielectric reflective layer 140 is capable of reflecting the light transmitted through the transparent first electrode region 131 to the side of the light-emitting epitaxial layer 110 opposite to the pixel transparent electrode 130 for light emission. In some embodiments, the first dielectric reflective layer 140 can be a DBR mirror, a multi-layer SiO2 / TiO2 dielectric film layer structure, or other non-conductive reflective structure layer.

[0046] Specifically, in combination with Figure 1 With Figure 2 As shown, the positions of the plurality of first vias 141 correspond to the positions of the second electrode regions 132 in the plurality of pixel transparent electrodes 130, the plurality of lead electrodes 150 are filled in the plurality of first vias 141 one by one, and the plurality of lead electrodes 150 are correspondingly electrically connected to the second electrode regions 132. The side of the plurality of lead electrodes 150 opposite to the second electrode regions 132 is exposed on the surface of the first dielectric reflective layer 140, so as to facilitate the contact with other electrode circuits.

[0047] When the side of the plurality of lead electrodes 150 opposite to the second electrode regions 132 is in contact with and electrically connected to other electrode circuits, the plurality of lead electrodes 150 can transmit current to the second electrode regions 132, and supply power to the corresponding first electrode regions 131 through the second electrode regions 132, and the first electrode regions 131 further transmit current to the first semiconductor layer 111, so that the light-emitting epitaxial layer 110 can emit light under the action of the current.

[0048] The projection of each first via 141 along the stacking direction is arranged to fall within the overlapping area of the corresponding pixel transparent electrode 130 and the current blocking layer 120, so that each display pixel point can correspond to the first dielectric reflective layer 140 in the stacking direction, without corresponding to the position of the first via 141 arranged on the first dielectric reflective layer 140. Therefore, when the display pixel points formed by corresponding to the plurality of first electrode regions 131 emit light, the light generated by the light-emitting epitaxial layer 110 can pass through the transparent first electrode region 131 to reach the first dielectric reflective layer 140, and then be reflected by the first dielectric reflective layer 140 to the side of the light-emitting epitaxial layer 110 opposite to the pixel transparent electrode 130, so as to reduce the light leakage from the first via 141, and make the light generated in the light-emitting epitaxial layer 110 concentrate on the side of the light-emitting epitaxial layer 110 opposite to the pixel transparent electrode 130 for emission, thereby improving the collimation of the light emission angle of the Micro-LED display device 10 and improving the optical efficiency of the Micro-LED display device 10.

[0049] In some embodiments, the first dielectric reflective layer 140 can also cover the side of the current blocking layer 120 opposite to the light emitting epitaxial layer 110, so that the first dielectric reflective layer 140 can also reflect the light leakage through the current blocking layer 120, thereby improving the collimation of the light emitting angle of the Micro-LED display device 10 and improving the light emitting efficiency of the Micro-LED display device 10.

[0050] Based on the above structure, the positions of the first electrode region 131 and the second electrode region 132 can present the following two embodiments:

[0051] The first embodiment is as follows:

[0052] As shown in FIG. 1A and FIG. 1B, the current blocking layer 120 can be provided with a plurality of first windows 121 spaced apart from each other and arranged in an array, and the first electrode region 131 can be arranged in the corresponding first window 121. The second electrode region 132, the first via 141, and the lead electrode 150 can be arranged around the first electrode region 131. Figure 1 Figure 2 As shown in FIG. 1A and FIG. 1B, the current blocking layer 120 can be provided with a plurality of first windows 121 spaced apart from each other and arranged in an array, and the first electrode region 131 can be arranged in the corresponding first window 121. The second electrode region 132, the first via 141, and the lead electrode 150 can be arranged around the first electrode region 131.

[0053] Specifically, the second electrode region 132, the first via 141, and the lead electrode 150 can all be arranged around the first electrode region 131. In this way, the lead electrode 150 can transmit the driving current to the first electrode region 131 through the second electrode region 132 around the first electrode region 131, thereby improving the current diffusion effect in the first semiconductor layer 111 and making the brightness of the display pixel points more uniform. Moreover, in this way, the area of the display pixel points of the light emitting epitaxial layer 110 can be more concentrated, thereby ensuring the display effect of the light emitting epitaxial layer 110.

[0054] Specifically, the second electrode region 132, the first via 141, and the lead electrode 150 can all be arranged around the first electrode region 131. In this way, the lead electrode 150 can transmit the driving current to the first electrode region 131 through the second electrode region 132 around the first electrode region 131, thereby improving the current diffusion effect in the first semiconductor layer 111 and making the brightness of the display pixel points more uniform. Moreover, in this way, the area of the display pixel points of the light emitting epitaxial layer 110 can be more concentrated, thereby ensuring the display effect of the light emitting epitaxial layer 110.

[0055] Moreover, the plurality of pixel transparent electrodes 130 are spaced apart by the current blocking layer 120, which can increase the distance between two display pixel points, thereby increasing the diffusion distance of the driving current in the first semiconductor layer 111, and thereby reducing the electrical crosstalk between the display pixel points.

[0056] In some embodiments, as shown in FIG. 2A and FIG. 2B, the current blocking layer 120 can be provided with a plurality of first windows 121 spaced apart from each other and arranged in an array, and the first electrode region 131 can be arranged in the corresponding first window 121. The second electrode region 132, the first via 141, and the lead electrode 150 can be arranged around the first electrode region 131. Figure 2 ​As shown, the first window 121 can be arranged in a circular shape, and the pixel transparent electrode 130 can be arranged in a cylindrical shape. When the pixel transparent electrode 130 and the lead electrode 150 are observed on the side of the pixel transparent electrode 130 away from the light-emitting epitaxial layer 110, the second electrode area 132 and the lead electrode 150 can be arranged in a ring shape and surround the first electrode area 131.

[0057] Of course, in other embodiments, the first window 121 can be rectangular or triangular or other shapes, and the second electrode area 132, the first via 141, and the lead-out electrode 150 can be adapted to the shape of the first window 121 and further configured as rectangular or triangular or other shapes. Moreover, in other embodiments, the second electrode area 132, the first via 141, and the lead-out electrode 150 can also be disposed only on one or both sides of the first electrode area 131, rather than being arranged around the first electrode area 131. This application does not specifically limit the shape of the lead-out electrode 150 here.

[0058] Second implementation method:

[0059] like Figure 3 as well as Figure 4 As shown, the current blocking layer 120 may include a plurality of current blocking patterns 122 spaced apart from each other and arranged in an array. The second electrode region 132 may cover the side of the corresponding current blocking pattern 122 facing away from the first semiconductor layer 111. The first electrode region 131 may be disposed around the second electrode region 132.

[0060] The multiple current blocking patterns 122 can correspond to multiple display pixel areas in the light-emitting epitaxial layer 110. Multiple pixel transparent electrodes 130 are spaced apart from each other and arranged in an array to define multiple display pixel points in the light-emitting epitaxial layer 110.

[0061] Specifically, such as Figure 3 as well as Figure 4 As shown, each pixel transparent electrode 130 corresponds to a current blocking pattern 122, and the second electrode region 132 of each pixel transparent electrode 130 covers the side of the current blocking pattern 122 facing away from the first semiconductor layer 111. The first electrode region 131 can surround the stacked second electrode region 132 and the current blocking pattern 122 in the vertical direction of the stacking direction, and is electrically connected to the first semiconductor layer 111. The first dielectric reflective layer 140 covers the side of the pixel transparent electrode 130 facing away from the first semiconductor layer 111, and covers the gaps between multiple pixel transparent electrodes 130. The first via 141 overlaps and contacts the second electrode region 132, and the lead-out electrode 150 fills the first via 141 and can be arranged in a columnar shape.

[0062] Therefore, after receiving the driving current, the second electrode region 132 can transmit the driving current to the first electrode region 131, and the first electrode region 131 further transmits the current to the first semiconductor layer 111. Therefore, in the stacking direction, the area corresponding to the second electrode region 132 located in the middle of the first electrode region 131 is a non-light-emitting area, and the annular first electrode region 131 defines the display pixel point corresponding to the light-emitting epitaxial layer 110.

[0063] By positioning the second electrode region 132 in the middle of the first electrode region 131, it is easier to set the first via 141 and the lead-out electrode 150 corresponding to the second electrode region 132, reducing the difficulty of adding the first via 141 and the lead-out electrode 150, thereby reducing the manufacturing difficulty of the Micro-LED display device 10. Furthermore, by reducing the spacing between display pixels, it is possible to reduce the size of the display area in the Micro-LED display device 10 and increase the density of display pixels.

[0064] In some implementations, such as Figure 4 As shown, the second electrode region 132 can be arranged in a cylindrical shape, and the lead-out electrode 150 can be arranged in a cylindrical shape corresponding to the second electrode region 132. When the pixel transparent electrode 130 and the lead-out electrode 150 are observed on the side of the pixel transparent electrode 130 away from the light-emitting epitaxial layer 110, the first electrode region 131 and the lead-out electrode 150 can be arranged in a ring shape and surround the second electrode region 132.

[0065] Of course, in other embodiments, the outer periphery of the first electrode region 131 may be rectangular or triangular or other shapes. Moreover, in other embodiments, the second electrode region 132, the first via 141 and the lead-out electrode 150 may be disposed only in one corner or half of the first electrode region 131, rather than in the middle of the first electrode region 131. This application does not make specific limitations here.

[0066] Based on the two different implementation methods described above, the side of the light-emitting epitaxial layer 110 facing away from the pixel transparent electrode 130 in both implementation methods can be configured as follows:

[0067] In some implementations, such as Figure 1 As shown, the display substrate 100 may further include a common transparent electrode 160 and a current diffusion electrode 170. A first recessed region 1121 is provided on the side of the second semiconductor layer 113 opposite to the active layer 112, and the current diffusion electrode 170 may be disposed in the first recessed region 1121. The current diffusion electrode 170 may be further electrically connected to the second semiconductor layer 113.

[0068] The current diffusion electrode 170 and the first recessed area 1121 can be arranged in a grid shape when viewed along the stacking direction, so as to form a plurality of light-emitting areas 1131 spaced apart from each other and arranged in an array. The first electrode area 131 at least partially falls within the corresponding light-emitting area 1131 along the stacking direction. Therefore, the plurality of light-emitting areas 1131 can also correspond to the display pixel points of the light-emitting epitaxial layer 110. When the display pixel points of the light-emitting epitaxial layer 110 emit light, the light can be emitted from the side of the plurality of light-emitting areas 1131, so as not to be blocked by the current diffusion electrode 170.

[0069] Further, the common transparent electrode 160 can cover the second semiconductor layer 113 and the current diffusion electrode 170, and be electrically connected with the current diffusion electrode 170. The conductivity of the current diffusion electrode 170 can be greater than that of the common transparent electrode 160.

[0070] The common transparent electrode 160 can be connected with an external circuit, and the common transparent electrode 160 can supply power to the second semiconductor layer 113 through the current diffusion electrode 170, so that the common transparent electrode 160 can be connected with the external circuit to provide a reference voltage for the light-emitting epitaxial layer 110, so that the light-emitting epitaxial layer 110 emits light under the joint action of the common transparent electrode 160, the current diffusion electrode 170, the pixel transparent electrode 130, and the extraction electrode 150.

[0071] Since the first recessed area 1121 is arranged in the second semiconductor layer 113, and the current diffusion electrode 170 is arranged in the first recessed area 1121 to be embedded in the second semiconductor layer 113, the current diffusion electrode 170 has a large contact area with the second semiconductor layer 113, and the conductivity of the current diffusion electrode 170 is greater than that of the common transparent electrode 160, which can facilitate the current diffusion electrode 170 to supply power to the second semiconductor layer 113, thereby improving the current diffusion efficiency between the current diffusion electrode 170 and the second semiconductor layer 113, improving the photoelectric conversion rate in the light-emitting epitaxial layer 110, and improving the light-emitting efficiency of the Micro-LED display device 10.

[0072] In some embodiments, the current diffusion electrode 170 can be formed of a conductive material such as Cr, Ti, Ni, Al, Pt metal, or Au metal. The common transparent electrode 160 can be an ITO electrode or the like.

[0073] The common transparent electrode 160 is arranged to be transparent, which can facilitate the light in the light-emitting epitaxial layer 110 to be emitted through the common transparent electrode 160, reduce the loss of the light when propagating in the common transparent electrode 160 layer, and improve the light-emitting efficiency of the Micro-LED display device 10.

[0074] In some embodiments, the Micro-LED display device 10 can also not be provided with the common transparent electrode 160, but only provided with the current diffusion electrode 170 to supply power to the second semiconductor layer 113.

[0075] In some embodiments, as shown in FIG. 1, the display substrate 100 can further include a first dielectric reflective layer 140, which can be disposed on the side of the common transparent electrode 160 facing the second semiconductor layer 113, and the reflectivity of the first dielectric reflective layer 140 is greater than the reflectivity of the common transparent electrode 160. Figure 1 In some embodiments, as shown in FIG. 1, the display substrate 100 can further include a first dielectric reflective layer 140, which can be disposed on the side of the common transparent electrode 160 facing the second semiconductor layer 113, and the reflectivity of the first dielectric reflective layer 140 is greater than the reflectivity of the common transparent electrode 160.

[0076] Optionally, the first recessed area 1121 can be formed by etching. Therefore, the depth of the first recessed area 1121 can be less than the thickness of the second semiconductor layer 113, which can prevent the active layer 112 from being damaged during etching, thereby ensuring the light-emitting intensity of the light-emitting epitaxial layer 110.

[0077] In some embodiments, as shown in FIG. 1, the display substrate 100 can further include a first dielectric reflective layer 140, which can be disposed on the side of the common transparent electrode 160 facing the second semiconductor layer 113, and the reflectivity of the first dielectric reflective layer 140 is greater than the reflectivity of the common transparent electrode 160. Figure 1 In some embodiments, as shown in FIG. 1, the display substrate 100 can further include a second dielectric reflective layer 180, which can be disposed on the side of the common transparent electrode 160 away from the second semiconductor layer 113, and the reflectivity of the second dielectric reflective layer 180 is less than the reflectivity of the first dielectric reflective layer 140, so as to form a resonant cavity between the first dielectric reflective layer 140 and the second dielectric reflective layer 180 for light emission from the side of the second dielectric reflective layer 180.

[0078] In some embodiments, as shown in FIG. 1, the display substrate 100 can further include a second dielectric reflective layer 180, which can be disposed on the side of the common transparent electrode 160 away from the second semiconductor layer 113, and the reflectivity of the second dielectric reflective layer 180 is less than the reflectivity of the first dielectric reflective layer 140, so as to form a resonant cavity between the first dielectric reflective layer 140 and the second dielectric reflective layer 180 for light emission from the side of the second dielectric reflective layer 180.

[0079] In some embodiments, as shown in FIG. 1, the display substrate 100 can further include a second dielectric reflective layer 180, which can be disposed on the side of the common transparent electrode 160 away from the second semiconductor layer 113, and the reflectivity of the second dielectric reflective layer 180 is less than the reflectivity of the first dielectric reflective layer 140, so as to form a resonant cavity between the first dielectric reflective layer 140 and the second dielectric reflective layer 180 for light emission from the side of the second dielectric reflective layer 180.

[0080] In some embodiments, as shown in FIG. 1, the display substrate 100 can further include a second dielectric reflective layer 180, which can be disposed on the side of the common transparent electrode 160 away from the second semiconductor layer 113, and the reflectivity of the second dielectric reflective layer 180 is less than the reflectivity of the first dielectric reflective layer 140, so as to form a resonant cavity between the first dielectric reflective layer 140 and the second dielectric reflective layer 180 for light emission from the side of the second dielectric reflective layer 180.

[0081] In some embodiments, as shown in FIG. 1, the display substrate 100 can further include a second dielectric reflective layer 180, which can be disposed on the side of the common transparent electrode 160 away from the second semiconductor layer 113, and the reflectivity of the second dielectric reflective layer 180 is less than the reflectivity of the first dielectric reflective layer 140, so as to form a resonant cavity between the first dielectric reflective layer 140 and the second dielectric reflective layer 180 for light emission from the side of the second dielectric reflective layer 180.

[0082] In some embodiments, the driving substrate 200 and the display substrate 100 of the two implementations can be connected to each other by hybrid bonding, and the specific structure can be as follows:

[0083] As an example, reference can be made to Figure 1 The display substrate 100 can further include a first bonding medium layer 190 and a plurality of extension electrodes 1000. The first bonding medium layer 190 can be disposed on the side of the first medium reflective layer 140 away from the first semiconductor layer 111, and a plurality of second vias 191 can be disposed on the first bonding medium layer 190. The plurality of second vias 191 are in communication with the corresponding first vias 141, and the plurality of extension electrodes 1000 are disposed in the corresponding second vias 191. Moreover, each extension electrode 1000 is in ohmic contact with the lead electrode 150 in the corresponding first via 141.

[0084] Among them, the extension electrode 1000, the lead electrode 150, and the pixel transparent electrode 130 can serve as the P electrode of the light-emitting epitaxial layer 110, and the current diffusion electrode 170 and the common transparent electrode 160 can serve as the N electrode of the light-emitting epitaxial layer 110.

[0085] As an example, reference can be made to Figure 1 The Micro-LED display device 10 can further include a driving substrate 200, and the driving substrate 200 can include a second bonding medium layer 210 and a plurality of power supply electrodes 220. The second bonding medium layer 210 can be provided with a plurality of third vias 211, and each power supply electrode 220 can be disposed in the corresponding third via 211.

[0086] Among them, the positions of the plurality of third vias 211 can correspond to the positions of the plurality of extension electrodes 1000, and the third via 211 can penetrate the second bonding medium layer 210 along the stacking direction. The first bonding medium layer 190 and the second bonding medium layer 210 are bonded to each other, and the extension electrode 1000 and the corresponding power supply electrode 220 are bonded to each other.

[0087] Optionally, when viewed along the stacking direction, the area of the extension electrode 1000 is greater than the area of the lead electrode 150, and the lead electrode 150 can be disposed in the middle of the extension electrode 1000. In this way, the extension electrode 1000 with a larger area is used to connect the lead electrode 150 and the power supply electrode 220, which can facilitate the connection and bonding of the extension electrode 1000 and the power supply electrode 220, thereby reducing the bonding difficulty.

[0088] In some embodiments, reference can be made to Figure 1The driving substrate 200 can further include a substrate body 230, the second bonding medium layer 210 and the plurality of power supply electrodes 220 can be disposed on one side of the substrate body 230 facing the light-emitting epitaxial layer 110, and the surface of the substrate body 230 is exposed in the third via hole 211. The substrate body 230 and its surface can be provided with conductive lines, and the power supply electrode 220 disposed in the third via hole 211 can be connected with the conductive lines on the substrate body 230.

[0089] Therefore, the substrate body 230 can provide driving current to the extension electrode 1000 through the plurality of power supply electrodes 220, and the driving current further flows to the lead-out electrode 150 and the pixel transparent electrode 130 through the extension electrode 1000, and finally reaches the first semiconductor layer 111, so as to realize power supply to the first semiconductor layer 111.

[0090] In some embodiments, the bonding between the driving substrate 200 and the display can be hybrid bonding between Cu / SiO2-Cu / SiO2, hybrid bonding between Cu / SiN-Cu / SiN, hybrid bonding between Cu / SiO2-Cu / SiN, hybrid bonding between Cu / BCB-Cu / BCB, or hybrid bonding between Cu / PI-Cu / PI. Among them, the first bonding medium layer 190 and the second bonding medium layer 210 can be non-conductive medium layers such as SiO2 or BCB, and the extension electrode 1000 and the power supply electrode 220 can be metal materials such as Au or Cu.

[0091] In this way, the connection between the driving substrate 200 and the display substrate 100 is set in the form of hybrid bonding, which can enhance the connection strength between the driving substrate 200 and the display substrate 100, and enhance the connection stability of the Micro-LED display device 10.

[0092] In other embodiments, the driving substrate 200 and the display substrate 100 in the first embodiment and the second embodiment can also be connected in the form of wafer bonding, and the specific connection structure can be as follows:

[0093] For example, the connection between the driving substrate 200 and the display substrate 100 can be realized in the form of wafer bonding. Figure 3 The display substrate 100 can include a metal bonding layer 1100, which can be disposed on the side of the first medium reflection layer 140 away from the first semiconductor layer 111.

[0094] For example, the connection between the driving substrate 200 and the display substrate 100 can be realized in the form of wafer bonding. Figure 3 The driving substrate 200 can include a plurality of power supply electrodes 220 spaced apart from each other and arranged in an array, and each metal bonding pattern 1110 is further bonded with a corresponding power supply electrode 220.

[0095] In some implementation methods, reference may be made to Figure 3 The driving substrate 200 may further include a substrate body 230 and a first metal bonding layer 1200. Multiple power supply electrodes 220 are disposed on the side of the substrate body 230 facing the light-emitting epitaxial layer 110. The first metal bonding layer 1200 covers the side of the substrate body 230 facing the light-emitting epitaxial layer 110, and multiple metal bonding patterns 1110 are bonded to the first metal bonding layer 1200. The multiple power supply electrodes 220 are electrically connected to the multiple metal bonding patterns 1110 through the first metal bonding layer 1200. Conductive lines may be provided inside and on the surface of the substrate body 230, and the multiple power supply electrodes 220 can be connected to the conductive lines on the substrate body 230.

[0096] For reference Figure 3 The first recessed region 1121 can extend along the stacking direction into the metal bonding layer 1100 and the first metal bonding layer 1200, so as to divide the metal bonding layer 1100 into a plurality of spaced-apart metal bonding patterns 1110 and the first metal bonding layer 1200 into a plurality of spaced-apart first metal bonding patterns 1210. Each metal bonding pattern 1110 is electrically connected to a corresponding lead electrode 150, and each first metal bonding pattern 1210 is connected to a corresponding power supply electrode 220.

[0097] Specifically, such as Figure 3 As shown, when viewed along the stacking direction, the position of the first recessed region 1121 and the position of the pixel transparent electrode 130 can be staggered, and the grid-like first recessed region 1121 can separate each pixel transparent electrode 130. When the first recessed region 1121 extends along the stacking direction to the metal bonding layer 1100 and the first metal bonding layer 1200, it can further separate the first dielectric filling layer, the metal bonding layer 1100 and the first metal bonding layer 1200, so that adjacent metal bonding patterns 1110 and first metal bonding patterns 1210 will not be electrically connected.

[0098] Therefore, the substrate body 230 can further transmit driving current to the multiple first metal bonding patterns 1210 and multiple metal bonding patterns 1110 through multiple power supply electrodes 220. The driving current then passes through the multiple first metal bonding patterns 1210, multiple metal bonding patterns 1110, lead-out electrode 150 and pixel transparent electrode 130 in sequence to reach the first semiconductor layer 111, so as to realize the conduction of light-emitting epitaxial layer 110.

[0099] In the fabrication of the Micro-LED display device 10, wafer bonding can be achieved between the driving substrate 200 and the display substrate 100. Specifically, the metal bonding layer 1100 is first bonded to the first metal bonding layer 1200 in the driving substrate 200, and the power supply electrode 220 of the driving substrate is electrically connected to the metal bonding layer 1100. Subsequently, when the first recessed region 1121 is formed on the display substrate 100, the depth of the first recessed region 1121 can be increased, so that the first recessed region 1121 can divide the metal bonding layer 1100 into multiple metal bonding patterns 1110 spaced apart from each other, and the first recessed region 1121 can also divide the first metal bonding layer 1200 into multiple first metal bonding patterns 1210 spaced apart from each other.

[0100] Since wafer bonding does not require high alignment accuracy between the metal bonding layer 1100 and the driving substrate 200, this method can reduce the bonding difficulty between the driving substrate 200 and the display substrate 100, simplify the fabrication process of the Micro-LED display device 10, and improve the yield of the Micro-LED display device 10.

[0101] In some implementation methods, reference may be made to Figure 3 The current diffusion electrode 170 may extend at least to the first dielectric reflective layer 140 and remain electrically insulated from the first semiconductor, the active layer 112 and the metal bonding pattern 1110.

[0102] For example, in some implementation methods, reference may be made to Figure 3 The first recessed region 1121 may have insulating spacer layers 1122 on both its walls and bottom. The current diffusion electrode 170 is disposed within the first recessed region 1121 and is electrically isolated from the first semiconductor, active layer 112, metal bonding pattern 1110, and first metal bonding pattern 1210 by the insulating spacer layer 1122. Optionally, the insulating spacer layer 1122 may be a non-conductive dielectric layer such as SiO2, SiN, Al2O3, or BCB.

[0103] This configuration prevents the current in the current diffusion electrode 170 from diffusing into the first semiconductor, the active layer 112, and the metal bonding pattern 1110, thus preventing short circuits in the Micro-LED display device 10. It also prevents current crosstalk between display pixels in the light-emitting epitaxial layer 110, thereby increasing the safety of the Micro-LED display device 10 and ensuring its light-emitting effect.

[0104] Of course, in other embodiments, other methods can be selected to achieve electrical insulation between the current diffusion electrode 170 and the first semiconductor, the active layer 112 and the metal bonding pattern 1110. These methods will not be specifically listed here.

[0105] Based on the various structures of the Micro-LED display device 10 described above, the fabrication process of the Micro-LED display device 10 is described below by way of example. For example... Figure 5 As shown, where Figure 5 The present application illustrates a manufacturing method flow for a Micro-LED display device 10 according to one embodiment. Figure 6 and Figure 7 It shows Figure 5 The process steps shown involve the preparation process and component structure.

[0106] S100: A light-emitting epitaxial layer is formed on a substrate, wherein the light-emitting epitaxial layer includes a first semiconductor layer, an active layer and a second semiconductor layer sequentially stacked along a predetermined stacking direction, and the first semiconductor layer is located on the side of the light-emitting epitaxial layer away from the substrate.

[0107] As an example, this step can be referred to accordingly. Figure 6 or Figure 7 .

[0108] Specifically, a substrate 300 is provided. The substrate 300 can be made of sapphire, silicon, SiC, or GaN materials. For example, if the substrate 300 is made of Si, the stress caused by thermal mismatch during the subsequent bonding process with the silicon-based driving substrate 200 can be minimized, and it is less likely to have a significant impact on the fabrication process of the Micro-LED display device 10.

[0109] In some embodiments, a first semiconductor layer 111, an active layer 112, and a second semiconductor layer 113 can be sequentially formed on one side of a substrate 300 by a growth process.

[0110] Alternatively, in other embodiments, the light-emitting epitaxial layer 110 can be fixed to the substrate 300 by a transfer method. If the light-emitting epitaxial layer 110 is fixed to the substrate 300 by a transfer method, the substrate 300 can also be made of materials such as ceramic, glass, or a PCB substrate, and is not limited thereto. For example, the light-emitting epitaxial layer 110 can be transferred and fixed to the substrate 300 with the second semiconductor layer 113 facing the substrate 300, and adhesive can be applied to the substrate 300 before contact with the light-emitting epitaxial layer 110 to bond and fix the light-emitting epitaxial layer 110.

[0111] The specific definitions of the first semiconductor layer 111, the active layer 112, and the second semiconductor layer 113 are described above and will not be repeated here.

[0112] S200: A current blocking layer is formed on the side of the first semiconductor layer away from the active layer, wherein the current blocking layer is partially exposed to the first semiconductor layer.

[0113] Specifically, corresponding to the different structures in the first and second embodiments of the current blocking layer 120 mentioned above, this step can be divided into two different fabrication processes:

[0114] Corresponding to the structure of the first embodiment of the current blocking layer 120, the fabrication process for this step is shown in steps S211 to S212 below:

[0115] S211: A current blocking layer is formed on the side of the first semiconductor layer away from the active layer.

[0116] As an example, this step can be referred to accordingly. Figure 6 The current blocking layer 120 can completely cover the side of the first semiconductor layer 111 that is away from the active layer 112.

[0117] S212: Multiple first windows are formed in the current blocking layer, spaced apart from each other and arranged in an array.

[0118] As an example, this step can be referred to accordingly. Figure 6 Optionally, a plurality of first windows 121 can be formed in the current blocking layer 120 by etching, and the plurality of first windows 121 can expose the first semiconductor layer 111. The positions of the plurality of first windows 121 correspond to the display positions required by the Micro-LED display device 10, that is, the positions of the plurality of first windows 121 are consistent with the positions of the display pixels in the light-emitting epitaxial layer 110.

[0119] As an example, after forming a plurality of first windows 121, when the current blocking layer 120 is viewed along the side of the current blocking layer 120 that is away from the first semiconductor layer 111, the current blocking layer 120 may appear as a grid.

[0120] Corresponding to the structure of the second embodiment of the current blocking layer 120, the fabrication process for this step is shown in step S221 below:

[0121] S221: Multiple current blocking patterns spaced apart from each other and arranged in an array on the side of the first semiconductor layer away from the active layer, the multiple current blocking patterns forming a current blocking layer.

[0122] As an example, this step can be referred to accordingly. Figure 7Specifically, multiple current blocking patterns 122 are formed on the side of the first semiconductor layer 111 away from the active layer 112 according to the desired position of the display pixel, and the multiple current blocking patterns 122 can be located at the middle position of the display pixel.

[0123] In some embodiments, SiO2 material can be used as the current blocking layer 120, and the thickness of the current blocking layer 120 can be between 20 nm and 300 nm. For example, the thickness of the current blocking layer 120 in the stacking direction is 20 nm, 40 nm, 80 nm, 130 nm, 170 nm, 280 nm or 300 nm.

[0124] S300: A plurality of pixel transparent electrodes are formed on the side of the first semiconductor layer away from the active layer, wherein the plurality of pixel transparent electrodes are spaced apart from each other and arranged in an array, each pixel transparent electrode includes a first electrode region and a second electrode region, the first electrode region covers the exposed portion of the first semiconductor layer from the current blocking layer and forms a conductive connection thereto, and the second electrode region covers the side of the current blocking layer away from the first semiconductor layer.

[0125] Similarly, depending on the different embodiments of the pixel transparent electrode 130, this step can present different fabrication processes:

[0126] The fabrication process corresponding to this step in the first embodiment of the pixel transparent electrode 130 is shown in steps S311 to S312 below:

[0127] S311: The first electrode region of the multiple pixel transparent electrodes fills the first opening and covers the first semiconductor layer exposed in the first opening.

[0128] As an example, this step can be referred to accordingly. Figure 6 .

[0129] S312: The second electrode region of the multiple pixel transparent electrodes covers the side of the corresponding current blocking pattern away from the first semiconductor layer, and the second electrode region is arranged around the first electrode region.

[0130] As an example, this step can be referred to accordingly. Figure 6 Among them, the multiple pixel transparent electrodes 130 are spaced apart from each other by corresponding multiple first windows 121, and the multiple pixel transparent electrodes 130 do not contact each other.

[0131] The fabrication process corresponding to this step in the second embodiment of the pixel transparent electrode 130 is shown in step S321 below:

[0132] S321: The second electrode area of ​​the multiple pixel transparent electrodes covers the side of the corresponding current blocking pattern away from the first semiconductor layer, and the first electrode area is arranged around the corresponding second electrode area and the current blocking pattern.

[0133] As an example, this step can be referred to accordingly. Figure 7 Similarly, multiple pixel transparent electrodes 130 are spaced apart by corresponding multiple first windows 121, and the current blocking pattern 122 is covered in the middle by the pixel transparent electrodes 130.

[0134] In some implementations, the pixel transparent electrode 130 can be made of ITO material, and its thickness can be between 10 nm and 100 nm. For example, in the stacking direction, the thickness of the pixel transparent electrode 130 can be 10 nm, 20 nm, 40 nm, 50 nm, 70 nm, or 100 nm.

[0135] S400: A first dielectric reflective layer is formed covering multiple pixel transparent electrodes, and multiple first vias are formed on the first dielectric reflective layer, wherein the projection of each first via along the stacking direction falls into the overlapping area of ​​the second electrode region of the corresponding pixel transparent electrode and the current blocking layer.

[0136] In some embodiments, a first dielectric reflective layer 140 can be deposited onto the side of the plurality of pixel transparent electrodes 130 facing away from the first semiconductor layer 111. The first dielectric reflective layer 140 not only covers the side of the pixel transparent electrodes 130 facing away from the first semiconductor layer 111, but can also fill the gaps between the plurality of pixel transparent electrodes 130. Furthermore, a plurality of first vias 141 can be formed on the first dielectric reflective layer 140 by etching, with each first via 141 penetrating the first dielectric reflective layer 140 along the stacking direction, and the second electrode region 132 partially exposed within the first via 141.

[0137] The structure of the first embodiment corresponding to the pixel transparent electrode 130 is as follows: Figure 6 As shown, the first via 141 can correspond to the second electrode region 132. When viewed along the stacking direction, the first via 141 can appear to be arranged around the first electrode region 131.

[0138] The structure of the second embodiment corresponding to the pixel transparent electrode 130 is as follows: Figure 7 As shown, the first via 141 can correspond to the second electrode region 132. When viewed along the stacking direction, the first via 141 can be located in the middle of the first electrode region 131, and the first electrode region 131 can be arranged around the first via 141.

[0139] In some implementations, the first dielectric reflective layer 140 is a multilayer SiO2 / TiO2 repeating structure, where the thickness of the SiO2 and TiO2 is determined by the emission wavelength of the device, typically [missing information]. Where λ is the emission wavelength and n is the refractive index of the medium.

[0140] S500: Lead-out electrodes are formed in multiple first vias, wherein each lead-out electrode is electrically connected to the corresponding second electrode region and supplies power to the corresponding first electrode region through the second electrode region.

[0141] As an example, lead-out electrodes 150 can be formed in a plurality of first vias 141 by sputtering deposition and electroplating. Each lead-out electrode 150 makes conductive contact with the corresponding second electrode region 132, and the side of the lead-out electrode 150 facing away from the second electrode region 132 can be exposed on the side of the first dielectric reflective layer 140 facing away from the first semiconductor layer 111.

[0142] The structure of the first embodiment corresponding to the pixel transparent electrode 130 is as follows: Figure 6 As shown, the first via 141 can correspond to the second electrode region 132. When viewed along the stacking direction, the first via 141 can appear to be arranged around the first electrode region 131.

[0143] The structure of the second embodiment corresponding to the pixel transparent electrode 130 is as follows: Figure 7 As shown, the first via 141 can correspond to the second electrode region 132. When viewed along the stacking direction, the first via 141 can be set in the middle of the first electrode region 131, and the first electrode region 131 presents a configuration surrounding the first via 141.

[0144] Based on the structure of the display substrate 100 described above, the display substrate 100 can be disposed on the driving substrate 200, and a bonding connection can be achieved between them. The wafer bonding process between the display substrate 100 and the driving substrate 200 will be described exemplarily below using the structure of the pixel transparent electrode 130 in the first embodiment as an example. Figure 8 This application illustrates a manufacturing method flow for another part of the Micro-LED display device 10 according to one embodiment of the present application. Figure 9 and Figure 10 It shows Figure 8 The process steps shown involve the preparation process and component structure.

[0145] S600: A metal bonding layer is formed on the side of the first dielectric reflective layer away from the first semiconductor layer, wherein the metal bonding layer is electrically connected to a plurality of lead-out electrodes.

[0146] In some implementation methods, reference may be made to Figure 9A metal bonding layer 1100 can be deposited on the side of the first dielectric reflective layer 140 opposite to the first semiconductor layer 111. Since the surfaces of the plurality of lead electrodes 150 are exposed on the side of the first dielectric reflective layer 140 opposite to the first semiconductor layer 111, the metal bonding layer 1100 can make conductive contact with the plurality of lead electrodes 150, thereby achieving a conductive connection.

[0147] The metal bonding layer 1100 can be a bonding metal with different structures such as Ti / Pt / AuSn, Ti / Pt / Au, or Ti / Pt / NiSn.

[0148] S700: Bond the metal bonding layer to the first metal bonding layer of the driving substrate.

[0149] A driving substrate 200 is provided. The driving substrate 200 may include a substrate body 230, a first metal bonding layer 1200 and a plurality of power supply electrodes 220. The plurality of power supply electrodes 220 are spaced apart from each other and arranged in an array on one side of the substrate body 230. The first metal bonding layer 1200 covers the plurality of power supply electrodes 220 and the plurality of substrate bodies 230.

[0150] For specific details, please refer to Figure 9 A first metal bonding layer 1200 is formed on the side of the driving substrate 200 facing the metal bonding layer 1100, and a plurality of power supply electrodes 220 form ohmic contacts with the first metal bonding layer 1200. In some embodiments, the first metal bonding layer 1200 can be a bonding metal with different structures such as Ti / Pt / AuSn, Ti / Pt / Au, or Ti / Pt / NiSn.

[0151] Further references can be made. Figure 9 With the metal bonding layer 1100 facing the multiple power supply electrodes 220, the display substrate 100 is inverted and placed on the driving substrate 200. Then, the bonding between the metal bonding layer 1100 and the first metal bonding layer 1200 can be further achieved by hot pressing, so that the metal bonding layer 1100 and the first metal bonding layer 1200 achieve ohmic contact. The metal bonding layer 1100 is electrically connected to the multiple power supply electrodes 220 through the first metal bonding layer 1200.

[0152] S800: Remove the substrate and form a first recessed region on the side of the second semiconductor layer away from the active layer, wherein the first recessed region extends along the stacking direction to the metal bonding layer to divide the metal bonding layer into a plurality of metal bonding patterns spaced apart from each other, and further divides the first metal bonding layer into a plurality of first metal bonding patterns, each metal bonding pattern being conductively connected to the corresponding lead electrode and the power supply electrode of the driving substrate, wherein each metal bonding pattern is conductively connected to the corresponding lead electrode and the first metal bonding pattern, and each first metal bonding pattern is conductively connected to the corresponding power supply electrode.

[0153] After fixing the bonding drive substrate 200, refer to Figure 9 The substrate 300 on the side of the second semiconductor layer 113 opposite to the active layer 112 can be removed. Specifically, the substrate 300 can be removed by processes such as grinding, chemical etching, or laser lift-off (LLO) to expose the second semiconductor layer 113.

[0154] As an example, see reference Figure 10 The second semiconductor layer 113 is etched on the side opposite to the active layer 112 to form a first recessed region 1121, wherein the etched region is offset from the pixel transparent electrode 130. Optionally, when viewed along the stacking direction, the first recessed region 1121 may appear as a grid.

[0155] As an example, see reference Figure 10 The first recessed region 1121 can extend along the stacking direction to the metal bonding layer 1100 and the first metal bonding layer 1200, that is, the depth of the first recessed region 1121 is equal to the light-emitting epitaxial layer 110, the first dielectric reflective layer 140, the metal bonding layer 1100, and the first metal bonding layer 1200. The grid-like first recessed region 1121 divides the metal bonding layer 1100 into multiple metal bonding patterns 1110, and further divides the first metal bonding layer 1200 into multiple first metal bonding patterns 1210. Each metal bonding pattern 1110 is electrically connected to the corresponding lead electrode 150 and the first metal bonding pattern 1210, and each first metal bonding pattern 1210 is electrically connected to the corresponding power supply electrode 220.

[0156] The first recessed region 1121 can be formed by a two-step etching method. First, a semiconductor photoresist mask is formed to etch the light-emitting epitaxial layer 110. Then, a semiconductor photoresist mask is used to etch the first dielectric reflective layer 140, the metal bonding layer 1100, and the first metal bonding layer 1200, thereby protecting the exposed sidewalls of the light-emitting epitaxial layer 110.

[0157] S900: A current diffusion electrode is formed in the first recessed region, wherein when viewed along the stacking direction, the current diffusion electrode and the first recessed region are arranged in a grid pattern to form a plurality of light-emitting regions 1131 that are spaced apart from each other and arranged in an array, and the first electrode region at least partially falls within the corresponding light-emitting region 1131 along the stacking direction.

[0158] In some implementations, as exemplified, reference may be made to Figure 10 First, the inner wall and bottom of the first recessed region 1121 can be insulated to isolate the first semiconductor, active layer 112 and metal bonding pattern 1110 exposed in the first recessed region 1121.

[0159] For example, you can refer to Figure 10 An insulating spacer layer 1122 can be added to the inner wall and bottom of the first recessed area 1121. This embodiment does not specifically limit the method of achieving the insulation treatment.

[0160] As an example, see reference Figure 10 In the first recessed area 1121, a current diffusion electrode 170 is further formed by sputtering and electroplating. The current diffusion electrode 170 also presents a grid shape to form a plurality of light-emitting areas 1131 that are spaced apart from each other and arranged in an array. The plurality of light-emitting areas 1131 correspond to the first electrode area 131 of the plurality of pixel transparent electrodes 130 to correspond to the plurality of display pixels in the light-emitting epitaxial layer 110.

[0161] S1000: A common transparent electrode is formed covering the second semiconductor layer and the current diffusion electrode, wherein the common transparent electrode is electrically connected to the current diffusion electrode, and the conductivity of the current diffusion electrode is greater than that of the common transparent electrode.

[0162] As an example, see reference Figure 10 A common transparent electrode 160 can be covered on the side of the second semiconductor layer 113 opposite to the active layer 112. The common transparent electrode 160 is electrically connected to the current diffusion electrode 170 and the second semiconductor layer 113, so that the current diffusion electrode 170 can supply power to the second semiconductor layer 113 through the common transparent electrode 160.

[0163] The conductivity of the current diffusion electrode 170 is set to be greater than that of the common transparent electrode 160, so that the current diffusion electrode 170 can diffuse the current in the common transparent electrode 160 to further diffuse to the second semiconductor layer 113, thereby improving the current diffusion effect in the second semiconductor layer 113.

[0164] S1100: A second dielectric reflective layer is formed on the side of the common transparent electrode away from the second semiconductor layer, wherein the reflectivity of the second dielectric reflective layer is less than that of the first dielectric reflective layer, so as to form a resonant cavity from the second dielectric reflective layer between the first dielectric reflective layer and the second dielectric reflective layer.

[0165] For a detailed description of the second dielectric reflective layer 180, please refer to the above text; this step will not be repeated here.

[0166] In the second embodiment, the display substrate 100 can also be equipped with a driving substrate 200, a current diffusion electrode 170, a common transparent electrode 160, and a second dielectric reflective layer 180, referring to steps S600 to S1100. This embodiment will not be described in detail here.

[0167] Of course, in other embodiments, the display substrate 100 and the driving substrate 200 in the Micro-LED display device 10 may be connected by a hybrid bonding method.

[0168] In some embodiments, after step S500, a first bonding dielectric layer 190 can be covered on the side of the first dielectric reflective layer 140 facing away from the pixel transparent electrode 130. Then, the first bonding dielectric layer 190 is etched to form a plurality of second vias 191, and a plurality of extended electrodes 1000 are added within the first vias 141. The plurality of extended electrodes 1000 correspond one-to-one with a plurality of lead-out electrodes 150 and are electrically connected. The driving substrate 200 may also include a second bonding dielectric layer 210 and a plurality of power supply electrodes 220.

[0169] Furthermore, with multiple extended electrodes 1000 facing multiple power supply electrodes 220, the display substrate 100 is inverted on the driving substrate 200, and surface activation bonding is used to bond the multiple power supply electrodes 220 and the multiple extended electrodes 1000 to each other, with the first bonding dielectric layer 190 and the second bonding dielectric layer 210 bonded to each other. A high-temperature annealing process is then used to achieve electrical connection between the multiple extended electrodes 1000 and the driving substrate 200. After bonding, the substrate 300 is removed, exposing the second semiconductor layer 113.

[0170] Since the first bonding dielectric layer 190 separates the multiple extended electrodes 1000 and the second bonding dielectric layer 210 separates the multiple power supply electrodes 220, the depth of the first recessed region 1121 is less than the thickness of the second semiconductor layer 113 when the first recessed region 1121 is subsequently formed. Then, a current diffusion electrode 170 is filled into the first recessed region 1121, and the current diffusion electrode 170 is electrically connected to the second semiconductor. Further, a common transparent electrode 160 and a second dielectric reflective layer 180 are sequentially covered on the side of the second semiconductor opposite to the active layer 112. The common transparent electrode 160 is electrically connected to the second semiconductor layer 113 and the current diffusion electrode 170, and the reflectivity of the second dielectric reflective layer 180 is less than the reflectivity of the first dielectric reflective layer 140.

[0171] In summary, this application provides a plurality of pixel transparent electrodes 130 on one side of the first semiconductor of the light-emitting epitaxial layer 110 to supply power to the light-emitting epitaxial layer 110. Each pixel transparent electrode 130 has a plurality of first electrode regions 131 and a plurality of second electrode regions 132. The plurality of first electrode regions 131 are spaced apart by back current blocking layers 120. The first electrode regions 131 cover and are electrically connected to the first semiconductor layer 111 to form the display pixel area of ​​the Micro-LED display device 10. The second electrode regions 132 of the pixel transparent electrodes 130 cover the side of the current blocking layer 120 facing away from the first semiconductor layer 111. A first dielectric reflective layer 140 further covers the side of the pixel transparent electrodes 130 facing away from the first semiconductor layer 111. The first dielectric reflective layer 140 can reflect light to the other side, thereby improving the collimation of the light emission angle of the Micro-LED display device 10 and increasing the optical efficiency of the Micro-LED display device 10. Furthermore, the first dielectric reflective layer 140 is provided with multiple first vias 141 that overlap with the multiple second electrode regions 132 and the current blocking layer 120. Multiple lead-out electrodes 150 fill the multiple first vias 141 and are electrically connected to the multiple second electrode regions 132. External circuits can supply power to the multiple second electrode regions 132 through the multiple lead-out electrodes 150, and the multiple second electrode regions 132 then supply power to the multiple first electrode regions 131. Therefore, the display pixel area of ​​the light-emitting epitaxial layer 110 corresponds to the first electrode region 131, and the side of the first electrode region 131 facing away from the light-emitting epitaxial layer 110 is completely covered by the first dielectric reflective layer 140. The first electrode region 131 is connected to the contact current through the second electrode regions 132 that do not correspond to the display pixel area and the lead-out electrodes 150. Therefore, when the display pixel area formed by the multiple first electrode areas 131 emits light, the light is reflected by the first dielectric reflective layer 140 and emitted from the light-emitting side when it is transmitted to one side of the first electrode area 131, which further improves the collimation of the light emission angle of the Micro-LED display device 10, reduces light leakage, and improves the luminous efficiency of the Micro-LED display device 10.

[0172] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A Micro-LED display device, characterized in that, The Micro-LED display device includes a display substrate, the display substrate comprising: The light-emitting epitaxial layer includes a first semiconductor layer, an active layer, and a second semiconductor layer sequentially stacked along a predetermined stacking direction. A current blocking layer is disposed on the side of the first semiconductor layer away from the active layer, and partially exposed outside the first semiconductor layer; Multiple pixel transparent electrodes are spaced apart from each other and arranged in an array. Each pixel transparent electrode includes a first electrode region and a second electrode region, wherein the first electrode region covers the exposed portion of the first semiconductor layer from the current blocking layer and forms a conductive connection thereto, and the second electrode region covers the side of the current blocking layer away from the first semiconductor layer. A first dielectric reflective layer covers the plurality of pixel transparent electrodes and is provided with a plurality of first vias. The projection of each first via along the stacking direction falls into the overlapping area of ​​the second electrode region of the corresponding pixel transparent electrode and the current blocking layer. Multiple lead-out electrodes are provided, each of which is disposed in a corresponding first via. The lead-out electrode is electrically connected to a corresponding second electrode region and supplies power to the corresponding first electrode region through the second electrode region.

2. The Micro-LED display device according to claim 1, characterized in that, The current blocking layer is provided with a plurality of first windows spaced apart from each other and arranged in an array. The first electrode area is disposed in the corresponding first window, and the second electrode area, the first via and the lead-out electrode are disposed around the first electrode area.

3. The Micro-LED display device according to claim 1, characterized in that, The current blocking layer includes a plurality of current blocking patterns spaced apart from each other and arranged in an array. The second electrode region covers the side of the corresponding current blocking pattern that is away from the first semiconductor layer, and the first electrode region is disposed around the second electrode region.

4. The Micro-LED display device according to any one of claims 1-3, characterized in that, The display substrate further includes a common transparent electrode and a current diffusion electrode. A first recessed region is provided on the side of the second semiconductor layer away from the active layer. The current diffusion electrode is disposed in the first recessed region. When viewed along the stacking direction, the current diffusion electrode and the first recessed region are arranged in a grid pattern to form a plurality of light-emitting regions that are spaced apart from each other and arranged in an array. The first electrode region at least partially falls within the corresponding light-emitting region along the stacking direction. The common transparent electrode covers the second semiconductor layer and the current diffusion electrode and is electrically connected to the current diffusion electrode. The conductivity of the current diffusion electrode is greater than that of the common transparent electrode.

5. The Micro-LED display device according to claim 4, characterized in that, In the stacking direction, the depth of the first recessed region is less than the thickness of the second semiconductor layer, and the current diffusion electrode is further conductively connected to the second semiconductor layer.

6. The Micro-LED display device according to claim 4, characterized in that, The display substrate further includes a second dielectric reflective layer, which is disposed on the side of the common transparent electrode away from the second semiconductor layer. The reflectivity of the second dielectric reflective layer is less than that of the first dielectric reflective layer, so as to form a resonant cavity between the first dielectric reflective layer and the second dielectric reflective layer, from which light is emitted from the second dielectric reflective layer.

7. The Micro-LED display device according to claim 4, characterized in that, The display substrate further includes a metal bonding layer disposed on the side of the first dielectric reflective layer away from the first semiconductor layer. The first recessed region extends to the metal bonding layer along the stacking direction to divide the metal bonding layer into a plurality of spaced-apart metal bonding patterns. Each metal bonding pattern is electrically connected to a corresponding lead-out electrode. The Micro-LED display device further includes a driving substrate, which includes a plurality of power supply electrodes spaced apart from each other and arranged in an array. Each metal bonding pattern is further bonded to a corresponding power supply electrode.

8. The Micro-LED display device according to claim 7, characterized in that, The current diffusion electrode extends at least to the first dielectric reflective layer and remains electrically insulated from the first semiconductor, the active layer, and the metal bonding pattern.

9. The Micro-LED display device according to any one of claims 1-3, characterized in that, The display substrate further includes a first bonding dielectric layer and a plurality of extended electrodes. The first bonding dielectric layer is disposed on the side of the first dielectric reflective layer opposite to the first semiconductor layer. A plurality of second vias are disposed on the first bonding dielectric layer, each second via communicating with a corresponding first via. Each extended electrode is disposed within a corresponding second via. The Micro-LED display device further includes a driving substrate. The driving substrate includes a second bonding dielectric layer and a plurality of power supply electrodes. A plurality of third vias are disposed on the second bonding dielectric layer, each power supply electrode being disposed within a corresponding third via. The first bonding dielectric layer and the second bonding dielectric layer are bonded to each other, and the extended electrodes are respectively bonded to the corresponding power supply electrodes.

10. A method for manufacturing a Micro-LED display device, characterized in that, A light-emitting epitaxial layer is formed on a substrate, wherein the light-emitting epitaxial layer includes a first semiconductor layer, an active layer and a second semiconductor layer sequentially stacked along a predetermined stacking direction, and the first semiconductor layer is located on the side of the light-emitting epitaxial layer away from the substrate; A current blocking layer is formed on the side of the first semiconductor layer away from the active layer, wherein the current blocking layer is partially exposed outside the first semiconductor layer; Multiple pixel transparent electrodes are formed on the side of the first semiconductor layer away from the active layer. The multiple pixel transparent electrodes are spaced apart from each other and arranged in an array. Each pixel transparent electrode includes a first electrode region and a second electrode region. The first electrode region covers the exposed portion of the first semiconductor layer from the current blocking layer and forms a conductive connection with it. The second electrode region covers the side of the current blocking layer away from the first semiconductor layer. A first dielectric reflective layer is formed to cover the plurality of pixel transparent electrodes, and a plurality of first vias are formed on the first dielectric reflective layer, wherein the projection of each first via along the stacking direction falls into the overlapping area of ​​the second electrode region of the corresponding pixel transparent electrode and the current blocking layer. Lead-out electrodes are formed in the plurality of first vias, wherein each lead-out electrode is electrically connected to the corresponding second electrode region and supplies power to the corresponding first electrode region via the second electrode region.

11. The method according to claim 10, characterized in that, The method further includes: A metal bonding layer is formed on the side of the first dielectric reflective layer away from the first semiconductor layer, wherein the metal bonding layer is electrically connected to the plurality of lead-out electrodes; The metal bonding layer is bonded to multiple power supply electrodes of the driving substrate; The substrate is removed, and a first recessed region is formed on the side of the second semiconductor layer away from the active layer, wherein the first recessed region extends along the stacking direction to the metal bonding layer to divide the metal bonding layer into a plurality of spaced-apart metal bonding patterns, each of the metal bonding patterns being electrically connected to the corresponding lead-out electrode and power supply electrode.

12. The method according to claim 11, characterized in that, The method further includes: A current diffusion electrode is formed in the first recessed region, wherein when viewed along the stacking direction, the current diffusion electrode and the first recessed region are arranged in a grid pattern to form a plurality of light-emitting regions spaced apart from each other and arranged in an array, and the first electrode region at least partially falls within the corresponding light-emitting region along the stacking direction. A common transparent electrode is formed covering the second semiconductor layer and the current diffusion electrode, wherein the common transparent electrode is electrically connected to the current diffusion electrode, and the conductivity of the current diffusion electrode is greater than that of the common transparent electrode; A second dielectric reflective layer is formed on the side of the common transparent electrode away from the second semiconductor layer, wherein the reflectivity of the second dielectric reflective layer is less than that of the first dielectric reflective layer, so as to form a resonant cavity between the first dielectric reflective layer and the second dielectric reflective layer from the side of the second dielectric reflective layer.

Images