Noise reduction circuit, gate drive circuit, voltage compensation method and display panel
By employing real-time detection and dynamic compensation mechanisms, the problem of noise reduction instability caused by threshold voltage drift of the control transistor was solved, thereby improving the stability of the noise reduction circuit and signal quality, and enhancing the display effect of the display panel.
Patent Information
- Application Number
- CN202512049186.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-30
- Publication Date
- 2026-02-24
AI Technical Summary
In the prior art, the threshold voltage of the control transistor is prone to drift during long-term operation, which leads to instability of the noise reduction circuit and affects the display effect of the display panel.
By real-time detection of the voltage of the noise reduction coupling node, a closed-loop control mechanism is constructed using the coupling unit and the compensation unit to dynamically adjust the compensation signal, thereby achieving indirect compensation of the voltage of the noise reduction control node, avoiding direct detection interference, and continuously adaptively responding to the threshold voltage drift of the transistor.
It significantly improves the long-term working stability and transmission signal quality of the noise reduction circuit, alleviates the display flicker problem, and enhances the stability and signal quality of the noise reduction circuit.
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Figure CN121565099A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of display driver technology, specifically relating to a noise reduction circuit, a gate driving circuit, a voltage compensation method, and a display panel. Background Technology
[0002] The GOA (Gate Driver on Array) is a key circuit for achieving progressive scanning in TFT-LCD (Thin-Film Transistor Liquid Crystal Display), and the noise reduction circuit that performs noise reduction processing on each key node is the core module for the reliable operation of GOA.
[0003] Currently, noise reduction circuits often use a Darlington structure composed of multiple control transistors, whose output voltage directly determines the noise reduction capability of the circuit. However, during long-term operation, the gate of the control transistors constituting this Darlington structure will be under a forward bias voltage for a long time, which can easily lead to the drift of the threshold voltage of the control transistors. This results in unstable noise reduction, causing abnormal GOA output signals and affecting the display effect of the display panel.
[0004] Therefore, how to improve the noise reduction instability caused by threshold voltage drift of the control transistor is an urgent problem to be solved. Summary of the Invention
[0005] This application provides a noise reduction circuit, a gate drive circuit, a voltage compensation method, and a display panel. Through real-time detection and dynamic compensation mechanisms, this application actively counteracts the attenuation of the noise reduction control node voltage, improves the problem of noise reduction instability caused by the threshold voltage drift of the control transistor, and significantly improves the noise reduction stability of the noise reduction circuit under long-term operation.
[0006] In a first aspect, this application provides a noise reduction circuit, comprising: a noise reduction control unit configured to connect an external noise reduction control terminal and a noise reduction control node, for outputting a noise reduction control voltage output by the external noise reduction control terminal to the noise reduction control node during a noise reduction period; a coupling unit configured to connect to the noise reduction control node and a noise reduction coupling node, for realizing voltage coupling between the noise reduction control node and the noise reduction coupling node; a detection unit configured to connect to the noise reduction coupling node and an external control device, for detecting the actual voltage on the noise reduction coupling node, so that the external control device outputs a dynamic first compensation control signal based on a comparison result between the actual voltage and a preset reference range; a first compensation unit configured to connect to the external control device and the noise reduction coupling node, for responding to the first compensation control signal output by the external control device and outputting a corresponding first compensation voltage to the noise reduction coupling node; and a noise reduction execution unit configured to connect to the noise reduction coupling node, for performing noise reduction processing on at least one noise-reduced node in response to the voltage on the noise reduction coupling node.
[0007] Secondly, this application provides a gate driving circuit, which includes N cascaded gate driving modules, and at least one gate driving module includes a noise reduction circuit.
[0008] Thirdly, this application provides a voltage compensation method applied to a gate driving circuit. The voltage compensation method includes: acquiring the actual voltage of a noise reduction coupling node of a target-level gate driving module through a detection unit; wherein the target-level gate driving module includes the detection unit, and the actual voltage is used to enable an external control device to output a dynamic first compensation control signal based on a comparison result between the actual voltage and a preset reference range; a first compensation unit in each gate driving module receives and responds to the first compensation control signal, and outputs a corresponding first compensation voltage to the noise reduction coupling node, so that the voltage of the noise reduction coupling node meets the preset reference range.
[0009] Fourthly, this application provides a display panel including a display area and a non-display area, wherein the display area includes multiple scan lines; the non-display area includes a gate driving circuit, and the drive output terminal of the gate driving circuit is electrically connected to at least one scan line.
[0010] The technical solutions provided in this application have at least the following beneficial effects: This application acquires the actual voltage of the noise reduction coupling node in real time through a detection unit, enabling an external control device to dynamically adjust the first compensation control signal based on a comparison between the actual voltage and a preset reference voltage. The first compensation unit responds to this signal by precisely boosting the voltage of the noise reduction coupling node, and this boost is then transmitted to the noise reduction control node through the voltage coupling effect of the coupling unit, thereby achieving indirect compensation and stabilization of the noise reduction control node voltage. Furthermore, by introducing an indirect compensation path constructed through the coupling unit, this application avoids direct interference from the detection traces to the noise reduction control node, improving voltage detection accuracy. Simultaneously, this closed-loop control mechanism of detection, compensation, and coupling can continuously and adaptively respond to the threshold voltage drift of each transistor in the system (including the compensation transistor itself), achieving system-level dynamic stability. Therefore, this application, through a real-time detection and indirect compensation mechanism based on the coupling unit, effectively counteracts the voltage attenuation of the noise reduction control node caused by the threshold voltage drift of the control transistor, significantly improving the long-term operational stability and transmission signal quality of the noise reduction circuit, and alleviating display flicker issues. Attached Figure Description
[0011] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.
[0012] Figure 1 The diagram shown is a structural schematic of a display panel related to this technology.
[0013] Figure 2 The diagram shown is a structural schematic of a gate driving module provided in an embodiment of this application.
[0014] Figure 3 The diagram shown is a schematic of a noise reduction circuit in related technologies.
[0015] Figure 4 The diagram shown is a structural schematic of the first noise reduction circuit provided in the embodiment of this application.
[0016] Figure 5 The diagram shown is a schematic diagram of the first noise reduction circuit provided in the embodiment of this application.
[0017] Figure 6 The diagram shown is a schematic diagram of the second noise reduction circuit provided in the embodiment of this application.
[0018] Figure 7 The diagram shown is a structural schematic of the second noise reduction circuit provided in the embodiment of this application.
[0019] Figure 8 The diagram shown is a schematic diagram of the third noise reduction circuit provided in the embodiment of this application.
[0020] Figure 9 The diagram shown is a schematic diagram of the third noise reduction circuit provided in the embodiment of this application.
[0021] Figure 10 The diagram shown is a structural schematic of a display panel provided in an embodiment of this application.
[0022] Figure 11 The diagram shown is a schematic flowchart of a voltage compensation method provided in an embodiment of this application.
[0023] Explanation of reference numerals in the attached figures: 100. Noise reduction circuit; 110. Noise reduction control unit; 120. Coupling unit; 130. Detection unit; 140. First compensation unit; 150. Noise reduction execution unit; 160. Second compensation unit; 200. External control device; T1, First compensation transistor; T2, Second compensation transistor; T3, Third compensation transistor; C0, Coupling capacitor; C1, Compensation capacitor; M1, First control transistor; M2, Second control transistor; M3, Third control transistor; M4, Fourth control transistor; J1, First noise reduction transistor; J2, Second noise reduction transistor; J3, Third noise reduction transistor; U1, Amplifier; R1, First resistor; R2, Second resistor; L1, Detection control line; L2, Compensation control line; Qn, Drive control node; Pn, Noise reduction control node; Kn, Noise reduction coupling node; Fn, Stage transmission output terminal; Gn, Drive output terminal; LC, External noise reduction control terminal; VSS, Low level terminal. Detailed Implementation
[0024] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided to make this application more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art.
[0025] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a thorough understanding of embodiments of this application. However, those skilled in the art will recognize that the technical solutions of this application can be practiced without one or more of the specific details, or other methods, components, apparatuses, steps, etc., can be employed. In other instances, well-known methods, apparatuses, implementations, or operations are not shown or described in detail to avoid obscuring various aspects of this application.
[0026] The present application will now be described in further detail with reference to the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present application, and should not be construed as limiting the present application.
[0027] TFT-LCD has secured its unshakeable position in the large, medium, and small flat panel display market thanks to the following characteristics: ① low voltage and low power consumption; ② flat panel structure; ③ passive display (no glare; does not irritate the eyes; independently controlled dedicated light source, allowing for brightness adjustment); ④ large display information capacity; ⑤ easy to colorize; ⑥ no electromagnetic radiation; ⑦ long lifespan, etc. As consumer demands continue to rise, TFT-LCD products need constant upgrades, such as moving towards narrower bezel designs.
[0028] GDL (Gate Driver Less) is a technology that uses the a-Si TFT process to implement the shift register function in the gate IC. After using this technology, there is no need for a gate IC on the screen, which can effectively save costs. Figure 1 The diagram shows the structure of a display panel based on related technologies. This progressive scanning is primarily achieved using a GOA (Gateway Assignment) circuit. The gate drive circuit includes N cascaded gate drive modules, such as... Figure 2 As shown, the nth-level gate driver module mainly includes pull-up units, pull-down units, output units, reset units, and noise reduction circuits. The pull-up and pull-down units generate a Q-point voltage. The pull-up and pull-down units need to obtain multiple stage transmission signals from the upper and lower gate driver modules. The Q-point voltage is the turn-on voltage of the output unit, enabling the output unit to output the gate drive signal and provide the turn-on voltage for the display area. The reset unit is used to avoid the influence between frames. The noise reduction circuit performs noise reduction processing on the signals at each key node. Among them, Qn represents the drive control node of the nth-level gate driver module, Gn represents the drive output terminal of the nth-level gate driver module, Fn represents the stage transmission output terminal of the nth-level gate driver module, CKn represents the clock signal terminal of the nth-level gate driver module, Reset represents the reset signal terminal, LC represents the noise reduction control terminal, Gn-i represents the drive output terminal of the nith-level gate driver module, Fn-i represents the stage transmission output terminal of the nith-level gate driver module, and Fn+j represents the stage transmission output terminal of the (n+j)th-level gate driver module.
[0029] A normal output from the gate drive module is essential for ensuring proper image display; therefore, the noise reduction circuit plays a crucial role in suppressing signal noise. Figure 3The diagram shows a noise reduction circuit in the related technology, which mainly consists of a first control transistor M1, a second control transistor M2, a third control transistor M3, a fourth control transistor M4, a first noise reduction transistor J1, a second noise reduction transistor J2, and a third noise reduction transistor J3. When the drive control node (i.e., point Q) in the nth stage gate drive module is at a low level, the noise reduction control terminal LC continuously outputs a high level. At this time, the first control transistor M1 and the second control transistor M2 are turned on, and the third control transistor M3 and the fourth control transistor M4 are turned off, making the noise reduction control node Pn high. This turns on the first noise reduction transistor J1, the second noise reduction transistor J2, and the third noise reduction transistor J3, thereby continuously pulling the signals on the drive output terminal Gn, the drive control node Qn, and the stage transmission output terminal Fn low, achieving noise reduction processing for each important node in the gate drive module.
[0030] However, the inventors of this application discovered an inherent defect in the noise reduction circuits of related technologies. Specifically, during long-term operation, the gates of the first control transistor M1, second control transistor M2, third control transistor M3, and fourth control transistor M4, which constitute the core of the noise reduction circuit control, remain under a forward bias voltage for an extended period, causing irreversible drift in the threshold voltage. This threshold voltage drift alters the input-output characteristics of the Darlington circuit, directly manifesting as a significantly lower voltage value at the noise reduction control node (hereinafter referred to as point P) during noise reduction periods compared to design expectations. This reduction in point P voltage directly weakens the circuit's noise reduction capability, leading to a decrease in the stability of the transmitted signal and ultimately resulting in flickering and other undesirable phenomena on the display.
[0031] To improve the threshold voltage drift problem of control transistors, this application provides a noise reduction circuit, specifically including the following embodiments: Figure 4 The diagram shown is a structural schematic of the first noise reduction circuit 100 provided in this embodiment; the noise reduction circuit 100 in this embodiment is applied to a gate driving circuit, which includes N cascaded gate driving modules; as shown Figure 2 As shown, each gate drive module includes at least a drive control node Qn, a drive output terminal Gn, a stage transmission output terminal Fn, and a noise reduction circuit 100.
[0032] like Figure 4 As shown, the noise reduction circuit 100 includes a noise reduction control unit 110, configured to connect an external noise reduction control terminal LC and a noise reduction control node Pn, for outputting the noise reduction control voltage output from the external noise reduction control terminal LC to the noise reduction control node Pn during the noise reduction period. It should be noted that the noise reduction control unit 110 in this embodiment is typically a Darlington structure composed of multiple control transistors (e.g., ...). Figure 3As shown in the diagram, the first, second, third, and fourth control transistors, during the noise reduction period (i.e., the period when the noise reduction function needs to be activated), the external noise reduction control terminal LC provides an effective noise reduction control voltage. The noise reduction control unit 110 responds to this voltage, transmits it, and applies it to the noise reduction control node Pn, thereby providing the activation condition for the subsequent noise reduction execution unit. However, after long-term operation, the threshold voltage (Vth) of the control transistor in the noise reduction control unit 110 will shift, causing the input-output characteristics of the Darlington circuit to change, which in turn causes the voltage of the noise reduction control node Pn to decrease during the noise reduction period.
[0033] In this embodiment, the noise reduction circuit 100 further includes a coupling unit 120, configured to be connected to the noise reduction control node Pn and the noise reduction coupling node Kn, for realizing voltage coupling between the noise reduction control node Pn and the noise reduction coupling node Kn. Specifically, the coupling unit 120 in this embodiment can be a coupling capacitor C0, connected between the noise reduction control node Pn and the noise reduction coupling node Kn. The coupling capacitor C0 enables changes in the voltage of the noise reduction control node Pn to be coupled to the noise reduction coupling node Kn; conversely, by actively regulating the voltage of the noise reduction coupling node Kn, the voltage of the noise reduction control node Pn can also be affected through the coupling effect of the coupling capacitor C0, thereby achieving indirect compensation.
[0034] In this embodiment, the noise reduction circuit 100 further includes a detection unit 130, configured to be connected to the noise reduction coupling node Kn and the external control device 200. This unit detects the actual voltage on the noise reduction coupling node Kn, so that the external control device 200 outputs a dynamic first compensation control signal based on a comparison between the actual voltage and a preset reference range. It should be noted that the detection unit 130 in this embodiment can physically be a metal trace. One end of the metal trace is connected to the noise reduction coupling node Kn, and the other end is connected to the external control device 200. This allows for real-time, continuous, or on-demand acquisition of the voltage signal of the noise reduction coupling node Kn and transmission of it to the external control device 200. By selecting to detect the noise reduction coupling node Kn instead of directly detecting the noise reduction control node Pn, this embodiment effectively avoids the load effect caused by long traces and improves the accuracy of the detected voltage.
[0035] It should also be noted that the external control device 200 in this embodiment is an environmental feature and may be part of a driver IC, including circuitry with functions such as a comparator, logic processor, and signal driver. The external control device 200 internally stores a preset reference voltage Ki (e.g., an ideal K-point voltage measured and written during the new product debugging phase). The external control device 200 makes a judgment by comparing the actual voltage with a preset reference range (e.g., a range formed by setting a threshold such as 0.5V based on Ki). When the actual voltage deviates from the preset reference range, the external control device 200 generates a dynamic first compensation control signal. This dynamic nature is reflected in the fact that the compensation behavior is triggered based on real-time detection results, and the compensation amount can change with the degree of deviation.
[0036] In this embodiment, the noise reduction circuit 100 further includes a first compensation unit 140, which is configured to be connected to the external control device 200 and the noise reduction coupling node Kn. It is used to respond to the first compensation control signal output by the external control device 200 and output a corresponding first compensation voltage to the noise reduction coupling node Kn. Specifically, the first compensation unit 140 in this embodiment is a controlled voltage supply circuit. When the first compensation unit 140 receives a valid first compensation control signal from the external control device 200, it outputs the first compensation voltage to the noise reduction coupling node Kn, and then raises the voltage on the noise reduction control node Pn through the coupling unit 120. It is worth noting that this first compensation voltage does not work continuously; it is only activated when the external control device 200 determines that compensation is needed, thus achieving accurate and efficient voltage compensation.
[0037] In this embodiment, the noise reduction circuit 100 further includes a noise reduction execution unit 150 connected to the noise reduction coupling node Kn and configured to perform noise reduction processing on at least one noise-reduced node in response to the voltage on the noise reduction coupling node Kn. Specifically, at least one noise-reduced node may be a drive control node Qn, a drive output terminal Gn, and a stage transmission output terminal Fn. That is, by continuously pulling the signals on the drive output terminal Gn, the drive control node Qn, and the stage transmission output terminal Fn low by the noise reduction execution unit 150, leakage current in the circuit or other transistor abnormalities can be avoided to prevent the voltage on the drive output terminal Gn, the drive control node Qn, or / and the stage transmission output terminal Fn from being at a high level, thereby preventing display abnormalities such as pixel misfilling.
[0038] Therefore, the working principle of the noise reduction circuit 100 in this application is as follows: (1) The actual voltage of the noise reduction coupling node Kn is collected in real time by the detection unit 130 and sent to the external control device 200, so that the external control device 200 compares it with the preset reference voltage Ki and calculates the voltage difference ΔK.
[0039] (2) The external control device 200 generates a dynamic first compensation control signal based on ΔK. The larger ΔK is, the higher the voltage of the first compensation control signal becomes.
[0040] (3) The first compensation unit 140 responds to the first compensation control signal and outputs an increased voltage to the noise reduction coupling node Kn. Due to the existence of the coupling unit 120 (coupling capacitor C0), the increase in voltage of the noise reduction coupling node Kn will raise the voltage of the noise reduction control node Pn through the coupling effect of the coupling capacitor C0. The compensation relationship can be expressed as: V_K = V_P + ΔK, which indirectly stabilizes V_P by increasing V_K.
[0041] (5) The noise reduction coupling node Kn after compensation controls the noise reduction execution unit to perform effective noise reduction on each noise-reduced node during the noise reduction period.
[0042] In summary, this application acquires the actual voltage of the noise reduction coupling node Kn in real time through the detection unit 130, enabling the external control device 200 to dynamically adjust the first compensation control signal based on the comparison result between the actual voltage and the preset reference voltage. The first compensation unit 140 responds to the signal to accurately boost the voltage of the noise reduction coupling node Kn, and then transmits this boosting effect to the noise reduction control node Pn through the voltage coupling effect of the coupling unit 120, thereby achieving indirect compensation and stabilization of the voltage of the noise reduction control node Pn. In addition, by introducing the indirect compensation path constructed by the coupling unit 120, this application avoids direct interference of the detection traces to the noise reduction control node Pn, improving the voltage detection accuracy. At the same time, the closed-loop control mechanism of detection, compensation and coupling can continuously and adaptively respond to the threshold voltage drift of each transistor in the system (including the compensation transistor itself), achieving system-level dynamic stability. Therefore, this application effectively counteracts the voltage attenuation of the noise reduction control node Pn caused by the threshold voltage drift of the control transistor through the real-time detection and indirect compensation mechanism based on the coupling unit 120, significantly improves the long-term working stability and transmission signal quality of the noise reduction circuit 100, and improves the display flicker problem.
[0043] Figure 5 The diagram shown is a circuit diagram of the first noise reduction circuit 100 provided in an embodiment of this application. Figure 5As shown, the first compensation unit 140 includes: a first compensation transistor T1 and a second compensation transistor T2; the control terminal of the first compensation transistor T1 is connected to the drive control node Qn, the first terminal of the first compensation transistor T1 is connected to the noise reduction coupling node Kn, and the second terminal of the first compensation transistor T1 is connected to the low-level terminal VSS; the control terminal of the second compensation transistor T2 is connected to the first compensation terminal of the external control device 200, the first terminal of the second compensation transistor T2 is connected to the control terminal of the second compensation transistor T2, and the second terminal of the second compensation transistor T2 is connected to the first terminal of the first compensation transistor T1.
[0044] It should be noted that, in Figure 5 Vth represents the first compensation terminal of the external control device 200; here, the working process of the first compensation unit 140 in this embodiment will be described in detail: (1) Reference establishment stage: After the code is adjusted on the original fresh film, the voltage value of the noise reduction coupling node Kn is measured by the instrument, set as the reference voltage Ki and written into the external control device 200.
[0045] (2) Real-time detection and comparison: During use, the actual voltage of the noise reduction coupling node Kn is collected in real time by the detection unit 130 and transmitted to the external control device 200. The external control device 200 compares the real-time voltage at point K with the reference voltage Ki and calculates the voltage difference ΔK=Ki-K.
[0046] (3) Timing control stage: During the non-noise reduction period, the drive control node Qn is at a high level, the first compensation transistor T1 is turned on, and the noise reduction coupling node Kn is forcibly pulled low to a low level, ensuring that the noise reduction execution unit is reliably turned off during this stage, without affecting normal scanning, and at the same time eliminating the floating state of the noise reduction coupling node Kn, improving the anti-interference capability of the circuit; During the noise reduction period, the drive control node Qn is at a low level, the first compensation transistor T1 is turned off, and the low level clamps the noise reduction coupling node Kn, creating conditions for subsequent dynamic voltage compensation.
[0047] (4) Dynamic compensation mechanism: When the noise reduction transistor in the noise reduction control unit 110 operates for a long time and the threshold voltage shifts, causing the voltage of the noise reduction control node Pn to decrease, the voltage of the noise reduction coupling node Kn decreases accordingly through the coupling effect of the coupling capacitor C0. The external control device 200 dynamically adjusts the output first compensation signal (i.e., the threshold first compensation voltage) according to the value of ΔK. The larger ΔK is, the larger the voltage of the output first compensation signal will be.
[0048] (5) Voltage boosting process: Since the control terminal of the second compensation transistor T2 is shorted to the first terminal, forming a special connection, the voltage of the noise reduction coupling node Kn, V_K = V_P + Vth, is the first compensation voltage dynamically adjusted by the external control device 200 according to ΔK. By controlling Vth = ΔK, V_K = V_P + ΔK can be achieved, thereby restoring the voltage of the noise reduction coupling node Kn to the reference value Ki.
[0049] (6) Adaptive characteristics: The first compensation unit 140 in this embodiment is designed to take into account the dynamic change of the threshold voltage of the second compensation transistor T2 under long-term operation. By detecting the voltage of the noise reduction coupling node Kn in real time and calculating ΔK, the first compensation voltage output to the second compensation transistor T2 is adjusted. In fact, the threshold voltage change of the noise reduction coupling node Kn itself is also included in the compensation loop, realizing the adaptive stability of the whole system without having to consider the threshold voltage change of the second compensation transistor T2 separately.
[0050] like Figure 5 As shown, the noise reduction control unit 110 of this embodiment includes a first control transistor M1, a second control transistor M2, a third control transistor M3, and a fourth control transistor M4. The control terminal of the first control transistor M1 is connected to the second terminal of the first compensation transistor T1, and the first terminal of the first control transistor M1 is connected to the control terminal of the first control transistor M1. The control terminal of the second control transistor M2 is connected to the second terminal of the first control transistor M1, and the first terminal of the second control transistor M2 is connected to the first terminal of the first control transistor M1. The control terminal of the third control transistor M3 is connected to the drive control node Qn, and the first terminal of the third control transistor M3 is connected to the second terminal of the first control transistor M1, and the second terminal of the third control transistor M3 is connected to the low-level terminal VSS. The control terminal of the fourth control transistor M4 is connected to the control terminal of the third control transistor M3, and the first terminal of the fourth control transistor M4 is connected to the second terminal of the second control transistor M2, and the second terminal of the fourth control transistor M4 is connected to the low-level terminal VSS.
[0051] like Figure 5As shown, the noise reduction execution unit 150 of this embodiment includes a first noise reduction transistor J1, a second noise reduction transistor J2, and a third noise reduction transistor J3; wherein, the control terminal of the first noise reduction transistor J1 is connected to the noise reduction coupling node Kn, the first terminal of the first noise reduction transistor J1 is connected to the drive output terminal Gn, and the second terminal of the first noise reduction transistor J1 is connected to the low-level terminal VSS; the control terminal of the second noise reduction transistor J2 is connected to the control terminal of the first noise reduction transistor J1, the first terminal of the second noise reduction transistor J2 is connected to the drive control node Qn, and the second terminal of the second noise reduction transistor J2 is connected to the low-level terminal VSS; the control terminal of the third noise reduction transistor J3 is connected to the control terminal of the first noise reduction transistor J1, the first terminal of the third noise reduction transistor J3 is connected to the stage transmission output terminal Fn, and the second terminal of the third noise reduction transistor J3 is connected to the low-level terminal VSS.
[0052] It should be noted that the working principle of the noise reduction control unit 110 and the noise reduction execution unit 150 in this embodiment is the same as that of the noise reduction control unit 110 and the noise reduction execution unit 150. Figure 3 The same applies, so I won't go into details here.
[0053] Figure 6 The diagram shown is a circuit diagram of the second noise reduction circuit 100 provided in an embodiment of this application; Figure 6 The noise reduction circuit 100 shown is... Figure 5 The only difference between the noise reduction circuit 100 shown is: Figure 5 The second compensation transistor T2 of the first compensation unit 140 is connected to a compensation terminal of the external control device 200, while Figure 6 The second compensation transistor T2 of the first compensation unit 140 is connected to two different compensation terminals of the external control device 200; specifically as follows: Figure 6 As shown, the first compensation unit 140 includes a first compensation transistor T1 and a second compensation transistor T2. The control terminal of the first compensation transistor T1 is connected to the drive control node Qn, the first terminal of the first compensation transistor T1 is connected to the noise reduction coupling node Kn, and the second terminal of the first compensation transistor T1 is connected to the low-level terminal VSS. The first terminal of the second compensation transistor T2 is connected to the first compensation terminal of the external control device 200, the control terminal of the second compensation transistor T2 is connected to the second compensation terminal of the external control device 200, and the second terminal of the second compensation transistor T2 is connected to the first terminal of the first compensation transistor T1.
[0054] It should be noted that this embodiment is equivalent to Figure 5 The improvement lies in that the gate and the first terminal of the second compensation transistor T2 are independently controlled by different compensation terminals of the external control device 200, such as... Figure 6 As shown, Vth is used as the first compensation terminal and SW1 is used as the second compensation terminal; based on this, the specific working principle of the first compensation unit 140 in this embodiment is as follows: (1) Timing control and node reset: The first compensation transistor T1 acts as a timing control switch, and its control terminal is controlled by the drive control node Qn. During the scanning period (non-noise reduction period), the drive control node Qn is at a high level, the first compensation transistor T1 is turned on, and the noise reduction coupling node Kn is directly pulled low to ensure that the noise reduction execution unit is forcibly turned off during the non-noise reduction period, so as to avoid interference with the normal scanning display. At the same time, it provides a clear reset potential for the noise reduction control node Pn. During the non-scanning period (noise reduction period), the drive control node Qn is at a low level, the first compensation transistor T1 is turned off, and the low potential clamps the noise reduction coupling node Kn.
[0055] (2) Dynamic Compensation: The external control device 200 provides a threshold compensation signal to the first terminal of the second compensation transistor T2 through the first compensation terminal, and provides an independent first gate compensation signal to the control terminal of the second compensation transistor T2 through the second compensation terminal. When the detection unit 130 detects a decrease in the voltage of the noise reduction coupling node Kn, the external control device 200 simultaneously adjusts the threshold compensation signal output from the first compensation terminal and the first gate compensation signal output from the second compensation terminal. Since the control terminal of the second compensation transistor T2 is separated from the first terminal, the first gate compensation signal can be set to a value higher than the threshold compensation signal, which enables the second compensation transistor T2 to operate in the saturation region and provide stronger current driving capability. In addition, by increasing the voltage of the first gate compensation signal, the coupling capacitance C0 formed between the control terminal and the second terminal of the second compensation transistor T2 will generate a coupling effect, providing an additional boost force for the voltage of the noise reduction coupling node Kn, further enhancing the compensation effect. It should be noted that in this embodiment, the threshold compensation signal and the first gate compensation signal are used together as the first compensation signal output by the external control device 200.
[0056] Therefore, in this embodiment, by using different compensation terminals to control the control terminal and the first terminal of the second compensation transistor T2, the two compensation signals can be optimized independently, ensuring that the second compensation transistor T2 always works in the best state, providing stronger current output capability, and being able to quickly respond to voltage compensation requirements, thus improving the signal delay problem in large-size panels.
[0057] In one embodiment, the first compensation unit 140 can also serve as a repair unit for the noise reduction control unit 110. That is, when any noise reduction transistor in the noise reduction control unit 110 fails, the connection between the noise reduction control unit 110 and the noise reduction control node Pn is disconnected by laser, and the voltage compensation of the noise reduction control node Pn and the repair function of the noise reduction control unit 110 are simultaneously achieved by controlling the first compensation unit 140 through the external control device 200, thereby improving the fault tolerance of the noise reduction circuit 100 and the economy of the product.
[0058] Figure 7The diagram shown is a structural schematic of the second noise reduction circuit 100 provided in an embodiment of this application; Figure 7 exist Figure 4 Based on this, a second compensation unit 160 is added, specifically as follows: Figure 7 As shown: The noise reduction circuit 100 further includes: a second compensation unit 160, configured to be connected to the external control device 200 and the external noise reduction control terminal LC, for responding to the second compensation control signal output by the external control device 200 and outputting a corresponding second compensation voltage; wherein, the noise reduction control unit 110 is configured to be connected to the output terminal of the second compensation unit 160, for controlling the voltage on the noise reduction control node Pn to meet the preset reference range under the action of the second compensation voltage.
[0059] It should be noted that, Figure 7 The first compensation unit 140 in the middle is equivalent to directly compensating the noise reduction coupling node Kn, thereby realizing indirect compensation of the noise reduction control node Pn; Figure 7 The second compensation unit 160 directly compensates the noise reduction control voltage output by the external noise reduction control terminal LC, thereby indirectly compensating the noise reduction control node Pn. Through the combined action of the first compensation unit 140 and the second compensation unit 160, the compensation speed of the noise reduction control node Pn can be improved. In addition, when one compensation unit fails, the fault tolerance mechanism of the noise reduction circuit 100 can be further improved through the redundant design of the other compensation unit.
[0060] Figure 8 The diagram shown is a circuit diagram of the third noise reduction circuit 100 provided in an embodiment of this application; as follows: Figure 8 As shown, the second compensation unit 160 includes: a third compensation transistor T3, the control terminal of the third compensation transistor T3 is connected to the third compensation terminal of the external control device 200, the first terminal of the third compensation transistor T3 is connected to the external noise reduction control terminal LC, and the second terminal of the third compensation transistor T3 serves as the output terminal of the second compensation unit 160.
[0061] It should be noted that in this embodiment, the control terminal (i.e., gate) of the third compensation transistor T3 is connected to the external control device 200 to receive the second compensation control signal (i.e., SW2) output by the external control device 200; the first terminal (i.e., drain) of the third compensation transistor T3 is connected to the external noise reduction control terminal LC, which provides an initial noise reduction control voltage; the second terminal (i.e., source) of the third compensation transistor T3 serves as the output terminal of the second compensation unit 160, outputting the second compensation voltage to the subsequent noise reduction control unit 110; the voltage regulation mechanism of the third compensation transistor T3 in this embodiment is as follows: the external control device 200 continuously monitors the voltage at point K through the detection unit 130 (metal trace) and compares it with the reference voltage Ki to obtain the voltage difference ΔK = Ki - K; according to the value of ΔK, the external control device 200 dynamically adjusts the voltage values of the output signals, the first compensation signal and the second compensation signal. The control logic is: when ΔK increases (i.e., the voltage at point K decreases), the voltage of the compensation signal output by the external control device 200 increases accordingly. The increased second compensation signal applied to the gate of the third compensation transistor T3 enhances the conduction capability of the third compensation transistor T3. This allows the voltage flowing from the LC terminal of the external noise reduction control terminal and output from its source after passing through the third compensation transistor T3 to be raised. As a result, through the action of the noise reduction control unit 110, the voltage at point P is finally pulled up, bringing it back to the same level as Pi, thereby compensating for the voltage attenuation at point P caused by the Vth drift of the control transistor.
[0062] This embodiment, through the real-time feedback mechanism of the third compensation transistor T3, not only effectively compensates for the threshold voltage drift of the control transistor, but also automatically compensates for the threshold voltage drift of the compensation transistor, thereby realizing a highly intelligent, adaptive, and long-term reliable voltage compensation scheme.
[0063] In another embodiment, the second compensation unit of this embodiment includes a third compensation transistor T3 and a fourth compensation transistor. The control terminal of the third compensation transistor T3 is connected to the third compensation terminal of the external control device 200, and the first terminal of the third compensation transistor T3 is connected to the external noise reduction control terminal LC. The control terminal of the fourth compensation transistor is connected to the control terminal of the third compensation transistor T3, and the first terminal of the fourth compensation transistor is connected to the second terminal of the third compensation transistor T3. The second terminal of the fourth compensation transistor serves as the output terminal of the second compensation unit 160.
[0064] It should be noted that in this embodiment... Figure 8 Based on this, a fourth compensation transistor is introduced. Its main purpose is to simultaneously solve the threshold voltage compensation and potential leakage current problems, thereby improving the stability and accuracy of the compensation voltage. The working principle of this embodiment is as follows: exist Figure 8In the structure, the source of the third compensation transistor T3 is directly connected to the subsequent circuit. Under certain operating conditions, the source voltage of the third compensation transistor T3 may be higher than the voltage of the external noise reduction control terminal LC. This causes the parasitic diode of the third compensation transistor T3 to be forward biased, thereby generating a reverse leakage current from the input terminal of the noise reduction control unit 110 to the external noise reduction control terminal LC. This leakage current will lower the voltage at the input terminal of the noise reduction control unit 110, weaken the compensation effect, and introduce errors. Based on this, this embodiment effectively blocks this leakage path by introducing a fourth compensation transistor. Specifically, since the fourth compensation transistor is connected in series between the third compensation transistor T3 and the input terminal of the noise reduction control unit 110, even if the input voltage of the noise reduction control unit 110 is high, the current cannot leak directly to the external noise reduction control terminal LC through the fourth compensation transistor. Therefore, the fourth compensation transistor ensures that the compensation voltage can only flow from the input terminal to the output terminal and will not flow in the reverse direction.
[0065] In another embodiment, in Figure 8 Based on this, the second compensation unit 160 also includes a compensation capacitor, the first end of which is connected to the control terminal of the third compensation transistor T3, and the second end of which is connected to the second terminal of the third compensation transistor T3.
[0066] It should be noted that this embodiment utilizes the bootstrap effect of the compensation capacitor to enhance the response speed and driving capability of the second compensation unit 160. Specifically, when the external control device 200 requires enhanced compensation, it outputs a step-up second compensation control signal. Since the voltage across the compensation capacitor cannot change abruptly, the transition of the second compensation control signal is coupled (or bootstrap) to the source of the third compensation transistor T3 through the compensation capacitor. This coupling effect causes the source voltage of the third compensation transistor T3 to experience a superimposed voltage boost at the instant SW2 transition, a value higher than the voltage output by the third compensation transistor T3 alone. Therefore, through the instantaneous boost effect of the compensation capacitor coupling, the second compensation unit 160 can output a higher voltage to the input of the noise reduction control unit 110, thereby providing stronger power to raise the voltage at point P.
[0067] Figure 9 The diagram shown is a circuit diagram of the fourth noise reduction circuit 100 provided in the embodiment of this application; Figure 9 The noise reduction circuit 100 shown is... Figure 8 The difference in the noise reduction circuit 100 shown is that the detection unit 130 and the second compensation unit 160 have different circuit structures. Figure 9 The structure of the first compensation unit is not shown); specifically, as... Figure 9As shown, the detection unit 130 in this embodiment includes an amplifier U1, a first resistor R1, and a second resistor R2. The first input terminal of the amplifier U1 is connected to the noise reduction coupling node Kn through a detection trace, and the output terminal of the amplifier U1 serves as the output terminal of the detection unit 130. The first terminal of the first resistor R1 is grounded, and the second terminal of the first resistor R1 is connected to the second input terminal of the amplifier U1. The first terminal of the second resistor R2 is connected to the second terminal of the first resistor R1, and the second terminal of the second resistor R2 is connected to the output terminal of the amplifier U1.
[0068] It should be noted that during the initial use of the noise reduction circuit 100, the voltage value of the noise reduction coupling node Kn is directly measured by an instrument and set as the Ki voltage. This Ki voltage can be written into an external control device as a comparison voltage value. During the use of the noise reduction circuit 100, the voltage of the noise reduction coupling node Kn can be detected in real time. During long-term use, the threshold voltage of the control transistor shifts, causing a shift in the input-output characteristics of the Darlington circuit. This results in a decrease in the voltage of the noise reduction control node Pn during the noise reduction period. Initially, the threshold voltage (Vth) shift is very small (e.g., 0.05V), making it difficult for external control devices to detect such a small Vth change. To accurately amplify the Vth shift, this embodiment uses an amplifier U1 in the detection unit 130. The first input of amplifier U1 is a non-inverting input, used to receive the actual voltage of the noise reduction coupling node Kn. The second input of amplifier U1 is an inverting input. A first resistor R1 and a second resistor R2 are connected in series between the inverting input and the output of amplifier U1, with one end of the first resistor R1 grounded. Figure 9 In this circuit, the resistance of the second resistor R2 is n times that of the first resistor R1 (e.g., n=49). Through the virtual short characteristic of the non-inverting amplifier U1, the voltage Vs = (1+R2 / R1)Vk at the output terminal (called point S) of amplifier U1 can be amplified (Vk represents the voltage of the noise reduction coupling node Kn). The external control device receives the output voltage Vs of amplifier U1 and compares the voltage Vs = (1+R2 / R1)Vk with (1+R2 / R1)Vki to obtain the value of amplified (1+R2 / R1)Vth. By calculating, the voltage of amplified (1+R2 / R1)Vth is divided by (1+R2 / R1) to compensate the Vth voltage to the external noise reduction control terminal LC, that is, the voltage of the external noise reduction control terminal LC is changed in real time. At this time, the voltage of LC = the original LC voltage + the Vth value.
[0069] In another embodiment, such as Figure 9As shown, the second compensation unit 160 includes a compensation capacitor C1. The first end of the compensation capacitor C1 is connected to the external noise reduction control terminal LC, and the second end of the compensation capacitor C1 is connected to the threshold voltage compensation terminal of the external control device. The second end of the compensation capacitor C1 serves as the output terminal of the second compensation unit 160. Specifically, in this embodiment, the voltage of the external noise reduction control terminal LC remains unchanged. The threshold voltage compensation value (i.e., Vth) obtained by the external control device is directly transmitted to the second end of the compensation capacitor C1 through the compensation trace. At the same time, the original external noise reduction control terminal LC voltage is used to raise the potential of the second end of the compensation capacitor C1 to the original LC voltage + Vth value, thereby obtaining the second compensation voltage output by the second compensation unit 160.
[0070] In one embodiment, this application provides a gate driving circuit, which includes N cascaded gate driving modules, and at least one gate driving module includes the noise reduction circuit 100 shown in the above embodiment; that is, each gate driving module may include the noise reduction circuit 100 of this embodiment, or only one or more gate driving modules may include the noise reduction circuit 100 of this embodiment.
[0071] Figure 10 The diagram shown is a structural schematic of a display panel provided in an embodiment of this application; as follows: Figure 10 As shown, a target-level gate drive module includes the noise reduction circuit 100 shown in the above embodiment; wherein, the target-level gate drive module is a gate drive module close to the external control device 200; the noise reduction circuit 100 in other-level gate drive modules includes a noise reduction control unit 110, a coupling unit 120, a first compensation unit 140, and a noise reduction execution unit; specifically, the noise reduction control unit 110 is configured to connect the external noise reduction control terminal LC and the noise reduction control node Pn, and is used to output the noise reduction control voltage output by the external noise reduction control terminal LC to the noise reduction control node Pn during the noise reduction period; Coupling unit 120 is configured to be connected to noise reduction control node Pn and noise reduction coupling node Kn, for voltage coupling between noise reduction control node Pn and noise reduction coupling node Kn; first compensation unit 140 is configured to be connected to external control device 200 and noise reduction coupling node Kn, for responding to a first compensation control signal output by external control device 200, and outputting a corresponding first compensation voltage to noise reduction coupling node Kn; noise reduction execution unit is configured to be connected to noise reduction coupling node Kn, for responding to the voltage on noise reduction coupling node Kn, and performing noise reduction processing on at least one noise-reduced node. Figure 10 The detection control line L1 in the middle can be used as the detection unit 130 in this embodiment.
[0072] In this embodiment, the gate drive circuit further includes a compensation control line L2. One end of the compensation control line L2 is electrically connected to the external control device 200, and the other end of the compensation control line L2 is simultaneously connected to the first compensation unit 140 of the noise reduction circuit 100 of all gate drive modules, for transmitting the same first compensation control signal output by the external control device 200 to all first compensation units 140.
[0073] It should be noted that in this embodiment, only one specific target-level gate drive module integrates a complete noise reduction circuit 100, which includes the noise reduction control unit 110, detection unit 130, first compensation unit 140 and noise reduction execution unit defined in the above embodiment; however, the noise reduction circuit 100 in other gate drive modules only includes the noise reduction control unit 110, first compensation unit 140 and noise reduction execution unit defined in the above embodiment.
[0074] The working principle of the gate drive circuit in this embodiment is as follows: (1) The target-level gate drive module is selected as the module closest to the external control device 200, that is, the first-level gate drive module on the source side (which can be a normal drive module or a dummy drive module). This will ensure the shortest detection path, the smallest trace voltage drop, and the highest sampling accuracy.
[0075] (2) The goal of this embodiment is to construct a master-slave noise reduction architecture: the target-level gate drive module is used as the master unit, and its internal detection unit 130 is responsible for real-time detection of its own noise reduction control node Pn voltage, which is sent to the external control device 200; the noise reduction circuits 100 in all other level gate drive modules (including the remaining Dummy GDL and Normal GDL) are used as slave units. The noise reduction circuits 100 in these slave units only include the first compensation unit 140, the noise reduction control unit 110 and the noise reduction execution unit, and no longer include the detection unit 130.
[0076] (3) The master unit controls all slave units through the compensation control line L2, ensuring that the unique and dynamic first compensation control signal calculated by the external control device 200 based on the voltage at point P detected by the master unit can be transmitted to all first compensation units 140 simultaneously through this single compensation control line L2.
[0077] Therefore, this embodiment can achieve global and unified compensation for hundreds or thousands of noise reduction units with only one detection unit 130 and one shared compensation control line L2, which greatly saves wiring space and pin resources of the external control device 200, and is the key to realizing the narrow bezel design. In addition, setting the detection point close to the first stage of the external control device 200 shortens the detection path to the maximum extent, reduces the impact of wiring load on the accuracy of sampling voltage, and improves the reliability of voltage compensation.
[0078] Figure 11 The diagram shown is a schematic representation of a voltage compensation process provided in an embodiment of this application; as follows: Figure 11 As shown, the voltage compensation method of this embodiment is applied to the gate drive circuit shown in the above embodiment, and specifically includes the following steps: Step S100: Obtain the actual voltage of the noise reduction coupling node of the target-level gate drive module through the detection unit, and enable the external control device to output a dynamic first compensation control signal based on the comparison result between the actual voltage and the preset reference range.
[0079] It should be noted that the target-level gate drive module includes a detection unit. The actual voltage is used to enable the external control device to output a dynamic first compensation control signal based on the comparison between the actual voltage and a preset reference range. Specifically, the actual voltage of the noise reduction coupling node of the module is acquired in real time through the detection unit located in the target-level gate drive module (i.e., the source-side first-stage Dummy GDL). The target-level gate drive module is the module closest to the external control device, ensuring the shortest detection path and the highest sampling accuracy. This actual voltage, as a representative sample of the aging state of the entire gate drive circuit, is transmitted to the external control device.
[0080] Step S200: The first compensation unit in each gate drive module receives and responds to the first compensation control signal, and outputs a corresponding first compensation voltage to the noise reduction coupling node so that the voltage of the noise reduction coupling node meets the preset reference range.
[0081] It should be noted that after receiving the actual voltage, the external control device compares it with the preset reference range (or reference voltage Ki) stored internally. Based on the comparison result (calculating the voltage difference ΔK), the external control device dynamically generates the corresponding first compensation control signal through the built-in control algorithm. Its control logic is as follows: when ΔK increases (indicating a decrease in the voltage at point P), the voltage level of the first compensation control signal is increased accordingly; conversely, it is decreased accordingly, thereby realizing the dynamic adjustment of the signal so that the voltage of the noise reduction coupling node meets the preset reference range.
[0082] It should be noted that the first compensation control signal is simultaneously provided to the first compensation units in all stages of the gate drive module (including the target stage and all other stages) through a single compensation control line; each first compensation unit (regardless of whether it contains a detection unit) synchronously receives and responds to the same first compensation control signal, outputting a corresponding first compensation voltage. The noise reduction control unit of each module then responds to the first compensation voltage, dynamically adjusting the voltage of its respective noise reduction coupling node to maintain it within the preset reference range required by the design.
[0083] In one embodiment, this application provides a display panel including a display area and a non-display area. The display area includes multiple scan lines; the non-display area includes the gate driving circuit described in the above embodiment, and the drive output terminal of the gate driving circuit is electrically connected to at least one scan line.
[0084] Furthermore, the terms "first," "second," and "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.
[0085] In the description of this specification, references to terms such as "some embodiments," "exemplarily," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. The illustrative expressions of the above terms in this specification do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0086] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application. Therefore, any changes or modifications made in accordance with the claims and description of this application should fall within the scope of this patent application.
Claims
1. A noise reduction circuit, characterized in that, The noise reduction circuit includes: The noise reduction control unit is configured to connect an external noise reduction control terminal and a noise reduction control node, and is used to output the noise reduction control voltage output by the external noise reduction control terminal to the noise reduction control node during the noise reduction period. A coupling unit is configured to be connected to the noise reduction control node and the noise reduction coupling node to realize voltage coupling between the noise reduction control node and the noise reduction coupling node; The detection unit is configured to be connected to the noise reduction coupling node and the external control device, and is used to detect the actual voltage on the noise reduction coupling node, so that the external control device outputs a dynamic first compensation control signal based on the comparison result of the actual voltage and the preset reference range. The first compensation unit is configured to be connected to the external control device and the noise reduction coupling node, and is used to respond to the first compensation control signal output by the external control device and output a corresponding first compensation voltage to the noise reduction coupling node. A noise reduction execution unit is configured to be connected to the noise reduction coupling node and to perform noise reduction processing on at least one noise-reduced node in response to the voltage on the noise reduction coupling node.
2. The noise reduction circuit according to claim 1, characterized in that, The first compensation unit includes: A first compensation transistor, the control terminal of the first compensation transistor is connected to the drive control node, the first terminal of the first compensation transistor is connected to the noise reduction coupling node, and the second terminal of the first compensation transistor is connected to the low-level terminal. The second compensation transistor has its control terminal connected to the first compensation terminal of the external control device, its first terminal connected to the control terminal, and its second terminal connected to the first terminal of the first compensation transistor.
3. The noise reduction circuit according to claim 1, characterized in that, The first compensation unit includes: A first compensation transistor, the control terminal of the first compensation transistor is connected to the drive control node, the first terminal of the first compensation transistor is connected to the noise reduction coupling node, and the second terminal of the first compensation transistor is connected to the low-level terminal. The second compensation transistor has a first terminal connected to the first compensation terminal of the external control device, a control terminal connected to the second compensation terminal of the external control device, and a second terminal connected to the first terminal of the first compensation transistor.
4. The noise reduction circuit according to any one of claims 1-3, characterized in that, The noise reduction circuit also includes: The second compensation unit is configured to be connected to the external control device and the external noise reduction control terminal, and is used to respond to the second compensation control signal output by the external control device and output a corresponding second compensation voltage. The noise reduction control unit is configured to be connected to the output terminal of the second compensation unit, and is used to control the voltage on the noise reduction control node to meet the preset reference range under the action of the second compensation voltage.
5. The noise reduction circuit according to claim 4, characterized in that, The second compensation unit includes: The third compensation transistor has its control terminal connected to the third compensation terminal of the external control device, its first terminal connected to the external noise reduction control terminal, and its second terminal serving as the output terminal of the second compensation unit.
6. The noise reduction circuit according to any one of claims 1-3, characterized in that, The detection unit includes: An amplifier, wherein the first input terminal of the amplifier is connected to the noise reduction control node via a detection trace, and the output terminal of the amplifier serves as the output terminal of the detection unit; A first resistor, with its first end grounded and its second end connected to the second input terminal of the amplifier; The second resistor has its first end connected to the second end of the first resistor, and its second end connected to the output terminal of the amplifier.
7. A gate driving circuit, characterized in that, The gate driving circuit includes N cascaded gate driving modules, and a target-level gate driving module includes the noise reduction circuit according to any one of claims 1-6; wherein, the target-level gate driving module is a gate driving module located close to the external control device; Noise reduction circuits in other gate drive modules include: The noise reduction control unit is configured to connect an external noise reduction control terminal and a noise reduction control node, and is used to output the noise reduction control voltage output by the external noise reduction control terminal to the noise reduction control node during the noise reduction period. A coupling unit is configured to be connected to the noise reduction control node and the noise reduction coupling node to realize voltage coupling between the noise reduction control node and the noise reduction coupling node; The first compensation unit is configured to be connected to the external control device and the noise reduction coupling node, and is used to respond to the first compensation control signal output by the external control device and output a corresponding first compensation voltage to the noise reduction coupling node. A noise reduction execution unit is configured to be connected to the noise reduction coupling node and to perform noise reduction processing on at least one noise-reduced node in response to the voltage on the noise reduction coupling node.
8. The gate driving circuit according to claim 7, characterized in that, The gate drive circuit further includes a compensation control line. One end of the compensation control line is electrically connected to the external control device, and the other end of the compensation control line is simultaneously connected to the first compensation unit of the noise reduction circuit of all levels of gate drive modules, for transmitting the same first compensation control signal output by the external control device to all first compensation units.
9. A voltage compensation method, characterized in that, The voltage compensation method, applied to the gate drive circuit of claim 7 or 8, comprises: The detection unit acquires the actual voltage of the noise reduction coupling node of the target-level gate drive module; wherein, the target-level gate drive module includes the detection unit, and the actual voltage is used to enable the external control device to output a dynamic first compensation control signal based on the comparison result of the actual voltage and the preset reference range; The first compensation unit in each gate drive module receives and responds to the first compensation control signal, and outputs a corresponding first compensation voltage to the noise reduction coupling node so that the voltage of the noise reduction coupling node meets the preset reference range.
10. A display panel, comprising a display area and a non-display area, wherein the display area includes a plurality of scan lines; characterized in that, The non-display area includes the gate driving circuit of claim 7 or 8, wherein the drive output terminal of the gate driving circuit is electrically connected to at least one scan line.
Citation Information
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Noise reduction circuit, gate drive circuit and display panel
CN122116835A