Display device

Abstract

A display device according to one or more embodiments of the present disclosure includes: a substrate including a display area and a non-display area; a pixel driving circuit at the display area on the substrate; an insulating layer over the pixel driving circuit; a plurality of light emitting devices spaced apart from each other over the insulating layer and electrically connected to the pixel driving circuit; and a plurality of common cathode electrodes electrically connected to the plurality of light emitting devices and receiving a cathode voltage. The cathode voltage has a cathode on voltage or a cathode off voltage, and the cathode off voltage is variable.

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit and priority of Korean Patent Application No. 10-2024-0113468, filed on August 23, 2024, the entire contents of which are incorporated herein by reference for all purposes as if fully set forth herein. Technical Field

[0003] This disclosure relates to a display device. Background Technology

[0004] Display devices are used in a variety of electronic devices, such as televisions (TV), mobile phones, laptops, and tablets.

[0005] Display devices include self-emissive organic light-emitting display devices and liquid crystal display devices that require a separate light source.

[0006] Recently, display devices that include light-emitting devices have attracted attention as the next generation of display devices. Light-emitting devices are made of inorganic materials rather than organic materials. Therefore, compared to liquid crystal displays or organic light-emitting displays, display devices that include light-emitting devices have faster light emission speeds, superior luminous efficiency, and can display high-brightness images. Summary of the Invention

[0007] The inventors of this disclosure have conducted extensive research and experimentation to reduce the power consumption of display devices, including light-emitting devices. Based on this extensive research and experimentation, the inventors of this disclosure have invented a novel display device capable of reducing power consumption.

[0008] One aspect of this disclosure relates to providing a display device capable of reducing power consumption.

[0009] One aspect of this disclosure relates to providing a display device capable of improving the luminous efficiency of light-emitting devices.

[0010] One aspect of this disclosure relates to providing a display device that simplifies the structure and reduces power consumption.

[0011] Additional features, advantages, and aspects of this disclosure are set forth in part in this disclosure and will also be apparent from it, or may be learned by practicing the inventive concept provided herein. Other features, advantages, and aspects of this disclosure may be realized and obtained from the description provided in or derived therefrom, the claims, and the accompanying drawings.

[0012] To achieve these and other advantages and aspects of this disclosure, as embodied and broadly described herein, in one or more aspects, a display device according to one or more embodiments of this disclosure includes: a substrate comprising a display area and a non-display area; a pixel driving circuit at the display area on the substrate; an insulating layer above the pixel driving circuit; a plurality of light-emitting devices spaced apart from each other and electrically connected to the pixel driving circuit above the insulating layer; and a plurality of common cathode electrodes electrically connected to the plurality of light-emitting devices and receiving a cathode voltage. The cathode voltage has a cathode turn-on voltage or a cathode turn-off voltage, and the cathode turn-off voltage is variable.

[0013] Details of other exemplary embodiments will be included in the detailed description and accompanying drawings of this disclosure.

[0014] According to embodiments of this disclosure, the power consumption of the display device can be reduced.

[0015] According to embodiments of this disclosure, instead of directly forming pixel circuits on the substrate for driving light-emitting devices configured in each of the plurality of sub-pixels, the structure of the display device can be simplified, and high-efficiency driving and low-power driving can be achieved by mounting a pixel driving circuit (or pixel driving integrated circuit) with integrated pixel circuits on the substrate.

[0016] Other systems, methods, features, and advantages will be apparent or will become apparent to those skilled in the art after examining the following figures and detailed description. All such additional systems, methods, features, and advantages are intended to be included in this specification, within the scope of this disclosure, and protected by the appended claims. Nothing in this section should be construed as limiting these claims. Other aspects and advantages are discussed below in conjunction with aspects of this disclosure.

[0017] It should be understood that both the foregoing description and the following description of this disclosure are exemplary and illustrative, and are intended to provide further explanation of the claimed disclosure. Attached Figure Description

[0018] The accompanying drawings, which are included to provide a further understanding of this disclosure, are incorporated in and constitute a part of this disclosure. The drawings illustrate aspects and embodiments of this disclosure and, together with the description, serve to illustrate the principles of this disclosure.

[0019] Figure 1 This is an exploded perspective view showing a display device according to an embodiment of the present disclosure.

[0020] Figure 2 This is a plan view of a display device according to an embodiment of the present disclosure.

[0021] Figure 3 This is an enlarged view of a display device according to an embodiment of the present disclosure.

[0022] Figure 4 This is a diagram illustrating the circuit structure according to an embodiment of the present disclosure.

[0023] Figures 5 to 7 This is a plan view of a display device according to an embodiment of the present disclosure.

[0024] Figure 8 It is along Figure 2 The cross-sectional view taken by line I-I' is shown.

[0025] Figure 9 This is a cross-sectional view of a first light-emitting device according to an embodiment of the present disclosure.

[0026] Figure 10 This is a graph showing the brightness based on the current flowing through the light-emitting device according to an embodiment of the present disclosure.

[0027] Figure 11 The external quantum efficiency of each of the red, green, and blue light-emitting devices is shown.

[0028] Figure 12 The reference voltage and cathode voltage in a display device according to an embodiment of the present disclosure are shown.

[0029] Figure 13 A variable circuit for reference voltage and cathode voltage according to an embodiment of this disclosure is shown.

[0030] Figure 14 This is a diagram illustrating the screen brightness setting in a display device according to an embodiment of the present disclosure.

[0031] Figure 15 A pixel driving circuit and a light-emitting device in a display device according to an embodiment of the present disclosure are shown.

[0032] Figure 16 It shows that it is applied to Figure 15 The waveform diagram shows the cathode voltage of the multiple second electrodes.

[0033] Figure 17 It shows that it is applied to Figure 15 The waveform diagram shows the cathode voltage of the multiple second electrodes.

[0034] Figures 18 to 21 This is a diagram illustrating a display device that applies an embodiment of the present disclosure.

[0035] Throughout the accompanying drawings and detailed embodiments, unless otherwise described, the same reference numerals should be understood to refer to the same elements, features, and structures. For clarity, illustration, and convenience, the dimensions, lengths, and thicknesses of layers, regions, and elements, and their descriptions, may be exaggerated. Detailed Implementation

[0036] The advantages and features of this disclosure and its implementation methods have been illustrated by referring to the various aspects described in the accompanying drawings. However, this disclosure may be embodied in different forms and should not be construed as limited to the exemplary aspects set forth herein. Rather, these exemplary aspects are examples and are provided to make this disclosure thorough and complete in order to assist those skilled in the art in understanding the inventive concept, without limiting the scope of protection of this disclosure.

[0037] The shapes, dimensions, ratios, angles, and numbers disclosed in the accompanying drawings used to describe embodiments of this disclosure are merely examples, and therefore this disclosure is not limited to the details shown. The same reference numerals always refer to the same elements. In the following description, detailed descriptions of relevant known functions or configurations will be omitted where it is determined that such detailed descriptions would unnecessarily obscure the essential points of this disclosure. Where terms such as “comprising,” “having,” and “including” are used in this disclosure, additional parts may be added unless “only” is used. Unless otherwise stated, singular terms may include plural forms.

[0038] When interpreting components, they are interpreted as including a range of error, even though no explicit description is provided.

[0039] When describing positional relationships, for example, when the positional relationship between two components is described as “above,” “over,” “below,” “next,” or “adjacent,” one or more other components may be located between the two components unless more restrictive terms such as “immediately,” “directly,” or “near” are used.

[0040] When describing temporal relationships, when the temporal sequence is described as such as "after", "following", "next", "before", etc., it may include discontinuous or non-sequential situations, and therefore one or more other events may occur in between, unless more restrictive terms such as "immediately" or "directly" are used.

[0041] It should be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms, for example, not by any particular order, priority, or number of elements. These terms are used only to distinguish one element from another. Therefore, the first element described below can be understood as a second element within the scope of the technical concept of this disclosure.

[0042] In describing elements of this disclosure, the terms “first,” “second,” “A,” “B,” “(a),” “(b),” etc., may be used. These terms are intended to identify the corresponding element from other elements, and are not used to define the nature, basis, order, or number of elements.

[0043] Unless otherwise specified, when describing an element as “connected,” “coupled,” “contacted,” or “attached” to another element, the element may be directly connected, coupled, or contacted to another element, or indirectly connected, coupled, or contacted by inserting one or more intervening elements between the elements.

[0044] Unless otherwise stated, the description of a component "contacting" or "overlapping" with another component means that the component can not only directly contact or overlap with another component, but also indirectly contact or overlap with another component by setting or inserting one or more intervening components between the components.

[0045] The term “at least one” should be understood to include any and all combinations of one or more of the associated listed items. For example, “at least one of the first element, the second element, and the third element” means all combinations of the three listed elements, combinations of any two of the three elements, and each individual element—the first element, the second element, and the third element.

[0046] The terms “first direction,” “second direction,” “third direction,” “X-axis direction,” “Y-axis direction,” and “Z-axis direction” should not be interpreted solely by their geometric relationship of being perpendicular to each other, but can have a wider range of orientations within the scope of the elements of this disclosure that can function.

[0047] As will be fully understood by those skilled in the art, the features of the various embodiments of this disclosure may be coupled or combined with each other in part or in whole, and may interoperate differently with each other and be technically driven. Embodiments of this disclosure may be performed independently of each other, or may be performed together in an interdependent manner.

[0048] In the following, exemplary embodiments of the sound device according to this disclosure will be described in detail with reference to the accompanying drawings. For ease of description, the scale of each element shown in the drawings differs from the actual scale, and is therefore not limited to the scale shown in the drawings.

[0049] Figure 1 This is an exploded perspective view showing a display device according to an embodiment of the present disclosure.

[0050] Reference Figure 1The display device 1000 according to the embodiments of the present disclosure may include a display panel 100, a cover member 120, a support substrate 190, and a drive circuit section 300.

[0051] The display panel 100 can be configured to display information, images, and / or pictures to a user. The display panel 100 can be configured to sense a user's touch.

[0052] Cover member 120 may be disposed above display panel 100. Cover member 120 may be a member for protecting display panel 100. Cover member 120 may be made of transparent material. For example, cover member 120 may be a cover window or a cover glass.

[0053] The display device 1000 may also include a polarizing layer 180 and an adhesive layer 185.

[0054] The polarization layer 180 can be disposed above the display panel 100. The polarization layer 180 can be disposed (or inserted) between the display panel 100 and the cover member 120. The polarization layer 180 can be configured to prevent or reduce light generated from an external light source from entering the interior of the display panel 100 and affecting the light-emitting devices, etc.

[0055] The adhesive layer 185 can attach the cover member 120 to the display panel 100. The adhesive layer 185 can be disposed (or inserted) between the polarizing layer 180 and the cover member 120, and can attach the cover member 120 to the polarizing layer 180. The adhesive layer 185 may include optically clear adhesive (OCA), optically clear resin (OCR), or pressure-sensitive adhesive (PSA), but embodiments of this disclosure are not limited thereto.

[0056] A support substrate 190 may be disposed on the rear surface of the display panel 100. The support substrate 190 may be configured to enhance the rigidity of the display panel 100. For example, the support substrate 190 may be made of plastic or metal material, but embodiments of the present disclosure are not limited thereto. The support substrate 190 may be a back plate, but embodiments of the present disclosure are not limited thereto.

[0057] A portion of the display panel 100 may be bent to surround the side surface (or lateral surface) of the support substrate 190, and may be disposed on the rear surface of the support substrate 190.

[0058] The driving circuit section 300 can be electrically connected to the display panel 100. The driving circuit section 300 can be configured to generate signals required for displaying (or implementing) images on the display panel 100 and supply signals to the display panel 100. The driving circuit section 300 may include a flexible printed circuit board 310 and a printed circuit board 330.

[0059] Flexible printed circuit boards 310 and 330 may be disposed at the lower portion of the display panel 100. Flexible printed circuit boards 310 and 330 may be disposed at least at the edge portion of the display panel 100, but embodiments of this disclosure are not limited thereto. One end of flexible printed circuit board 310 may be attached to the display panel 100, and the other end of flexible printed circuit board 310 may be attached to printed circuit board 330, but embodiments of this disclosure are not limited thereto. Flexible printed circuit board 310 may be a flexible film, but embodiments of this disclosure are not limited thereto.

[0060] Flexible printed circuit board 310 and printed circuit board 330 can be disposed on the rear surface of support substrate 190. Support substrate 190 can be disposed between display panel 100 and printed circuit board 330.

[0061] The printed circuit board 330 may include at least one hole 331, but embodiments of this disclosure are not limited thereto. Internal components for sensing ambient light or temperature, which may be disposed to multiple sensors, may be disposed in the area corresponding to at least one hole 331. For example, the internal components may include an ambient light sensor (ALS) or a temperature sensor, but embodiments of this disclosure are not limited thereto. For example, the hole 331 may be a transmission hole, but embodiments of this disclosure are not limited thereto.

[0062] The display device 1000 according to embodiments of the present disclosure may further include a touch panel 200.

[0063] Touch panel 200 can be configured to sense user touch on display panel 100. For example, touch panel 200 can sense user touch via a stylus or finger. Touch panel 200 can be configured to sense screen brightness based on user touch.

[0064] According to embodiments of this disclosure, a touch panel 200 can be inserted or disposed between a display panel 100 and a cover member 120. For example, the touch panel 200 can be inserted or disposed between the cover member 120 and a polarizing layer 180. The touch panel 200 can be connected or attached to the rear surface of the cover member 120 via a transparent adhesive material. The touch panel 200 may include a touch electrode layer comprising touch electrodes for sensing finger or pen touches by a user on the display panel 100. The touch electrode layer can be configured to sense capacitance changes on the touch electrodes based on user touches. For example, the touch electrode layer may include an electrode structure corresponding to a mutual capacitance type with multiple touch driving electrodes and multiple touch sensing electrodes cross-configured, or a self-capacitance type with only multiple touch sensing electrodes configured.

[0065] The driving circuit unit 300 can be electrically connected to the touch panel 200. The driving circuit unit 300 can be configured to sense changes in capacitance on the touch electrodes in the touch panel 200, generate touch coordinate data corresponding to the user's touch position, and provide the touch coordinate data to the host control unit.

[0066] Figure 2 This is a plan view of a display device according to an embodiment of the present disclosure. Figure 3 This is an enlarged view of a display device according to an embodiment of the present disclosure.

[0067] Reference Figure 2 and Figure 3 The display device 1000 may include a display panel 100, a flexible printed circuit board 310, and a printed circuit board 330.

[0068] The display panel 100 may include a substrate 110. The substrate 110 may be a component configured to support other parts of the display device 1000. The substrate 110 may be made of an insulating material. For example, the substrate 110 may be made of glass or resin. Alternatively, the substrate 110 may be made of a flexible material. For example, the substrate 110 may be made of a flexible plastic material, such as polyimide (PI), but embodiments of this disclosure are not limited thereto.

[0069] The display panel 100 according to embodiments of the present disclosure may include a display area AA and a non-display area NA. For example, the substrate 110 may include the display area AA and the non-display area NA. The display area AA and the non-display area NA are not limited to the substrate 110, but may be described throughout the display device 1000.

[0070] The display area AA can be an area for displaying an image. The display area AA can include multiple pixels PX. Each of the multiple pixels PX can be composed of multiple sub-pixels. For example, each of the multiple pixels PX can include multiple sub-pixels. Each of the multiple sub-pixels can include multiple light-emitting devices. The multiple light-emitting devices can be configured differently depending on the type of the display device 1000. For example, when the display device 1000 is an inorganic light-emitting display device, the light-emitting devices can be LEDs (light-emitting diodes), micro LEDs (micro light-emitting diodes), or mini LEDs (mini light-emitting diodes), but the embodiments of this disclosure are not limited to these.

[0071] According to the design of the display device 1000, the display area AA can be configured into various shapes. For example, the display area AA can be configured into a rectangular shape with rounded corners, but the embodiments of this disclosure are not limited to this. As another example, the display area AA can be configured into a rectangular shape or a circular shape with right angles, etc., but the embodiments of this disclosure are not limited to this.

[0072] Reference Figure 3 Multiple pixel driving circuits (PDs) can be disposed at the display area AA. The multiple pixel driving circuits (PDs) can be circuits for driving light-emitting devices of multiple sub-pixels. Each of the multiple pixel driving circuits (PDs) includes multiple transistors, such as driving transistors and storage capacitors, and can control the light-emitting operation of the multiple light-emitting devices by supplying control signals, power, and driving current to the light-emitting devices of the multiple sub-pixels. For example, each of the multiple pixel driving circuits (PDs) can be electrically connected to power supply wiring disposed (or configured) at the display area AA and signal wiring for controlling the light-emitting on / off and / or light-emitting time of the light-emitting devices. For example, each of the multiple pixel driving circuits (PDs) can be a microchip or chipset, and can be a semiconductor packaged device with a fine dimension including multiple transistors and storage capacitors. For example, each of the multiple pixel driving circuits (PDs) can be a driver manufactured on a semiconductor substrate using a MOSFET (Metal-Oxide-Silicon Field-Effect Transistor) fabrication process, but embodiments of this disclosure are not limited thereto. The driver includes multiple pixel driving circuits (PDs) and can drive multiple sub-pixels.

[0073] The non-display area NA can be the area surrounding the display area AA. The non-display area NA can be an area where no image is displayed. The non-display area NA can include various wiring and driving circuits for driving multiple pixels PX arranged (or configured) in the display area AA. For example, various wiring and driving circuits can be installed in the non-display area NA, and pad portions PADs connected to integrated circuits and printed circuit boards, etc., can be provided in the non-display area NA, but embodiments of this disclosure are not limited thereto.

[0074] According to embodiments of this disclosure, the driving circuit may include a driving integrated circuit 311. For example, the driving circuit may be a data driving circuit and / or a gate driving circuit, but embodiments of this disclosure are not limited thereto. The wires to which control signals for controlling the driving circuit are supplied may be located in the non-display area NA. For example, the control signals may include various timing signals, including clock signals, input data enable signals, and synchronization signals, but embodiments of this disclosure are not limited thereto. Control signals may be received via a pad portion PAD. For example, a link line LL for transmitting signals may be located in the non-display area NA. For example, the pad portion PAD may be electrically connected to the driving circuit section 300.

[0075] According to embodiments of this disclosure, the non-display area NA may include a first non-display area NA1, a curved area BA, and a second non-display area NA2. For example, the first non-display area NA1 may be a region surrounding at least a portion of the display area AA. The curved area BA may be a region extending from at least one of the plurality of sides of the first non-display area NA1, and may be a flexible region. The second non-display area NA2 may be a region extending from the curved area BA, and may have pad portions PAD disposed therein. For example, the curved area BA may be in a curved state, and the remaining area of ​​the substrate 110 other than the curved area BA may be in a flat state. In this case, when the curved area BA is bent, the second non-display area NA2 may be located on the rear surface of the display area AA, but embodiments of this disclosure are not limited thereto.

[0076] According to embodiments of this disclosure, multiple link lines LL can be disposed at the non-display area NA. The multiple link lines LL can be lines that transmit various signals from one or more flexible circuit boards (or flexible films) 310 and printed circuit boards 330 to the display area AA. The multiple link lines LL can extend from multiple pad electrodes PE of the second non-display area NA2 toward the curved area BA and the first non-display area NA1, and can be electrically connected to multiple drive lines VL of the display area AA. Multiple pixel driving circuits PD can be driven by receiving signals from one or more flexible circuit boards (or flexible films) 310 and printed circuit boards 330 via the drive lines VL of the display area AA and the link lines LL of the non-display area NA.

[0077] According to embodiments of this disclosure, a plurality of drive lines VL, together with a plurality of link lines LL, can serve as lines for transmitting signals output from the flexible circuit board (or flexible film) 310 and the printed circuit board 330 to a plurality of pixel driving circuits PD. The plurality of drive lines VL can be disposed at the display area AA and can be electrically connected to each of the plurality of pixel driving circuits PD. The plurality of drive lines VL can extend from the display area AA toward the non-display area NA and can be electrically connected to the plurality of link lines LL. Therefore, signals output from the flexible circuit board (or flexible film) 310 and the printed circuit board 330 can be transmitted to each of the plurality of pixel driving circuits PD via the plurality of link lines LL and the plurality of drive lines VL.

[0078] According to embodiments of this disclosure, when the bending region BA bends, portions of multiple link lines LL can be bent together. Stress concentrates on the bent portions of the link lines LL, thus potentially causing cracks in the link lines LL. Therefore, the multiple link lines LL can be made of a conductive material with excellent flexibility to reduce cracking when the bending region BA bends. For example, the multiple link lines LL can be made of a conductive material with excellent flexibility, such as gold (Au), silver (Ag), aluminum (Al), etc., but embodiments of this disclosure are not limited to this. Additionally, the multiple link lines LL can be configured as one of various conductive materials used in the display region AA. For example, the multiple link lines LL can be made of an alloy or alloy of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and silver (Ag) and magnesium (Mg), but embodiments of this disclosure are not limited to this. The multiple link lines LL can be made of a multilayer structure comprising various conductive materials. For example, multiple link lines LL can be composed of a three-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti), but the embodiments of this disclosure are not limited to this.

[0079] Multiple link lines LL can be configured in various shapes to reduce stress. At least a portion of the multiple link lines LL disposed on the curved region BA can extend in the same direction as the extension direction of the curved region BA, or in a direction different from the extension direction of the curved region BA, to reduce stress. For example, when the curved region BA extends from the first non-display region NA1 toward the second non-display region NA2 in one direction, at least a portion of the link lines LL disposed on the curved region BA can extend in a direction inclined relative to one direction. As another example, at least a portion of the multiple link lines LL can be configured in various shaped patterns. For example, at least a portion of the multiple link lines LL disposed on the curved region BA can have a shape in which a conductive pattern having at least one of the shapes selected from diamond, rhombus, trapezoidal waveform, triangular waveform, sawtooth waveform, sine waveform, circular, and omega (Ω) shape is repeatedly disposed, but embodiments of the present disclosure are not limited thereto. Therefore, in order to minimize or at least reduce the stress concentrated on the multiple link lines LL and the resulting cracks, the shape of the multiple link lines LL can be formed in various shapes including the above-described shapes, but embodiments of the present disclosure are not limited thereto.

[0080] According to embodiments of this disclosure, the width of the second non-display area NA2, which is provided with multiple pad electrodes PE, can be wider than the width of the curved area BA, which is provided with only multiple link lines LL. Additionally, the width of the display area AA, which is provided with multiple sub-pixels, can be wider than the width of the curved area BA, which is provided with only multiple link lines LL. Although the width of the curved area BA is shown in the figures as narrower than the width of other areas of the substrate 110, the shape of the substrate 110 including the curved area BA can be exemplary, and embodiments of this disclosure are not limited thereto.

[0081] A pad portion PAD, including multiple pad electrodes PE, can be disposed at a second non-display area NA2. One or more flexible circuit boards (or flexible films) 310 can be attached or bonded to the pad portion PAD. The multiple pad electrodes PE of the pad portion PAD can be electrically connected to one or more flexible circuit boards (or flexible films) 310, and can transmit various signals (or power) received from the printed circuit board 330 and the flexible circuit board (or flexible film) 310 to multiple pixel driving circuits PD of the display area AA.

[0082] The flexible circuit board (or flexible film) 310 can be a film in which various components are disposed on a flexible base film. For example, a driver integrated circuit 311, including one or more gate driver integrated circuits and data driver integrated circuits, can be disposed on the flexible circuit board (or flexible film) 310, but embodiments of the present disclosure are not limited thereto. The driver integrated circuit 311 can be a component that processes data and drive signals for displaying images. The driver integrated circuit 311 can be disposed based on a mounting method such as chip on glass (COG), chip on thin film (COF), or tape-on-a-package (TCP), but embodiments of the present disclosure are not limited thereto. The flexible circuit board (or flexible film) 310 can be attached or bonded to multiple pad electrodes PE by a conductive adhesive layer, but embodiments of the present disclosure are not limited thereto.

[0083] The printed circuit board 330 is electrically connected to one or more flexible circuit boards (or flexible films) 310 and can be a component that supplies signals to the driver integrated circuit 311. The printed circuit board 330 can be disposed on one side of the flexible circuit board (or flexible film) 310 and can be electrically connected to the flexible circuit board (or flexible film) 310. Circuit components for supplying various signals to the driver integrated circuit 311, such as memory or various passive circuit elements, can be additionally disposed on the printed circuit board 330.

[0084] The drive circuit section 300 according to the embodiments of this disclosure may further include a timing controller 350 and a power management integrated circuit (PMIC) 370.

[0085] The timing controller 350 can be mounted on the printed circuit board 330. The timing controller 350 receives image data and timing synchronization signals provided from the host control section, converts the image data into pixel data and provides the pixel data to the driver integrated circuit 311, and controls the driving timing of the driver integrated circuit 311 and each of the multiple pixel driver circuits PD based on the timing synchronization signals.

[0086] The power management integrated circuit 370 can be configured to generate and output various powers for driving the display device 1000. For example, the power management integrated circuit 370 can be configured to generate and output power supply voltage, reference voltage, cathode turn-on voltage, cathode turn-off voltage, etc., according to the control of the timing controller 350 based on the input power. For example, the power supply (or driving) voltage can be a voltage used to drive the driving circuit or integrated circuit. The reference voltage can be a voltage used to control (or determine) the brightness (or luminance) of an image displayed in the display area AA or light emitted from a light-emitting device. The cathode turn-on voltage can be a voltage used to turn on the light-emitting device (or make it emit light). The cathode turn-off voltage can be a voltage used to turn off the light-emitting device. For example, the cathode turn-on voltage can be a first common voltage or a first low-potential power supply voltage, and the cathode turn-off voltage can be a second common voltage or a second low-potential power supply voltage, but embodiments of this disclosure are not limited thereto. For example, the driving circuit section 300 is configured to change the reference voltage and the cathode turn-off voltage based on the screen brightness set by the user (or the user's touch).

[0087] The driving circuit section 300 according to the embodiments of this disclosure may further include a touch integrated circuit 390.

[0088] The touch integrated circuit 390 can be configured to be electrically connected to the touch electrodes in the touch panel 200. In response to a touch synchronization signal supplied from the timing controller 350, the touch integrated circuit 390 can supply touch drive signals to the touch electrodes, generate raw touch data corresponding to changes in capacitance on the touch electrodes, and provide the generated raw touch data to the timing controller 350 or the host control unit. However, embodiments of the present invention are not limited thereto. For example, the touch integrated circuit 390 can be configured to generate touch coordinate data based on the raw touch data and provide the touch coordinate data to the host control unit. For example, the touch integrated circuit 390 can be integrated or built into the driver integrated circuit 311.

[0089] The timing controller 350 can be configured to control the voltage output from the power management integrated circuit 370 based on user touch information provided from the touch integrated circuit 390 or the host control section. For example, when a user adjusts the screen brightness (or luminance) of the display device 1000 via touch panel 200 or button operation, the timing controller 350 can be configured to provide reference voltage data and cathode turn-off voltage data (or second common voltage data) to the power management integrated circuit 370 based on screen brightness data corresponding to the screen brightness according to the user operation (or setting). The power management integrated circuit 370 can be configured to generate and output the reference voltage and cathode turn-off voltage based on each of the reference voltage data and cathode turn-off voltage data provided from the timing controller 350.

[0090] Figure 4 This is a diagram illustrating the circuit structure according to an embodiment of the present disclosure. Figure 4 It is shown Figure 3 A diagram showing a microdriver included in each of the multiple pixel driving circuits.

[0091] exist Figure 4 In this example, one light-emitting device (ED) is connected to one micro-driver (μ driver), but this is not limited to this. For example, eight EDs can be connected to one micro-driver (μ driver). For example, eight EDs in different lines (or horizontal lines or row lines) can be connected to one micro-driver (μ driver). In another example, 16 EDs can be connected to one micro-driver (μ driver), or 32 or 64 EDs can be simultaneously (or collectively) connected to one micro-driver (μ driver). For example, the micro-driver (μ driver) can be a sub-driver (μ driver). For example, the ED can be a micro-light-emitting device, a micro-light-emitting diode, or a micro-light-emitting diode chip. For example, the ED can have a scale from 1 μm to 100 μm, but the embodiments of this disclosure are not limited to this.

[0092] A microdriver (μ driver) can be configured to apply a drive current (or data current) to a light-emitting device (ED) based on a scan signal (or reference voltage) and a light-emitting signal. A microdriver (μ driver) according to embodiments of this disclosure may include a driving transistor (TDR) and a light-emitting transistor (TEM), but embodiments of this disclosure are not limited thereto.

[0093] According to embodiments of this disclosure, a high-potential power supply voltage VDD can be applied to the first electrode of the driving transistor TDR, the first electrode of the light-emitting transistor TEM can be connected to the second electrode of the driving transistor TDR, and a scan signal SC can be applied to the gate electrode of the driving transistor TDR. The scan signal SC applied to the gate electrode of the driving transistor TDR is DC power, and a fixed reference voltage Vref can be applied for each frame, but embodiments of this disclosure are not limited to this. For example, the reference voltage Vref can be changed for one or more frames. For example, the reference voltage Vref can be adjusted (or changed) based on the screen brightness according to user operation (or settings).

[0094] According to embodiments of this disclosure, the second electrode of the driving transistor TDR can be connected to the first electrode of the light-emitting transistor TEM, the light-emitting device ED can be connected to the second electrode of the light-emitting transistor TEM, and the light-emitting signal EM can be applied to the gate electrode of the light-emitting transistor TEM. The light-emitting signal EM applied to the gate electrode of the light-emitting transistor TEM can be a pulse-width modulated (PWM) signal for each frame change, but embodiments of this disclosure are not limited to this. For example, the light-emitting signal EM can include a duty cycle for turning on the light-emitting transistor TEM and a duty cycle for turning off the light-emitting transistor TEM. For example, the duty cycle of the light-emitting signal EM can be set (or adjusted) by the grayscale corresponding to the pixel data.

[0095] The first electrode of the light-emitting device (ED) can be connected to the second electrode of the light-emitting transistor (TEM), and the second electrode of the ED can be connected to a low-potential power supply line. For example, the first electrode of the ED can be an anode electrode or an anode terminal, and the second electrode of the ED can be a cathode electrode or a cathode terminal, but embodiments of this disclosure are not limited thereto. For example, the voltage applied from the TEM to the first electrode of the ED can be the anode voltage. For example, the voltage applied to the low-potential power supply line can be the cathode voltage Vce. For example, the voltage applied to the low-potential power supply line can be the cathode on-state voltage Vce_on or the cathode off-state voltage Vce_off. For example, one or more of the cathode on-state voltage Vce_on and cathode off-state voltage Vce_off can be changed (or adjusted). For example, one or more of the cathode on-state voltage Vce_on and cathode off-state voltage Vce_off can be varied (or adjusted) according to the screen brightness as set by the user. For example, one or more of the cathode on-state voltage Vce_on and cathode off-state voltage Vce_off can be varied (or adjusted) according to a reference voltage Vref.

[0096] Each of the driving transistor TDR and the light-emitting transistor TEM can be an n-type transistor or a p-type transistor.

[0097] In a micro-driver (μ-driver), the driving transistor TDR can be turned on by a scan signal SC applied from the pixel driving circuit PD, and the light-emitting transistor TEM can be turned on by a light-emitting signal EM applied from the pixel driving circuit PD. Therefore, by applying a high-potential power supply voltage VDD to the first electrode of the driving transistor TDR, a driving current is applied to the light-emitting device ED through the driving transistor TDR and the light-emitting transistor TEM, and thus, the light-emitting device ED can emit light. For example, the light-emitting device ED can emit light when a cathode on-state voltage Vce_on is applied to the low-potential power line, or it can not emit light when a cathode off-state voltage Vce_off is applied to the low-potential power line.

[0098] Figures 5 to 7 This is a plan view of a display device according to an embodiment of the present disclosure. For example, Figure 5 It is a magnified view of a display area that includes multiple pixels. For example, Figure 6 It is a magnified view of a display area that includes one pixel. For example, Figure 7 It is a magnified view of a display area that includes multiple pixels.

[0099] Figure 5 and Figure 6 Multiple signal lines TL, multiple communication lines NL, multiple first electrodes CE1, multiple dams BNK, and multiple light-emitting devices ED are shown, but embodiments of the present disclosure are not limited thereto. Figure 7 Is Figure 5 An enlarged top view of multiple second electrodes CE2 is attached. For convenience, the areas overlapping with the second electrodes CE2 are indicated by dashed lines.

[0100] Reference Figures 5 to 7 Multiple pixels PX, consisting of multiple sub-pixels, can be set in the display area AA. Each sub-pixel includes a light-emitting device ED and can emit light independently. The multiple sub-pixels can be configured in multiple rows and columns, and can be arranged in a matrix, but the embodiments of this disclosure are not limited thereto.

[0101] Multiple subpixels may include a first subpixel SP1, a second subpixel SP2, and a third subpixel SP3. For example, multiple subpixels may include a first subpixel SP1, a second subpixel SP2, and a third subpixel SP3 arranged along a row direction (or a first direction X). For example, any one of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 may be a red subpixel, another subpixel may be a green subpixel, and yet another subpixel may be a blue subpixel. The types of multiple subpixels are exemplary, and implementations of this disclosure are not limited thereto.

[0102] Each of the plurality of pixels PX may include one or more first sub-pixels SP1, one or more second sub-pixels SP2, and one or more third sub-pixels SP3. For example, a pixel PX may include a pair of first sub-pixels SP1, a pair of second sub-pixels SP2, and a pair of third sub-pixels SP3.

[0103] A pair of first sub-pixels SP1 can be composed of sub-pixels SP1a and SP1b. A pair of second sub-pixels SP2 can be composed of sub-pixels SP2a and SP2b. A pair of third sub-pixels SP3 can be composed of sub-pixels SP3a and SP3b. For example, a pixel PX may include sub-pixels SP1a, SP1b, SP2a, SP2b, SP3a, and SP3b, but the embodiments of this disclosure are not limited thereto.

[0104] The subpixels that make up a pixel PX can be arranged differently. For example, in a pixel PX, a pair of first subpixels SP1 can be arranged in the same column, a pair of second subpixels SP2 can be arranged in the same column, and a pair of third subpixels SP3 can be arranged in the same column. The first subpixels SP1, the second subpixels SP2, and the third subpixels SP3 can be arranged in the same row. The number and arrangement of the subpixels that make up a pixel PX are exemplary, and the implementation of this disclosure is not limited thereto.

[0105] Multiple signal lines TL can be positioned in the region between multiple sub-pixels. These multiple signal lines TL can extend along the column direction (or the second direction Y) in the region between multiple sub-pixels. The multiple signal lines TL can also transmit the anode voltage from the pixel driving circuit (…). Figure 3 The PD or micro-driver (μ driver) shown is a line that transmits signals to multiple sub-pixels. For example, multiple signal lines TL can be electrically connected to multiple pixel driving circuits ( Figure 3 The PD shown and the first electrode CE1 of multiple sub-pixels. From the pixel driving circuit ( Figure 3 The anode voltage output by the PD (PD) shown can be transmitted to the first electrode CE1 of multiple sub-pixels via multiple signal lines TL. For example, the first electrode CE1 can be the anode electrode electrically connected to the light-emitting device ED (ED). Figure 9 The electrode shown is 134). Therefore, the anode voltage from the signal line TL can be transmitted through the first electrode CE1 to the anode electrode of the light-emitting device ED. Figure 9 (As shown in 134). For example, the first electrode CE1 can be a connecting electrode, a connecting electrode pattern, or a connecting pattern.

[0106] Therefore, instead of forming multiple transistors and storage capacitors in each of the multiple sub-pixels, a pixel driving circuit that integrates multiple pixel circuits can be used. Figure 3 The structure of the display device 1000 is simplified by using a PD (as shown). Furthermore, since the circuitry at each sub-pixel of the multiple sub-pixels is integrated into a single pixel driving circuit (PD), the structure of the display device 1000 is further simplified. Figure 3As shown in the PD), high efficiency and low power driving can be achieved.

[0107] The multiple signal lines TL may include a first signal line TL1, a second signal line TL2, a third signal line TL3, a fourth signal line TL4, a fifth signal line TL5, and a sixth signal line TL6. Each of the first signal line TL1 and the second signal line TL2 can be electrically connected to each first sub-pixel in a pair of first sub-pixels SP1. Each of the third signal line TL3 and the fourth signal line TL4 can be electrically connected to each second sub-pixel in a pair of second sub-pixels SP2. Each of the fifth signal line TL5 and the sixth signal line TL6 can be electrically connected to each third sub-pixel in a pair of third sub-pixels SP3.

[0108] A first signal line TL1 can be disposed on one side of a pair of first sub-pixels SP1, and a second signal line TL2 can be disposed on the other side of the pair of first sub-pixels SP1. The first signal line TL1 can be electrically connected to the first electrode CE1 of one of the first sub-pixels SP1 (e.g., the first-1st sub-pixel SP1a). The second signal line TL2 can be electrically connected to the first electrode CE1 of the other first sub-pixel SP1 (e.g., the first-2nd sub-pixel SP1b).

[0109] A third signal line TL3 can be disposed on one side of a pair of second sub-pixels SP2, and a fourth signal line TL4 can be disposed on the other side of the pair of second sub-pixels SP2. For example, the third signal line TL3 can be disposed adjacent to the second signal line TL2. The third signal line TL3 can be electrically connected to the first electrode CE1 of one of the second sub-pixels SP2 (e.g., the 2-1st sub-pixel SP2a). The fourth signal line TL4 can be electrically connected to the first electrode CE1 of the other second sub-pixel SP2 (e.g., the 2-2nd sub-pixel SP2b).

[0110] The fifth signal line TL5 can be disposed on one side of a pair of third sub-pixels SP3, and the sixth signal line TL6 can be disposed on the other side of the pair of third sub-pixels SP3. For example, the fifth signal line TL5 can be disposed adjacent to the fourth signal line TL4. The sixth signal line TL6 can be disposed adjacent to the first signal line TL1 connected to the adjacent pixel PX. The fifth signal line TL5 can be electrically connected to the first electrode CE1 of one of the third sub-pixels SP3 in the pair (e.g., the 3-1st sub-pixel SP3a). The sixth signal line TL6 can be electrically connected to the first electrode CE1 of the other third sub-pixel SP3 in the pair (e.g., the 3-2nd sub-pixel SP3b).

[0111] Multiple signal lines TL can be made of conductive materials. For example, multiple signal lines TL can be made of conductive materials such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), and indium gallium zinc oxide (IGZO), but embodiments of this disclosure are not limited thereto. As another example, multiple signal lines TL can be made of a multilayer structure of conductive materials. For example, multiple signal lines TL can be made of a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but embodiments of this disclosure are not limited thereto.

[0112] Multiple communication lines NL can be disposed in the region between multiple pixels PX. The multiple communication lines NL can be configured to extend along the row direction in the region between the multiple pixels PX. The multiple communication lines NL can be disposed in the region between multiple second electrodes CE2, and do not overlap with the multiple second electrodes CE2. For example, the multiple communication lines NL can be lines (or wiring) for short-range communication such as near-field communication (NFC). The multiple communication lines NL can be used as antennas. For example, the multiple communication lines NL can be multiple connecting lines, but embodiments of this disclosure are not limited thereto.

[0113] According to embodiments of this disclosure, a dam BNK can be disposed at each of a plurality of sub-pixels. The plurality of dam BNKs can be structures on which a plurality of light-emitting devices (EDs) are mounted. In a transfer process of transferring the plurality of EDs, the plurality of dam BNKs can guide the position of the plurality of EDs. In the transfer process of the plurality of EDs, the plurality of EDs can be transferred onto the plurality of dam BNKs. The entire area of ​​the ED can overlap with the dam BNK. For example, in a planar view, the overall size of the ED can be smaller than the dam BNK. For example, the plurality of dam BNKs can be dam patterns, structures, or protruding patterns, etc., but embodiments of this disclosure are not limited thereto.

[0114] The BNKs of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be arranged to be separated from each other along the row direction (or the second direction Y). Therefore, during the process of transferring light-emitting devices to sub-pixels, it is easy to identify which types of light-emitting devices ED are transferred to the BNKs of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3, making it possible to prevent or minimize transfer defects in the light-emitting device transfer process.

[0115] According to embodiments of this disclosure, the BNK of the first-1 sub-pixel SP1a and the BNK of the first-2 sub-pixel SP1b can be connected to each other, or can be formed separately or spaced apart. For example, considering designs with transfer processing requirements, the BNK of the first-1 sub-pixel SP1a and the BNK of the first-2 sub-pixel SP1b, in which light-emitting devices (EDs) of the same type are provided, can be connected to each other, or can be formed separately or spaced apart. Furthermore, the BNK of the second-1 sub-pixel SP2a and the BNK of the second-2 sub-pixel SP2b can be connected to each other, or can be formed separately or spaced apart. The BNK of the third-1 sub-pixel SP3a and the BNK of the third-2 sub-pixel SP3b can be connected to each other, or can be formed separately or spaced apart. Therefore, a pair of first sub-pixel SP1 BNKs, a pair of second sub-pixel SP2 BNKs, and a pair of third sub-pixel SP3 BNKs can be formed in various ways, but embodiments of this disclosure are not limited thereto.

[0116] According to embodiments of this disclosure, multiple dammed brick-and-ink units (BNKs) can be made of organic insulating materials. Multiple dammed brick-and-ink units can be composed of single-layer or multi-layer organic insulating materials. For example, multiple dammed brick-and-ink units can be composed of photoresist, polyimide (PI), or acrylic-based materials, but embodiments of this disclosure are not limited to these.

[0117] A first electrode CE1 may be disposed at each of a plurality of sub-pixels. The first electrode CE1 may be disposed on and overlap with a dam BNK. The first electrode CE1 may be electrically connected to one of a plurality of signal lines TL. At least a portion of the first electrode CE1 may extend outside the dam BNK and be electrically connected to the signal line TL closest to the first electrode CE1. A portion of the first electrode CE1 may overlap with the dam BNK, and the remaining portion of the first electrode CE1 may not overlap with the dam BNK (e.g., non-overlapping).

[0118] According to embodiments of this disclosure, a portion of the first electrode CE1 of the first sub-pixel SP1a can extend to one side of the first sub-pixel SP1a and be electrically connected to the first signal line TL1, and a portion of the first electrode CE1 of the first sub-pixel SP1b can extend to the other side of the first sub-pixel SP1b and be electrically connected to the second signal line TL2. A portion of the first electrode CE1 of the second sub-pixel SP2a can extend to one side of the second sub-pixel SP2a and be electrically connected to the third signal line TL3, and a portion of the first electrode CE1 of the second sub-pixel SP2b can extend to the other side of the second sub-pixel SP2b and be electrically connected to the fourth signal line TL4. A portion of the first electrode CE1 of the third sub-pixel SP3a can extend to one side of the third sub-pixel SP3a and be electrically connected to the fifth signal line TL5, and a portion of the first electrode CE1 of the third sub-pixel SP3b can extend to the other side of the third sub-pixel SP3b and be electrically connected to the sixth signal line TL6.

[0119] The first electrode CE1 can be electrically connected to the anode electrode (or anode terminal) of the light-emitting device ED. Figure 9 As shown in 134). From the pixel driving circuit ( Figure 3 The anode voltage of the PD (as shown) can be sequentially transmitted to the light-emitting device ED via the signal line TL and the first electrode CE1. Pixel driving circuit ( Figure 3 The PD shown can apply the same voltage (or anode voltage) to the first electrode CE1 of each of the multiple sub-pixels, but embodiments of this disclosure are not limited thereto. For example, a pixel driving circuit ( Figure 3 The PD shown can be configured to apply a different voltage to the first electrode CE1 of each of the plurality of sub-pixels based on the image displayed on the corresponding sub-pixel. For example, a different voltage can be applied to the first electrode CE1 of each of the plurality of sub-pixels. Therefore, the first electrode CE1 can be a pixel electrode, but embodiments of this disclosure are not limited thereto.

[0120] The first electrode CE1 can be made of a conductive material. For example, the first electrode CE1 can be integrally formed with multiple signal lines TL. For example, the first electrode CE1 can be made of the same conductive material as the multiple signal lines TL, but the embodiments of this disclosure are not limited to this. As an embodiment of this disclosure, the first electrode CE1 can be made of conductive materials such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), etc., but the embodiments of this disclosure are not limited to this. As another embodiment of this disclosure, the first electrode CE1 can be composed of a multilayer structure of conductive material. For example, multiple first electrodes CE1 can be composed of a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but the embodiments of this disclosure are not limited to this.

[0121] Multiple light-emitting devices (EDs) can be disposed at the first electrode CE1 so as to overlap with the embankment BNK and the first electrode CE1. The entire area of ​​the multiple light-emitting devices (EDs) can overlap with the embankment BNK and the first electrode CE1. The multiple light-emitting devices (EDs) can contact the first electrode CE1 so as to overlap with the embankment BNK and the first electrode CE1.

[0122] Multiple light-emitting devices (EDs) can be disposed at and electrically connected to the first electrode CE1. Therefore, the light-emitting devices (EDs) can emit light by receiving the anode voltage from the pixel driving circuit PD via the signal line TL and the first electrode CE1.

[0123] Multiple light-emitting devices (EDs) may include a first light-emitting device 130, a second light-emitting device 140, and a third light-emitting device 150.

[0124] The first light-emitting device 130 can be disposed at the first sub-pixel SP1. The second light-emitting device 140 can be disposed at the second sub-pixel SP2. The third light-emitting device 150 can be disposed at the third sub-pixel SP3. For example, any one of the first light-emitting device 130, the second light-emitting device 140, and the third light-emitting device 150 can be a red light-emitting device, another light-emitting device can be a green light-emitting device, and another light-emitting device can be a blue light-emitting device, but the embodiments of this disclosure are not limited thereto. Therefore, red light, green light, and blue light emitted from multiple light-emitting devices ED can be combined to achieve light of various colors, including white. The types of multiple light-emitting devices ED are exemplary, but the embodiments of this disclosure are not limited thereto.

[0125] The first light-emitting device 130 may include a first-1 light-emitting device 130a disposed at the first-1 sub-pixel SP1a and a first-2 light-emitting device 130b disposed at the first-2 sub-pixel SP1b. The second light-emitting device 140 may include a second-1 light-emitting device 140a disposed at the second-1 sub-pixel SP2a and a second-2 light-emitting device 140b disposed at the second-2 sub-pixel SP2b. The third light-emitting device 150 may include a third-1 light-emitting device 150a disposed at the third-1 sub-pixel SP3a and a third-2 light-emitting device 150b disposed at the third-2 sub-pixel SP3b.

[0126] The second electrode CE2 can be disposed at each of the multiple sub-pixels. The second electrode CE2 can be disposed above the light-emitting device ED. The second electrode CE2 can be electrically connected to the pixel driving circuit via multiple contact electrodes CCE. Figure 3 The second electrode CE2 can be electrically connected to the cathode electrode (or cathode terminal) of the light-emitting device ED. Figure 9 As shown in 135), to transfer the cathode voltage (or low potential supply voltage) from the pixel drive circuit ( Figure 3 The PD (PD) shown is transmitted to the light-emitting device ED.

[0127] According to embodiments of this disclosure, the cathode voltage applied to the second electrode CE2 of each of the plurality of sub-pixels can be the same. For example, the cathode voltage can be jointly applied to the second electrode CE2 of each of the plurality of sub-pixels and the cathode electrode of the light-emitting device ED. Figure 9 (as shown in 135). Therefore, the second electrode CE2 can be a common electrode, a common electrode pattern, a common cathode electrode, a common cathode electrode pattern, a common separator electrode, or a common separator electrode pattern, but the embodiments of this disclosure are not limited thereto.

[0128] According to another embodiment of this disclosure, the cathode voltage applied to the second electrode CE2 of each of the plurality of sub-pixels can be based on a reference voltage ( Figure 4 The cathode voltage can be changed as shown in the Vref diagram. For example, it can be adjusted (or changed) based on screen brightness based on user actions (or settings).

[0129] According to embodiments of this disclosure, the second electrode CE2 may have a size corresponding to a row (or horizontal line). For example, the second electrode CE2 may have a width corresponding to a row (or horizontal line) and may extend along the row direction (or the first direction X). For example, the second electrode CE2 may be commonly connected to the light-emitting device ED in each of a plurality of pixels PX arranged along the row direction. For example, the second electrode CE2 may be commonly connected to the cathode electrode (or cathode terminal) of the light-emitting device ED in each of 16 pixels PX arranged along the row direction. Figure 9 As shown in 135), but the embodiments of this disclosure are not limited thereto. For example, the second electrode CE2 can be commonly connected to the cathode electrodes (or cathode terminals) of the 96 light-emitting devices ED arranged along the row direction. Figure 9 As shown in 135), but the embodiments of this disclosure are not limited thereto. For example, the second electrode CE2 can be commonly connected to the cathode electrodes (or cathode terminals) of 192 light-emitting devices ED in a row (or horizontal line). Figure 9 As shown in 135), but the implementation of this disclosure is not limited thereto.

[0130] According to another embodiment of this disclosure, some of the second electrodes CE2 of each of the plurality of sub-pixels can be configured to be spaced apart or separated from each other. For example, the second electrode CE2 connected to pixel PX in row n and the second electrode CE2 connected to pixel PX in row n+1 can be configured to be spaced apart or separated from each other. As an embodiment of this disclosure, the plurality of second electrodes CE2 can be configured to be spaced apart from each other, wherein a plurality of communication lines NL extend between them along the row direction. Therefore, the number of the plurality of sub-pixels can be greater than the number of the plurality of second electrodes CE2.

[0131] The multiple second electrodes CE2 can be made of a transparent conductive material, but the embodiments of this disclosure are not limited to this. The multiple second electrodes CE2 can be made of a transparent conductive material so that light emitted from the light-emitting device ED can be guided towards the upper portion of the second electrodes CE2. For example, the second electrodes CE2 can be made of transparent conductive materials such as indium tin oxide (ITO), indium zinc oxide (IZO), and indium gallium zinc oxide (IGZO), but the embodiments of this disclosure are not limited to this.

[0132] Multiple contact electrodes CCE can be disposed on the substrate 110. For example, the multiple contact electrodes CCE can be disposed spaced apart from multiple BNKs and multiple signal lines TL. Each of the multiple second electrodes CE2 can overlap with at least one contact electrode CCE. For example, one second electrode CE2 can overlap with multiple contact electrodes CCE.

[0133] Multiple contact electrodes CCE can be electrically connected to multiple second electrodes CE2. The multiple contact electrodes CCE can be disposed between the substrate 110 and the multiple second electrodes CE2, and are configured to connect from the pixel driving circuit (…). Figure 3 The cathode voltage supplied by the PD shown is transmitted to the second electrode CE2 through a low-potential power line.

[0134] According to embodiments of this disclosure, when a light-emitting device (ED) is configured as a micro-LED chip, multiple micro-LED chips can be formed on a wafer, and the micro-LED chips can be transferred to a substrate 110 to manufacture a display panel 100. During the process of transferring multiple light-emitting devices (EDs) with micro-sized (or fine-sized) dimensions from the wafer to the substrate 110, various defects may occur. For example, in some sub-pixels, there may be defects where the light-emitting device (ED) is not transferred, while in other sub-pixels, there may be defects where the ED is transferred out of its proper position due to alignment errors. Furthermore, the transfer process may proceed normally, but the transferred ED itself may be defective. Therefore, considering the defects that may occur during the transfer process of multiple EDs, multiple EDs of the same type can be transferred to a single sub-pixel. Alternatively, a lighting test can be performed on multiple EDs, and only the ED that is ultimately determined to be normal can be used.

[0135] According to an embodiment of this disclosure, the first-1 light-emitting device 130a and the first-2 light-emitting device 130b can be transferred together to a pixel PX, and defects therein can be inspected. As an embodiment of this disclosure, when it is determined that the first-1 light-emitting device 130a and the first-2 light-emitting device 130b are normal, only the first-1 light-emitting device 130a can be used, and the first-2 light-emitting device 130b can be omitted. In another embodiment of this disclosure, if only the first-2 light-emitting device 130b is determined to be normal, then the first-1 light-emitting device 130a can be omitted, and only the first-2 light-emitting device 130b can be used. Therefore, even if multiple light-emitting devices ED of the same type are transferred to a pixel PX, ultimately only one light-emitting device ED can be used.

[0136] According to embodiments of this disclosure, either one of a pair of light-emitting devices (EDs) can be a primary (or main) light-emitting device (ED), and the other light-emitting device (ED) can be a redundant light-emitting device (ED). The redundant light-emitting device (ED) can be a backup light-emitting device (ED) prepared for transfer in case of failure of the primary light-emitting device (ED). When the primary light-emitting device (ED) fails, the redundant light-emitting device (ED) can be used as a replacement for the primary light-emitting device (ED). Therefore, by transferring the primary light-emitting device (ED) and the redundant light-emitting device (ED) together to a pixel PX, the degradation of display quality due to failure of the primary light-emitting device (ED) and the redundant light-emitting device (ED) can be minimized or at least reduced. For example, first-1 light-emitting devices 130a, second-1 light-emitting devices 140a, and third-1 light-emitting devices 150a are transferred to a pixel PX that can be used as primary light-emitting devices, and first-2 light-emitting devices 130b, second-2 light-emitting devices 140b, and third-2 light-emitting devices 150b can be used as redundant light-emitting devices (EDs).

[0137] Figure 8 It is along Figure 2 The cross-sectional view taken by line I-I' is shown. Figure 9 This is a cross-sectional view of a first light-emitting device according to an embodiment of the present disclosure. For example, Figure 8 It is along Figure 2 The cross-sectional view shown is taken by line I-I', which includes the display area AA, the first non-display area NA, the curved area BA, and the second non-display area NA2. Figure 9 It is a cross-sectional view of a portion of the display area AA.

[0138] Reference Figure 8 The buffer layer 111 can be disposed in the remaining area of ​​the substrate 110 excluding the bending region BA. The buffer layer 111 may include a first buffer layer 111a and a second buffer layer 111b.

[0139] The first buffer layer 111a and the second buffer layer 111b can be disposed at the display area AA, the first non-display area NA1, and the second non-display area NA2. The first buffer layer 111a and the second buffer layer 111b can reduce the penetration of moisture or impurities through the substrate 110. The first buffer layer 111a and the second buffer layer 111b can be made of inorganic insulating material. For example, the first buffer layer 111a and the second buffer layer 111b can be made of single or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but the embodiments of this disclosure are not limited thereto.

[0140] According to embodiments of this disclosure, a portion of the first buffer layer 111a and the second buffer layer 111b on the bending region BA can be removed. The upper surface of the substrate 110 located at the bending region BA can be exposed without being covered by the first buffer layer 111a and the second buffer layer 111b. Since the portions of the first buffer layer 111a and the second buffer layer 111b made of inorganic insulating material are removed at the bending region BA, cracks generated at the first buffer layer 111a and the second buffer layer 111b can be prevented or minimized when the bending region BA is bent.

[0141] Multiple alignment keys MK may be disposed between the first buffer layer 111a and the second buffer layer 111b. The multiple alignment keys MK may be configured to identify (or align) the position of the pixel driving circuit PD during the manufacturing process of the display panel 100. For example, the multiple alignment keys MK may be configured to align the position of the pixel driving circuit PD transferred to the adhesive layer 112. For example, the multiple alignment keys MK may be omitted, but embodiments of this disclosure are not limited thereto.

[0142] The adhesive layer 112 may be disposed on the second buffer layer 111b. The adhesive layer 112 may be disposed at the display area AA, the first non-display area NA1, the curved area BA, and the second non-display area NA2. For example, at least a portion of the adhesive layer 112 may be removed from the non-display areas NA1 and NA2, which include the curved area BA. For example, the adhesive layer 112 may be made of any of the following: polymer, epoxy resin, UV-curable resin, polyimide-based material, acrylate-based material, urethane-based material, and polydimethylsiloxane (PDMS), but embodiments of this disclosure are not limited thereto.

[0143] In the display area AA, a pixel driving circuit PD can be disposed on the adhesive layer 112. The driving circuit PD can be supported by the buffer layer 111. When the pixel driving circuit PD is implemented as a driving driver (or a driving driver integrated circuit or a driving driver chip), the driving driver can be mounted on the adhesive layer 112 through a transfer process, but the embodiments of this disclosure are not limited thereto.

[0144] A protective layer 113 may be disposed on the adhesive layer 112 and the pixel driving circuit PD. The protective layer 113 may include a first protective layer 113a and a second protective layer 113b. For example, the first protective layer 113a and the second protective layer 113b may be disposed on the adhesive layer 112 and the pixel driving circuit PD. The first protective layer 113a and the second protective layer 113b may be disposed around the side surface (or lateral surface) of the pixel driving circuit PD, but embodiments of this disclosure are not limited thereto. For example, the second protective layer 113b may be disposed to cover at least a portion of the upper surface of the pixel driving circuit PD. For example, at least one of the first protective layer 113a and the second protective layer 113b disposed on the curved region BA may be omitted. For example, the first protective layer 113a may be entirely disposed at the display area AA and the non-display area NA, and the second protective layer 113b may be partially disposed at the display area AA, the first non-display area NA1, and the second non-display area NA2, but not at the curved region BA. For example, the second protective layer 113b (or a portion of the first protective layer 113a) at the curved region BA can be removed, but the embodiments of this disclosure are not limited thereto.

[0145] The first protective layer 113a and the second protective layer 113b may be made of organic insulating materials, but the embodiments of this disclosure are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b may be made of photoresist, polyimide (PI), or photosensitive acrylic materials, but the embodiments of this disclosure are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b may be an outer coating, an inorganic insulating layer, or an organic insulating layer, but the embodiments of this disclosure are not limited thereto.

[0146] According to embodiments of this disclosure, a wiring layer (or pixel wiring layer) may be disposed on a protective layer 113 (or a second protective layer 113b). For example, the wiring layer may be configured to surround or cover a pixel driving circuit PD. The wiring layer may include a plurality of first connection lines 121.

[0147] Multiple first connection lines 121 may be disposed on the protective layer 113. For example, multiple first connection lines 121 may be disposed on the second protective layer 113b at the display area AA. The multiple first connection lines 121 may be lines (or intermediate lines or jumpers) configured to electrically connect the pixel driving circuit PD to other components and / or lines in different layers. For example, the pixel driving circuit PD may be electrically connected to multiple signal lines TL and multiple contact electrodes CCE, etc., via the multiple first connection lines 121.

[0148] The plurality of first connection lines 121 may include first-1 connection line 121a, first-2 connection line 121b, first-3 connection line 121c, and first-4 connection line 121d, but embodiments of this disclosure are not limited thereto. For example, the plurality of first-1 connection lines 121a may be disposed on the second protective layer 113b. The plurality of first-1 connection lines 121a may be configured to be electrically connected to the pixel driving circuit PD. The plurality of first-1 connection lines 121a may be configured to transmit the voltage output from the pixel driving circuit PD to the first electrode CE1 or the second electrode CE2.

[0149] The third protective layer 114 may be disposed on the second protective layer 113b. The third protective layer 114 may be completely disposed in the display area AA and the non-display area NA. In the curved area BA, the third protective layer 114 may cover or surround the side surface (or lateral surface) of the second protective layer 113b and the upper surface of the first protective layer 113a. The third protective layer 114 may be made of an organic insulating material. For example, the third protective layer 114 may be made of photoresist, polyimide (PI), or photopolymer acrylic-based materials, but the embodiments of this disclosure are not limited thereto. For example, the first protective layer 113a, the second protective layer 113b, and the third protective layer 114 may be made of the same material, but the embodiments of this disclosure are not limited thereto.

[0150] Multiple first-second connection lines 121b can be disposed on the third protective layer 114. These multiple first-second connection lines 121b can be connected to the pixel driving circuit PD via the first-first connection line 121a, or they can be directly connected to the pixel driving circuit PD. For example, a portion of the first-second connection line 121b can be directly connected to the pixel driving circuit PD through a contact hole in the third protective layer 114. Another portion of the first-second connection line 121b can be electrically connected to the first-first connection line 121a through a contact hole in the third protective layer 114. However, embodiments of this disclosure are not limited to this. As an embodiment of this disclosure, the voltage output from the pixel driving circuit PD can be transmitted to the first electrode CE1 or the second electrode CE2 via the multiple first-second connection lines 121b and other connection lines.

[0151] The display device 1000 according to embodiments of the present disclosure may further include an insulating layer 115 in the wiring layer. The insulating layer 115 may be configured to electrically insulate and cover the plurality of first connection lines 121. For example, the insulating layer 115 may include a plurality of insulating layers 115a, 115b and 115c, or may include a first insulating layer to a third insulating layer 115a, 115b and 115c.

[0152] According to embodiments of this disclosure, the first insulating layer 115a can be disposed on a plurality of first-second connecting lines 121b. The first insulating layer 115a can be completely disposed at the display area AA and the non-display area NA, but embodiments of this disclosure are not limited thereto. The first insulating layer 115a can be made of an organic insulating material, but embodiments of this disclosure are not limited thereto. For example, the first insulating layer 115a can be made of photoresist, polyimide (PI), or photopolymer acrylic-based materials, but embodiments of this disclosure are not limited thereto.

[0153] Multiple first-to-third connecting lines 121c can be disposed on the first insulating layer 115a. The multiple first-to-third connecting lines 121c can also be electrically connected to multiple first-to-second connecting lines 121b. For example, the first-to-third connecting lines 121c can be electrically connected to the first-to-second connecting lines 121b through contact holes in the first insulating layer 115a.

[0154] The second insulating layer 115b can be disposed on a plurality of first-to-third connecting lines 121c. The second insulating layer 115b can be disposed in the remaining area excluding the bending region BA, but embodiments of this disclosure are not limited thereto. The second insulating layer 115b can be disposed in the display area AA, the first non-display area NA1, and the second non-display area NA2, but embodiments of this disclosure are not limited thereto. For example, at least a portion of the second insulating layer 115b disposed in the bending region BA can be removed. The second insulating layer 115b can be made of an organic insulating material, but embodiments of this disclosure are not limited thereto. For example, the second insulating layer 115b can be made of a photoresist, polyimide (PI), or photopolymer acrylic-based material, but embodiments of this disclosure are not limited thereto.

[0155] Multiple first-to-fourth connecting wires 121d can be disposed on the second insulating layer 115b. Multiple first-to-fourth connecting wires 121d can be electrically connected to multiple first-to-third connecting wires 121c. For example, the first-to-fourth connecting wires 121d can be electrically connected to the first-to-third connecting wires 121c through contact holes in the second insulating layer 115b.

[0156] The first-fourth connection line 121d can be connected to the contact electrode CCE through the contact hole of the third insulating layer 115c, and therefore, the contact electrode CCE and the pixel driving circuit PD can be electrically connected through the first connection line 121.

[0157] The first-fourth connection line 121d can be directly connected to the signal line TL through a contact hole provided at the third insulating layer 115c, or it can be electrically connected to the signal line TL through another additional line or electrode, and thus the signal line TL and the pixel driving circuit PD can be electrically connected through the first connection line 121.

[0158] Multiple second connection lines 122 can be disposed on the protective layer 113 in the non-display area NA. For example, multiple second connection lines 122 can be disposed on the second protective layer 113b in the non-display area NA. The multiple second connection lines 122 can be used to transfer data from a flexible circuit board (or flexible film)... Figure 2 The 310 shown) and printed circuit board ( Figure 2 The signal transmitted by 330 (as shown) passes through the pad portion ( Figure 2 The line from the PAD shown is transmitted to the pixel driving circuit PD in the display area AA.

[0159] According to embodiments of this disclosure, a plurality of second connection lines 122 can be electrically connected to a plurality of pad electrodes PE, and can be from a flexible circuit board (or flexible film) Figure 2 The 310 shown) and printed circuit board ( Figure 2 The 330 shown receives the signal.

[0160] According to embodiments of this disclosure, a plurality of second connection lines 122 can be configured to originate from the pad portion ( Figure 2 The PAD shown extends toward the display area AA and transmits signals to the display area AA. In this case, multiple second connection lines 122 can be used as link lines ( Figure 3 (as shown in LL).

[0161] The plurality of second connecting lines 122 may include second-1 connecting line 122a, second-2 connecting line 122b, second-3 connecting line 122c and second-4 connecting line 122d.

[0162] Multiple second-first connection lines 122a can be disposed on the protective layer 113. For example, multiple second-first connection lines 122a can be disposed on the second protective layer 113b. Multiple second-first connection lines 122a can extend from the second non-display area NA2 to the curved area BA and the first non-display area NA1. Multiple second-first connection lines 122a can be configured to extend from the flexible circuit board (or flexible film)... Figure 2 The 310 shown) and printed circuit board ( Figure 2 The signal transmitted by 330 (as shown) passes through the pad portion ( Figure 2 The pixel driving circuit PD of the PAD shown is transmitted to the display area AA.

[0163] According to embodiments of this disclosure, multiple second-first connection lines 122a can be electrically connected to the pad electrode PE and the pixel driving circuit PD, respectively. For example, the second-first connection lines 122a can extend to the display area AA and be directly connected to the pixel driving circuit PD within the display area AA, or they can be electrically connected to the pixel driving circuit PD via other additional lines or electrodes. Furthermore, the second-first connection lines 122a can be electrically connected to the pad electrode PE within the second non-display area NA2 via second-second connection lines 122b, second-third connection lines 122c, and second-fourth connection lines 122d. Therefore, the pixel driving circuit PD and the pad electrode PE can be electrically connected via the second-second connection lines 122.

[0164] Multiple second-2 connecting lines 122b can be disposed on the third protective layer 114. Multiple second-2 connecting lines 122b can be disposed at the second non-display area NA2. The second-2 connecting lines 122b can be electrically connected to the second-1 connecting line 122a through contact holes in the third protective layer 114. Therefore, from the flexible circuit board (or flexible film)... Figure 2 The 310 shown) and printed circuit board ( Figure 2 The signal shown in 330 can be transmitted to the 2-1 connection line 122a via the 2-2 connection line 122b.

[0165] The second-third connecting line 122c can be disposed on the first insulating layer 115a. The second-third connecting line 122c can be disposed at the second non-display area NA2. The second-third connecting line 122c can be electrically connected to the second-second connecting line 122b through the contact hole of the first insulating layer 115a. Therefore, from the flexible circuit board (or flexible film)... Figure 2 The 310 shown) and printed circuit board ( Figure 2 The signal shown in 330 can be transmitted to the 2-1 connection line 122a through the 2-3 connection line 122c and the 2-2 connection line 122b.

[0166] The second-fourth connection line 122d can be disposed on the second insulating layer 115b. The second-fourth connection line 122d can be disposed at the second non-display area NA2. The second-fourth connection line 122d can be electrically connected to the second-third connection line 122c through the contact hole of the second insulating layer 115b. The second-fourth connection line 122d can be electrically connected to the pad electrode PE through the contact hole of the third insulating layer 115c.

[0167] According to embodiments of this disclosure, the material originates from a flexible circuit board (or flexible film) Figure 2 The 310 shown) and printed circuit board ( Figure 2The signal shown in 330 can be transmitted to the 2-1 connection line 122a through the 2-4 connection line 122d, the 2-3 connection line 122c and the 2-2 connection line 122b.

[0168] The plurality of first connecting lines 121 and the plurality of second connecting lines 122 may be formed of a conductive material with excellent ductility or any of a variety of conductive materials used in the display area AA. As an embodiment of this disclosure, a portion of the second connecting lines 122 disposed in the curved area BA may be formed of a conductive material with excellent ductility, such as gold (Au), silver (Ag), or aluminum (Al), but the embodiments of this disclosure are not limited thereto. As another embodiment of this disclosure, the plurality of first connecting lines 121 and the plurality of second connecting lines 122 may be formed of an alloy or alloy of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), silver (Ag), and magnesium (Mg), but the embodiments of this disclosure are not limited thereto.

[0169] The third insulating layer 115c can be disposed on a plurality of first connecting lines 121 and a plurality of second connecting lines 122. The third insulating layer 115c can be disposed in the remaining area excluding the curved region BA, but embodiments of this disclosure are not limited thereto. The third insulating layer 115c can be disposed in the display area AA, the first non-display area NA1, and the second non-display area NA2. At least a portion of the third insulating layer 115c in the curved region BA can also be removed. The third insulating layer 115c can be made of an organic insulating material, but embodiments of this disclosure are not limited thereto. For example, the third insulating layer 115c can be made of a photoresist, polyimide (PI), or a photosensitive acrylic material, but embodiments of this disclosure are not limited thereto.

[0170] Multiple dams (BNKs) can be disposed on the third insulating layer 115c in the display area AA. The multiple dams (BNKs) can be configured to overlap with each of the multiple sub-pixels. The multiple dams (BNKs) may also not be disposed in the first non-display area NA1, the second non-display area NA2, and the curved area BA. One or more light-emitting devices (EDs) of the same type can be disposed on each of the multiple dams (BNKs).

[0171] Multiple signal lines TL can be disposed on the third insulating layer 115c in the display area AA. Multiple signal lines TL can be disposed in the area between multiple dams BNK. For example, multiple signal lines TL can be disposed adjacent to any one of the multiple dams BNK. Each of the multiple signal lines TL can be electrically connected to a first connecting line 121, such as connecting lines 1-4 121d.

[0172] Multiple contact electrodes CCE can be disposed on the third insulating layer 115c in the display area AA. The multiple contact electrodes CCE can supply cathode voltage from the pixel driving circuit PD to the second electrode CE2. Each of the multiple contact electrodes CCE can be electrically connected to a first connection line 121, such as connection lines 1-4 121d.

[0173] The first electrode CE1 can be disposed on the dam BNK. For example, the first electrode CE1 can be configured to extend from the adjacent signal line TL toward the upper portion of the dam BNK. The first electrode CE1 can be disposed on the upper surface and side surface of the dam BNK. For example, the first electrode CE1 can be configured to extend from the signal line TL on the third insulating layer 115c to the side surface and upper surface of the dam BNK. The first electrode CE1 can be a contact electrode. The first electrode CE1 can be integrally formed with the signal line TL.

[0174] Reference Figure 9 The first electrode CE1 may be composed of multiple conductive layers. For example, the first electrode CE1 may include a first conductive layer CE1a, a second conductive layer CE1b, a third conductive layer CE1c, and a fourth conductive layer CE1d, but the embodiments of this disclosure are not limited thereto.

[0175] The first conductive layer CE1a can be disposed on the embankment BNK. The second conductive layer CE1b can be disposed on the first conductive layer CE1a. The third conductive layer CE1c can be disposed on the second conductive layer CE1b. The fourth conductive layer CE1d can be disposed on the third conductive layer CE1c. For example, each of the first conductive layer CE1a, the second conductive layer CE1b, the third conductive layer CE1c, and the fourth conductive layer CE1d can be composed of titanium (Ti), molybdenum (Mo), aluminum (Al), or titanium (Ti) and indium tin oxide (ITO), but the embodiments of this disclosure are not limited thereto.

[0176] According to embodiments of this disclosure, some of the conductive layers with high reflectivity among the plurality of conductive layers constituting the first electrode CE1 can be configured as alignment keys and / or reflectors (or reflectors) for aligning the light-emitting device ED. For example, the second conductive layer CE1b among the plurality of conductive layers constituting the first electrode CE1 may include a reflective material. For example, the second conductive layer CE1b may include aluminum (Al), but embodiments of this disclosure are not limited thereto. Therefore, the second conductive layer CE1b can be configured as a reflector. In addition, due to the high reflectivity of the second conductive layer CE1b, it can be easily identified during the manufacturing process, and therefore the position of the light-emitting device ED can be aligned or its position moved based on the second conductive layer CE1b.

[0177] According to embodiments of this disclosure, in order to configure the second conductive layer CE1b as a reflector, the third conductive layer CE1c and the fourth conductive layer CE1d covering the second conductive layer CE1b can be partially removed or etched. For example, a portion of the third conductive layer CE1c and the fourth conductive layer CE1d disposed on the embankment BNK can be removed or etched, thereby exposing the upper surface of the second conductive layer CE1b. For example, the central and boundary (or edge) portions of the solder pattern SDP disposed on the third conductive layer CE1c and the fourth conductive layer CE1d can be left unremoved, and the remaining portions can be removed. For example, the boundary (or edge) portions and central portions of each of the third conductive layer CE1c made of titanium (Ti) and the fourth conductive layer CE1d made of indium tin oxide (ITO) can be left unremoved or etched. Therefore, corrosion of the other conductive layers constituting the first electrode CE1 can be prevented or minimized by using an etchant (e.g., TMAH (tetramethylammonium hydroxide) solution) in the masking process (or patterning process) of the first electrode CE1.

[0178] According to embodiments of this disclosure, the first conductive layer CE1a and the third conductive layer CE1c may comprise titanium (Ti) or molybdenum (Mo). The second conductive layer CE1b may comprise aluminum (Al). The fourth conductive layer CE1d may comprise a transparent conductive oxide layer, such as indium tin oxide (ITO) or indium zinc oxide (IZO), which has good adhesion to the solder pattern SDP and is corrosion-resistant and acid-resistant. However, embodiments of this disclosure are not limited thereto.

[0179] The first conductive layer CE1a, the second conductive layer CE1b, the third conductive layer CE1c, and the fourth conductive layer CE1d can be deposited sequentially and then patterned by photolithography and etching processes, but the embodiments disclosed herein are not limited thereto.

[0180] from Figure 8 and Figure 9 As can be seen, according to the embodiments of this disclosure, the signal line TL, contact electrode CCE, and pad electrode PE disposed on the same layer as the first electrode CE1 can be composed of a multilayer structure of conductive material, but the embodiments of this disclosure are not limited thereto. For example, the signal line TL, contact electrode CCE, and pad electrode PE can be composed of a multilayer structure of indium tin oxide (ITO) / titanium (Ti) / aluminum (Al) / titanium (Ti), but the embodiments of this disclosure are not limited thereto.

[0181] According to embodiments of this disclosure, a solder pattern SDP can be disposed on a first electrode CE1 in each of a plurality of sub-pixels. The solder pattern SDP can bond a light-emitting device ED to the first electrode CE1. The first electrode CE1 and the light-emitting device ED can be electrically connected using a eutectic bond of the solder pattern SDP, but embodiments of this disclosure are not limited thereto. For example, when the solder pattern SDP is made of indium (In) and the anode electrode 134 of the light-emitting device ED is made of gold (Au), the solder pattern SDP and the anode electrode 134 can be bonded by applying heat and pressure during the transfer process of the light-emitting device ED. The light-emitting device ED can be bonded to the solder pattern SDP and the first electrode CE1 by a eutectic bond without the need for a separate adhesive. For example, the solder pattern SDP can be made of indium (In), tin (Sn), or an alloy thereof, but embodiments of this disclosure are not limited thereto. For example, the solder pattern SDP can be a contact pattern, a bonding pad, or a connection pad, etc., but embodiments of this disclosure are not limited thereto.

[0182] According to embodiments of this disclosure, passivation layer 116 can be disposed on a wiring layer. For example, passivation layer 116 can be configured to cover the wiring layer in display area AA. For example, passivation layer 116 can be disposed on multiple signal lines TL, multiple first electrodes CE1, multiple contact electrodes CCE, and a third insulating layer 115c. For example, passivation layer 116 can be disposed at display area AA, first non-display area NA1, and second non-display area NA2. At least a portion of passivation layer 116 disposed at curved area BA can be removed. A portion of passivation layer 116 covering multiple pad electrodes PE in second non-display area NA2 can be removed. A portion of passivation layer 116 covering multiple contact electrodes CCE in display area AA can be removed. Passivation layer 116 covering solder pattern SDP in display area AA can be removed. Passivation layer 116 can cover first electrode CE1. Passivation layer 116 can cover a portion of the upper surface of exposed second conductive layer CE1b.

[0183] The passivation layer 116 is configured to expose at least a portion of the plurality of pad electrodes (PE), the plurality of contact electrodes (CCE), and the solder pattern (SDP), while covering the remaining area to reduce the ingress of moisture or impurities into the light-emitting device (ED). For example, the passivation layer 116 may be composed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but embodiments of this disclosure are not limited thereto. For example, the passivation layer 116 may be a protective layer, an organic insulating layer, or an inorganic insulating layer, etc., but embodiments of this disclosure are not limited thereto. For example, the passivation layer 116 may include holes exposing the solder pattern (SDP) and holes exposing the contact electrodes (CCE).

[0184] In each of the multiple sub-pixels, a light-emitting device ED can be disposed on the solder pattern SDP. A first light-emitting device 130 can be disposed in a first sub-pixel SP1. A second light-emitting device 140 can be disposed in a second sub-pixel SP2. A third light-emitting device 150 can be disposed in a third sub-pixel SP3.

[0185] Light-emitting devices (EDs) can be formed on silicon wafers by methods such as metal-organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), or sputtering, but the embodiments disclosed herein are not limited thereto.

[0186] Reference Figure 9 The first light-emitting device 130 may include an anode electrode 134, a first semiconductor layer 131, an active layer 132, a second semiconductor layer 133, a cathode electrode 135, and an encapsulation film 136, but the embodiments of this disclosure are not limited thereto. For example, the encapsulation film 136 may not be included in the first light-emitting device 130.

[0187] The first semiconductor layer 131 can be disposed on the solder pattern SDP. The second semiconductor layer 133 can be disposed on the first semiconductor layer 131.

[0188] According to embodiments of this disclosure, one of the first semiconductor layer 131 and the second semiconductor layer 133 can be a III-V or II-VI group compound semiconductor, and can be doped with impurities (or dopants). For example, one of the first semiconductor layer 131 and the second semiconductor layer 133 can be a semiconductor layer doped with n-type impurities, and the other can be a semiconductor layer doped with p-type impurities, but embodiments of this disclosure are not limited thereto. For example, one or more of the first semiconductor layer 131 and the second semiconductor layer 133 can be layers doped with n-type or p-type impurities in materials such as gallium nitride (GaN), gallium phosphide (GaP), gallium arsenide phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP), indium aluminum phosphide (InAlP), aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), aluminum indium gallium nitride (AlInGaN), aluminum gallium arsenide (AlGaAs), or gallium arsenide (GaAs), but embodiments of this disclosure are not limited thereto. For example, n-type impurities can be silicon (Si), germanium (Ge), selenium (Se), carbon (C), tellurium (Te), or tin (Sn), but the embodiments of this disclosure are not limited to these. For example, p-type impurities can be magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), or beryllium (Be), but the embodiments of this disclosure are not limited to these.

[0189] According to embodiments of this disclosure, the first semiconductor layer 131 and the second semiconductor layer 133 may be a nitride semiconductor including n-type impurities and a nitride semiconductor including p-type impurities, respectively, but the embodiments of this disclosure are not limited thereto. For example, the first semiconductor layer 131 may be a nitride semiconductor including p-type impurities, and the second semiconductor layer 133 may be a nitride semiconductor including n-type impurities, but the embodiments of this disclosure are not limited thereto.

[0190] An active layer 132 may be disposed (or inserted) between a first semiconductor layer 131 and a second semiconductor layer 133. The active layer 132 can receive holes and electrons from the first semiconductor layer 131 and the second semiconductor layer 133 to emit light. For example, the active layer 132 may be configured as a single-well structure, a multi-well structure, a single quantum well structure, a multiple quantum well (MQW) structure, a quantum dot structure, and a quantum wire structure, but embodiments of this disclosure are not limited thereto. For example, the active layer 132 may be configured as indium gallium nitride (InGaN) or gallium nitride (GaN), but embodiments of this disclosure are not limited thereto.

[0191] According to another embodiment of this disclosure, the active layer 132 may include a multiple quantum well (MQW) structure having a well layer and a barrier layer having a higher bandgap than the well layer. For example, the active layer 132 may include an indium gallium nitride (InGaN) layer as the well layer and an aluminum gallium nitride (AlGaN) layer as the barrier layer, but embodiments of this disclosure are not limited thereto.

[0192] An anode electrode 134 may be disposed (or inserted) between the first semiconductor layer 131 and the solder pattern SDP. For example, the anode electrode 134 may be configured to electrically connect the first semiconductor layer 131 and the first electrode CE1. The anode voltage output from the pixel driving circuit PD can be applied to the first semiconductor layer 131 through the signal line TL, the first electrode CE1, and the anode electrode 134. For example, the anode electrode 134 may be made of a conductive material capable of eutectic bonding with the solder pattern SDP, but embodiments of this disclosure are not limited thereto. For example, the anode electrode 134 may be made of gold (Au), tin (Sn), tungsten (W), silicon (Si), silver (Ag), titanium (Ti), iridium (Ir), chromium (Cr), indium (In), zinc (Zn), lead (Pb), nickel (Ni), platinum (Pt), and copper (Cu), or alloys thereof, but embodiments of this disclosure are not limited thereto.

[0193] A cathode electrode 135 may be disposed on the second semiconductor layer 133. For example, the cathode electrode 135 may be configured to electrically connect the second semiconductor layer 133 and the second electrode CE2. The cathode voltage output from the pixel driving circuit PD can be applied to the second semiconductor layer 133 through the contact electrode CCE, the second electrode CE2, and the cathode electrode 135. The cathode electrode 135 may be made of a transparent conductive material, so that light emitted from the light-emitting device ED can be guided toward the upper portion of the light-emitting device ED, but embodiments of the present disclosure are not limited thereto. For example, the cathode electrode 135 may be made of materials such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO), but embodiments of the present disclosure are not limited thereto.

[0194] The encapsulation film 136 may be disposed on at least a portion of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode electrode 134, and the cathode electrode 135. For example, the encapsulation film 136 may surround at least a portion of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode electrode 134, and the cathode electrode 135.

[0195] The encapsulation film 136 can protect the first semiconductor layer 131, the active layer 132, and the second semiconductor layer 133. For example, the encapsulation film 136 can be disposed on the side surface (or lateral surface) of the first semiconductor layer 131, the side surface (or lateral surface) of the active layer 132, and the side surface (or lateral surface) of the second semiconductor layer 133.

[0196] The encapsulation film 136 may be disposed on at least a portion of the anode electrode 134 and the cathode electrode 135 (e.g., the edge portion (or peripheral portion or side) of the anode electrode 134 and the edge portion (or peripheral portion or side) of the cathode electrode 135). At least a portion of the anode electrode 134 not covered by the encapsulation film 136 may be exposed, allowing the anode electrode 134 and the solder pattern SDP to be connected. For example, at least a portion of the cathode electrode 135 not covered by the encapsulation film 136 may be exposed, allowing the cathode electrode 135 and the second electrode CE2 to be connected. For example, the encapsulation film 136 may be made of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), but embodiments of this disclosure are not limited thereto.

[0197] According to another embodiment of this disclosure, the encapsulation film 136 may have a structure in which reflective material is dispersed in a resin layer, but the embodiments of this disclosure are not limited thereto. For example, the encapsulation film 136 may be manufactured as a reflector with various structures, but the embodiments of this disclosure are not limited thereto. Light emitted from the active layer 132 can be reflected upward by the encapsulation film 136, thereby improving light extraction efficiency. For example, the encapsulation film 136 may be a reflective layer, but the embodiments of this disclosure are not limited thereto.

[0198] According to embodiments of this disclosure, the light-emitting device (ED) has been described as having a vertical structure, but embodiments of this disclosure are not limited thereto. For example, the ED may have a lateral structure or a flip-chip structure.

[0199] Although it has been referenced Figure 9 The first light-emitting device 130 has been described, but the second light-emitting device 140 and the third light-emitting device 150 may have substantially the same structure as the first light-emitting device 130. For example, the second light-emitting device 140 and the third light-emitting device 150 include a configuration substantially the same as that of the first semiconductor layer 131, active layer 132, second semiconductor layer 133, anode electrode 134, cathode electrode 135 and encapsulation film 136 of the first light-emitting device 130, and therefore their repeated description can be omitted.

[0200] from Figure 8 and Figure 9 As can be seen, the display device 1000 according to the embodiments of the present disclosure may further include optical layers (or light diffusion layers) 117a, 117b and 117c.

[0201] Optical layers 117a, 117b, and 117c can be configured to surround a plurality of light-emitting devices ED in a display area AA. For example, optical layers 117a, 117b, and 117c can be configured to cover a plurality of light-emitting devices ED in a display area AA. For example, optical layers 117a and 117b can be configured above insulating layer 115 to surround the side surface of each of the plurality of light-emitting devices ED and the side surface of each of the plurality of embankment BNKs.

[0202] According to embodiments of this disclosure, the first optical layer 117a can be configured to surround a plurality of light-emitting devices ED in a display area AA. For example, the first optical layer 117a can be configured to cover the side surfaces of the plurality of light-emitting devices ED and the side surfaces of a plurality of embankment BNK in a region of a plurality of sub-pixels. For example, the first optical layer 117a can cover a portion of the passivation layer 116. For example, the first optical layer 117a can cover the second electrode CE2, this portion of the passivation layer 116, and the space between the plurality of light-emitting devices ED. The first optical layer 117a can be configured or cover the space between the plurality of light-emitting devices ED and the plurality of embankment BNK included in a pixel PX. For example, the first optical layer 117a can extend along the row direction of the display area AA, and the plurality of first optical layers 117a can be spaced apart along the column direction (or the second direction Y) of the display area AA. For example, the first optical layer 117a can be configured to surround the side of each of the plurality of light-emitting devices ED and the plurality of embankment BNK between the insulating layer 115 and the second electrode CE2. For example, the first optical layer 117a may be configured to surround the side of each of the light-emitting device ED and the embankment BNK between the passivation layer 116 and the second electrode CE2, but embodiments of the present disclosure are not limited thereto. For example, the first optical layer 117a may be a diffusion layer or a sidewall diffusion layer, but embodiments of the present disclosure are not limited thereto.

[0203] The first optical layer 117a may include an organic insulating material in which fine particles 117ap are dispersed, but embodiments of the present disclosure are not limited thereto. For example, the first optical layer 117a may be composed of a siloxane in which fine metal particles 117ap, such as titanium dioxide (TiO2) particles, are dispersed, but embodiments of the present disclosure are not limited thereto. Light from multiple light-emitting devices (EDs) can be scattered and emitted to the outside of the display panel 100 by the fine particles 117ap dispersed in the first optical layer 117a. Therefore, the first optical layer 117a can improve the extraction efficiency of light emitted from multiple light-emitting devices (EDs).

[0204] According to embodiments of this disclosure, the first optical layer 117a can be disposed at each of the plurality of pixels PX, or it can be disposed together at some of the pixels PX disposed in the same row of the display area AA, but the embodiments of this disclosure are not limited thereto. For example, the first optical layer 117a can be disposed at each of the plurality of pixels PX, or a first optical layer 117a can be configured to share multiple pixels PX. As another embodiment of this disclosure, each of the plurality of sub-pixels can respectively include the first optical layer 117a, but the embodiments of this disclosure are not limited thereto.

[0205] According to embodiments of this disclosure, the second optical layer 117b can be disposed on the passivation layer 116 in the display area AA. For example, the second optical layer 117b can be disposed around the side of the first optical layer 117a. For example, the second optical layer 117b can be in contact with the side surface of the first optical layer 117a. For example, the second optical layer 117b can be disposed in the region (or non-light-emitting region) between multiple pixels PX, but embodiments of this disclosure are not limited thereto. For example, the second optical layer 117b can be a diffusion layer, a diffusion layer window, or a window diffusion layer, etc., but embodiments of this disclosure are not limited thereto.

[0206] The second optical layer 117b may be made of an organic insulating material, but the embodiments of this disclosure are not limited thereto. The second optical layer 117b may be made of the same material as the first optical layer 117a, but the embodiments of this disclosure are not limited thereto. For example, the first optical layer 117a may include fine particles, while the second optical layer 117b may not include fine particles. For example, the second optical layer 117b may be made of siloxane, but the embodiments of this disclosure are not limited thereto.

[0207] According to embodiments of this disclosure, the thickness of the first optical layer 117a may be less than the thickness of the second optical layer 117b, but embodiments of this disclosure are not limited thereto. For example, the upper surface of the second optical layer 117b may be formed as a flat surface, and the upper surface of the first optical layer 117a may be formed as a concave surface. Therefore, when viewed in a plan view, the area where the first optical layer 117a is disposed may include a recessed portion that is more concave than the upper surface of the second optical layer 117b.

[0208] According to embodiments of this disclosure, the second electrode CE2 can be disposed on the first optical layer 117a and the second optical layer 117b. For example, the second electrode CE2 can be electrically connected to multiple contact electrodes CCE through contact holes in the second optical layer 117b. For example, the second electrode CE2 can be disposed on multiple light-emitting devices ED. For example, the second electrode CE2 can include a transparent conductive oxide, such as indium tin oxide (ITO) or indium zinc oxide (IZO), but embodiments of this disclosure are not limited thereto. For example, the second electrode CE2 can be configured to contact or directly contact the cathode electrode 135. For example, the second electrode CE2 can overlap entirely with the first optical layer 117a and can overlap a portion of the second optical layer 117b. For example, the second electrode CE2 can be electrically connected to the contact electrodes CCE through the second optical layer 117b. For example, the second electrode CE2 can be electrically connected to the contact electrodes CCE through contact holes formed in the second optical layer 117b.

[0209] The second electrode CE2 can extend continuously along the row direction (or the first direction X) of the substrate 110. Therefore, the second electrode CE2 can be connected to a plurality of light-emitting devices ED in each of the plurality of pixels PX arranged along the row direction (or the first direction X) of the substrate 110.

[0210] According to embodiments of this disclosure, the second electrode CE2 can extend continuously over the first optical layer 117a, the second optical layer 117b, and the light-emitting device ED. The area where the first optical layer 117a is disposed may include a recessed portion that is recessed further inward than the upper surface of the second optical layer 117b. Therefore, a first portion of the second electrode CE2 disposed on the first optical layer 117a can be disposed along the recessed portion, and thus can be disposed at a lower position than a second portion of the second electrode CE2 disposed on the second optical layer 117b. For example, the thickness of the first optical layer 117a can gradually decrease from the second optical layer 117b toward the center of the first optical layer 117a for electrical connection (or contact) between each of the first to third light-emitting devices 130, 140, and 150 and the second electrode CE2.

[0211] A third optical layer 117c can be disposed on the second electrode CE2. The third optical layer 117c can be disposed on the second electrode CE2 to overlap with the plurality of light-emitting devices ED and the first optical layer 117a. For example, the third optical layer 117c can be configured not to overlap with the second optical layer 117b. Since the third optical layer 117c is disposed on the second electrode CE2 and the plurality of light-emitting devices ED, unevenness in the spacing (or gaps) that may occur in some of the plurality of light-emitting devices ED can be improved. For example, when the plurality of light-emitting devices ED are transferred onto the substrate 110 of the display panel 100, areas with uneven spacing (or gaps) between the plurality of light-emitting devices ED may appear due to processing deviations, etc. When the spacing between the plurality of light-emitting devices ED is uneven, the light-emitting area of ​​each of the plurality of light-emitting devices ED can be formed unevenly, and therefore, the unevenness can be visually perceived by the user. Therefore, since the third optical layer 117c for uniformly diffusing light is additionally disposed on the upper portion of the plurality of light-emitting devices ED, the visual perception of unevenness of light emitted from some of the light-emitting devices ED can be reduced or prevented. Therefore, since the light emitted from the multiple light-emitting devices (EDs) is uniformly diffused by the third optical layer 117c and extracted to the outside of the display panel 100, the uniformity of the brightness of the display device can be improved.

[0212] The third optical layer 117c may be composed of an organic insulating material in which fine particles 117cp are dispersed, but embodiments of the present disclosure are not limited thereto. For example, the third optical layer 117c may be composed of a siloxane in which fine metal particles 117cp, such as titanium dioxide (TiO2) particles, are dispersed, but embodiments of the present disclosure are not limited thereto. For example, the third optical layer 117c may be composed of the same material as the first optical layer 117a, but embodiments of the present disclosure are not limited thereto. For example, the third optical layer 117c may be a diffusion layer or a top diffusion layer, but embodiments of the present disclosure are not limited thereto.

[0213] According to embodiments of this disclosure, light from multiple light-emitting devices (EDs) can be scattered and emitted to the exterior of the display panel 100 by fine particles 117cp dispersed in the third optical layer 117c. The third optical layer 117c can uniformly mix (or diffuse) the light emitted from the multiple light-emitting devices (EDs), thereby further improving the uniformity of brightness of the display device. Furthermore, the light extraction efficiency of the display device can be improved by the light scattered by the fine particles 117cp, and thus the display device can be driven with low power.

[0214] In the display area AA, a black matrix BM can be disposed on the second electrode CE2, the first optical layer 117a, the second optical layer 117b, and the third optical layer 117c. For example, the black matrix BM can fill the contact holes of the second optical layer 117b. Since the black matrix BM is configured to cover the display area AA, color mixing of light and external light reflection from multiple sub-pixels can be reduced. For example, the black matrix BM can also be disposed within the contact holes connecting the second electrode CE2 and the contact electrode CCE, which can prevent light leakage between multiple adjacent sub-pixels. For example, the black matrix BM can be made of an opaque material, but embodiments of this disclosure are not limited thereto. For example, the black matrix BM can be an organic insulating material with added black pigment or black dye, but embodiments of this disclosure are not limited thereto.

[0215] Reference Figure 8 The display device 1000 according to the embodiments of the present disclosure may further include a cover layer 118.

[0216] The cover layer 118 can be configured to cover the display area AA. For example, the cover layer 118 can be disposed on the black matrix BM in the display area AA. The cover layer 118 can be configured to protect multiple light-emitting devices ED. For example, components disposed between the substrate 110 and the cover layer 118 can be protected by the substrate 110 and the cover layer 118. For example, the cover layer 118 can be made of an organic insulating material, but embodiments of the present disclosure are not limited thereto. For example, the cover layer 118 can be made of a photoresist, polyimide (PI), or photopolymer acrylic-based material, but embodiments of the present disclosure are not limited thereto. For example, the cover layer 118 can be an outer coating or an insulating layer, but embodiments of the present disclosure are not limited thereto.

[0217] The polarizing layer 180 can be disposed on the cover layer 118 using a first adhesive layer 181. The cover member 120 can be disposed on the polarizing layer 180 using a second adhesive layer 185. For example, the touch panel 200 can be disposed (or inserted) between the polarizing layer 180 and the second adhesive layer 185. The polarizing layer 180 can be connected (or attached) to the rear surface of the touch panel 200 using a third adhesive layer 187. The touch panel 200 can be connected (or attached) to the rear surface of the cover member 120 using the second adhesive layer 185. For example, each of the first adhesive layer 181, the second adhesive layer 185, and the third adhesive layer 187 may include an optically clear adhesive (OCA), an optically clear resin (OCR), or a pressure-sensitive adhesive (PSA), but embodiments of this disclosure are not limited thereto.

[0218] According to embodiments of this disclosure, a plurality of pad electrodes PE can be disposed on a third insulating layer 115c in a second non-display area NA2. For example, at least a portion of the plurality of pad electrodes PE can be exposed without being covered by the passivation layer 116. For example, the plurality of pad electrodes PE can be electrically connected to the second-fourth connection line 122d through contact holes in the third insulating layer 115c.

[0219] An adhesive film ACF can be disposed on multiple pad electrodes PE. The adhesive film ACF can be an adhesive layer in which conductive balls are dispersed on an insulating material, but embodiments of this disclosure are not limited thereto. When heat and / or pressure are applied to the adhesive film ACF, the conductive balls can be electrically connected at the points where heat and / or pressure are applied, thereby acquiring conductive properties. By disposing the adhesive film ACF between the multiple pad electrodes PE and the flexible circuit board (or flexible film) 310, the flexible circuit board (or flexible film) 310 can be attached or bonded to the multiple pad electrodes PE. For example, the adhesive film ACF can be a conductive adhesive material, a conductive adhesive film, or an anisotropic conductive film, but embodiments of this disclosure are not limited thereto.

[0220] The flexible circuit board (or flexible film) 310 can be placed on the adhesive film ACF. The flexible circuit board (or flexible film) 310 can be electrically connected to multiple pad electrodes PE through the adhesive film ACF. Therefore, signals output from the flexible circuit board (or flexible film) 310 and the printed circuit board 330 can be transmitted to the pixel driving circuit PD in the display area AA through the wiring layer. For example, signals output from the printed circuit board 330 can be transmitted to the pixel driving circuit PD in the display area AA through the flexible circuit board 310, multiple pad electrodes PE, connection line 2-4 122d, connection line 2-3 122c, connection line 2-2 122b, and connection line 2-1 122a.

[0221] Figure 10 This is a graph showing the brightness based on the current flowing through the light-emitting device according to an embodiment of the present disclosure. Figure 11 The external quantum efficiency (EQE) of each of the red, green, and blue light-emitting devices is shown.

[0222] Reference Figure 10 and Figure 11 In the display device according to embodiments of the present disclosure, the external quantum efficiency of each of the red, green, and blue light-emitting devices varies depending on the brightness. For example, the external quantum efficiency of the light-emitting device relative to brightness may be highest for the blue (thick solid line), lowest for the red (solid line), and lower for the green (dashed line) than for the blue but higher than for the red. Therefore, when the light-emitting device is driven (or made to emit light) by setting the brightness linearly with respect to the current I_led, as Figure 10 As shown by the dashed lines, depending on the external quantum efficiency of each of the red, green, and blue light-emitting devices, there are sometimes low-efficiency regions, which lead to increased power consumption.

[0223] According to embodiments of this disclosure, the brightness of a plurality of light-emitting devices may include a first brightness region to a third brightness region BCP1, BCP2, and BCP3. For example, the brightness of the plurality of light-emitting devices may include a first brightness region to a third brightness region BCP1, BCP2, and BCP3 between the minimum and maximum brightness. For example, the brightness of each of a red, green, and blue light-emitting device may include a first brightness region to a third brightness region BCP1, BCP2, and BCP3. For example, based on the external quantum efficiency of the brightness of each of the red, green, and blue light-emitting devices, the brightness range for a current I_led may include a first brightness region to a third brightness region BCP1, BCP2, and BCP3. For example, the brightness of each of a red, green, and blue light-emitting device may include a first brightness region to a third brightness region BCP1, BCP2, and BCP3.

[0224] The first brightness zone BCP1 can be a low-brightness zone that includes the minimum brightness within the brightness range. The third brightness zone BCP3 can be a high-brightness zone that is brighter than the second brightness zone BCP2, and includes the maximum brightness within the brightness range. The second brightness zone BCP2 can be a medium-brightness zone within the brightness range between the first brightness zone BCP1 and the third brightness zone BCP3. For example, the first to third brightness zones BCP1, BCP2, and BCP3 can be individually configured for each of the red, green, and blue light-emitting devices. For example, the first to third brightness zones BCP1, BCP2, and BCP3 for each of the red, green, and blue light-emitting devices can be different from each other.

[0225] In the display device according to embodiments of the present disclosure, a light-emitting device (or causing it to emit light) can be driven using a pulse amplitude modulation method or a pulse width modulation method based on the first brightness region to the third brightness region BCP1, BCP2, and BCP3. For example, the light-emitting device (or causing it to emit light) can be driven using a pulse amplitude modulation method based on a reference voltage and an emission signal in the first brightness region BCP1 and the third brightness region BCP3, and the light-emitting device (or causing it to emit light) can be driven using a pulse width modulation method based on a reference voltage and an emission signal in the second brightness region BCP2.

[0226] In the first brightness region BCP1, based on a pulse amplitude modulation method, the conduction period of the light-emitting signal applied to the pixel driving circuit PD can be changed (or adjusted) to correspond to the grayscale value of the pixel data, and the reference voltage applied to the pixel driving circuit PD can be changed (or adjusted) based on the target brightness or the brightness set by the user in the first brightness region BCP1. According to embodiments of this disclosure, the maximum conduction period of the light-emitting signal in the first brightness region BCP1 can correspond to the maximum grayscale value of the pixel data. For example, the maximum conduction period of the light-emitting signal in the first brightness region BCP1 can be 5 μs, but embodiments of this disclosure are not limited to this. For example, the conduction period of the light-emitting signal corresponding to the grayscale value of the pixel data in the first brightness region BCP1 can be divided uniformly or non-uniformly within the maximum conduction period. For example, in the first brightness region BCP1, the higher the screen brightness corresponding to the target brightness or the brightness set by the user, the lower the voltage level of the reference voltage can be. For example, in the first brightness region BCP1, the higher the screen brightness corresponding to the target brightness or the brightness set by the user, the larger the absolute value of the reference voltage can be.

[0227] In the second brightness region BCP2, based on a pulse width modulation method, the conduction period of the light-emitting signal applied to the pixel driving circuit PD can be changed (or adjusted) to correspond to the grayscale value of the pixel data, and the reference voltage applied to the pixel driving circuit PD can be fixed. According to embodiments of this disclosure, the maximum conduction period of the light-emitting signal in the second brightness region BCP2 can correspond to the maximum grayscale value of the pixel data. For example, the minimum conduction period of the light-emitting signal in the second brightness region BCP2 can be 5 μs, and the maximum conduction period of the light-emitting signal can be 1000 μs, but embodiments of this disclosure are not limited to this. For example, the conduction period of the light-emitting signal corresponding to the grayscale value of the pixel data in the second brightness region BCP2 can be uniformly or non-uniformly divided between the minimum and maximum conduction periods. For example, in the second brightness region BCP2, the reference voltage can have a predetermined fixed voltage level independent of the target brightness or the brightness set by the user.

[0228] In the third brightness zone BCP3, based on a pulse amplitude modulation method, the conduction period of the light-emitting signal applied to the pixel driving circuit PD is changed (or adjusted) to correspond to the grayscale value of the pixel data, and the reference voltage applied to the pixel driving circuit PD can be changed (or adjusted) based on the target brightness or the brightness set by the user in the third brightness zone BCP3. According to embodiments of this disclosure, the maximum conduction period of the light-emitting signal in the third brightness zone BCP3 can correspond to the maximum grayscale value of the pixel data. For example, the maximum conduction period of the light-emitting signal in the third brightness zone BCP3 can be 1000 μs, but embodiments of this disclosure are not limited to this. For example, the conduction period of the light-emitting signal corresponding to the grayscale value of the pixel data in the third brightness zone BCP3 can be divided uniformly or non-uniformly within the maximum conduction period. For example, in the third brightness zone BCP3, the higher the screen brightness corresponding to the target brightness or the brightness set by the user, the lower the voltage level of the reference voltage can be. For example, in the third brightness zone BCP3, the higher the screen brightness corresponding to the target brightness or the brightness set by the user, the larger the absolute value of the reference voltage can be.

[0229] Figure 12 The reference voltage and cathode voltage in a display device according to an embodiment of the present disclosure are shown.

[0230] Reference Figure 12 In a display device according to an embodiment of the present invention, the light-emitting device can emit light with a cathode on-state voltage Vce_on for each column driving cycle (or horizontal cycle) RP1 to RP8, and can achieve a grayscale corresponding to the pixel data with a brightness corresponding to the reference voltage Vref.

[0231] The reference voltage Vref can be set based on the first to third brightness zones BCP1, BCP2, and BCP3, as shown above. Figure 10 The reference voltage Vref may include multiple reference voltages Vref1, Vref2, and Vref3. For example, the reference voltage Vref may include a first reference voltage Vref1 based on a first luminance region BCP1, a second reference voltage Vref2 based on a second luminance region BCP2, and a third reference voltage Vref3 based on a third luminance region BCP3, but the embodiments of this disclosure are not limited thereto.

[0232] The first reference voltage Vref1 can be changed (or adjusted) in the first brightness zone BCP1 based on a pulse amplitude modulation method to correspond to the target brightness or the brightness set by the user. The second reference voltage Vref2 can have a fixed voltage level in the second brightness zone BCP2, and the third reference voltage Vref3 can be changed (or adjusted) in the third brightness zone BCP3 based on a pulse amplitude modulation method to correspond to the target brightness or the brightness set by the user. For example, the second reference voltage Vref_V2 can be a normal reference voltage or a fixed reference voltage.

[0233] The third reference voltage Vref3 can be lower than the second reference voltage Vref2, and the second reference voltage Vref2 can be lower than the first reference voltage Vref1. For example, the absolute value of the third reference voltage Vref3 can be greater than the absolute value of the second reference voltage Vref2, and the absolute value of the second reference voltage Vref2 can be greater than the absolute value of the first reference voltage Vref1.

[0234] Reference Figure 10 and Figure 12 The cathode voltage Vce can include the cathode on-state voltage Vce_on and the cathode off-state voltage Vce_off.

[0235] The cathode turn-on voltage Vce_on can have a voltage level used to turn on the light-emitting device or keep the light-emitting device in the on state. The cathode turn-on voltage Vce_on can have a voltage level higher than the threshold voltage Vth of the light-emitting device relative to the reference voltage Vref or the anode voltage Vanode. For example, the voltage difference (Vref-Vce_on) between the cathode turn-on voltage Vce_on and the reference voltage Vref can be greater than the threshold voltage Vth of the light-emitting device. For example, the absolute value of the voltage difference (Vref-Vce_on) between the cathode turn-on voltage Vce_on and the reference voltage Vref can be greater than the absolute value of the threshold voltage Vth of the light-emitting device. For example, the voltage difference (Vanode-Vce_on) between the anode voltage Vanode and the cathode turn-on voltage Vce_on of the light-emitting device can be greater than the threshold voltage Vth of the light-emitting device. For example, the absolute value of the voltage difference (Vanode-Vce_on) between the anode voltage Vanode and the cathode turn-on voltage Vce_on of the light-emitting device can be greater than the absolute value of the threshold voltage Vth of the light-emitting device. For example, the threshold voltage Vth of the light-emitting device may have a voltage level that is greater than the voltage difference (Vanode-Vce_off) between the anode voltage Vanode and the cathode turn-off voltage Vce_off of the light-emitting device and less than the voltage difference (Vanode-Vce_on) between the anode voltage Vanode and the cathode turn-on voltage Vce_on of the light-emitting device, but the embodiments of this disclosure are not limited thereto.

[0236] According to embodiments of this disclosure, the cathode on-state voltage Vce_on can have the same voltage level in the first to third brightness regions BCP1, BCP2, and BCP3, but embodiments of this disclosure are not limited thereto. For example, the cathode on-state voltage Vce_on can have different voltage levels in each of the first to third brightness regions BCP1, BCP2, and BCP3.

[0237] The cathode turn-off voltage Vce_off can have a voltage level used to turn off the light-emitting device or keep the light-emitting device in the off state. The cathode turn-off voltage Vce_off can have a voltage level relative to the reference voltages Vref1, Vref2, and Vref3 of the light-emitting device or the anode voltage Vanode that is equal to or less than the threshold voltage Vth of the light-emitting device. For example, the threshold voltage Vth of the light-emitting device can have a voltage level between the cathode turn-off voltage Vce_off and the cathode turn-on voltage Vce_on. For example, the voltage difference (Vce_off - Vref) between the cathode turn-off voltage Vce_off and the reference voltages Vref1, Vref2, and Vref3 can be less than the threshold voltage Vth of the light-emitting device. For example, the absolute value of the voltage difference (Vce_off - Vref) between the cathode turn-off voltage Vce_off and the reference voltages Vref1, Vref2, and Vref3 can be less than the absolute value of the threshold voltage Vth of the light-emitting device. For example, the voltage difference (Vanode-Vce_off) between the anode voltage Vanode and the cathode turn-off voltage Vce_off of the light-emitting device can be less than the threshold voltage Vth of the light-emitting device. For example, the absolute value of the voltage difference (Vanode-Vce_off) between the anode voltage Vanode and the cathode turn-off voltage Vce_off of the light-emitting device can be less than the absolute value of the threshold voltage Vth of the light-emitting device.

[0238] According to the embodiments of this disclosure, when the above references Figure 4 When each of the driving transistor TDR and the light-emitting transistor TEM in the described micro-driver (μ driver) is configured as a p-type transistor, the cathode turn-off voltage Vce_off can have a voltage level to prevent abnormal light emission of the light-emitting device due to abnormal voltages exceeding the threshold voltage Vth of the light-emitting device. For example, the cathode turn-off voltage Vce_off can have a voltage level relatively higher than the cathode turn-on voltage Vce_on. For example, the absolute value of the cathode turn-off voltage Vce_off can be less than the absolute value of the cathode turn-on voltage Vce_on. For example, the cathode turn-off voltage Vce_off can have a voltage level closer to the reference voltages Vref1, Vref2, and Vref3 (or the anode voltage of the light-emitting device) than the cathode turn-on voltage Vce_on.

[0239] The cathode turn-off voltage Vce_off according to embodiments of this disclosure can be varied (or adjusted). For example, the cathode turn-off voltage Vce_off can be varied (or adjusted) based on a reference voltage Vref. For example, the cathode turn-off voltage Vce_off can be varied (or adjusted) based on a reference voltage Vref to a voltage level closer to the cathode turn-on voltage Vce_on.

[0240] The cathode turn-off voltage Vce_off according to embodiments of this disclosure may have a voltage level between a first cathode turn-off voltage Vce_off1 and a second cathode turn-off voltage Vce_off2. For example, the cathode turn-off voltage Vce_off may have a voltage level between the first cathode turn-off voltage Vce_off1 and the second cathode turn-off voltage Vce_off2 based on a reference voltage Vref. For example, the cathode turn-off voltage Vce_off may have a voltage level between the first cathode turn-off voltage Vce_off1, which is closer to the anode voltage Vanode of the light-emitting device, and the second cathode turn-off voltage Vce_off2, which is closer to the threshold voltage Vth of the light-emitting device.

[0241] The first cathode turn-off voltage Vce_off1 can have a higher voltage level than the cathode turn-on voltage Vce_on. For example, the absolute value of the first cathode turn-off voltage Vce_off1 can be less than the absolute value of the cathode turn-on voltage Vce_on. For example, the first cathode turn-off voltage Vce_off1 can have a voltage level closer to the reference voltage Vref (or the anode voltage Vanode of the light-emitting device) than the cathode turn-on voltage Vce_on. For example, the first cathode turn-off voltage Vce_off1 can have a higher voltage level than the cathode turn-on voltage Vce_on to prevent or at least reduce abnormal light emission of the light-emitting device. For example, the first cathode turn-off voltage Vce_off1 can have a voltage level between the reference voltage Vref (or the anode voltage Vanode of the light-emitting device) and the cathode turn-on voltage Vce_on. The first cathode turn-off voltage Vce_off1 can have a voltage level between the reference voltages Vref1, Vref2, and Vref3 (or the anode voltage Vanode of the light-emitting device) and the threshold voltage Vth of the light-emitting device. For example, the first cathode turn-off voltage Vce_off1 can be the normal cathode turn-off voltage or the cathode reference turn-off voltage.

[0242] The second cathode turn-off voltage Vce_off2 can have a lower voltage level than the first cathode turn-off voltage Vce_off1. For example, the absolute value of the second cathode turn-off voltage Vce_off2 can be greater than the absolute value of the first cathode turn-off voltage Vce_off1. For example, the second cathode turn-off voltage Vce_off2 can have a voltage level closer to the cathode turn-on voltage Vce_on than to the first cathode turn-off voltage Vce_off1. The second cathode turn-off voltage Vce_off2 can have a voltage level between the first cathode turn-off voltage Vce_off1 and the cathode turn-on voltage Vce_on to reduce the power consumption of the display device. For example, the second cathode turn-off voltage Vce_off2 can have a voltage level between the first cathode turn-off voltage Vce_off1 and the threshold voltage Vth of the light-emitting device.

[0243] Reference Figure 12 As an example, in a display device according to an embodiment of this disclosure, the cathode turn-off voltage Vce_off may have a second cathode turn-off voltage Vce_off2. For each column drive cycle (or horizontal cycle) RP1 to RP8, the cathode voltage Vce may switch (or change) between the cathode turn-on voltage Vce_on and the second cathode turn-off voltage Vce_off2. Therefore, since the voltage swing width (or voltage transition width) between the cathode turn-on voltage Vce_on and the second cathode turn-off voltage Vce_off2 is reduced compared to the voltage swing width (or voltage transition width) between the cathode turn-on voltage Vce_on and the first cathode turn-off voltage Vce_off1, the power consumption caused by voltage switching (or voltage transition) can be reduced.

[0244] Figure 13 A variable circuit for reference voltage and cathode voltage according to an embodiment of this disclosure is shown. Figure 14 This is a diagram illustrating the screen brightness setting in a display device according to an embodiment of the present disclosure.

[0245] Reference Figure 13 and Figure 14 In the display device according to an embodiment of the present disclosure, the timing controller 350 can generate reference voltage data Vdata and cathode turn-off voltage data Cdata_off based on screen brightness data Bdata. The reference voltage data Vdata and cathode turn-off voltage data Cdata_off can be supplied to the pixel driving circuit PD.

[0246] The screen brightness data Bdata can correspond to the user's brightness selection (or setting). For example, screen brightness data Bdata can be generated based on the user 10's finger touch on the screen brightness control bar BAB displayed on the screen of the display device 1000. For example, when the user 10 selects (or sets) the total screen brightness (or overall screen brightness) by touching the screen brightness control bar BAB with their finger, the touch integrated circuit can generate raw touch data for screen brightness based on the change in capacitance on the touch panel touched by the user 10's finger. Therefore, the host control unit can generate screen brightness data Bdata based on the raw touch data for screen brightness and supply the generated screen brightness data Bdata to the timing controller 350, but the embodiments of this disclosure are not limited to this. For example, the timing controller 350 can generate screen brightness data Bdata based on the raw touch data for screen brightness.

[0247] The timing controller 350 can be configured to generate reference voltage data Vdata. For example, the timing controller 350 can generate reference voltage data Vdata based on screen brightness data Bdata. For example, the timing controller 350 can generate reference voltage data Vdata that includes red reference voltage data, green reference voltage data, and blue reference voltage data based on screen brightness data Bdata.

[0248] According to embodiments of this disclosure, the timing controller 350 can generate reference voltage data Vdata based on a target brightness corresponding to screen brightness data Bdata by using a lookup table stored in memory 351. For example, to reduce the capacity of the reference voltage data stored in the lookup table, the screen brightness of the display device 1000 can be divided into multiple frequency bands 1 to 14, and the reference voltage data (or brightness information) corresponding to each of the multiple frequency bands 1 to 14 can be stored in the lookup table. For example, the screen brightness of the display device 1000 can be divided into the first frequency band 1 to the fourteenth frequency band 14 as shown in Table 1 below, but embodiments of this disclosure are not limited thereto.

[0249] Table 1

[0250] frequency band Target NEET Vref_R Vref_G Vref_B 14 1 1.15 1.30 1.21 13 2 1.12 1.26 1.16 12 4 1.09 1.21 1.10 11 6 1.05 1.21 1.03 10 14 0.93 1.21 1.03 9 23 0.82 1.21 1.03 8 39 0.68 1.21 1.03 7 86 0.68 1.21 1.03 6 132 0.68 1.21 1.03 5 288 0.68 1.21 1.03 4 400 0.68 1.13 1.03 3 800 0.68 0.97 0.87 2 1500 0.35 0.48 0.56 1 3000 0.12 0.05 0.30

[0251] In the lookup table, the target brightness of the first frequency band 1 among the multiple frequency bands 1 to 14 can correspond to the maximum screen brightness of the display device 1000. The fourteenth frequency band 14 among the multiple frequency bands 1 to 14 can correspond to the minimum brightness and maximum brightness of the display device 1000.

[0252] Each of the red reference voltage Vref_R, green reference voltage Vref_G, and blue reference voltage Vref_B corresponding to the target brightness of each of the multiple frequency bands 1 to 14 can be set individually and differently. For example, it can be based on Figure 11 The external quantum efficiency of each of the red, green, and blue light-emitting devices shown is used to set each of the red reference voltage Vref_R, green reference voltage Vref_G, and blue reference voltage Vref_B corresponding to the target brightness of each of the multiple frequency bands 1 to 14. Therefore, the luminous efficiency of each of the red, green, and blue light-emitting devices can be improved.

[0253] Reference Figure 10 According to Table 1, multiple frequency bands 1 to 14 can be divided into first brightness zones to third brightness zones BCP1, BCP2, and BCP3. Each of the first brightness zones to third brightness zones BCP1, BCP2, and BCP3 for red, green, and blue light-emitting devices can include one or more different frequency bands.

[0254] In the red reference voltage Vref_R stored in the lookup table according to embodiments of the present disclosure, the first luminance region BCP1 may include a first frequency band 1 and a second frequency band 2, the second luminance region BCP2 may include a third frequency band 3 to an eighth frequency band 8, and the third luminance region BCP3 may include a ninth frequency band 9 to a fourteenth frequency band 14, but embodiments of the present disclosure are not limited thereto. For example, for the pulse amplitude modulation of the reference voltage Vref, the red reference voltage Vref_R of each of the first frequency band 1 and the second frequency band 2 in the first luminance region BCP1 may be different. The red reference voltage Vref_R of each of the third frequency band 3 to the eighth frequency band 8 in the second luminance region BCP2 may have the same pulse width modulation for the reference voltage Vref. The red reference voltage Vref_R of each of the ninth frequency band 9 to the fourteenth frequency band 14 in the third luminance region BCP3 may have different pulse amplitude modulation for the reference voltage Vref.

[0255] In the red reference voltage Vref_R stored in the lookup table according to embodiments of this disclosure, the red reference voltage Vref_R of the first brightness zone BCP1 can have a voltage level of 0.12V to 0.35V based on the target brightness or the brightness set by the user. The red reference voltage Vref_R of the second brightness zone BCP2 can have a voltage level of 0.68V, independent of the target brightness or the brightness set by the user. The red reference voltage Vref_R of the third brightness zone BCP3 can have a voltage level of 0.82V to 1.15V based on the target brightness or the brightness set by the user. However, embodiments of this disclosure are not limited thereto.

[0256] In the green reference voltage Vref_G stored in the lookup table according to embodiments of the present disclosure, the first luminance region BCP1 may include first frequency bands 4 to fourth frequency bands 4, the second luminance region BCP2 may include fifth frequency bands 5 to twelfth frequency bands 12, and the third luminance region BCP3 may include thirteenth frequency band 13 and fourteenth frequency band 14, but embodiments of the present disclosure are not limited thereto. For example, for the pulse amplitude modulation of the reference voltage Vref, the green reference voltage Vref_G of each of the first frequency bands 1 to fourth frequency bands 4 in the first luminance region BCP1 may be different. The green reference voltage Vref_G of each of the fifth frequency bands 5 to twelfth frequency bands 12 in the second luminance region BCP2 may be the same for the pulse width modulation of the reference voltage Vref. The green reference voltage Vref_G of each of the thirteenth frequency band 13 and fourteenth frequency band 14 in the third luminance region BCP3 may be different for the pulse amplitude modulation of the reference voltage Vref.

[0257] In the green reference voltage Vref_G stored in the lookup table according to embodiments of this disclosure, the green reference voltage Vref_G of the first brightness zone BCP1 can have a voltage level of 0.05V to 1.13V based on the target brightness or the brightness set by the user. The green reference voltage Vref_G of the second brightness zone BCP2 can have a voltage level of 1.21V, which is independent of the target brightness or the brightness set by the user. The green reference voltage Vref_G of the third brightness zone BCP3 can have a voltage level of 1.264V to 1.30V based on the target brightness or the brightness set by the user. However, embodiments of this disclosure are not limited thereto.

[0258] In the blue reference voltage Vref_B stored in the lookup table according to embodiments of the present disclosure, the first luminance region BCP1 may include first to third frequency bands 1, 2, and 3; the second luminance region BCP2 may include fourth to eleventh frequency bands 11; and the third luminance region BCP3 may include twelfth to fourteenth frequency bands 12, 13, and 14, but embodiments of the present disclosure are not limited thereto. For example, the blue reference voltage Vref_B of each of the first to third frequency bands 1, 2, and 3 of the first luminance region BCP1 may be different for the pulse amplitude modulation of the reference voltage Vref. The blue reference voltage Vref_B of each of the fourth to eleventh frequency bands 11 of the second luminance region BCP2 may be the same for the pulse width modulation of the reference voltage Vref. The blue reference voltage Vref_B of each of the twelfth to fourteenth frequency bands 12, 13, and 14 of the third luminance region BCP3 may be different for the pulse amplitude modulation of the reference voltage Vref.

[0259] In the blue reference voltage Vref_B stored in the lookup table according to embodiments of this disclosure, the blue reference voltage Vref_B of the first brightness zone BCP1 can have a voltage level of 0.30V to 0.87V based on the target brightness or the brightness set by the user. The blue reference voltage Vref_B of the second brightness zone BCP2 can have a voltage level of 1.03V, which is independent of the target brightness or the brightness set by the user. The blue reference voltage Vref_B of the third brightness zone BCP3 can have a voltage level of 1.09V to 1.21V based on the target brightness or the brightness set by the user. However, embodiments of this disclosure are not limited thereto.

[0260] According to an embodiment of this disclosure, the timing controller 350 can be configured to select, from a plurality of frequency bands 1 to 14 in a lookup table, a frequency band 1 to 14 that matches the target brightness corresponding to the screen brightness data Bdata, extract the red reference voltage Vref_R, green reference voltage Vref_G, and blue reference voltage Vref_B corresponding to the selected frequency bands 1 to 14, and generate reference voltage data Vdata including red reference voltage data, green reference voltage data, and blue reference voltage data corresponding to the extracted red reference voltage Vref_R, green reference voltage Vref_G, and blue reference voltage Vref_B, respectively.

[0261] According to an embodiment of this disclosure, when the target brightness corresponding to the screen brightness data Bdata is the brightness between two adjacent frequency bands among multiple frequency bands 1 to 14, the timing controller 350 can be configured to calculate the red reference voltage Vref_R, the green reference voltage Vref_G, and the blue reference voltage Vref_B respectively by linear interpolation of the reference voltages corresponding to the two adjacent frequency bands, and generate reference voltage data Vdata including red reference voltage data, green reference voltage data, and blue reference voltage data corresponding to the calculated red reference voltage Vref_R, green reference voltage Vref_G, and blue reference voltage Vref_B respectively.

[0262] According to embodiments of this disclosure, the timing controller 350 can be configured to generate cathode turn-off voltage data Cdata_off based on the cathode turn-off voltage Vce_off corresponding to screen brightness data Bdata stored in a lookup table in memory 351. For example, the cathode turn-off voltage Vce_off of each of the plurality of frequency bands 1 to 14 stored in the lookup table can be applied to the light-emitting device by applying a red reference voltage Vref_R, a green reference voltage Vref_G, and a blue reference voltage Vref_B to each of the plurality of frequency bands 1 to 14, while gradually changing (or adjusting) the gate turn-off voltage Vce_off of each frequency band, and measuring the emission time when the voltage difference between the reference voltage Vref (or the anode voltage Vanode of the light-emitting device) of each frequency band and the changed gate turn-off voltage Vce_off of each frequency band exceeds the threshold voltage Vth of the light-emitting device and the light-emitting device emits abnormal light, and the gate turn-off voltage Vce_off can be the gate turn-off voltage Vce_off of each frequency band in the stage immediately preceding the measured emission time.

[0263] According to embodiments of this disclosure, the gate turn-off voltage Vce_off corresponding to the first frequency band 1 can correspond to the second cathode turn-off voltage Vce_off2. The gate turn-off voltage Vce_off corresponding to the fourteenth frequency band 14 can correspond to the first cathode turn-off voltage Vce_off1. Therefore, the gate turn-off voltage Vce_off of each frequency band can have a voltage level between the first cathode turn-off voltage Vce_off1 and the second cathode turn-off voltage Vce_off2. However, embodiments of this disclosure are not limited thereto.

[0264] According to an embodiment of the present disclosure, the timing controller 350 can be configured to select from a plurality of frequency bands 1 to 14 that match the target brightness corresponding to the screen brightness data Bdata in a lookup table, extract the cathode turn-off voltage Vce_off corresponding to the selected frequency bands 1 to 14, and generate cathode turn-off voltage data Cdata_off corresponding to the extracted cathode turn-off voltage Vce_off.

[0265] According to an embodiment of this disclosure, when the target brightness corresponding to the screen brightness data Bdata is the brightness between two adjacent frequency bands among multiple frequency bands 1 to 14, the timing controller 350 can be configured to calculate the cathode turn-off voltage Vce_off by linear interpolation with the cathode turn-off voltage Vce_off corresponding to each of the two adjacent frequency bands, and generate cathode turn-off voltage data Cdata_off corresponding to the calculated cathode turn-off voltage Vce_off.

[0266] According to another embodiment of this disclosure, the timing controller 350 can be configured to change (or adjust) the cathode turn-off voltage Vce_off based on a reference voltage Vref generated based on screen brightness data Bdata. For example, the timing controller 350 can be configured to generate cathode turn-off voltage data Cdata_off based on reference voltage data Vdata generated based on screen brightness data Bdata. For example, the timing controller 350 can be configured to change (or adjust) the cathode turn-off voltage Vce_off based on a red reference voltage Vref_R, a green reference voltage Vref_G, and a blue reference voltage Vref_B generated based on screen brightness data Bdata. For example, the timing controller 350 can be configured to generate cathode turn-off voltage data Cdata_off for generating the cathode turn-off voltage Vce_off based on the red reference voltage data, green reference voltage data, and blue reference voltage data corresponding to the screen brightness data Bdata.

[0267] According to another embodiment of this disclosure, the timing controller 350 may be configured to extract each of the red reference voltage Vref_R, green reference voltage Vref_G, and blue reference voltage Vref_B corresponding to the screen brightness data Bdata from a lookup table stored in the memory 351, and generate cathode turn-off voltage data Cdata_off based on one or more of the red reference voltage data, green reference voltage data, and blue reference voltage data corresponding to each of the extracted red reference voltage Vref_R, green reference voltage Vref_G, and blue reference voltage Vref_B.

[0268] In another embodiment of this disclosure, the timing controller 350 can generate cathode turn-off voltage data Cdata_off based on the minimum (or minimum absolute value) of the red reference voltage data, green reference voltage data, and blue reference voltage data. In this case, since the voltage swing width (or voltage transition width) between the cathode turn-on voltage Vce_on and the cathode turn-off voltage Vce_off is reduced, power consumption based on voltage switching (or voltage transition) can be reduced, and abnormal luminescence of the light-emitting device can be prevented.

[0269] In another embodiment of this disclosure, the timing controller 350 can generate cathode turn-off voltage data Cdata_off based on the average of the red reference voltage data, green reference voltage data, and blue reference voltage data. In this case, the voltage swing width (or voltage transition width) between the cathode turn-on voltage Vce_on and the cathode turn-off voltage Vce_off can be further reduced, thereby further reducing power consumption based on voltage switching (or voltage transition) and preventing abnormal light emission from the light-emitting device.

[0270] In another embodiment of this disclosure, the timing controller 350 can generate cathode turn-off voltage data Cdata_off based on the maximum value (or maximum absolute value) among the red reference voltage data, green reference voltage data, and blue reference voltage data. In this case, the voltage swing width (or voltage transition width) between the cathode turn-on voltage Vce_on and the cathode turn-off voltage Vce_off can be further reduced, thereby further reducing power consumption based on voltage switching (or voltage transition) and preventing abnormal light emission from the light-emitting device.

[0271] Reference Figure 12 and Figure 13The cathode on-state voltage Vce_on according to embodiments of this disclosure can be varied (or adjusted). For example, the cathode on-state voltage Vce_on can be varied (or adjusted) based on a reference voltage Vref. For example, the cathode on-state voltage Vce_on can be changed (or adjusted) to increase the brightness corresponding to the grayscale of the pixel data.

[0272] According to embodiments of this disclosure, the cathode on-state voltage Vce_on can have a voltage level between a first cathode on-state voltage Vce_on1 and a second cathode on-state voltage Vce_on2. For example, the cathode on-state voltage Vce_on can have a voltage level between the first cathode on-state voltage Vce_on1 and the second cathode on-state voltage Vce_on2 based on a reference voltage Vref.

[0273] The first cathode turn-on voltage Vce_on1 can have a higher voltage level than the threshold voltage Vth of the light-emitting device. For example, the absolute value of the first cathode turn-on voltage Vce_on1 can be greater than the absolute value of the threshold voltage Vth of the light-emitting device. For example, the first cathode turn-on voltage Vce_on1 can be the normal cathode turn-on voltage or the cathode reference turn-on voltage.

[0274] The second cathode on-state voltage Vce_on2 can have a lower voltage level than the first cathode on-state voltage Vce_on1. For example, the absolute value of the second cathode on-state voltage Vce_on2 can be greater than the absolute value of the first cathode on-state voltage Vce_on1.

[0275] According to another embodiment of this disclosure, the timing controller 350 can be configured to change (or adjust) the cathode on-state voltage Vce_on based on a reference voltage Vref generated based on screen brightness data Bdata. For example, the timing controller 350 can be configured to generate cathode on-state voltage data Cdata_on based on reference voltage data Vdata generated based on screen brightness data Bdata. For example, the timing controller 350 can be configured to change (or adjust) the second cathode on-state voltage Vce_on2 based on a red reference voltage Vref_R, a green reference voltage Vref_G, and a blue reference voltage Vref_B generated based on screen brightness data Bdata. For example, the timing controller 350 can be configured to generate cathode on-state voltage data Cdata_on for generating the second cathode on-state voltage Vce_on2 based on the red reference voltage data, green reference voltage data, and blue reference voltage data corresponding to the screen brightness data Bdata.

[0276] Reference Figure 12 and Figure 13According to embodiments of this disclosure, the timing controller 350 can be configured to generate, based on a timing synchronization signal, a plurality of second electrodes CE2 extending in the row direction and spaced apart in the column direction of the display panel 100 (see...). Figure 7 The cathode voltage control signal CVCS sequentially supplies the cathode voltage Vce. The cathode voltage control signal CVCS may include multiple cathode clock signals and cathode voltage start signals. The cathode voltage control signal CVCS can be supplied to the pixel drive circuit PD.

[0277] In the display device 1000 according to an embodiment of the present disclosure, the power management integrated circuit 370 can be configured to generate (or output) or change (or adjust) the reference voltage Vref based on the reference voltage data Vdata provided from the timing controller 350.

[0278] According to embodiments of this disclosure, the power management integrated circuit 370 can be configured to generate (or output) or change (or adjust) a red reference voltage Vref_R based on red reference voltage data Vdata, generate or output, change or adjust a green reference voltage Vref_G based on green reference voltage data Vdata, and generate or output, change or adjust a blue reference voltage Vref_B based on blue reference voltage data Vdata.

[0279] The red reference voltage Vref_R can be applied to multiple red micro-drivers (μ-drivers) (see...). Figure 4 The plurality of red microdrivers (μdrivers) are configured to be electrically connected to a red light-emitting device. For example, a red reference voltage Vref_R can be commonly applied to the gate electrode of a drive transistor TDR configured in each of the plurality of red microdrivers (μdrivers). For example, the red microdrivers (μdrivers) can be red subdrivers (μdrivers).

[0280] The green reference voltage Vref_G can be applied to multiple green micro-drivers (μ-drivers) (see...). Figure 4 The plurality of green micro-drivers (μ-drivers) are configured to be electrically connected to a green light-emitting device. For example, a green reference voltage Vref_G can be commonly applied to the gate electrode of a drive transistor TDR configured in each of the plurality of green micro-drivers (μ-drivers). For example, the green micro-drivers (μ-drivers) can be green sub-drivers (μ-drivers).

[0281] The blue reference voltage Vref_B can be applied together to multiple blue micro-drivers (μ-drivers) (see...) Figure 4The plurality of blue microdrivers (μdrivers) are configured to be electrically connected to a blue light-emitting device. For example, a blue reference voltage Vref_B can be commonly applied to the gate electrode of a drive transistor TDR configured in each of the plurality of blue microdrivers (μdrivers). For example, the blue microdrivers (μdrivers) can be blue subdrivers (μdrivers).

[0282] The power management integrated circuit 370 according to embodiments of this disclosure can be configured to generate or change (or adjust) the cathode turn-off voltage Vce_off based on cathode turn-off voltage data Cdata_off provided from the timing controller 350. For example, the power management integrated circuit 370 can be configured to generate a cathode turn-off voltage Vce_off having a voltage level between a first cathode turn-off voltage Vce_off1 and a second cathode turn-off voltage Vce_off2 based on the cathode turn-off voltage data Cdata_off.

[0283] The power management integrated circuit 370 according to embodiments of this disclosure can be configured to generate or change (or adjust) the cathode on-voltage Vce_on based on cathode on-voltage data Cdata_on provided from the timing controller 350. For example, the power management integrated circuit 370 can be configured to generate a cathode on-voltage Vce_on having a voltage level between a first cathode on-voltage Vce_on1 and a second cathode on-voltage Vce_on2 based on the cathode on-voltage data Cdata_on.

[0284] Figure 15 A pixel driving circuit and a light-emitting device in a display device according to an embodiment of the present disclosure are shown. Figure 16 It shows that it is applied to Figure 15 The waveform diagram shows the cathode voltage of the multiple second electrodes.

[0285] Reference Figure 13 , Figure 15 and Figure 16 In a display device according to an embodiment of the present disclosure, the pixel driving circuit PD may include a plurality of micro drivers (or sub-drivers) (μ drivers), a cathode voltage selection signal generation unit CVSP, and a plurality of cathode voltage supply circuits CS1 to CSx.

[0286] Each of the plurality of microdrivers (μ drivers) can be connected to a plurality of light-emitting devices (EDs). For example, each of the plurality of microdrivers (μ drivers) can be collectively connected to a plurality of light-emitting devices (EDs) arranged along a column direction. For example, each of the plurality of microdrivers (μ drivers) can be collectively connected to eight light-emitting devices (EDs) arranged along a column direction, but the embodiments of this disclosure are not limited thereto.

[0287] According to embodiments of this disclosure, the plurality of micro-drivers (μ-drivers) may include a plurality of red micro-drivers uDr, a plurality of green micro-drivers uDg, and a plurality of blue micro-drivers uDb.

[0288] Each of the plurality of red micro-drivers uDr can be commonly connected to a plurality of red light-emitting devices ED arranged along the column direction. For example, each of the plurality of red micro-drivers uDr can be commonly connected to the first electrode (or anode terminal) of eight red light-emitting devices ED arranged along the column direction, but embodiments of this disclosure are not limited thereto. Each of the plurality of red micro-drivers uDr can be configured to sequentially emit light from the plurality of red light-emitting devices ED based on a red reference voltage Vref_R provided from the power management integrated circuit 370 and a red emission signal EM_R provided from the driving circuit 311 (see [link to relevant documentation]). Figure 2 For example, each of the plurality of red microdrivers uDr can be a circuit configured inside each of the plurality of microdrivers (μdrivers), and can be a red subdriver, a red subpixel driving circuit, a red subpixel driving unit, or a red subpixel driver unit, but the embodiments of this disclosure are not limited thereto.

[0289] Each of the plurality of green micro-drivers uDg can be commonly connected to a plurality of green light-emitting devices ED arranged along a column direction. For example, each of the plurality of green micro-drivers uDg can be commonly connected to the first electrode (or anode terminal) of eight green light-emitting devices ED arranged along a column direction, but embodiments of this disclosure are not limited thereto. Each of the plurality of green micro-drivers uDg can be configured to sequentially emit light from the plurality of green light-emitting devices ED based on a green reference voltage Vref_G provided from the power management integrated circuit 370 and a green light emission signal EM_G provided from the driving circuit 311 (see [link to relevant documentation]). Figure 2 For example, each of the plurality of green micro-drivers uDg can be a circuit configured inside each of the plurality of micro-drivers (μ-drivers), and can be a green sub-driver, a green sub-pixel driving circuit, a green sub-pixel driving unit, or a green sub-pixel driver unit, but the embodiments of this disclosure are not limited thereto.

[0290] Each of the plurality of blue micro-drivers uDb can be commonly connected to a plurality of blue light-emitting devices ED arranged along the column direction. For example, each of the plurality of blue micro-drivers uDb can be commonly connected to the first electrode (or anode terminal) of eight blue light-emitting devices ED arranged along the column direction, but embodiments of this disclosure are not limited thereto. Each of the plurality of blue micro-drivers uDb can be configured to sequentially emit light from the plurality of blue light-emitting devices ED based on a blue reference voltage Vref_B provided from the power management integrated circuit 370 and a blue emission signal EM_B provided from the driving circuit 311 (see [link to relevant documentation]). Figure 2 For example, each of the plurality of blue microdrivers uDb can be a circuit configured inside each of the plurality of microdrivers (μdrivers), and can be a blue subdriver, a blue subpixel driving circuit, a blue subpixel driving unit, or a blue subpixel driver unit, but the embodiments of this disclosure are not limited thereto.

[0291] The cathode voltage selection signal generation unit CVSP can be configured to sequentially output a plurality of cathode voltage selection signals CVS1 to CVSx according to the cathode voltage control signal CVCS provided from the timing controller 350. For example, each of the plurality of cathode voltage selection signals CVS1 to CVSx may have a first logic period (or a high period) and a second logic period (or a low period) different from the first logic period. For example, the cathode voltage selection signal generation unit CVSP may be a circuit configured inside the pixel driving circuit PD, but embodiments of the present disclosure are not limited thereto.

[0292] The second logic period of each of the multiple cathode voltage selection signals CVS1 to CVSx can have a pulse width (or signal width) corresponding to a column drive period (or a horizontal period) RP1 to RP8 that causes the multiple light-emitting devices ED arranged in a column (or a horizontal line) to emit light. Therefore, the second logic period of each of the multiple cathode voltage selection signals CVS1 to CVSx can be shifted sequentially in units of a column drive period (or a horizontal period).

[0293] According to embodiments of the present disclosure, the cathode voltage selection signal generation unit CVSP can be configured as a shift register that sequentially shifts the second logic cycle of the cathode voltage selection signal by one column drive cycle (or one horizontal cycle) according to the cathode voltage control signal CVCS, but embodiments of the present disclosure are not limited thereto.

[0294] Each of the plurality of cathode voltage supply circuits CS1 to CSx can be configured to receive a cathode voltage control signal CVCS provided from the cathode voltage selection signal generation unit CVSP, and to receive a cathode on-state voltage Vce_on and a cathode on-state voltage Vce_off provided from the power management integrated circuit 370. Each of the plurality of cathode voltage supply circuits CS1 to CSx can be individually connected to a plurality of second electrodes CE2 extending in the row direction and spaced apart from each other in the column direction of the display panel 100 (see...). Figure 7 For example, each of the multiple cathode voltage supply circuits CS1 to CSx can be individually connected via signal line TL to the corresponding second electrode CE2 configured in each of the multiple columns (or horizontal lines) RL1 to RLx.

[0295] Each of the plurality of cathode voltage supply circuits CS1 to CSx can be configured to apply either a cathode turn-on voltage Vce_on or a cathode turn-off voltage Vce_off to a corresponding second electrode CE2 among the plurality of second electrodes based on a cathode voltage control signal CVCS. For example, each of the plurality of cathode voltage supply circuits CS1 to CSx can be configured to apply a cathode turn-off voltage Vce_off to a corresponding second electrode CE2 among the plurality of second electrodes during a first logic cycle of cathode voltage selection signals CVS1 to CVSx, and to apply a cathode turn-on voltage Vce_on to a corresponding second electrode CE2 among the plurality of second electrodes during a second logic cycle of cathode voltage selection signals CVS1 to CVSx.

[0296] According to embodiments of this disclosure, each of the plurality of cathode voltage supply circuits CS1 to CSx can sequentially apply a cathode on-state voltage Vce_on to the second electrode CE2 disposed in each of the plurality of columns (or horizontal lines) RL1 to RLx during the second logic cycle of the cathode voltage selection signals CVS1 to CVSx. Therefore, the plurality of light-emitting devices ED disposed in each of the plurality of columns (or horizontal lines) RL1 to RLx can sequentially emit light by applying the cathode on-state voltage Vce_on to the second electrode CE2, unit by unit of columns (or horizontal lines) RL1 to RLx.

[0297] According to embodiments of this disclosure, each of the plurality of cathode voltage supply circuits CS1 to CSx can sequentially apply a cathode turn-off voltage Vce_off to the second electrode CE2 disposed in each of the plurality of columns (or horizontal lines) RL1 to RLx within a first logic cycle of the cathode voltage selection signals CVS1 to CVSx. Therefore, the light emission of each of the plurality of light-emitting devices ED disposed in each of the plurality of columns (or horizontal lines) RL1 to RLx can be sequentially turned off or on by the cathode turn-off voltage Vce_off, unit by unit of columns (or horizontal lines) RL1 to RLx.

[0298] According to embodiments of this disclosure, the cathode turn-off voltage Vce_off sequentially applied to the second electrode CE2 disposed in each of a plurality of rows (or horizontal lines) RL1 to RLx can have a voltage level between the first cathode turn-off voltage Vce_off1 and the second cathode turn-off voltage Vce_off2, as referred to above. Figure 12 For example, the cathode turn-off voltage Vce_off can have a second cathode turn-off voltage Vce_off2. Therefore, the voltage swing width (or voltage transition width) between the cathode turn-on voltage Vce_on and the cathode turn-off voltage Vce_off can be reduced, and thus the power consumption due to voltage switching (or voltage transition) can be reduced.

[0299] As described above, in the display device according to the embodiments of the present disclosure, power consumption can be reduced by changing (or adjusting) the cathode turn-off voltage Vce_off applied to the second electrode CE2.

[0300] Figure 17 It shows that it is applied to Figure 15 The waveform diagram shows the cathode voltage of the multiple second electrodes. Figure 17 This shows how to change the reference above. Figure 15 and Figure 16 The embodiment implemented by the described cathode turn-on voltage. Therefore, in the following description, repeated descriptions of elements other than the cathode turn-on voltage and related elements are omitted. (Refer to the above...) Figure 15 and Figure 16 The description may include in Figure 17 In the description.

[0301] Reference Figure 15 and Figure 17According to another embodiment of this disclosure, each of the plurality of cathode voltage supply circuits CS1 to CSx can sequentially apply a cathode on-state voltage Vce_on to the second electrode CE2 disposed in each of the plurality of columns (or horizontal lines) RL1 to RLx during the second logic cycle of the cathode voltage selection signals CVS1 to CVSx. Therefore, the plurality of light-emitting devices ED disposed in each of the plurality of columns (or horizontal lines) RL1 to RLx can sequentially emit light by applying the cathode on-state voltage Vce_on to the second electrode CE2, unit by unit of columns (or horizontal lines) RL1 to RLx.

[0302] According to another embodiment of this disclosure, the cathode on-state voltage Vce_on sequentially applied to the second electrode CE2 disposed in each of a plurality of rows (or horizontal lines) RL1 to RLx can have a voltage level between the first cathode on-state voltage Vce_on1 and the second cathode on-state voltage Vce_on2, as referred to above. Figure 12 For example, the cathode on-state voltage Vce_on can have a second cathode on-state voltage Vce_on2. Therefore, the brightness of the light-emitting device (ED) can be increased by the second cathode on-state voltage Vce_on2.

[0303] According to another embodiment of this disclosure, each of the plurality of cathode voltage supply circuits CS1 to CSx can sequentially apply a cathode turn-off voltage Vce_off to the second electrode CE2 disposed in each of the plurality of columns (or horizontal lines) RL1 to RLx during a first logic cycle of the cathode voltage selection signals CVS1 to CVSx. Therefore, the light emission of each of the plurality of light-emitting devices ED disposed in each of the plurality of columns (or horizontal lines) RL1 to RLx can be sequentially turned off or on by the cathode turn-off voltage Vce_off, column by column (or horizontal line) RL1 to RLx.

[0304] According to embodiments of this disclosure, the cathode turn-off voltage Vce_off sequentially applied to the second electrode CE2 disposed in each of a plurality of rows (or horizontal lines) RL1 to RLx can have a voltage level between the first cathode turn-off voltage Vce_off1 and the second cathode turn-off voltage Vce_off2, as referred to above. Figure 12 For example, the cathode turn-off voltage Vce_off may have a second cathode turn-off voltage Vce_off2. Therefore, the voltage swing width (or voltage transition width) between the cathode turn-on voltage Vce_on and the cathode turn-off voltage Vce_off can be reduced, and thus the power consumption caused by voltage switching (or voltage transition) can be reduced. Therefore, the display device according to embodiments of this disclosure can reduce power consumption by changing (or adjusting) the cathode turn-off voltage Vce_off applied to the second electrode CE2.

[0305] As described above, in a display device according to another embodiment of the present disclosure, power consumption can be reduced by changing or adjusting the cathode turn-off voltage Vce_off applied to the second electrode CE2, and brightness caused by the light emission of the light-emitting device ED can be increased by changing or adjusting the cathode turn-on voltage Vce_on.

[0306] Figures 18 to 21 This is a diagram illustrating a display device that applies an embodiment of the present disclosure.

[0307] Reference Figures 18 to 21 The display device according to embodiments of this disclosure can be applied to or included in various devices or electronic devices. For example, various electronic devices may include... Figure 18 The wearable device 1100 shown Figure 19 The mobile device 1200 shown Figure 20 The laptop 1300 shown and Figure 21 The monitor or TV 1400 shown is not limited to this.

[0308] Each of the wearable device 1100, mobile device 1200, laptop 1300, and monitor or TV 1400 may respectively include housing portions 1005, 1010, 1015, and 1020, as well as display panel 100 and display device 1000, according to the embodiments described above in accordance with this disclosure. Therefore, a description of display panel 100 and display device 1000 is omitted. (Refer to above) Figures 1 to 17 The description may include in Figures 18 to 21 In the description.

[0309] For example, the display device according to the embodiments of this disclosure can be applied to mobile devices, video phones, smartwatches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, bending devices, sliding devices, variable devices, electronic notebooks, e-books, PMPs (portable multimedia players), PDAs (personal digital assistants), MP3 (MPEG audio layer 3) players, mobile medical devices, desktop personal computers, laptop personal computers, netbooks, workstations, navigation systems, in-vehicle display devices, theater display devices, televisions, wallpaper devices, signage devices, gaming devices, laptops, monitors, camera devices, camcorders, or home appliances, etc.

[0310] It will be apparent to those skilled in the art that various modifications and variations may be made to this disclosure without departing from the spirit or scope thereof. Therefore, this disclosure is intended to cover such modifications and variations as long as they remain within the scope of the claims and their equivalents.

Claims

1. A display device, comprising: The substrate includes both the display area and the non-display area; Pixel driving circuit at the display area on the substrate; An insulating layer above the pixel driving circuit; A plurality of light-emitting devices spaced apart from each other above the insulating layer, the plurality of light-emitting devices being electrically connected to the pixel driving circuit; as well as Multiple common cathode electrodes are electrically connected to the plurality of light-emitting devices, and the plurality of common cathode electrodes are configured to receive cathode voltage. Wherein, the cathode voltage has a cathode turn-on voltage or a cathode turn-off voltage, and The cathode turn-off voltage is variable.

2. The display device according to claim 1, wherein: The plurality of common cathode electrodes extend along the row direction and are spaced apart from each other along the column direction, and The cathode conduction voltage is sequentially applied to the plurality of common cathode electrodes.

3. The display device according to claim 1, wherein, The cathode turn-off voltage is variable based on the screen brightness set by the user.

4. The display device according to claim 3, further comprising: A touch panel configured to sense the brightness of the screen in response to a user's touch.

5. The display device according to claim 1, wherein: The threshold voltage of one of the plurality of light-emitting devices has a voltage level that is higher than the voltage difference between the anode voltage and the cathode turn-off voltage of the light-emitting device, and lower than the voltage difference between the anode voltage and the cathode turn-on voltage of the light-emitting device. The cathode turn-off voltage has a voltage level between the anode voltage of the light-emitting device and the threshold voltage of the light-emitting device.

6. The display device according to claim 1, wherein: The pixel driving circuit includes a plurality of sub-drivers electrically connected to each of the plurality of light-emitting devices, and Each of the plurality of sub-drivers is configured to apply a driving current to a corresponding light-emitting device among the plurality of light-emitting devices based on a reference voltage and a light-emitting signal corresponding to pixel data.

7. The display device according to claim 6, wherein: The reference voltage is variable and is based on the screen brightness set by the user. The cathode turn-off voltage is variable based on the reference voltage, and / or The cathode forward voltage is variable and is based on the reference voltage.

8. The display device according to claim 7, further comprising: A timing controller configured to generate reference voltage data, cathode on-voltage data, and cathode off-voltage data based on the screen brightness set by the user; as well as A power management integrated circuit configured to output a reference voltage based on the reference voltage data, output a cathode on-voltage based on the cathode on-voltage data, and output a cathode off-voltage based on the cathode off-voltage data.

9. The display device according to claim 8, wherein, The timing controller is configured to: The reference voltage data corresponding to the screen brightness set by the user is generated using a lookup table stored in memory. The lookup table is used to generate cathode turn-off voltage data corresponding to the screen brightness set by the user.

10. The display device according to claim 8, wherein: The timing controller is configured to output a cathode voltage control signal, and The pixel driving circuit also includes: A cathode voltage selection signal generation unit, configured to sequentially output a plurality of cathode voltage selection signals based on the cathode voltage control signal; and Multiple cathode voltage supply circuits are configured to sequentially apply the cathode turn-on voltage or the cathode turn-off voltage to the multiple common cathode electrodes based on the multiple cathode voltage selection signals.

11. The display device according to claim 8, wherein: The plurality of light-emitting devices includes a plurality of red light-emitting devices, a plurality of green light-emitting devices, and a plurality of blue light-emitting devices. The plurality of sub-drivers include: Multiple red sub-drivers are electrically connected to multiple red light-emitting devices, and the multiple red sub-drivers are configured to apply a driving current to the multiple red light-emitting devices based on a red reference voltage and a red light-emitting signal; A plurality of green sub-drivers, electrically connected to a plurality of green light-emitting devices, the plurality of green sub-drivers being configured to apply a drive current to the plurality of green light-emitting devices based on a green reference voltage and a green light-emitting signal; and Multiple blue sub-drivers are electrically connected to multiple blue light-emitting devices. The multiple blue sub-drivers are configured to apply a drive current to the multiple blue light-emitting devices based on a blue reference voltage and a blue emission signal. The red reference voltage, the green reference voltage, and the blue reference voltage are different from each other based on the screen brightness set by the user.

12. The display device according to claim 6, wherein: The brightness of the plurality of light-emitting devices includes: Including the first brightness zone with the lowest brightness; Including the third brightness zone with maximum brightness; and The second brightness region is located between the first brightness region and the third brightness region, and the reference voltage is variable in each of the first brightness region and the third brightness region.

13. The display device according to claim 12, wherein: The plurality of light-emitting devices include red light-emitting devices, green light-emitting devices, and blue light-emitting devices, and The first brightness region, the second brightness region, and the third brightness region of each of the red light-emitting device, the green light-emitting device, and the blue light-emitting device are different from each other.

14. The display device according to claim 12, wherein, The plurality of light-emitting devices are configured to: In each of the first brightness region and the third brightness region, light is emitted using a pulse amplitude modulation method based on the reference voltage and the emission signal. In the second brightness region, light is emitted using a pulse width modulation method based on the reference voltage and the emission signal.

15. The display device according to claim 12, wherein, The cathode turn-off voltage is variable based on the reference voltage, or each of the cathode turn-off voltage and the cathode turn-on voltage is variable based on the reference voltage.

16. The display device according to any one of claims 1 to 15, further comprising: Multiple dikes at the insulation layer; Multiple connection electrodes at each of the plurality of dikes, the plurality of connection electrodes being electrically connected to the pixel driving circuit; as well as Multiple bonding pads at each of the plurality of connecting electrodes Each of the plurality of light-emitting devices includes: The first electrode is electrically connected to the corresponding bonding pad in the plurality of bonding pads; and A second electrode electrically connected to the corresponding common cathode electrode among the plurality of common cathode electrodes.

17. The display device according to claim 16, further comprising: An optical layer above the insulating layer surrounds the lateral surface of each of the plurality of light-emitting devices and the lateral surface of each of the plurality of embankments.

18. The display device according to claim 17, wherein, The optical layer includes: A first optical layer surrounds the sides of the plurality of light-emitting devices and the plurality of embankments between the plurality of common cathode electrodes and the insulating layer; and A second optical layer surrounds the side portion of the first optical layer.

19. The display device according to claim 18, wherein, The optical layer further includes a third optical layer, which is disposed above the plurality of common cathode electrodes and overlaps with the plurality of light-emitting devices and the first optical layer.

20. The display device according to claim 16, further comprising: A covering layer above the plurality of common cathode electrodes; A polarizing layer above the covering layer; as well as The cover member above the polarization layer.

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