Display panel, preparation method thereof and display device

Abstract

The invention provides a display panel, a preparation method of the display panel and a display device. The problem that in the prior art, the yield of a display panel is low is solved. The display panel comprises the components of a substrate which comprises a via hole; the first electrode is located on one side of the substrate, and part of the first electrode is located in the via hole; the pixel definition layer is located on the side, away from the substrate, of the first electrode, part of the pixel definition layer is located in the via hole, and the orthographic projection of the pixel definition layer on the substrate at least partially covers the first electrode in the via hole; the isolation structure layer is located on the side, away from the substrate, of the pixel definition layer, a light transmitting hole is defined by the isolation structure layer, and the orthographic projection of the via hole on the substrate is located in the orthographic projection range of the light transmitting hole on the substrate.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically to a display panel and its manufacturing method, and a display device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) are considered the next generation of flat panel display technology after liquid crystal displays (LCDs), and are favored by users for their superior color and image quality. However, the yield rate of OLED display panels needs further improvement. Summary of the Invention

[0003] In view of this, the present application provides a display panel and its manufacturing method, as well as a display device, which solves the problem of low yield of display panels in the prior art.

[0004] This application provides a display panel, comprising: a substrate including vias; a first electrode located on one side of the substrate, with a portion of the first electrode located within the via; a pixel definition layer located on the side of the first electrode facing away from the substrate, with a portion of the pixel definition layer located within the via, the orthogonal projection of the pixel definition layer onto the substrate at least partially covering the first electrode within the via; and an isolation structure layer located on the side of the pixel definition layer facing away from the substrate, the isolation structure layer having a light-transmitting hole, the orthogonal projection of the via onto the substrate being within the orthogonal projection range of the light-transmitting hole onto the substrate. The advantage is that by setting the orthogonal projection of the pixel definition layer onto the substrate to at least partially cover the first electrode within the via, the pixel definition layer provides protection for the first electrode within the via, preventing etching damage to the first electrode of the via and improving the yield of the display panel.

[0005] In conjunction with the first aspect, in some possible implementations, the orthogonal projection of the first electrode onto the substrate covers the orthogonal projection of the via onto the substrate; preferably, the first electrode comprises a plurality of conductive layers stacked sequentially in a direction away from the substrate, wherein the orthogonal projection of each conductive layer onto the substrate covers the orthogonal projection of the via onto the substrate; preferably, the plurality of conductive layers comprises a first titanium layer, an aluminum layer, and a second titanium layer stacked sequentially. The advantage is that the pixel definition layer is well protected, and none of the layers of the first electrode are damaged.

[0006] In conjunction with the first aspect, in some possible implementations, the first thickness of the portion of the pixel definition layer overlapping with the sidewall of the via is less than the second thickness of the portion overlapping with the bottom wall of the via; preferably, the third thickness of the portion of the first electrode overlapping with the sidewall of the via is less than the fourth thickness of the portion overlapping with the bottom wall of the via.

[0007] In conjunction with the first aspect, in some possible implementations, the substrate includes a substrate, and a conductive layer and an insulating layer sequentially stacked on the substrate; the conductive layer includes signal lines, and vias penetrate the insulating layer in the thickness direction of the substrate, exposing a portion of the signal lines, and the signal lines contacting the first electrode; preferably, the signal lines include power signal lines.

[0008] In conjunction with the first aspect, in some possible implementations, the orthogonal projections of different vias on the substrate are located within the orthogonal projection range of different light-transmitting holes on the substrate; or the orthogonal projections of multiple vias on the substrate are located within the orthogonal projection range of the same light-transmitting hole on the substrate.

[0009] In conjunction with the first aspect, in some possible implementations, the pixel definition layer is provided with a pixel opening, and the orthographic projection of the pixel opening on the substrate and the orthographic projection of the first electrode on the substrate at least partially overlap; the isolation structure layer is also provided with an isolation opening, and the orthographic projection of the pixel opening on the substrate is located within the orthographic projection range of the isolation opening on the substrate.

[0010] In conjunction with the first aspect, in some possible implementations, the display panel further includes a light-emitting layer and a second electrode located within an isolation opening, with the light-emitting layer and the second electrode stacked sequentially on the side of the first electrode facing away from the substrate.

[0011] In conjunction with the first aspect, in some possible implementations, the display panel further includes a packaging section located on the side of the second electrode away from the substrate, and the orthographic projection of the packaging section on the substrate covers the orthographic projection of the isolation opening on the substrate; preferably, the packaging section and the isolation opening correspond one-to-one, and adjacent packaging sections are disconnected on the side of the isolation structure layer away from the substrate.

[0012] In conjunction with the first aspect, in some possible implementations, the display panel further includes an organic encapsulation layer located on the side of the encapsulation portion away from the substrate, wherein the orthographic projection of the organic encapsulation layer on the substrate covers the orthographic projections of the encapsulation portion, the isolation structure layer, and the light-transmitting hole on the substrate; preferably, the display panel further includes an inorganic encapsulation layer located on the side of the organic encapsulation layer away from the substrate, wherein the orthographic projection of the inorganic encapsulation layer on the substrate covers the orthographic projection of the organic encapsulation layer on the substrate.

[0013] In conjunction with the first aspect, in some possible implementations, the isolation structure layer includes a first part and a second part stacked together, the first part being located on the side of the second part closer to the substrate, and the orthographic projection of the first part on the substrate being within the orthographic projection range of the second part on the substrate; preferably, the isolation structure further includes a third part located on the side of the first part closer to the substrate, and the orthographic projection of the first part on the substrate being within the orthographic projection range of the third part on the substrate.

[0014] A second aspect of this application provides a method for fabricating a display panel, comprising: fabricating a plurality of first electrodes on one side of a substrate, the substrate including a plurality of vias, with a portion of the first electrodes located within the vias; fabricating a pixel defining material layer on the side of the first electrodes facing away from the substrate; fabricating an isolation material layer on the side of the pixel defining material layer facing away from the substrate; and cyclically performing the following steps multiple times: patterning the isolation material layer and the pixel defining material layer to form an isolation opening and a pixel opening, respectively, the pixel opening exposing at least a portion of the first electrodes; fabricating a light-emitting layer and a second electrode within the isolation opening to form a sub-pixel; wherein the pixel opening formed in different cycles exposes different first electrodes; and in the nth cycle, after patterning the isolation material layer, further forming a light-transmitting hole, where n is greater than or equal to 2. The advantage is that by forming the light-transmitting hole during the formation of the isolation opening in two or more cycles, compared to forming the light-transmitting hole during the fabrication of the first sub-pixel, the number of etching steps experienced by the pixel defining layer within the light-transmitting hole is reduced, thus reducing the probability of damage to the pixel defining layer, thereby providing protection for the anode within the light-transmitting hole, preventing anode damage, and thereby improving the yield of the display panel.

[0015] In conjunction with the second aspect, in some possible implementations, the orthographic projection of the pixel opening on the substrate is located within the orthographic projection range of the isolation opening on the substrate; the orthographic projection of the via on the substrate is located within the orthographic projection range of the light-transmitting hole on the substrate.

[0016] In conjunction with the second aspect, in some possible implementations, the nth iteration is the last iteration. In the last iteration, patterning the isolation material layer and the pixel definition material layer to form an isolation opening and a pixel opening respectively includes: patterning the isolation material layer to form an isolation opening and a light-transmitting hole; and patterning the pixel definition material layer to form a pixel opening, wherein the pixel opening and the isolation opening correspond, and the first pixel opening exposes at least a portion of the first electrode.

[0017] In conjunction with the second aspect, in some possible implementations, the sub-pixels formed in the same cycle have the same color; preferably, the first cycle forms a blue sub-pixel, the second cycle forms a green sub-pixel, and the third cycle forms a red sub-pixel.

[0018] In conjunction with the second aspect, in some possible implementations, the multiple first electrodes include a first sub-pixel first electrode, a second sub-pixel first electrode, and a third sub-pixel first electrode; during the first loop, patterning the isolation material layer and the pixel definition material layer to form an isolation opening and a pixel opening respectively includes: patterning the isolation material layer for the first time to form a first isolation opening; patterning the pixel definition material layer for the first time to form a first pixel opening, the first pixel opening corresponding to the first isolation opening, the first pixel opening exposing at least a portion of the first sub-pixel first electrode; during the second loop, patterning the isolation material layer and the pixel definition material layer to form the isolation opening and the pixel opening respectively. The opening includes: patterning the isolation material layer a second time to form a second isolation opening; patterning the pixel definition material layer a second time to form a second pixel opening, the second pixel opening corresponding to the second isolation opening, the second pixel opening exposing at least a portion of the first electrode of the second sub-pixel; in the third cycle, patterning the isolation material layer and the pixel definition material layer to form the isolation opening and the pixel opening respectively includes: patterning the isolation material layer a third time to form a third isolation opening; patterning the pixel definition material layer a third time to form a third pixel opening and a light-transmitting hole; the third pixel opening corresponding to the third isolation opening, the third pixel opening exposing at least a portion of the first electrode of the third sub-pixel.

[0019] In conjunction with the second aspect, in some possible implementations, multiple color sub-pixels are formed in the same loop process, except for the last loop process; preferably, the loop is repeated twice; the first loop forms blue and green sub-pixels, and the second loop forms red sub-pixels.

[0020] In conjunction with the second aspect, in some possible implementations, the multiple first electrodes include a first sub-pixel first electrode, a second sub-pixel first electrode, and a third sub-pixel first electrode. During the first loop, patterning the isolation material layer and the pixel definition material layer to form isolation openings and pixel openings respectively includes: firstly patterning the isolation material layer to form a first isolation opening and a second isolation opening; firstly patterning the pixel definition material layer to form a first pixel opening and a second pixel opening, the first pixel opening corresponding to the first isolation opening, the first pixel opening exposing at least a portion of the first sub-pixel first electrode; the second pixel opening corresponding to the second isolation opening, the second pixel opening exposing at least a portion of the second sub-pixel first electrode. During the second loop, patterning the isolation material layer and the pixel definition material layer to form isolation openings and pixel openings respectively includes: secondly patterning the isolation material layer to form a third isolation opening and a light-transmitting hole; secondly patterning the pixel definition material layer to form a third pixel opening, the third pixel opening corresponding to the third isolation opening, the third pixel opening exposing at least a portion of the third sub-pixel first electrode. The advantage is that during the first loop, two types of isolation openings are formed, namely the first isolation opening and the second isolation opening. Compared to forming an isolation opening in one cycle, this reduces process steps and improves production efficiency.

[0021] In conjunction with the second aspect, in some possible implementations, the colors of the sub-pixels formed in different iterations are different; preferably, the colors of the sub-pixels formed in the last iteration are the same.

[0022] In conjunction with the second aspect, in some possible implementations, after the light-emitting layer and the second electrode are prepared in the isolation opening to form the sub-pixel during each cycle, the preparation method further includes: preparing an encapsulation portion on the side of the second electrode away from the substrate; preferably, after the cycle steps are completed, the preparation method further includes: sequentially preparing an organic encapsulation layer and an inorganic encapsulation layer on the side of the encapsulation portion away from the substrate.

[0023] A third aspect of this application provides a display device, including a display panel provided in any of the above embodiments, or a display panel obtained according to the preparation method provided in any of the above embodiments.

[0024] According to the display panel and its fabrication method and display device provided in the embodiments of this application, by opening a light-transmitting hole when opening the isolation opening during the nth (n greater than or equal to 2) cycle process to fabricate the sub-pixel, compared to opening the light-transmitting hole when fabricating the first sub-pixel during the first cycle process, the number of etching steps experienced by the pixel definition layer within the light-transmitting hole is reduced, thus reducing the probability of damage to the pixel definition layer. This ensures that the orthogonal projection of the pixel definition layer on the substrate at least partially covers the first electrode within the via, thereby providing protection for the first electrode within the via, preventing damage to the first electrode, and thus improving the yield of the display panel. Ideally, there are no voids or breaks in the pixel definition layer within the via, that is, the orthogonal projection of the pixel definition layer on the substrate completely covers the orthogonal projection of the via on the substrate 11, ensuring that the pixel definition layer can provide sufficient protection for the first electrode, preventing damage to the first electrode during the etching process, thereby improving the yield of the display panel. Attached Figure Description

[0025] Figure 1 This is a top view of the display panel provided in the first embodiment of this application.

[0026] Figure 2 for Figure 1 The diagram shows a cross-sectional view of the display panel along line A1A2.

[0027] Figure 3 for Figure 2 A magnified view of a portion of the display panel shown.

[0028] Figure 4 This is a partial enlarged view of the display panel provided in the second embodiment of this application.

[0029] Figure 5 This is a top view of the display panel provided in the third embodiment of this application.

[0030] Figure 6 This is a cross-sectional structural diagram of the display panel provided in the fourth embodiment of this application.

[0031] Figure 7 This is a schematic flowchart illustrating a method for manufacturing a display panel according to an embodiment of this application.

[0032] Figures 8a-8i Execution provided for the first embodiment of this application Figure 7 A schematic diagram of the structure of the intermediate product obtained during the preparation method shown.

[0033] Figures 9a-9d Execution provided for the second embodiment of this application Figure 7 A schematic diagram of the structure of the intermediate product obtained during the preparation method shown.

[0034] Figure 10 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. Detailed Implementation

[0035] In related technologies, to overcome the limitations of fine metal mask technology on display panel size, the technique of using an isolation structure layer to replace the fine metal mask and isolate the OLED organic film layer or cathode during evaporation has attracted much attention in recent years. Compared with the previous fine metal mask process, this process has advantages such as lower cost, no lateral leakage, and lower power consumption. It is a high-end display technology for realizing high PPI and irregularly shaped displays in OLED displays, and it is also the future trend of OLED technology development.

[0036] To prevent the display panel from blocking ambient light and ensure fingerprint recognition accuracy, light-transmitting holes are typically created in the display panel. The conductive holes that connect the sub-pixel anode to the wires in the array substrate are usually located within these light-transmitting holes. On the one hand, there is no protective isolation layer above the light-transmitting holes; on the other hand, the pixel definition layer is relatively thin at the anode holes, especially at the anode hole ramp. In this situation, when the fabrication process using an isolation layer is used to pattern different color sub-pixels sequentially, the isolation layer at the anode holes is easily etched, creating voids, which can lead to the loss of the underlying anode or cause defects such as a short circuit between the cathode and anode.

[0037] In view of this, embodiments of this application provide a display panel and a method for manufacturing the same, as well as a display device. By creating a light-transmitting hole when opening the isolation opening during the nth (n is greater than or equal to 2) cycle process to prepare the sub-pixel, compared to creating the light-transmitting hole when preparing the first sub-pixel during the first cycle process, the number of etching steps experienced by the pixel definition layer within the light-transmitting hole is reduced, thereby reducing the probability of damage to the pixel definition layer. This provides protection for the anode within the light-transmitting hole, avoids anode damage, and improves the yield of the display panel.

[0038] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0039] In the accompanying drawings, the dimensions of layers and regions may be exaggerated for clarity. It is understood that when a structure is referred to as being "on" or "below" another structure, the structure may be directly on or below the other structure, or there may be intermediate structures. The same reference numerals always indicate the same structure. Structures referred to herein include any of the following: membrane, element, device, component, assembly.

[0040] When a structure is referred to as being “connected” to another structure, it can be directly connected to the other structure or indirectly connected to the other structure by means of one or more intermediate structures placed between them.

[0041] The first aspect of this application provides a display panel. Figure 1 This is a top view of the display panel provided in the first embodiment of this application. Figure 2 for Figure 1 The diagram shows a cross-sectional view of the display panel along line A1A2. (Combined with...) Figure 1 and Figure 2 As shown, the display panel includes: a substrate 11, a first electrode 121, a pixel definition layer 13, and an isolation structure layer 14. The substrate 11 includes a via H1. The first electrode 121 is located on one side of the substrate 11, with a portion of the first electrode 121 located within the via H1. The pixel definition layer 13 is located on the side of the first electrode 121 facing away from the substrate 11, with a portion of the pixel definition layer 13 located within the via H1. The orthogonal projection of the pixel definition layer 13 onto the substrate 11 at least partially covers the first electrode 121 within the via H1. The isolation structure layer 14 is located on the side of the pixel definition layer 13 facing away from the substrate 11, and the isolation structure layer 14 has a light-transmitting aperture H2. The orthogonal projection of the via H1 onto the substrate 11 is within the range of the orthogonal projection of the light-transmitting aperture H2 onto the substrate 11.

[0042] The substrate 11 can be an array substrate. The array substrate includes a substrate and pixel circuits formed on the substrate.

[0043] The substrate is, for example, a glass substrate.

[0044] In some embodiments, the substrate may comprise an organic resin material such as epoxy resin, triazine, silicone resin, or polyimide. For example, the substrate may be an FR4 type printed circuit board (PCB) or a flexible PCB that is easily deformable.

[0045] In some embodiments, the substrate may include a ceramic material such as silicon nitride, aluminum nitride, or aluminum oxide, or may include a metal or metal compound. For example, the substrate may be a metal core PCB (MCPCB) or a metal-base copper-clad laminate (MCCL).

[0046] For example, substrate 11 includes a substrate, and a conductive layer 112 and an insulating layer 113 sequentially stacked on substrate 111. Conductive layer 112 includes signal lines. Via H1 penetrates insulating layer 113 in the thickness direction of substrate 111. First electrode 121 fills via H1 and contacts signal lines. Signal lines include power signal lines. First electrode 121 is, for example, the anode or cathode of a sub-pixel. For example, when first electrode 121 is an anode, the signal line is a high-voltage power signal line; when first electrode 121 is a cathode, the signal line is a low-voltage power signal line.

[0047] It should be noted that the substrate 11 may include multiple conductive layers 112, and the signal line may be located in any conductive layer 112.

[0048] The pixel definition layer 13 is used to define the position of sub-pixels and space adjacent sub-pixels. Specifically, the pixel definition layer 13 has a pixel opening H3, and the orthographic projection of the pixel opening H3 on the substrate and the orthographic projection of the first electrode 121 on the substrate at least partially overlap. The isolation structure layer 14 also has an isolation opening H4. The orthographic projection of the pixel opening H3 on the substrate 11 is located within the orthographic projection range of the isolation opening H4 on the substrate 11. Figure 1 and Figure 2 As shown, the display panel also includes a light-emitting layer 122 and a second electrode 123 located within the isolation opening H4. The light-emitting layer 122 and the second electrode 123 are sequentially stacked on the side of the first electrode 121 facing away from the substrate 11. The sequentially stacked first electrode 121, light-emitting layer 122 and second electrode 123 constitute a sub-pixel 12.

[0049] The light-transmitting aperture H2 is located between adjacent sub-pixels, and the orthogonal projection of the via H1 on the substrate 11 lies within the orthogonal projection range of the light-transmitting aperture H2 on the substrate 11. The first electrode 121 extends from within the pixel opening H3, from between the pixel definition layer 13 and the substrate 11, into the via H1. The orthogonal projection of the first electrode 121 on the substrate 11 covers the orthogonal projection of the via H1 on the substrate 11.

[0050] For example, the orthographic projections of different vias H1 on the substrate 11 are within the range of the orthographic projections of different light-transmitting holes H2 on the substrate 11. For instance, some light-transmitting holes H2 in the display panel correspond one-to-one with vias H1, while the remaining light-transmitting holes H2 do not correspond to vias H1, meaning that the orthographic projections of the remaining light-transmitting holes H2 on the substrate 11 do not include the orthographic projections of vias H1 on the substrate 11.

[0051] The orthographic projection of the pixel definition layer 13 on the substrate 11 at least partially covers the first electrode 121 within the via H1, including two cases: first, the orthographic projection of the pixel definition layer 13 on the substrate 11 completely covers the first electrode 121 within the via H1; second, the orthographic projection of the pixel definition layer 13 on the substrate 11 partially covers the first electrode 121 within the via H1.

[0052] Subpixels can be organic light-emitting diodes (OLEDs), micro light-emitting diodes (Micro LEDs), quantum dot light-emitting diodes (QLEDs), etc. Subpixels can be light-emitting devices of various colors, such as red light-emitting device R, green light-emitting device G, blue light-emitting device B, etc.

[0053] For example, the display panel may further include at least one of a hole injection layer, a hole transport layer, and an electron blocking layer located between the anode and the light-emitting layer, and at least one of an electron injection layer, an electron transport layer, and a hole blocking layer located between the cathode and the light-emitting layer.

[0054] The isolation structure layer 14 serves to isolate the film layer above it. In this embodiment, the isolation structure layer 14 includes a first part 141 and a second part 142 stacked together. The first part 141 is located on the side of the second part 142 closer to the substrate 11, and the orthographic projection of the first part 141 on the substrate 11 is within the orthographic projection range of the second part 142 on the substrate 11. In this case, the cross-sectional shape of the isolation structure layer 14 is an inverted trapezoid. Exemplarily, the first part 141 can be designed as an independent film layer, that is, there is no physical interface inside the first part 141, and each part is made of the same material. Alternatively, the first part 141 can be designed as being composed of at least two film layers stacked together. For example, the first part 141 is formed by stacking two conductive film layers. The materials of the two conductive film layers can be molybdenum and aluminum, respectively, and the conductive film layer made of molybdenum is located between the substrate 11 and the conductive film layer made of aluminum. The material of the second part 142 can be an organic material, an inorganic material, or a metallic material. If the second part 142 is a metallic material, the material of the second part 142 can be titanium. In one embodiment, the first part 141 includes a conductive part. For example, the first part 141 may be an entirely conductive structure or a portion thereof.

[0055] For example, the cross-sectional shape of the isolation structure layer 14 can also be an inverted trapezoid. The isolation structure layer 14 can be an independent membrane layer, that is, there is no physical interface inside the isolation structure layer 14, and all parts are made of the same material.

[0056] For example, the isolation structure layer 14 may further include a third portion 143 located on the side of the first portion 141 near the substrate 11. The orthographic projection of the first portion 141 onto the substrate 11 lies within the orthographic projection range of the third portion 143 onto the substrate 11. For example, the cross-sectional shape of the isolation structure layer 14 is I-shaped. For example, the material of the third portion 143 may be molybdenum.

[0057] According to the display panel provided in this embodiment, the orthographic projection of the via H1 used to connect the first electrode 121 and the wire on the substrate 11 is located within the orthographic projection range of the light-transmitting hole H2 on the substrate 11. By setting at least a portion of the pixel definition layer 13 within the via H1, the orthographic projection of the pixel definition layer 13 on the substrate 11 at least partially covers the orthographic projection of the via H1 on the substrate 11, so that the pixel definition layer 13 can provide protection for the first electrode 121. Preferably, at least a portion of the pixel definition layer 13 is located within the via H1, and the orthographic projection of the pixel definition layer 13 on the substrate 11 completely covers the orthographic projection of the via H1 on the substrate 11, that is, there are no voids or breaks in the pixel definition layer 13 within the via H1, ensuring that the pixel definition layer 13 can provide sufficient protection for the first electrode 121, avoiding damage to the first electrode 121 during the etching process, thereby improving the yield of the display panel.

[0058] Figure 3 for Figure 2 A magnified view of a portion of the display panel is shown. (As shown) Figure 3 As shown, in this embodiment, the first thickness D1 of the portion of the pixel definition layer 13 that overlaps with the sidewall of the via H1 is less than the second thickness D2 of the portion that overlaps with the bottom wall of the via H1.

[0059] The insulating layer 113 is inclined relative to the substrate 111, corresponding to the sidewall of the via H1. For example, the cross-sectional shape of the via H is an inverted trapezoid. In this case, due to the film deposition process, the thickness of the pixel definition layer 13 when it slopes up on the sidewall of the via H is less than the film thickness formed on the bottom wall of the via H.

[0060] It should be noted that the second thickness D2 of the portion where the pixel definition layer 13 overlaps with the bottom wall of the via H1 can be non-uniform. In this case, the average thickness of the portion where the pixel definition layer 13 overlaps with the sidewall of the via H1 can be used as the first thickness D1 of the portion where the pixel definition layer 13 overlaps with the sidewall of the via H1.

[0061] In one embodiment, the third thickness d1 of the portion where the first electrode 121 overlaps with the sidewall of the via H1 is less than the fourth thickness d2 of the portion where the first electrode 121 overlaps with the bottom wall of the via H1.

[0062] Figure 4 This is a partial enlarged view of the display panel provided in the second embodiment of this application. Figure 2As shown, the orthogonal projection of the first electrode 121 on the substrate 11 covers the orthogonal projection of the via H1 on the substrate 11. When the orthogonal projection of the pixel definition layer 13 on the substrate 11 covers the orthogonal projection of the via H1 on the substrate 11, the first electrode 121 within the via H1 can be protected, thereby ensuring that the first electrode 121 within the via H1 is not damaged by etching and will not form a hole, thus making the orthogonal projection of the first electrode 121 on the substrate 11 cover the orthogonal projection of the via H1 on the substrate 11.

[0063] In one embodiment, the first electrode 121 includes a plurality of conductive layers stacked sequentially in a direction away from the substrate 11, wherein the orthographic projection of each conductive layer on the substrate 11 covers the orthographic projection of the via H1 on the substrate 11. For example, the plurality of conductive layers include a first titanium layer 1211, an aluminum layer 1212, and a second titanium layer 1213 stacked sequentially.

[0064] Typically, the first electrode 121 may be damaged by etching in at least two ways: First, after the pixel definition layer 13 within the via H1 develops a hole due to etching, the etching liquid seeps in through the hole, corroding the titanium and aluminum layers of the first electrode 121. Since the aluminum layer is more susceptible to etching than the titanium layer, the corrosion area of ​​the aluminum layer will be larger, and in severe cases, it may even spread into the pixel opening H3. Second, after the pixel definition layer 13 within the via H1 develops a hole due to etching, the etching liquid seeps in through the hole. Because the titanium layer has a certain degree of etching resistance, the etching liquid may seep into the side of the first electrode 121 along the gap between the titanium layer and the pixel definition layer 13, directly corroding the aluminum layer from the side of the first electrode 121. In this case, the first titanium layer 1211 and the second titanium layer 1213 may remain intact.

[0065] According to the display panel provided in this embodiment, by setting the orthogonal projection of the pixel definition layer 13 on the substrate 11 to cover the orthogonal projection of the first electrode 121 in the via H1 on the substrate 11, it can be ensured that each film layer of the first electrode 121 will not be etched and damaged, so that the orthogonal projection of each film layer on the substrate 11 covers the orthogonal projection of the via H1 on the substrate 11.

[0066] Figure 5 This is a top view of the display panel provided in the third embodiment of this application. (Comparison) Figure 5 and Figure 1 As can be seen from the display panel shown, the difference is that in this embodiment, the orthogonal projections of multiple vias H1 on the substrate 11 are located within the orthogonal projection range of the same light-transmitting hole H2 on the substrate 11, that is, multiple vias H1 correspond to the same light-transmitting hole H2.

[0067] Figure 6 This is a schematic cross-sectional view of the display panel provided in the fourth embodiment of this application. Figure 6As shown, the difference between this display panel and the display panel provided in any of the above embodiments is that, in this embodiment, the display panel further includes a packaging portion 151, located on the side of the second electrode 123 facing away from the substrate 11. The orthographic projection of the packaging portion 151 on the substrate 11 covers the orthographic projection of the isolation opening H4 on the substrate 11.

[0068] In one embodiment, the encapsulation portion 151 and the isolation opening H4 correspond one-to-one, and adjacent encapsulation portions 151 are disconnected on the side of the isolation structure layer 14 away from the substrate 11.

[0069] In one embodiment, the display panel further includes an organic encapsulation layer 152, which is located on the side of the encapsulation portion 151 facing away from the substrate 11. The orthographic projection of the organic encapsulation layer 152 on the substrate 11 covers the orthographic projections of the encapsulation portion 151, the isolation structure layer 14, and the light-transmitting hole H2 on the substrate 11.

[0070] In one embodiment, the display panel further includes an inorganic encapsulation layer 153 located on the side of the organic encapsulation layer 152 facing away from the substrate 11. The orthographic projection of the inorganic encapsulation layer 153 on the substrate 11 covers the orthographic projection of the organic encapsulation layer 152 on the substrate 11.

[0071] The second aspect of this application provides a method for manufacturing a display panel. Figure 7 This is a schematic flowchart illustrating a method for fabricating a display panel according to an embodiment of this application. Figure 7 As shown, the preparation method 700 includes:

[0072] Step S710: A plurality of first electrodes are fabricated on one side of the substrate. The substrate includes a plurality of vias, and some of the first electrodes are located within the vias.

[0073] Step S720: Prepare a pixel definition material layer on one side of the substrate.

[0074] Step S730: Prepare an isolation material layer on the side of the pixel definition material layer away from the substrate.

[0075] In step S740, the isolation material layer and the pixel definition material layer are patterned to form an isolation opening and a pixel opening, respectively. The orthographic projection of the pixel opening on the substrate is located within the orthographic projection range of the isolation opening on the substrate, and the pixel opening exposes at least a portion of the first electrode.

[0076] Step S750: Prepare a light-emitting layer and a second electrode within the isolation opening to form a sub-pixel.

[0077] Steps S740 and S750 are executed repeatedly. For example, if steps S740 and S750 are executed twice, the preparation method 700 includes steps S710, S720, S730, S740, S750, S740, and S750 executed sequentially.

[0078] It should be noted that the pixel openings formed in different cycle numbers expose different first electrodes. In the nth cycle, after patterning the isolation material layer, a light-transmitting hole H2 is further formed. The orthographic projection of the via H1 on the substrate 11 lies within the orthographic projection range of the light-transmitting hole H2 on the substrate 11, where n is greater than or equal to 2. For example, the nth cycle is the last cycle. In the last cycle, step S740 includes: patterning the isolation material layer to form an isolation opening and a light-transmitting hole; patterning the pixel definition material layer to form a pixel opening, which corresponds to the isolation opening, and the first pixel opening exposes at least a portion of the first electrode.

[0079] In one embodiment, after each cycle of step S750 is completed, the fabrication method 700 further includes: fabricating a package portion on the side of the second electrode away from the substrate.

[0080] In one embodiment, after the last cycle of step S750 is completed, the preparation method 700 further includes: sequentially preparing an organic encapsulation layer and an inorganic encapsulation layer on the side of the encapsulation portion away from the substrate 11.

[0081] In one embodiment, the sub-pixels formed in different iterations are of different colors. For example, in the first iteration, i.e., the first execution of steps S740 and S750, a blue sub-pixel B is formed; in the second iteration, i.e., the second execution of steps S740 and S750, a green sub-pixel G is formed; and in the third iteration, i.e., the third execution of steps S740 and S750, a red sub-pixel R is formed. As another example, in the first iteration, i.e., the first execution of steps S740 and S750, blue sub-pixels B and green sub-pixels G are formed; and in the second iteration, i.e., the second execution of steps S740 and S750, a red sub-pixel R is formed.

[0082] In one embodiment, the sub-pixels formed in the last loop have the same color. For example, the last loop forms a red sub-pixel R.

[0083] According to the fabrication method provided in this embodiment, by creating a light-transmitting hole during the nth (n greater than or equal to 2) cycle when creating the isolation opening, compared to creating the light-transmitting hole in the first cycle, the number of etching steps experienced by the pixel definition layer within the light-transmitting hole is reduced, thus decreasing the probability of damage to the pixel definition layer. This provides protection for the anode within the light-transmitting hole, preventing anode damage and improving the yield of the display panel. Ideally, the orthogonal projection of the pixel definition layer 13 on the substrate 11 completely covers the orthogonal projection of the via H1 on the substrate 11, meaning that there are no voids or breaks in the pixel definition layer 13 within the via H1. This ensures that the pixel definition layer 13 can provide sufficient protection for the first electrode 121, preventing damage to the first electrode 121 during the etching process, thereby improving the yield of the display panel.

[0084] The following two specific examples illustrate in detail the execution process of preparation method 700.

[0085] In one embodiment, the sub-pixels formed in the same cycle have the same color. For example, in the first cycle, that is, the first execution of steps S740 and S750, a blue sub-pixel B is formed; in the second cycle, that is, the second execution of steps S740 and S750, a green sub-pixel G is formed; and in the third cycle, that is, the third execution of steps S740 and S750, a red sub-pixel R is formed.

[0086] Specifically, Figures 8a-8i Execution provided for the first embodiment of this application Figure 7 A schematic diagram of the structure of the intermediate product obtained during the preparation method shown.

[0087] According to step S710, refer to Figure 8a Multiple first electrodes 121 are fabricated on one side of the substrate 11.

[0088] The substrate 11 includes a plurality of vias H1, and a portion of the first electrode 121 is located within the vias H1. The plurality of first electrodes 121 include a first sub-pixel first electrode 121_B, a second sub-pixel first electrode 121_G, and a third sub-pixel first electrode 121_R.

[0089] According to step S720, refer to Figure 8b A pixel definition material layer 130 is prepared on the side of the first electrode 121 away from the substrate 11.

[0090] According to step S730, refer to Figure 8c An isolation material layer 140 is prepared on the side of the pixel definition material layer 130 facing away from the substrate 11.

[0091] According to step S740, refer to Figure 8dThe isolation material layer 140 and the pixel definition material layer 130 are first patterned to form a first isolation opening H4_B and a first pixel opening H3_B, respectively. The orthographic projection of the first pixel opening H3_B onto the substrate 11 is within the orthographic projection range of the first isolation opening H4_B onto the substrate 11. The first pixel opening H3_B exposes at least a portion of the first electrode 121_B of the first sub-pixel.

[0092] According to step S750, refer to Figure 8e A first light-emitting layer 122_B and a second electrode 123_B for the first sub-pixel are formed within the first isolation opening H4_B. For example, the first sub-pixel includes a blue sub-pixel B.

[0093] For example, after step S750, the method further includes: forming a first encapsulation portion 151_B on the side of the first sub-pixel second electrode 123_B away from the substrate 11.

[0094] See Figure 8f Then, according to step S740, the isolation material layer 140 and the pixel definition material layer 130 are patterned a second time to form a second isolation opening H4_G and a second pixel opening H3_G, respectively. The orthographic projection of the second pixel opening H3_G onto the substrate 11 is located within the orthographic projection range of the second isolation opening H4_G onto the substrate 11. The second pixel opening H3_G exposes at least a portion of the first electrode 121_G of the second sub-pixel.

[0095] Following step S750 again, a second light-emitting layer 122_G and a second sub-pixel second electrode 123_G are prepared within the second isolation opening H4_G to form a second sub-pixel. For example, the second sub-pixel includes a green sub-pixel G.

[0096] For example, after step S750, the method further includes: preparing a second encapsulation portion 151_G on the side of the second electrode 123_G of the second sub-pixel away from the substrate 11.

[0097] See step S740 again. Figure 8g The insulating material layer 140 is patterned a third time to form a third insulating opening H4_R and a light-transmitting hole H2. The orthogonal projection of hole H1 on substrate 11 is within the orthogonal projection range of light-transmitting hole H2 on substrate 11.

[0098] See Figure 8h The pixel definition material layer 130 is patterned a third time to form a third pixel opening H3_R. The orthographic projection of the third pixel opening H3_R on the substrate 11 is within the orthographic projection range of the third isolation opening H4_R on the substrate 11. The third pixel opening H3_R exposes at least a portion of the first electrode 121_R of the third sub-pixel.

[0099] See step S750 again. Figure 8i A third light-emitting layer 122_R and a second electrode 123_R for the third sub-pixel are fabricated within the third isolation opening H4_R to form a third sub-pixel. For example, the third sub-pixel includes a red sub-pixel R.

[0100] For example, after step S750, the method further includes: preparing a third encapsulation portion 151_R on the side of the third sub-pixel second electrode 123_R away from the substrate 11.

[0101] For example, the preparation method 700 further includes: sequentially preparing an organic encapsulation layer and an inorganic encapsulation layer on the side of the first encapsulation portion 151_B, the third encapsulation portion 151_G, and the third encapsulation portion 151_R away from the substrate 11.

[0102] In another embodiment, the sub-pixels formed in the same loop are of different colors in all previous loops except the last loop. For example, in the first loop, i.e., the first execution of steps S740 and S750, blue sub-pixel B and green sub-pixel G are formed; in the second loop, i.e., the second execution of steps S740 and S750, red sub-pixel R is formed.

[0103] Specifically, Figures 9a-9d Execution provided for the second embodiment of this application Figure 7 A schematic diagram of the intermediate product obtained during the preparation method shown. The preparation process and... (This embodiment provides...) Figures 8a-8i The preparation process shown is identical for steps S710-S730, with the difference lying in steps S740 and S750. Therefore, the execution process of steps S710-S730 will not be described again.

[0104] According to step S740, refer to Figure 9a The isolation material layer 140 is first patterned to form the first isolation opening H4_B and the second isolation opening H4_G.

[0105] The pixel definition material layer 130 is first patterned to form a first pixel opening H3_B and a second pixel opening H3_G. The first pixel opening H3_B corresponds to a first isolation opening H4_B, and the first pixel opening H3_B exposes at least a portion of the first electrode 121_B of the first sub-pixel. The second pixel opening H3_G exposes at least a portion of the first electrode 121_G of the second sub-pixel.

[0106] According to step S750, refer to Figure 9bA first light-emitting layer 122_B and a second electrode 123_B for the first sub-pixel are formed within the first isolation opening H4_B. For example, the first sub-pixel is a blue sub-pixel B. For example, the fabrication method 700 further includes: forming a first encapsulation portion 151_B on the side of the second electrode 123_B facing away from the substrate 11.

[0107] A second light-emitting layer 122_G and a second electrode 123_G for the second sub-pixel are fabricated within the second isolation opening H4_G to form a second sub-pixel. For example, the second sub-pixel is a green sub-pixel G.

[0108] See again step S740. Figure 9c The isolation material layer 140 is patterned a second time to form a third isolation opening H4_R and a light-transmitting hole H2. The orthogonal projection of hole H1 on substrate 11 is within the orthogonal projection range of light-transmitting hole H2 on substrate 11.

[0109] Continue reading Figure 9c The pixel definition material layer 130 is patterned a second time to form a third isolation opening H4_R and a third pixel opening H3_R. The orthographic projection of the third pixel opening H3_R onto the substrate 11 is within the orthographic projection range of the third isolation opening H4_R onto the substrate 11. The third pixel opening H3_R exposes at least a portion of the first electrode 121_R of the third sub-pixel.

[0110] See step S750 again. Figure 9d A third light-emitting layer 122_R and a second electrode 123_R for the third sub-pixel are fabricated within the third isolation opening H4_R to form a third sub-pixel. For example, the third sub-pixel includes a red sub-pixel R.

[0111] For example, after step S750, the method further includes: preparing a third encapsulation portion 151_R on the side of the third sub-pixel second electrode 123_R away from the substrate 11.

[0112] For example, the preparation method 700 further includes: sequentially preparing an organic encapsulation layer and an inorganic encapsulation layer on the side of the first encapsulation portion 151_B, the third encapsulation portion 151_G, and the third encapsulation portion 151_R away from the substrate 11.

[0113] According to the preparation method provided in this embodiment, two types of isolation openings are formed during the first cycle, namely, a first isolation opening and a second isolation opening. Compared to forming only one isolation opening per cycle, this reduces process steps and improves production efficiency.

[0114] A third aspect of this application provides a display device. Figure 10 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. Figure 10As shown, the display device 100 includes a display panel provided in any of the above embodiments, or a display panel obtained according to the preparation method provided in any of the above embodiments.

[0115] Display device 100 is a product with image display capabilities. For example, display device 100 can be used to display static images, such as pictures or photographs. Display device 100 can also be used to display moving images, such as videos.

[0116] Display device 100 may be a laptop computer, mobile phone, handheld or portable computer, camera, camcorder, in-vehicle smart central control screen, calculator, smartwatch, GPS navigator, electronic photo, electronic billboard or sign, projector, etc.

[0117] In addition, the display device 100 can also perform functions such as taking photos, recording videos, fingerprint recognition, and facial recognition. Accordingly, the display device 100 also includes at least one functional module for implementing the above functions, such as an under-display camera or an under-display fingerprint recognition sensor.

[0118] The basic principles of this application have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this application are merely examples and not limitations, and should not be considered as essential features of each embodiment of this application. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the application to the necessity of employing the aforementioned specific details for implementation.

[0119] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this application to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.

Claims

1. A display panel, characterized in that, include: Substrate, including vias; A first electrode is located on one side of the substrate, and a portion of the first electrode is located within the via. A pixel definition layer is located on the side of the first electrode away from the substrate, and a portion of the pixel definition layer is located within the via. The orthogonal projection of the pixel definition layer on the substrate at least partially covers the first electrode within the via. as well as An isolation structure layer is located on the side of the pixel definition layer opposite to the substrate. The isolation structure layer has a light-transmitting hole, and the orthogonal projection of the via on the substrate is within the orthogonal projection range of the light-transmitting hole on the substrate.

2. The display panel according to claim 1, characterized in that, The orthogonal projection of the first electrode on the substrate covers the orthogonal projection of the via on the substrate; Preferably, the first electrode includes a plurality of conductive layers stacked sequentially in a direction away from the substrate, wherein the orthographic projection of each conductive layer on the substrate covers the orthographic projection of the via on the substrate. Preferably, the plurality of conductive layers include a first titanium layer, an aluminum layer, and a second titanium layer stacked sequentially.

3. The display panel according to claim 1, characterized in that, The first thickness of the portion of the pixel definition layer that overlaps with the sidewall of the via is less than the second thickness of the portion that overlaps with the bottom wall of the via. Preferably, the third thickness of the portion of the first electrode that overlaps with the sidewall of the via is less than the fourth thickness of the portion that overlaps with the bottom wall of the via.

4. The display panel according to claim 1, characterized in that, The substrate includes a substrate, and a conductive layer and an insulating layer stacked sequentially on the substrate; the conductive layer includes a signal line, the via penetrates the insulating layer in the thickness direction of the substrate, the via exposes a portion of the signal line, and the signal line is in contact with the first electrode; Preferably, the signal line includes a power signal line.

5. The display panel according to claim 1, characterized in that, The orthographic projections of the different vias on the substrate are located within the orthographic projection range of the different light-transmitting holes on the substrate; or The orthogonal projections of the plurality of vias on the substrate are located within the orthogonal projection range of the same light-transmitting hole on the substrate.

6. The display panel according to claim 1, characterized in that, The pixel definition layer has a pixel opening, and the orthographic projection of the pixel opening on the substrate and the orthographic projection of the first electrode on the substrate at least partially overlap; The isolation structure layer is further provided with an isolation opening, and the orthographic projection of the pixel opening on the substrate is located within the orthographic projection range of the isolation opening on the substrate.

7. The display panel according to claim 6, characterized in that, It also includes a light-emitting layer and a second electrode located within the isolation opening, wherein the light-emitting layer and the second electrode are stacked sequentially on the side of the first electrode away from the substrate.

8. The display panel according to claim 7, characterized in that, It also includes a packaging section located on the side of the second electrode away from the substrate, wherein the orthogonal projection of the packaging section on the substrate covers the orthogonal projection of the isolation opening on the substrate; Preferably, the encapsulation portion and the isolation opening correspond one-to-one, and adjacent encapsulation portions are disconnected on the side of the isolation structure layer away from the substrate.

9. The display panel according to claim 8, characterized in that, It also includes an organic encapsulation layer located on the side of the encapsulation portion away from the substrate, wherein the orthogonal projection of the organic encapsulation layer on the substrate covers the orthogonal projections of the encapsulation portion, the isolation structure layer, and the light-transmitting hole on the substrate; Preferably, the display panel further includes an inorganic encapsulation layer located on the side of the organic encapsulation layer opposite to the substrate, wherein the orthographic projection of the inorganic encapsulation layer on the substrate covers the orthographic projection of the organic encapsulation layer on the substrate.

10. The display panel according to claim 1, characterized in that, The isolation structure layer includes a first part and a second part stacked together, the first part being located on the side of the second part closer to the substrate, and the orthographic projection of the first part on the substrate being within the orthographic projection range of the second part on the substrate; Preferably, the isolation structure further includes a third part located on the side of the first part near the substrate, wherein the orthographic projection of the first part on the substrate is within the orthographic projection range of the third part on the substrate.

11. A method for manufacturing a display panel, characterized in that, include: A plurality of first electrodes are fabricated on one side of a substrate, the substrate including a plurality of vias, and a portion of the first electrodes are located within the vias; A pixel definition material layer is prepared on the side of the first electrode opposite to the substrate; An isolation material layer is prepared on the side of the pixel definition material layer opposite to the substrate; as well as Repeat the following steps multiple times: The isolation material layer and the pixel definition material layer are patterned to form an isolation opening and a pixel opening, respectively, wherein the pixel opening exposes at least a portion of the first electrode; A light-emitting layer and a second electrode are fabricated within the isolation opening to form a sub-pixel; The pixel openings formed in different number of cycles expose different first electrodes; In the nth cycle, after the isolation material layer is patterned, light-transmitting holes are further formed, where n is greater than or equal to 2.

12. The preparation method according to claim 11, characterized in that, The orthographic projection of the pixel opening on the substrate is within the orthographic projection range of the isolation opening on the substrate; the orthographic projection of the via on the substrate is within the orthographic projection range of the light-transmitting hole on the substrate.

13. The preparation method according to claim 11, characterized in that, The nth iteration is the final iteration. In the final iteration, the process of patterning the isolation material layer and the pixel definition material layer to form isolation openings and pixel openings includes: The insulating material layer is patterned to form an insulating opening and a light-transmitting hole; The pixel definition material layer is patterned to form a pixel opening, which corresponds to the isolation opening, and the first pixel opening exposes at least a portion of the first electrode.

14. The preparation method according to claim 13, characterized in that, The sub-pixels formed in the same loop have the same color; Preferably, the first cycle forms a blue sub-pixel, the second cycle forms a green sub-pixel, and the third cycle forms a red sub-pixel.

15. The preparation method according to claim 14, characterized in that, The plurality of first electrodes include a first sub-pixel first electrode, a second sub-pixel first electrode, and a third sub-pixel first electrode; During the first loop, the process of patterning the isolation material layer and the pixel definition material layer to form isolation openings and pixel openings respectively includes: The insulating material layer is first patterned to form a first insulating opening; The pixel definition material layer is first patterned to form a first pixel opening, which corresponds to the first isolation opening and exposes at least a portion of the first electrode of the first sub-pixel. In the second loop, the process of patterning the isolation material layer and the pixel definition material layer to form isolation openings and pixel openings respectively includes: The insulating material layer is patterned a second time to form a second insulating opening; The pixel definition material layer is patterned a second time to form a second pixel opening, which corresponds to the second isolation opening. The second pixel opening exposes at least a portion of the first electrode of the second sub-pixel. In the third cycle, the step of patterning the isolation material layer and the pixel definition material layer to form isolation openings and pixel openings respectively includes: The insulating material layer is patterned a third time to form a third insulating opening; The pixel definition material layer is patterned a third time to form a third pixel opening and the light-transmitting hole; the third pixel opening corresponds to the third isolation opening, and the third pixel opening exposes at least a portion of the first electrode of the third sub-pixel.

16. The preparation method according to claim 13, characterized in that, In all previous iterations except the last iteration, multiple color sub-pixels are formed in the same iteration. Preferably, the number of cycles is two; The first cycle forms blue and green sub-pixels, and the second cycle forms red sub-pixels.

17. The preparation method according to claim 16, characterized in that, The plurality of first electrodes include a first sub-pixel first electrode, a second sub-pixel first electrode, and a third sub-pixel first electrode; During the first loop, the process of patterning the isolation material layer and the pixel definition material layer to form isolation openings and pixel openings respectively includes: The insulating material layer is first patterned to form a first insulating opening and a second insulating opening; The pixel definition material layer is first patterned to form a first pixel opening and a second pixel opening. The first pixel opening corresponds to the first isolation opening, and the first pixel opening exposes at least a portion of the first electrode of the first sub-pixel. The second pixel opening corresponds to the second isolation opening, and the second pixel opening exposes at least a portion of the first electrode of the second sub-pixel. In the second loop, the process of patterning the isolation material layer and the pixel definition material layer to form isolation openings and pixel openings respectively includes: The insulating material layer is patterned a second time to form a third insulating opening and the light-transmitting hole; The pixel definition material layer is patterned a second time to form a third pixel opening, which corresponds to the third isolation opening and exposes at least a portion of the first electrode of the third sub-pixel.

18. The preparation method according to any one of claims 11-17, characterized in that, The sub-pixels formed in different iterations of the loop have different colors; Preferably, the sub-pixels formed in the last loop have the same color.

19. The preparation method according to any one of claims 11-17, characterized in that, In each cycle, after fabricating a light-emitting layer and a second electrode within the isolation opening to form a sub-pixel, the fabrication method further includes: An encapsulation portion is prepared on the side of the second electrode opposite to the substrate; Preferably, after completing the cyclic steps, the preparation method further includes: An organic encapsulation layer and an inorganic encapsulation layer are sequentially prepared on the side of the encapsulation portion away from the substrate.

20. A display device, characterized in that, The display panel includes any one of claims 1-10, or a display panel obtained by any of the preparation methods described in claims 11-19.

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