Display device

Abstract

A display device includes: a substrate having a plurality of pixels, the pixels having a plurality of sub-pixels; a light emitting element layer disposed on the substrate and included in each of the plurality of sub-pixels; a color filter layer between the light emitting element layer and the substrate; a first layer between the color filter layer and the substrate; and a second layer covering at least a portion of the first layer between the first layer and the color filter layer wherein the first layer is a transparent layer and the second layer is an opaque layer.

Description

Technical Field

[0001] This disclosure relates to a display device for displaying images. Background Technology

[0002] Organic light-emitting displays (OLEDs) have attracted attention as the next generation of flat panel displays because they have high response speed, low power consumption, and, unlike liquid crystal displays, emit light themselves without the need for a separate light source.

[0003] This display device displays images by emitting light through a light-emitting element layer, which includes a light-emitting layer interposed between a pixel electrode and a counter electrode.

[0004] The descriptions provided in the Background section should not be assumed to be prior art simply because they are mentioned in or associated with the Background section. The Background section may include information describing one or more aspects of the subject matter. Summary of the Invention

[0005] As an example, the display device additionally places a transparent electrode below the pixel electrode in the opening to reduce the area of ​​the circuit region, and uses the pixel electrode and the transparent electrode as capacitors. Therefore, the display device is equipped with a structure in which the transparent electrode, color filter, pixel electrode, and counter electrode are sequentially laminated on a substrate. However, the problem with this display device is that, due to the color filter and transparent electrode located below the counter electrode, the reflectivity of external light reflected by the counter electrode is high, thus reducing the visibility of the image.

[0006] An exemplary aspect of this disclosure aims to provide a display device having reduced external light reflectivity.

[0007] Furthermore, one exemplary aspect of this disclosure aims to provide a display device with improved image visibility.

[0008] Furthermore, one exemplary aspect of this disclosure is intended to provide a display device in which power consumption can be reduced by decreasing external light reflectivity.

[0009] The problems to be solved by the examples in this disclosure are not limited to those described above, and other problems not mentioned below will be apparent to those skilled in the art to which the spirit of this disclosure pertains.

[0010] A display device includes: a substrate having a plurality of pixels, the pixels having a plurality of sub-pixels; a light-emitting element layer disposed on the substrate and included in each of the plurality of sub-pixels; a color filter layer located between the light-emitting element layer and the substrate; a first layer located between the color filter layer and the substrate; and a second layer covering at least a portion of the first layer between the first layer and the color filter layer, wherein the first layer is a transparent layer and the second layer is an opaque layer.

[0011] It should be understood that the above general description and the following detailed description are exemplary and illustrative, and are intended to provide further explanation of the claimed inventive concept. Attached Figure Description

[0012] The accompanying drawings are included to provide a further understanding of this disclosure, and are incorporated in and constitute a part of this application. The drawings illustrate embodiments of the disclosure and, together with the description, serve to explain the principles of the disclosure. In the drawings:

[0013] Figure 1 This is a schematic plan view of a display device according to an exemplary embodiment of the present disclosure.

[0014] Figure 2 yes Figure 1 A schematic planar view of a single pixel is shown.

[0015] Figure 3 yes Figure 2 A schematic cross-sectional view of line I-I' shown.

[0016] Figure 4 This is a schematic cross-sectional view of a display device according to a second exemplary embodiment of the present disclosure.

[0017] Figure 5 This is a schematic cross-sectional view of a display device according to a third exemplary embodiment of the present disclosure.

[0018] Figure 6 This is a plan view illustrating an example of a second layer arranged in the light-emitting area of ​​a display device according to an exemplary embodiment of the present disclosure.

[0019] Figure 7 This is a plan view illustrating a second example of a second layer arranged in the light-emitting area of ​​a display device according to an exemplary embodiment of the present disclosure.

[0020] Figure 8 This is a plan view illustrating a third example of a second layer arranged in the light-emitting area of ​​a display device according to an exemplary embodiment of the present disclosure.

[0021] Figure 9 This is a plan view illustrating a fourth example of a second layer arranged in the light-emitting area of ​​a display device according to an exemplary embodiment of the present disclosure.

[0022] Throughout the accompanying drawings and detailed description, unless otherwise stated, the same reference numerals should be understood to refer to the same elements, features, and structures. For clarity, illustration, and convenience, the relative dimensions and depictions of these elements may be exaggerated. Detailed Implementation

[0023] Reference will now be made in detail to embodiments of this disclosure, examples of which are illustrated in the accompanying drawings. In the following description, detailed descriptions of well-known functions or configurations relevant to this document will be omitted where it is determined that such detailed descriptions unnecessarily obscure the essential points of the inventive concept. The progression of the described processing steps and / or operations is exemplary; however, the order of steps and / or operations is not limited to the order set forth herein and can be varied as is known in the art, except for steps and / or operations that must occur in a specific order. The names of the various elements used in the following description may be chosen solely for ease of writing and may therefore differ from the names used in actual products. Where possible, the same reference numerals will be used throughout the drawings to refer to the same or similar parts. The advantages and features of this disclosure and its implementation methods will be elucidated by the following embodiments described with reference to the accompanying drawings.

[0024] The advantages and features of this disclosure and its implementation methods will be illustrated by the following exemplary embodiments described with reference to the accompanying drawings. However, this disclosure may be implemented in various forms and should not be construed as limiting it to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art. Furthermore, this disclosure is limited only by the scope of the claims.

[0025] The shapes (e.g., dimensions, lengths, widths, heights, thicknesses, positions, radii, diameters, and areas), ratios, angles, and quantities disclosed in the drawings used to describe embodiments of this disclosure are merely examples, and therefore, this disclosure is not limited to the details shown. The same reference numerals denote the same elements throughout the specification. In the following description, detailed descriptions that would unnecessarily obscure the focus of this disclosure will be omitted where such descriptions would establish relevant known functions or configurations.

[0026] Any implementation described as an "example" in this document is not necessarily to be interpreted as preferred or advantageous over other implementations.

[0027] When using “comprising,” “having,” and “including” as described in this disclosure, an additional part may be added unless “only…” is used. Unless otherwise indicated, singular terms may include plural forms.

[0028] When interpreting components, even without an explicit description, the components are interpreted as including a tolerance range.

[0029] When describing positional relationships, for example, when the positional relationship between two parts is described as "on," "above," "below," and "next to," one or more additional parts may be placed between the two parts unless "exactly" or "directly" is used.

[0030] When describing temporal relationships, such as when time sequence is described as “after,” “following,” “next,” and “before,” unless “exactly” or “directly” is used, discontinuous cases may be included.

[0031] Terms such as “below,” “lower,” “above,” and “upper” may be used here to describe the relationships between elements as shown in the accompanying drawings. It should be understood that these terms are spatially relative and based on the orientation depicted in the drawings.

[0032] It should be understood that although the terms “first,” “second,” “A,” “B,” “(a),” “(b),” etc. may be used in this document to describe various elements, these elements should not be limited by these terms.

[0033] These terms are used only to distinguish one element from another. For example, without departing from the scope of this disclosure, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0034] The “X-axis direction,” “Y-axis direction,” and “Z-axis direction” should not be interpreted solely by their geometric relationship of being perpendicular to each other, and can have a wider range of orientations within the scope of the elements of this disclosure that can function functionally.

[0035] The term "at least one" should be understood to include any and all combinations of one or more of the related listed items. For example, "at least one of the first, second, and third items" means a combination of all items derived from two or more of the first, second, and third items, as well as the first, second, or third item.

[0036] Features of the various embodiments of this disclosure may be linked or combined with each other in part or in whole, and may interoperate with each other and be technically driven in various ways, as will be fully understood by those skilled in the art. Embodiments of this disclosure may be performed independently of each other, or may be performed together in an interdependent relationship.

[0037] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which the exemplary embodiments pertain. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent, for example, with their meaning in the context of the relevant field, and should not be interpreted in an idealized or overly formal sense unless explicitly defined herein. For example, as one of ordinary skill in the art will understand, the terms “part” or “unit” can be applied to, for example, separate circuits or structures, integrated circuits, computational blocks of circuit devices, or any structure configured to perform the described functions.

[0038] In the following, preferred embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0039] Figure 1 This is a schematic plan view of a display device according to an exemplary embodiment of the present disclosure. Figure 2 yes Figure 1 The diagram shown is a schematic plan view of one pixel. Figure 3 yes Figure 2 A schematic cross-sectional view of line I-I' shown.

[0040] In the following text, the first direction (Y-axis direction) refers to the direction parallel to the data line DL, the second direction (X-axis direction) refers to the direction parallel to the gate line GL, and the third direction (Z-axis direction) refers to the thickness direction of the display device 100.

[0041] The following description is based on the premise that the display device 100 according to an exemplary embodiment of the present disclosure is an organic light-emitting display device, but is not limited thereto. As an example, the display device according to an exemplary embodiment of the present disclosure may be implemented as any one of a liquid crystal display device, a field emission display device, a quantum dot light-emitting diode device, an electrophoretic display device, and an organic light-emitting display device, but is not limited thereto.

[0042] Reference Figure 1 A display device 100 according to an exemplary embodiment of the present disclosure may include a display panel having a gating driver GD. The display panel may include a substrate 110 bonded to each other and an opposing substrate 200. Figure 3 (As shown in the diagram). According to one example, a substrate 110 may include multiple pixels P, each having multiple sub-pixels SP. (As shown in the diagram). Figure 3 As shown, a display device 100 according to an exemplary embodiment of the present disclosure may further include a light-emitting element layer 120, a color filter layer 130, a first layer 140, and a second layer 150 disposed on a substrate 110. According to one example, the first layer 140 may be a transparent layer (or a transparent film). According to one example, the second layer 150 may be an opaque layer (or an opaque film). The display device 100 according to an exemplary embodiment of the present disclosure can have a reduced external light reflectivity by disposing the second layer 150 on the first layer 140 to cover at least a portion of the first layer 140. A specific description of the display device 100 according to an exemplary embodiment of the present disclosure will be provided after describing its overall structure.

[0043] Reference Figure 1 A display device 100 according to an exemplary embodiment of this disclosure may further include a source driver integrated circuit (hereinafter referred to as "IC") 160, a flexible film 170, a circuit board 180, and a timing controller 190. The embodiment is not limited thereto. As an example, one or more of the above-described components may be omitted, and / or one or more additional components may be further included.

[0044] Substrate 110 may include thin-film transistors and may be a transistor array substrate, a lower substrate, a base substrate, or a first substrate. Substrate 110 may be a transparent glass substrate or a transparent plastic substrate. The embodiments are not limited thereto. As an example, substrate 110 may be an opaque substrate. As an example, substrate 110 may be a flexible substrate or a rigid substrate. As an example, substrate 110 may include glass, plastic, metal foil, inorganic non-metallic materials, or flexible polymer films including polyethylene terephthalate (PET), polycarbonate (PC), etc.

[0045] The opposing substrate 200 can be bonded to the substrate 110 by an adhesive member. For example, the opposing substrate 200 may have a smaller size than the substrate 110 and may be bonded to the remaining portion of the substrate 110 except for the pad portion, but is not limited thereto. The opposing substrate 200 may be an upper substrate, a second substrate, or a package substrate.

[0046] The gating driver GD provides a gating signal to the gating line according to the gating control signal input from the timing controller 190. When the source driver IC 160 is manufactured as a driver chip, the source driver IC 160 can be packaged in a flexible film 170 using a chip-on-film (COF) method or a chip-on-plastic (COP) method.

[0047] Pads, such as power pads and data pads, can be formed in the non-display areas of the display panel. The flexible film 170 may include lines connecting the pads to the source driver IC 160 and lines connecting the pads to the circuit board 180. The flexible film 170 can be attached to the pads using an anisotropic conductive film, whereby the pads can be connected to the lines of the flexible film 170, but is not limited to this.

[0048] Reference Figure 1 According to one example, the first substrate 110 may include a display area DA and a non-display area NDA. As an example, the non-display area NDA may extend from the display area DA. As an example, the non-display area NDA may completely or partially surround the display area DA. As an example, the non-display area NDA may be at least partially invisible from the front side of the substrate 110 by bending toward the rear side of the substrate 110, but is not limited thereto.

[0049] The display area DA is the area where an image is displayed, and it can be a pixel array area, an effective area, a pixel array unit, a display unit, or a screen. For example, the display area DA can be located in the center of the display panel, or it can be located off-center from the display panel.

[0050] A display area DA, as shown in an example, may include gating lines, data lines, pixel power lines, and multiple pixels P. Each of the multiple pixels P may include multiple sub-pixels SP, which can be defined by the gating lines and data lines. Each of the multiple sub-pixels SP can be defined as the smallest unit region in which light is actually emitted.

[0051] According to one example, at least four sub-pixels of a plurality of sub-pixels SP that are configured to emit light of different colors and are configured to be adjacent to each other constitute a unit pixel P. A unit pixel may include, but is not limited to, red sub-pixels, green sub-pixels, blue sub-pixels, and white sub-pixels. According to another example, three sub-pixels SP of a plurality of sub-pixels SP that are configured to emit light of different colors and are configured to be adjacent to each other constitute a unit pixel. A unit pixel may include at least one red sub-pixel, at least one green sub-pixel, and at least one blue sub-pixel, but is not limited thereto. The implementation is not limited thereto. As an example, a unit pixel may include two or more sub-pixels. As an example, two or more sub-pixels included in a unit pixel may emit light of different colors, or at least two of the sub-pixels included in a unit pixel may emit light of the same color, but is not limited thereto. As an example, sub-pixels that emit light of colors other than red, green, blue, and white may be optionally or additionally included.

[0052] Each of the plurality of sub-pixels SP may include a thin-film transistor and a light-emitting element connected to the thin-film transistor. The sub-pixel may include a light-emitting layer (or an organic light-emitting layer) interposed between a first electrode and a second electrode.

[0053] The organic light-emitting layers disposed in each of the multiple sub-pixels SP can individually emit light of different colors, or they can collectively emit white light. According to one example, when the organic light-emitting layers of each of the multiple sub-pixels SP collectively emit white light, each of the red, green, and blue sub-pixels may include a color filter (or wavelength conversion component) for converting white light into different colors. In this case, the white sub-pixel, according to one example, may not include a color filter, but is not limited thereto. According to one example, the color filter layer 130 may include a green color filter 131 (e.g., ...). Figure 3 (as shown), red filter 132 (as shown) Figure 3 (As shown) and a blue filter. As an example, other color filters may be optionally or additionally included.

[0054] In a display device 100 according to an exemplary embodiment of the present disclosure, the area provided with a red color filter 132 may be a red sub-pixel SP1, the area provided with a blue color filter may be a blue sub-pixel SP3, the area provided with a green color filter 131 may be a green sub-pixel SP4, and the area without a color filter may be a white sub-pixel SP2. In this disclosure, the red sub-pixel SP1 may be represented as a first sub-pixel configured to emit red light, the blue sub-pixel SP3 may be represented as a third sub-pixel configured to emit blue light, the green sub-pixel SP4 may be represented as a fourth sub-pixel configured to emit green light, and the white sub-pixel SP2 may be represented as a second sub-pixel configured to emit white light.

[0055] When a gating signal is input from the gating line using a thin-film transistor, each of the plurality of sub-pixels SP provides a predetermined current to the organic light-emitting element according to the data voltage of the data line. Therefore, the light-emitting layer of each sub-pixel can emit light at a predetermined brightness according to the predetermined current.

[0056] like Figure 2 As shown, the display area DA includes a light-emitting area EA and a non-light-emitting area NEA. The light-emitting area EA is the light-emitting element layer 120 within it. Figure 3 (As shown) The light-emitting region NEA is the area in which light is emitted. The non-light-emitting region NEA is the area in which light is not emitted. For example, the non-light-emitting region NEA can be the area other than the light-emitting region EA that emits light. In one example, the non-light-emitting region NEA can be disposed on the substrate 110 between multiple sub-pixels SP. The circuit region CA for emitting light from the light-emitting element layer 120 can be placed in the non-light-emitting region NEA. Figure 2As shown, according to one example, the circuit region CA can be placed below the light-emitting region EA. The implementation is not limited to this. As an example, the circuit region CA may not overlap with the light-emitting region EA, or it may at least partially overlap with the light-emitting region EA. As an example, the circuit region CA may be placed on at least one of the above, below, left, and right sides of the light-emitting region EA, but is not limited to this.

[0057] In the non-light-emitting region NEA, multiple pixels P and multiple lines for driving each of the multiple pixels P can be set. According to one example, the multiple lines may include multiple first signal lines and multiple second signal lines.

[0058] Multiple first signal lines may extend in a second direction (X-axis direction). Each of the multiple first signal lines may include at least one gating line (or scan line).

[0059] In the following text, when a first signal line comprises multiple lines, a first signal line may refer to a group of signal lines consisting of multiple lines. For example, when a first signal line comprises two scan lines, a first signal line may refer to a group of signal lines consisting of two scan lines.

[0060] Multiple second signal lines may extend along a first direction (Y-axis direction). These multiple second signal lines may intersect with multiple first signal lines. Each of the multiple second signal lines may include a pixel power line EVDD and a common power line EVSS spaced apart from the pixel power line EVDD. In an exemplary embodiment, the multiple second signal lines may further include multiple data lines DL and a reference line RL. The multiple data lines DL may include a first data line DL1 for driving a first sub-pixel SP1, a second data line DL2 for driving a second sub-pixel SP2, a third data line DL3 for driving a third sub-pixel SP3, and a fourth data line DL4 for driving a fourth sub-pixel SP4.

[0061] In the following text, when a second signal line comprises multiple lines, a second signal line may refer to a group of signal lines consisting of multiple lines. For example, when a second signal line comprises four data lines, a pixel power line, a common power line, and a reference line, a second signal line may refer to a group of signal lines consisting of the four data lines, pixel power lines, common power lines, and reference lines.

[0062] Return to reference Figure 1 The non-display area NDA is the region on which no image is displayed, and can be a peripheral circuit area, a signal providing area, an inactive area, or a border area. The non-display area NDA can be configured to be near the display area DA. As an example, the non-display area NDA can be set to surround the display area DA.

[0063] A display device 100 according to an exemplary embodiment of the present disclosure may include a pad portion PA disposed in a non-display area NDA. The pad portion PA can be used to drive a plurality of pixels P. For example, the pad portion PA can provide power and / or signals to a plurality of pixels P disposed in the display area DA to output an image. According to one example, based on Figure 1 The pad portion PA can be placed in the non-display area NDA above the display area DA. The implementation is not limited to this. As an example, the pad portion PA can be placed in the non-display area NDA on either side of the display area DA, but is not limited to this.

[0064] The gating driver GD provides gating signals to the gating lines based on the gating control signal input from the timing controller 190. The gating driver GD can, as follows: Figure 1 The shown method involves forming a gate driver (GIP) on one side of the display area DA of the display panel, or on a non-display area NDA outside the two sides of the display area DA. Alternatively, the gate driver GD can be manufactured as a driver chip, encapsulated in a flexible film, and attached to the non-display area NDA (or a first non-display area) outside one or both sides of the display area DA of the display panel via a tape auto-bonding (TAB) method. The implementation is not limited to this. As an example, the gate driver GD can be disposed separately in a separate panel and connected to the non-display area NDA (e.g., the pad portion PA) via, for example, a chip-on-glass (COG) method, a chip-on-panel (COP) method, or a chip-on-film (COF) method, but is not limited thereto.

[0065] Multiple gating drivers GD can be separately positioned to the left of the display area DA (i.e., the second non-display area) and to the right of the display area DA (i.e., the third non-display area). According to one example, the multiple gating drivers GD can be connected to multiple pixels P and multiple first signal lines for providing signals to the multiple pixels P. The multiple first signal lines may include at least one signal line for providing signals to drive the pixels P.

[0066] Multiple second signal lines may extend in a first direction (Y-axis direction). These multiple second signal lines may intersect with multiple first signal lines. The multiple second signal lines may include a pixel power line EVDD and at least one data line to provide data voltage to pixel P. Each of the multiple second signal lines may be connected to at least one of a plurality of pads, a pixel power shorting bar, or a common power shorting bar. The pixel power shorting bar and the common power shorting bar may be located in a fourth non-display area based on the display area DA facing the pad portion PA, but are not limited thereto.

[0067] A pixel is configured to overlap with at least one of a first signal line or a second signal line and emits predetermined light to display an image. The light-emitting area EA may correspond to the area in pixel P that emits light.

[0068] Reference Figure 2 The non-emitting area (NEA) can refer to the area set in the display area (DA) that does not emit light, and because this area does not emit light, it can be represented as a dead zone. According to one example, a dead zone can be an area in which a black matrix and / or a dam are set, but is not limited to this, and can refer to an area in which no light is emitted.

[0069] The non-light-emitting area (NEA) can have multiple lines; for example, a first signal line and a second signal line can be provided. According to one example, the first signal line may include a gating line GL and a sensing line SL extending along a second direction (X-axis direction). According to one example, the second signal line may include a pixel power line EVDD, a common power line EVSS, a reference line RL, and multiple data lines DL extending along a first direction (Y-axis direction).

[0070] Reference Figure 2 Multiple sub-pixels SP can include a first sub-pixel SP1, a second sub-pixel SP2, a third sub-pixel SP3, and a fourth sub-pixel SP4 that are sequentially adjacent to each other in the second direction (X-axis direction). However, it is not limited to this, and the arrangement structure of the multiple sub-pixels SP can vary depending on the circuit design. For example, the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 can be arranged in a square shape. The following will describe... Figure 2 The example shown is an example in which each of the first to fourth sub-pixels SP1, SP2, SP3, SP4 is arranged in a row in the second direction (X-axis direction).

[0071] Reference Figure 3 A display device 100 according to an exemplary embodiment of the present disclosure may include a light-emitting element layer 120, a color filter layer 130, a first layer 140, and a second layer 150.

[0072] A light-emitting element layer 120 is disposed on a substrate 110 and may be included in each of a plurality of sub-pixels SP. According to one example, the light-emitting element layer 120 has a light-emitting configuration and may include a pixel electrode 121, an organic light-emitting layer 122, and a counter electrode 123. The light-emitting element layer 120 may be disposed between the substrate 110 and a opposing substrate 200.

[0073] A color filter layer 130 may be placed between the light-emitting element layer 120 and the substrate 110. According to one example, the color filter layer 130 is used to convert white light emitted from the light-emitting element layer 120 into light of different colors. The color filter layer 130 may include a first color filter 131 disposed in the green sub-pixel SP4, a second color filter 132 disposed in the red sub-pixel SP1, and a third color filter disposed in the blue sub-pixel SP3.

[0074] The first layer 140 may be disposed between the color filter layer 130 and the substrate 110. According to one example, the first layer 140 may be configured to overlap with the light-emitting region EA portion included in each of the plurality of sub-pixels SP. The first layer 140 may be a transparent layer. For example, the first layer 140 may include, but is not limited to, a conductive material such as IGZO, ITO, FTO, AZO, etc.

[0075] A second layer 150 may be disposed between the first layer 140 and the color filter layer 130. The second layer 150 may be configured to cover at least a portion of the first layer 140. For example, the second layer 150 may extend from one end of the first layer 140 to the other end to cover at least a portion of the upper surface of the first layer 140. The second layer 150 may be an opaque layer. For example, the second layer 150 may include, but is not limited to, conductive materials such as MoTi and / or WOx. As an example, the second layer 150 may be configured to overlap with at least a portion of the first layer 140. As an example, the second layer 150 may be in contact with the first layer 140. As an example, the second layer 150 may also overlap with the luminescent region EA.

[0076] In a display device 100 according to an exemplary embodiment of the present disclosure, a first layer 140 may be disposed below the light-emitting element layer 120 (or pixel electrode 121) to form a capacitor with the pixel electrode 121. Therefore, in the display device 100 according to an exemplary embodiment of the present disclosure, by using the pixel electrode 121 and the first layer 140 as capacitors (or first capacitor CT1), the size (or area) of the circuit region can be reduced, thereby relatively increasing the size (or area) of the light-emitting region EA, and thus improving the light efficiency.

[0077] Meanwhile, in the case of a typical display device, external light incident on the substrate can be reflected by the opposing electrode and re-emitted to the substrate through the color filter. In this case, since a typical display device only has a transparent layer placed below the pixel electrode, the problem is that the reflectivity of the external light reflected by the opposing electrode increases due to the color filter and the transparent layer, thereby reducing the visibility of the image.

[0078] In contrast, a display device 100 according to an exemplary embodiment of the present disclosure is provided with an opaque second layer 150 covering at least a portion of the first layer 140 beneath the light-emitting element layer 120 (or pixel electrode 121), thereby blocking some of the external light EL incident on the substrate 110 and reducing the reflectivity of the external light reflected on the opposing electrode. Therefore, the display device 100 according to an exemplary embodiment of the present disclosure can improve image visibility by reducing the reflectivity of external light. As an example, the display device 100 according to an exemplary embodiment of the present disclosure can be implemented as a low-reflection display device.

[0079] For example, such as Figure 3 As shown, the external light EL incident on the substrate 110 can be divided into blocking light EL1 and emitting light EL2. Blocking light EL1 can refer to light that is blocked by the second layer 150 after being reflected by the opposing electrode 123 and is not emitted to the substrate 110. Emitting light EL2 can refer to light that is incident on the substrate 110, reflected by the opposing electrode 123, and then emitted back to the substrate 110. Therefore, the display device 100 according to an exemplary embodiment of the present disclosure is configured such that the second layer 150 (or opaque layer) is partially disposed on the first layer 140 (or transparent layer), so that the first layer 140 and the pixel electrode 121 can be used as capacitors (or first capacitor CT1), while also reducing the reflectivity of external light.

[0080] Furthermore, since the display device 100 according to an exemplary embodiment of the present disclosure may have a reduced external light reflectivity due to the second layer 150 (or opaque layer), it may have the same luminous efficiency as a display device without the second layer 150 (or opaque layer), or it may have improved luminous efficiency even at lower power, thereby reducing overall power consumption.

[0081] Meanwhile, in a display device 100 according to an exemplary embodiment of the present disclosure, the first layer 140 may include a first region A1 and a second region A2.

[0082] The first region A1 can be the area of ​​the first layer 140 covered by the second layer 150. The second region A2 can be the area of ​​the first layer 140 other than the first region A1. As described above, the second layer 150 is an opaque layer, and therefore can be an area through which light cannot pass. Therefore, the first region A1 can be a light-blocking region. In contrast, the first layer 140 is a transparent layer, and therefore can be an area through which light can pass. Therefore, the second region A2 can be a light-transmitting region.

[0083] like Figure 3As shown, the size (or area) of the first layer 140 can be set to have a size (or area) overlapping with the light-emitting region EA. Therefore, the first layer 140 can have a finite size (or area). Thus, in a display device 100 according to an exemplary embodiment of the present disclosure, the area (or size) of the first region A1 covered by the second layer 150 can be set to be inversely proportional to the area (or size) of the second region A2.

[0084] For example, as the area (or size) of the first region A1 increases, the area (or size) of the second region A2 can decrease. Conversely, as the area (or size) of the first region A1 decreases, the area (or size) of the second region A2 can increase. As the area (or size) of the first region A1 increases, the area (or size) of the light-blocking region increases, thereby increasing or maximizing the reduction in external light reflectivity. Therefore, in this case, since the display device 100 according to an exemplary embodiment of the present disclosure can increase or maximize the reduction in external light reflectivity, the polarizing plate can be omitted, thereby reducing manufacturing costs. Furthermore, since the display device 100 according to an exemplary embodiment of the present disclosure can increase or maximize the reduction in external light reflectivity, the visibility of the image to the user can be increased or maximized.

[0085] On the other hand, if the area (or size) of the first region A1 is reduced, the area (or size) of the light-transmitting region becomes larger, thus potentially reducing the decrease in external light reflectivity. However, since the capacitance of the pixel electrode 121 and the first layer 140 can be increased, the area (or size) of the circuit region CA can be reduced. Therefore, in this case, the display device 100 according to an exemplary embodiment of the present disclosure can further increase the size of the light-emitting region EA by the same amount as the reduction in the area (or size) of the circuit region CA, thereby improving light efficiency. However, the present invention is not limited thereto, and the area (or size) of the first region A1 can be set to be the same as the area (or size) of the second region A2.

[0086] Reference Figure 3 In a display device 100 according to an exemplary embodiment of the present disclosure, the light-emitting element layer 120 may include a pixel electrode 121 on the color filter layer 130, an organic light-emitting layer 122 on the pixel electrode 121, and a counter electrode 123 on the organic light-emitting layer 122. As described above, the first layer 140 and the pixel electrode 121 may be a first capacitor CT1.

[0087] In a display device 100 according to an exemplary embodiment of the present disclosure, since the second layer 150 may include MoTi and / or WOx, the second layer 150 and the pixel electrode 121 may form different capacitances. For example, in a display device 100 according to an exemplary embodiment of the present disclosure, the second layer 150 and the pixel electrode 121 may be a second capacitor CT2.

[0088] As a result, Figure 3 As shown, a display device 100 according to an exemplary embodiment of the present disclosure is provided with a first capacitor CT1 and a second capacitor CT2 adjacent to the first capacitor CT1, so that each of a plurality of sub-pixels SP can be driven using two capacitors. Therefore, the display device 100 according to an exemplary embodiment of the present disclosure is equipped with two capacitors, thereby enabling effective control of external light reflectivity without changing the total capacitance.

[0089] like Figure 3 As shown, according to one example, the first layer 140 can be spaced apart from the pixel electrode 121 by a first distance D1. For example, the passivation layer 111b, the color filter layer 130 (or the first color filter 131), and the outer coating layer 112 can be disposed between the first layer 140 and the pixel electrode 121. Therefore, the first layer 140 can be spaced apart from the pixel electrode 121 by a first distance D1, and thus, the first layer 140 and the pixel electrode 121 can be provided with a first capacitor CT1 having a first capacitance Cst1.

[0090] According to one example, the second layer 150 may be spaced from the pixel electrode 121 by a second distance D2 shorter than the first distance D1. For example, a passivation layer 111b, a color filter layer 130 (or a first color filter 131), and an outer coating layer 112 may be disposed between the second layer 150 and the pixel electrode 121. However, since the second layer 150 is disposed on the upper surface of the first layer 140, the second layer 150 may be spaced from the pixel electrode 121 by a second distance D2 shorter than the first distance D1. As a result, the second layer 150 and the pixel electrode 121 may be provided with a second capacitor CT2 having a second capacitance Cst2. The implementation is not limited to this. As an example, the second layer 150 may not overlap with the first layer 140. As an example, the second layer 150 and the first layer 140 may be disposed on the same layer without overlapping each other. As an example, the second layer 150 may be in contact with the first layer 140 or may be spaced apart from the first layer 140. As an example, the second layer 150 and the first layer 140 may have the same thickness, such that the upper surface of the second layer 150 and the upper surface of the first layer 140 are disposed in the same plane, but are not limited thereto. As an example, the second layer 150 and the first layer 140 may have different thicknesses.

[0091] In the following text, reference will be made to Figure 3 Describe in detail the structure of each of the multiple sub-pixels SP.

[0092] Reference Figure 3 A display device 100 according to an exemplary embodiment of the present disclosure may include a buffer layer BL, a circuit element layer 111, a thin film transistor (not shown), an outer coating layer 112, a pixel electrode 121, a dam portion BK, an organic light-emitting layer 122, a counter electrode 123, a filling layer 113, a color filter layer 130, a first layer 140 and a second layer 150, but is not limited thereto.

[0093] More specifically, each of the sub-pixels SP according to an exemplary embodiment may include: a circuit element layer 111 disposed on the upper surface of a buffer layer BL, and including a gate insulating layer 111a (or an interlayer insulating layer) and a passivation layer 111b; an outer coating layer 112 disposed on the circuit element layer 111; a color filter layer 130 located between the outer coating layer 112 and the circuit element layer 111; a first layer 140 located between the color filter layer 130 and the circuit element layer 111; a second layer 150 located between the first layer 140 and the color filter layer 130; a pixel electrode 121 disposed on the outer coating layer 112; a dam BK covering one edge of the pixel electrode 121; an organic light-emitting layer 122 located on the pixel electrode 121 and the dam BK; a counter electrode 123 located on the organic light-emitting layer 122; a filling layer 113 located on the counter electrode 123; and a counter substrate 200 located on the filling layer 113. Embodiments are not limited thereto. As an example, at least one of the above components may be omitted, and / or one or more additional components may be included.

[0094] Thin-film transistors (not shown) for driving sub-pixels SP can be disposed on circuit element layer 111. Circuit element layer 111 can be referred to as an inorganic film layer. Buffer layer BL can be included in circuit element layer 111 together with gate insulating layer 111a (or interlayer insulating layer) and passivation layer 111b. Pixel electrode 121, organic light-emitting layer 122, and counter electrode 123 can be included in light-emitting element layer 120.

[0095] A buffer layer BL can be formed between the substrate 110 and the gate insulating layer 111a (or interlayer insulating layer) to protect the thin-film transistor. The buffer layer BL can be disposed on the entire surface (or front surface) of the substrate 110. Pixel power lines EVDD for pixel driving can be disposed between the buffer layer BL and the substrate 110. Reference lines RL can also be disposed between the buffer layer BL and the substrate 110. The reference lines RL can be disposed in the non-light-emitting region NEA that does not overlap with the light-emitting region EA. The buffer layer BL can be used to prevent material contained in the substrate 110 from diffusing into the transistor layer during the high-temperature processes of the thin-film transistor manufacturing process. Optionally, the buffer layer BL can be omitted in some cases.

[0096] The pixel power line EVDD can be positioned below the embankment BK and spaced apart from the thin-film transistor. According to one example, the pixel power line EVDD may include a first pixel power line EVDD1 and a second pixel power line EVDD2. For example... Figure 2 As shown, the first pixel power line EVDD1 can be a line extending relatively long in a first direction (Y-axis direction). The second pixel power line EVDD2 can be a line connected to a thin-film transistor. The second pixel power line EVDD2 can be disposed in a different layer from the first pixel power line EVDD1. For example, the first pixel power line EVDD1 can be placed between the substrate 110 and the buffer layer BL. And, the second pixel power line EVDD2 can be placed between the gate insulating layer 111a and the passivation layer 111b. Although not shown, the second pixel power line EVDD2 can be electrically connected to the first pixel power line EVDD1. As an example, the second pixel power line EVDD2 can overlap with the first pixel power line EVDD1, but is not limited thereto. Therefore, the second pixel power line EVDD2 can transmit (or apply) the driving voltage (or driving signal) applied through the first pixel power line EVDD1 to the thin-film transistor.

[0097] Meanwhile, in a display device 100 according to an exemplary embodiment of the present disclosure, the pixel power line EVDD can be arranged spaced apart from the first layer 140. As described above, since the first layer 140 and the pixel electrode 121 serve as the first capacitor CT1, if the first pixel power line EVDD1 is placed close to the first layer 140, the line load of the first pixel power line EVDD1 may increase. Furthermore, if the second pixel power line EVDD2 is placed close to the first layer 140, the driving voltage (or driving signal) applied to the thin-film transistor may interfere with the first capacitor, causing a driving failure of the light-emitting element layer 120. Therefore, in a display device 100 according to an exemplary embodiment of the present disclosure, the pixel power line EVDD is arranged spaced apart from the first layer 140 (or the second layer 150) to reduce or prevent an increase in the line load of the first pixel power line EVDD1 and to reduce or prevent failures in the driving voltage (or driving signal) applied to the thin-film transistor.

[0098] The thin-film transistor (or driving transistor) according to the example may include an active layer, a gate electrode, a source electrode, and a drain electrode.

[0099] The active layer may include a channel region, a drain region, and a source region formed in the thin-film transistor region of the circuit region of the sub-pixel SP. The drain region and the source region may be spaced apart from each other, and the channel region may be interposed between the drain region and the source region.

[0100] The active layer can be formed from any of the semiconductor materials based on amorphous silicon, polycrystalline silicon, oxides, and organic materials.

[0101] The gate insulating layer 111a can be formed on the channel region of the active layer. As an example, the gate insulating layer 111a can be formed in an island shape only on the channel region of the active layer, or it can be formed on the entire front surface of the substrate 110 including the active layer or the buffer layer BL.

[0102] The gate electrode can be formed on the gate insulating layer 111a to overlap with the channel region of the active layer.

[0103] The interlayer insulating layer can be formed to partially overlap with the drain and source regions of the gate electrode and the active layer. The interlayer insulating layer can be formed throughout the light-emitting region in which light is emitted to the sub-pixel SP. However, embodiments of this disclosure are not limited thereto; the interlayer insulating layer can be patterned and arranged in an island shape between the drain electrode and the drain region of the gate electrode and the active layer, and further, it can be patterned and arranged in an island shape between the source electrode and the source region of the gate electrode and the active layer.

[0104] The source electrode can be electrically connected to the source region of the active layer through source contact holes disposed in the interlayer insulating layer overlapping the source region of the active layer. The drain electrode can be electrically connected to the drain region of the active layer through drain contact holes disposed in the interlayer insulating layer overlapping the drain region of the active layer.

[0105] The drain and source electrodes can be made of the same metallic material. For example, like the gate electrode or different from it, each of the drain and source electrodes can be made of a single metal layer, a single alloy layer, or a multilayer of two or more layers.

[0106] Additionally, to reduce or prevent the threshold voltage of the thin-film transistors disposed in the pixel region from shifting due to light, the display panel or substrate 110 may also include a light-shielding layer disposed below the active layer of the thin-film transistors, including at least one of the driving thin-film transistors, a first switching thin-film transistor, or a second switching thin-film transistor, but is not limited thereto. The light-shielding layer may be disposed between the substrate 110 and the active layer to shield light incident on the active layer through the substrate 110, thereby reducing or minimizing changes in the transistor threshold voltage caused by external light. Furthermore, since the light-shielding layer is disposed between the substrate 110 and the active layer, the visibility of the thin-film transistors by the user can be reduced or prevented.

[0107] A passivation layer 111b can be disposed on the substrate 110 to cover the pixel area. The passivation layer 111b covers the drain electrode, source electrode, and gate electrode of the thin-film transistor, as well as the buffer layer BL. The passivation layer 111b can be formed on the circuit area and the light-emitting area. The passivation layer 111b can be omitted.

[0108] At the same time, such as Figure 3 As shown, the pixel power line EVDD can be arranged to overlap with the embankment BK in the third direction (Z-axis direction). Furthermore, as... Figure 3 As shown, the width BKW of the embankment BK can be set to be wider than the width EW of the pixel power line EVDD. Therefore, the display device 100 according to an exemplary embodiment of this disclosure is configured such that the pixel power line EVDD does not overlap with the light-emitting region EA, thereby reducing or preventing light emitted from the light-emitting element layer 120 from being blocked by the pixel power line EVDD and resulting in reduced light efficiency. As an example, the display device 100 according to an exemplary embodiment of this disclosure is configured such that the pixel power line EVDD does not overlap with the light-emitting region EA, thereby ensuring a sufficient aperture area for light to pass through.

[0109] An outer coating 112 may be disposed on the substrate 110 to cover the passivation layer 111b. When the passivation layer 111b is omitted, the outer coating 112 may be disposed on the substrate 110 to cover the circuit region (or thin-film transistor). The outer coating 112 may be formed in the light-emitting region EA and the circuit region CA in which the thin-film transistor is disposed. Furthermore, the outer coating 112 may be formed in the non-display region NDA other than the pad portion PA and the entire display region DA. For example, the outer coating 112 may include an extension (or extension) extending or expanding from the display region DA to the other non-display regions NDA other than the pad portion PA. Therefore, the outer coating 112 may have a relatively wider dimension than the display region DA, but is not limited thereto.

[0110] According to one example, the outer coating 112 can be formed to have a relatively thick thickness, thereby providing a flat surface on the display area DA and the non-display area NDA. For example, the outer coating 112 can be made of organic materials such as photopolymer propylene, benzocyclobutene, polyimide, and fluoropolymers, but is not limited thereto.

[0111] On the other hand, the upper surface of the outer coating 112 can be flat. Therefore, the pixel electrode 121 on the outer coating 112 can also be flat, and the organic light-emitting layer 122 and the counter electrode 123 formed thereon can also be flat. Since the pixel electrode 121, the organic light-emitting layer 122, and the counter electrode 123 (i.e., the light-emitting element layer 120) are flat in the light-emitting region EA, the thickness of each of the pixel electrode 121, the organic light-emitting layer 122, and the counter electrode 123 can be uniformly formed in the light-emitting region EA. Therefore, the organic light-emitting layer 122 can emit light uniformly in the light-emitting region EA without deviation.

[0112] A color filter layer 130 may be disposed between the outer coating layer 112 and the circuit element layer 111. According to an example, the color filter layer 130 may include a first color filter 131 disposed in the green sub-pixel SP4, a second color filter 132 disposed in the red sub-pixel SP1, and a third color filter disposed in the blue sub-pixel SP3. The white sub-pixel SP2 is configured to emit white light and therefore may not include a color filter. The color filter layer 130, together with the outer coating layer 112 and the passivation layer 111b, is disposed between the first layer 140 and the pixel electrode 121, thereby maintaining a gap between the first layer 140 and the pixel electrode 121, such that the first layer 140 and the pixel electrode 121 can be used as a first capacitor CT1. Furthermore, the color filter layer 130, together with the outer coating layer 112 and the passivation layer 111b, is disposed between the second layer 150 and the pixel electrode 121, thereby maintaining the gap between the second layer 150 and the pixel electrode 121, so that the second layer 150 and the pixel electrode 121 can be used as a second capacitor CT2.

[0113] The first layer 140 can be arranged between the color filter layer 130 and the circuit element layer 111. According to one example, the first layer 140 can be a transparent layer. Figure 3 As shown, the first layer 140 can be arranged to overlap with the light-emitting region EA portion included in each of the plurality of sub-pixels SP, thereby forming a first capacitor Cst1 with the pixel electrode 121.

[0114] The second layer 150 can be placed between the first layer 140 and the color filter layer 130 (or passivation layer 111b), but is not limited thereto. According to one example, the second layer 150 can be an opaque layer. Figure 3 As shown, the second layer 150 can be configured to cover at least a portion of the first layer 140, thereby blocking external light reflected by the opposing electrode 123 from being emitted onto the substrate 110. Furthermore, the second layer 150 can be arranged to partially overlap with the light-emitting region EA to form a second capacitor Cst2 with the pixel electrode 121.

[0115] According to one example, a pixel electrode 121 can be formed on an outer coating 112. Although not shown, the pixel electrode 121 can be connected to the drain or source electrode of a thin-film transistor through contact holes passing through the outer coating 112 and the passivation layer 111b. An edge portion of the pixel electrode 121 may be covered by a dam BK, but is not limited thereto. The pixel electrode 121 may be made of at least one of a transparent metallic material or a semi-transparent metallic material, but is not limited thereto.

[0116] Because the display device 100 according to an exemplary embodiment of the present disclosure is configured as a bottom-emitting type, the pixel electrode 121 may be formed of a transparent conductive material (or TCO) capable of transmitting light, such as indium tin oxide (ITO) or indium zinc oxide (IZO), or a semi-transmissive conductive material such as magnesium (Mg), silver (Ag), or an alloy of Mg and Ag, but is not limited thereto.

[0117] Meanwhile, the material constituting the pixel electrode 121 may include MoTi. The pixel electrode 121 may be a first electrode or an anode electrode.

[0118] The dam portion BK can be a non-light-emitting area and is disposed on one side of the light-emitting area EA of each of the plurality of sub-pixels SP. For example, the dam portion BK can be disposed in the non-light-emitting area NEA. The dam portion BK can be formed to cover part of the edge of the pixel electrode 121, but is not limited thereto. Therefore, the dam portion BK can reduce or prevent the pixel electrode 121 and the opposing electrode 123 from contacting each other at the edge of the pixel electrode 121. The exposed portion of the pixel electrode 121 not covered by the dam portion BK can be included in the light-emitting portion (or light-emitting area EA).

[0119] After forming the dam BK, an organic light-emitting layer 122 can be formed to cover the pixel electrode 121 and the dam BK. Therefore, the dam BK can be disposed between the pixel electrode 121 and the organic light-emitting layer 122. The dam BK can be referred to as a pixel-defining film. According to one example, the dam BK may comprise organic and / or inorganic materials.

[0120] Return to reference again Figure 3 An organic light-emitting layer 122 can be formed on the pixel electrode 121 and the embankment BK. According to one example, the organic light-emitting layer 122 can be disposed in the light-emitting region EA and the non-light-emitting region NEA. The organic light-emitting layer 122 can be disposed between the pixel electrode 121 and the counter electrode 123. Therefore, when a voltage is applied to each of the pixel electrode 121 and the counter electrode 123, an electric field is formed between the pixel electrode 121 and the counter electrode 123. Therefore, the organic light-emitting layer 122 can emit light. The organic light-emitting layer 122 can be formed from a plurality of sub-pixels SP and a common layer disposed on the embankment BK.

[0121] An organic light-emitting layer 122 according to an exemplary embodiment can be configured to emit white light. The organic light-emitting layer 122 may include, but is not limited to, multiple layers that emit different colors of light. For example, the organic light-emitting layer 122 may include a first layer, a second layer, and a charge-generating layer (CGL) disposed between the first and second layers. Since the light-emitting layer can be configured to emit white light, each of the plurality of sub-pixels SP may include a color filter suitable for the corresponding color.

[0122] The first layer can be disposed on the pixel electrode 121, and can be implemented as a structure in which the hole injection layer (HIL), hole transport layer (HTL), light emission layer (EML(B)), and electron transport layer (ETL) are stacked in sequence. Implementation is not limited thereto. As an example, depending on the design, at least one of the hole injection layer (HIL), hole transport layer (HTL), and electron transport layer (ETL) can be omitted.

[0123] The charge generation layer can provide charge to the first and second layer stacks. The charge generation layer may include an N-type charge generation layer for providing electrons to the first layer stack and a P-type charge generation layer for providing holes to the second layer stack. The N-type charge generation layer may include, but is not limited to, a metallic material as a dopant.

[0124] The second layer can be disposed on the first layer and can be implemented as a structure in which the hole transport layer (HTL), the yellow-green (YG) emitting layer (EML(YG)) and the electron injection layer (EIL) are stacked in sequence, but is not limited thereto.

[0125] In the display device 100 according to an exemplary embodiment of the present disclosure, since the organic light-emitting layer 122 is configured as a common layer, the first stacked member, the charge-generating layer, and the second stacked member can be arranged on all of the plurality of sub-pixels SP. According to another example, the organic light-emitting layer 122 can be configured as a three-layer or four-layer stacked structure depending on the number of stacked members. The embodiment is not limited thereto. As an example, at least one or all of the first stacked member, the charge-generating layer, and the second stacked member can be arranged on some of the plurality of sub-pixels SP, or can be arranged individually in each of the plurality of sub-pixels SP, but is not limited thereto.

[0126] The opposing electrode 123 can be formed on the organic light-emitting layer 122. The opposing electrode 123 can be disposed in the light-emitting region EA and the non-light-emitting region NEA. According to one example, the opposing electrode 123 may include a metallic material, but is not limited thereto. The opposing electrode 123 can reflect light emitted from the organic light-emitting layer 122 in the plurality of sub-pixels SP toward the lower surface of the substrate 110. Therefore, the display device 100 according to an exemplary embodiment of this disclosure can be implemented as a bottom-emitting display device.

[0127] The display device 100 according to an exemplary embodiment of this disclosure is a bottom-emitting type and must reflect light emitted from the light-emitting layer 122 toward the substrate 110; therefore, the counter electrode 123 can be made of a material with high reflectivity (e.g., a metallic material). According to one example, the counter electrode 123 can be formed of a metallic material with high reflectivity, such as a laminate of aluminum and titanium (Ti / Al / Ti), a laminate of aluminum and ITO (ITO / Al / ITO), an Ag alloy, or a laminate of Ag alloy and ITO (ITO / Ag alloy / ITO). The Ag alloy can be, but is not limited to, alloys such as silver (Ag), palladium (Pd), and copper (Cu). The counter electrode 123 can be referred to by terms such as a second electrode, a cathode electrode, and a reflective electrode.

[0128] A filler layer 113 is formed on the counter electrode 123. The filler layer 113 serves to reduce or prevent oxygen or moisture from penetrating into the organic light-emitting layer 122 and the counter electrode 123. For this purpose, the filler layer 113 may be configured to include a getter capable of absorbing oxygen or moisture, but is not limited thereto. Alternatively, the filler layer 113 may comprise a plurality of layers, said plurality of layers including at least one inorganic membrane and at least one organic membrane.

[0129] On the other hand, such as Figure 3 As shown, the filling layer 113 can be disposed not only in the light-emitting region EA, but also in the non-light-emitting region NEA. The filling layer 113 can be disposed between the opposing electrode 123 and the opposing substrate 200.

[0130] Meanwhile, in a display device 100 according to an exemplary embodiment of the present disclosure, a plurality of sub-pixels SP may include two sub-pixels configured to emit light of different colors. For example, the plurality of sub-pixels SP may include a first sub-pixel SP1 configured to emit red light and a fourth sub-pixel SP4 configured to emit green light. Figure 3 As shown, the fourth sub-pixel SP4 may include a first color filter 131 as a green color filter, thereby emitting green light. Furthermore, the first sub-pixel SP1 may include a second color filter 132 as a red color filter, thereby emitting red light. Figure 3 As shown, the first color filter 131 can be configured to partially overlap with the second color filter 132 below the embankment BK. For example, the portion of the first color filter 131 between the embankment BK and the pixel power line EVDD can be arranged to overlap with the portion of the second color filter 132 between the embankment BK and the pixel power line EVDD in the third direction (Z-axis direction). Therefore, in a display device 100 according to an exemplary embodiment of the present disclosure, two different color filters are arranged to overlap each other among a plurality of sub-pixels SP, thereby reducing or preventing light emitted from the luminous sub-pixels SP from being emitted to the non-luminous sub-pixels SP, thereby reducing or preventing color mixing. Furthermore, since the display device 100 according to an exemplary embodiment of the present disclosure has two different color filters arranged to overlap each other among a plurality of sub-pixels SP, a separate black matrix can be omitted, thereby reducing manufacturing costs. The embodiment is not limited thereto. As an example, the different color filters may not be arranged to overlap each other among a plurality of sub-pixels SP. As an example, a separate black matrix may be further included.

[0131] Refer again Figure 3 In a display device 100 according to an exemplary embodiment of the present disclosure, the width W3 of the first layer 140 may be set to be smaller than the width W4 of the pixel electrode 121 not covered by the embankment BK, but is not limited thereto.

[0132] Specifically, the embankment BK can be configured to cover the edge of the pixel electrode 121 included in each of the plurality of sub-pixels SP. For example, as Figure 3 As shown, the embankment BK can be configured to cover both sides of the pixel electrode 121. Therefore, the light-emitting region EA of each of the plurality of sub-pixels SP can be defined by the embankment BK. Thus, as... Figure 3 As shown, the width W4 of the pixel electrode 121 not covered by the embankment BK can be the width of the light-emitting region EA.

[0133] Since the first layer 140 must form a capacitor with the pixel electrode 121, the first layer 140 can be arranged to overlap with the light-emitting region EA. Therefore, the width of the first layer 140 can be set to be equal to or less than the width of the pixel electrode 121. However, if the width of the first layer 140 is formed to be the same as the width of the pixel electrode 121, the first layer 140 is placed close to the pixel power line EVDD, so not only may the line load of the pixel power line EVDD increase, but defects may also occur in the driving voltage (or driving signal) applied to the thin-film transistor. Therefore, the display device 100 according to an exemplary embodiment of the present disclosure is configured such that the width W3 of the first layer 140 is less than the width W4 of the pixel electrode 121 (or the width W4 of the light-emitting region EA) not covered by the embankment BK, so that a capacitor can be formed between the first layer 140 and the pixel electrode 121, while reducing or preventing the increase of the line load of the pixel power line EVDD, and reducing or preventing the failure of the driving voltage (or driving signal).

[0134] Therefore, a display device 100 according to an exemplary embodiment of the present disclosure can be configured such that the first layer 140 is spaced apart from the end of the light-emitting region EA by a predetermined width W5. The predetermined width W5 can be in a direction parallel to the second direction (X-axis direction). Furthermore, the predetermined width W5 can be the width of the process margin of the first layer 140 and the pixel electrode 121, but is not limited thereto.

[0135] Figure 4 This is a schematic cross-sectional view of a display device according to a second exemplary embodiment of the present disclosure.

[0136] Reference Figure 4 Except for the change in thickness of the second layer 150, the display device 100 according to the second exemplary embodiment of this disclosure is similar to the one described above. Figure 1 The transparent display devices are the same. Therefore, the same reference numerals are assigned to the same configurations, and only different configurations will be described below.

[0137] According to Figure 1 In the case of a display device, the second layer 150 disposed on the first layer 140 may have a thickness similar to or the same as that of the first layer 140. Therefore, according to Figure 1 In the case of a display device, assuming that the size (or area) of the first region A1 and the size (or area) of the second region A2 are the same on the plane, the first capacitance Cst1 of the first capacitor CT1 and the second capacitance Cst2 of the second capacitor CT2 can be set to be almost identical. According to... Figure 1 In the case of a display device, the difference between the first distance D1 that forms the first capacitor Cst1 and the second distance D2 that forms the second capacitor Cst2 is not significant.

[0138] In contrast, according to Figure 4 In the case of a display device, the thickness T1 of the second layer 150 can be set to be thicker than the thickness T2 of the first layer 140. For example, the thickness T1 of the second layer 150 can be set to be approximately 2, 5, 10, 20, or 30 times thicker than the thickness T2 of the first layer 140. Therefore, according to Figure 4 In the case of a display device, the second distance D2 for forming the second capacitor Cst2 can be set to be shorter than the first distance D1 for forming the first capacitor Cst1. Therefore, according to Figure 4 In the case of the display device 100, assuming that the size (or area) of the first region A1 and the size (or area) of the second region A2 are the same on the plane, the second capacitance Cst2 of the second capacitor CT2 can be set to be greater than the first capacitance Cst1 of the first capacitor CT1.

[0139] As a result, by making the thickness T1 of the second layer 150 thicker than the thickness T2 of the first layer 140, the display device 100 according to the second exemplary embodiment of this disclosure can be provided with a second capacitor Cst2 that is larger than the first capacitor Cst1, while maintaining the same thickness as according to the present disclosure. Figure 1 The same level of external light reflectivity is achieved with the display device.

[0140] Figure 5 This is a schematic cross-sectional view of a display device according to a third exemplary embodiment of the present disclosure.

[0141] Reference Figure 5 Apart from changes in the structure of the outer coating 112 and the pixel electrode 121, the display device 100 according to the third exemplary embodiment of this disclosure is similar to the one described above. Figure 1 The transparent display devices are the same. Therefore, the same reference numerals are assigned to the same configurations, and only different configurations will be described below.

[0142] According to Figure 1 In the case of a display device, the outer coating 112 (or the upper surface of the outer coating 112) and the pixel electrode 121 (or the lower surface of the pixel electrode 121) are set to be flat in the light-emitting area EA. Therefore, according to Figure 1 In the case of a display device, since the difference between the first distance D1 that forms the first capacitor Cst1 and the second distance D2 that forms the second capacitor Cst2 is not large, the first capacitor Cst1 of the first capacitor CT1 and the second capacitor Cst2 of the second capacitor CT2 can be set to be almost the same.

[0143] In contrast, according to Figure 5In the case of a display device, the pixel electrode 121 can be configured to include a recess 121a and a flat portion 121b. According to one example, the recess 121a can be configured to be recessed in the direction from the opposing electrode 123 toward the substrate 110. According to one example, the flat portion 121b can be positioned further away from the substrate 110 than the recess 121a. Therefore, in accordance with... Figure 5 In the case of the display device, the third capacitor Cst3 (or the first capacitor Cst1) of the third capacitor CT3 formed between the flat portion 121b and the first layer 140 can be set to be smaller than the fourth capacitor Cst4 of the fourth capacitor CT4 formed between the recess 121a and the second layer 150. However, in this case, it can be assumed that the size (or area) of the first region A1 and the size (or area) of the second region A2 are the same on the plane.

[0144] According to Figure 5 In the case of a display device, the outer coating 112 in which the recess 121a is formed can be etched more through a halftone mask than the outer coating 112 in which the flat portion 121b is formed, and the pixel electrode 121 is formed along the contour of the outer coating 112. Therefore, according to Figure 5 In the case of a display device, the thickness OT1 of the first outer coating 112a between the recess 121a and the color filter layer 130 can be thinner than the thickness OT2 of the second outer coating 112b between the flat portion 121b and the color filter layer 130. For example... Figure 5 As shown, the second outer coating 112b can be connected to the first outer coating 112a.

[0145] As a result, the display device 100 according to the third exemplary embodiment of the present disclosure is configured such that the pixel electrode 121 includes a recess 121a and a flat portion 121b, such that the thickness OT1 of the first outer coating 112a can be set to be thinner than the thickness OT2 of the second outer coating 112b, so that the fourth capacitor Cst4 can be set to be greater than the third capacitor Cst3 (or the first capacitor Cst1).

[0146] According to a third exemplary embodiment of the present disclosure, the display device 100 is configured such that the pixel electrode 121 includes a recess 121a and a flat portion 121b, thereby connecting with the display device 100 according to the present disclosure. Figure 1 Compared to the display device, the fourth capacitor Cst4 can be set to be greater than the third capacitor Cst3 (or the first capacitor Cst1) while maintaining the same level of reduction in external light reflectivity.

[0147] Meanwhile, the display device 100 according to the third exemplary embodiment of the present disclosure is configured such that the pixel electrode 121 includes a recess 121a and a flat portion 121b, such that the organic light-emitting layer 122 formed on the pixel electrode 121 can be formed along the contours of the recess 121a and the flat portion 121b. Therefore, the organic light-emitting layer 122 can have structural features including the recess and the flat portion.

[0148] Refer again Figure 5 In the display device 100 according to the third exemplary embodiment of the present disclosure, the width CW of the recess 121a can be set to be equal to or less than the width W1 of the second layer 150. If the width CW of the recess 121a is wider than the width W1 of the second layer 150, the recess 121a protruding beyond the second layer 150 will not form a capacitance with the second layer 50. Furthermore, since the recess 121a protruding more than the second layer 150 overlaps with the second region A2, the viewing angle of the light emitted from the organic light-emitting layer 122 may be distorted, resulting in color mixing. Therefore, the display device 100 according to the third exemplary embodiment of the present disclosure is provided with a width CW of the recess 121a that is equal to or less than the width W1 of the second layer 150, thereby uniformly maintaining the fourth capacitance Cst4 between the recess 121a and the second layer 250 while reducing or preventing color mixing.

[0149] Figure 6 This is a plan view illustrating an example of a second layer arranged in the light-emitting area of ​​a display device according to an exemplary embodiment of the present disclosure.

[0150] Reference Figure 6 In a display device 100 according to an exemplary embodiment of the present disclosure, the light-emitting region EA may include a plurality of short sides SSL and a plurality of long sides LSL connected to the plurality of short sides SSL. For example, the plurality of short sides SSL may be side edges extending in a second direction (X-axis direction). Regarding Figure 6 The fourth sub-pixel SP4, and the multiple short-side SSLs may include a first short-side SSL1 located above the luminous region EA and a second short-side SSL2 located below the luminous region EA. The multiple long-side LSLs may be side edges extending in the first direction (Y-axis direction). Regarding... Figure 6 The fourth sub-pixel SP4, and the multiple long sides LSL, may include a first long side LSL1 located to the left of the luminous region EA and a second long side LSL2 located to the right of the luminous region EA. The implementation is not limited to this. As an example, the luminous region EA can have various shapes other than a rectangle, such as a square, circle, oval, triangle, polygon, etc. In this case, the luminous region EA may not include a long side or a short side.

[0151] Reference Figure 6An example of a second layer 150 of a display device 100 according to an exemplary embodiment of the present disclosure may be configured such that the second layer 150 extends along one of a plurality of long sides LSL and is positioned adjacent to each of a plurality of short sides SSL. For example, as Figure 6 As shown, the second layer 150 can extend along the first long side LSL1 in the first direction (Y-axis direction) and can be arranged adjacent to each of the first short side SSL1 (or a portion of the first short side SSL1) and the second short side SSL2 (or a portion of the second short side SSL2). Therefore, as Figure 6 As shown, the second layer 150 can be placed approximately halfway (or the left side portion of) the light-emitting region EA based on a second direction (X-axis direction). In this case, the display device 100 according to an exemplary embodiment of the present disclosure is configured such that the second layer 150 is positioned to the left of the light-emitting region EA, thereby reducing or preventing external light EL incident on the substrate 110 from emitting towards the third sub-pixel SP3, thereby reducing or preventing color mixing caused by external light. As an example, the second layer 150 can be placed in the light-emitting region EA adjacent to the light-emitting region EA of an adjacent sub-pixel. As an example, the second layer 150 can be placed adjacent to a side of the light-emitting region EA adjacent to the light-emitting region EA of an adjacent sub-pixel, and can be arranged adjacent to a side of the light-emitting region EA connected to that side, but is not limited thereto.

[0152] Figure 7 This is a plan view illustrating a second example of a second layer arranged in the light-emitting area of ​​a display device according to an exemplary embodiment of the present disclosure.

[0153] Reference Figure 7 A second example of the second layer 150 of a display device 100 according to an exemplary embodiment of the present disclosure can be configured such that the second layer 150 is arranged to overlap substantially with the light-emitting region EA of one of a plurality of sub-pixels SP. As an example, the second layer 150 can be arranged to overlap with the light-emitting region EA of only one of the plurality of sub-pixels SP constituting a unit pixel, while the first layer 140 is disposed in each of the plurality of sub-pixels SP constituting a unit pixel, but is not limited thereto. For example, as... Figure 7As shown, the second layer 150 can be arranged to overlap with most of the light-emitting region EA of the second sub-pixel SP2, which is a white sub-pixel. In this case, the second layer 150 can be arranged adjacent to each of the plurality of long sides LSL and the plurality of short sides SSL of the light-emitting region EA of the second sub-pixel SP2, but is not limited thereto. Therefore, a second example of the second layer 150 of the display device 100 according to an exemplary embodiment of the present disclosure can be configured such that the second layer 150 covers most of the light-emitting region EA of the white sub-pixel, thereby reducing or preventing black enhancement compared to the case where the second layer is not present in the white sub-pixel, thereby enabling true black.

[0154] Figure 8 This is a plan view illustrating a third example of a second layer arranged in the light-emitting area of ​​a display device according to an exemplary embodiment of the present disclosure.

[0155] Reference Figure 8 A third example of the second layer 150 of a display device 100 according to an exemplary embodiment of the present disclosure can be configured such that the second layer 150 extends along one of the plurality of short sides SSL and is positioned adjacent to each of the plurality of long sides LSL. For example, as Figure 8 As shown, the second layer 150 can extend along the second short side SSL2 in the second direction (X-axis direction) and can be arranged adjacent to each of the first long side LSL1 (or a portion of the first long side LSL1) and the second long side LSL2 (or a portion of the second long side LSL2). Therefore, as Figure 8As shown, the second layer 150 can be positioned approximately halfway (or at the lower part of) the light-emitting region EA based on the first direction (Y-axis direction). In this case, the display device 100 according to an exemplary embodiment of the present disclosure is configured such that the second layer 150 is positioned at the lower part of the light-emitting region EA, thereby reducing or preventing external light EL incident on the substrate 110 from being emitted toward another sub-pixel disposed below the fourth sub-pixel SP4, thus reducing or preventing color mixing caused by external light. Furthermore, since the display device 100 according to an exemplary embodiment of the present disclosure is configured such that the second layer 150 is positioned at the lower part of the light-emitting region EA, the second layer 150 can reduce or prevent external light (EL) incident on the substrate 110 from being emitted toward the circuit region CA, thereby reducing or preventing degradation of the circuit region CA included in the corresponding sub-pixel (or the fourth sub-pixel SP4). As an example, the second layer 150 can be positioned in the light-emitting region EA adjacent to the circuit region CA included in the corresponding sub-pixel. As an example, the second layer 150 can be positioned adjacent to a side of the light-emitting region EA that is adjacent to the circuit region CA included in the corresponding sub-pixel, and can be arranged adjacent to a side of the light-emitting region EA that is connected to that side, but is not limited thereto.

[0156] Figure 9 This is a plan view illustrating a fourth example of a second layer arranged in the light-emitting area of ​​a display device according to an exemplary embodiment of the present disclosure.

[0157] Reference Figure 9 A fourth example of the second layer 150 of a display device 100 according to an exemplary embodiment of the present disclosure can be configured such that the second layer 150 is arranged to be partially adjacent to one of the short side SSLs of a plurality of short side SSLs and partially adjacent to one of the long side LSLs of a plurality of long side LSLs. For example, the second layer 150 can be arranged to extend partially along the second short side SSL2 in a second direction (X-axis direction) and partially along the first long side LSL1 in a first direction (Y-axis direction). Figure 9As shown, the second layer 150 can be arranged adjacent to approximately half of the second short side SSL2 in the first direction (Y-axis direction) and adjacent to approximately half of the first long side LSL1 in the second direction (X-axis direction). Therefore, a fourth example of the second layer 150 of the display device 100 according to an exemplary embodiment of the present disclosure is that the second layer 150 can be placed at the edge (or corner) of the light-emitting region EA. In this case, the display device 100 according to an exemplary embodiment of the present disclosure is configured such that the second layer 150 is placed at the edge (or corner) of the light-emitting region EA, thereby reducing or preventing external light EL incident on the substrate 110 (or the light-emitting region EA of the fourth sub-pixel SP) from being emitted toward the circuit region CA of the third sub-pixel SP3, thereby reducing or preventing the degradation of the circuit region CA of the third sub-pixel SP3. As an example, the second layer 150 can be placed at the corner of the light-emitting region EA of a sub-pixel adjacent to the circuit region CA of that sub-pixel and the circuit region CA of the adjacent sub-pixel, but is not limited thereto.

[0158] At the same time, such as Figures 6 to 9 As shown, since the second layer 150 can be arranged in various shapes in the light-emitting area EA, the display device 100 according to an exemplary embodiment of the present disclosure can be configured to meet various user requirements for external light reflectivity (or image visibility) and / or capacitance.

[0159] Embodiments of this disclosure have been described in more detail with reference to the accompanying drawings, but this disclosure is not necessarily limited to these embodiments and can be practiced with various modifications without departing from the technical concept of this disclosure. Therefore, the embodiments disclosed herein are intended to illustrate and not limit the technical concept of this disclosure, and the scope of the technical concept of this disclosure is not limited by these embodiments. Thus, the above embodiments are exemplary in all respects and should be understood as non-limiting. All technical concepts within the scope of protection of this disclosure should be construed as being included within the scope of the claims of this disclosure.

[0160] The display device according to this disclosure is configured such that a second layer (or opaque layer) is partially disposed on a first layer (or transparent layer), thereby reducing or minimizing external light reflectivity.

[0161] Due to the reduction in external light reflectivity, the display device according to this disclosure can improve image visibility.

[0162] Since the display device according to this disclosure has a reduced external light reflectivity due to the second layer (or opaque layer), it can have the same or improved luminous efficiency even at lower power compared to a display device without a second layer (or opaque layer), thereby reducing or minimizing overall power consumption.

[0163] The effects obtained from this disclosure are not limited to those described above, and other effects not mentioned herein will be apparent to those skilled in the art.

[0164] Cross-references to related applications

[0165] This application claims priority and benefit to Korean Patent Application No. 10-2024-0112355, filed on August 21, 2024, which is incorporated herein by reference in its entirety for all purposes, as if fully set forth herein.

Claims

1. A display device, the display device comprising: A substrate having a plurality of pixels, each of the plurality of pixels having a plurality of sub-pixels; A light-emitting element layer is disposed on the substrate and included in each of the plurality of sub-pixels; A color filter layer is located between the light-emitting element layer and the substrate; The first layer is located between the color filter layer and the substrate; as well as The second layer overlaps with at least a portion of the first layer between the color filter layer and the substrate. The first layer is a transparent layer, and The second layer is an opaque layer.

2. The display device according to claim 1, in, The second layer covers at least a portion of the first layer between the first layer and the color filter layer.

3. The display device according to claim 1, in, The first layer and the second layer comprise conductive materials.

4. The display device according to claim 1, in, The second layer is in contact with the first layer.

5. The display device according to claim 1, in, Both the first layer and the second layer overlap with the light-emitting area of ​​the light-emitting element layer.

6. The display device according to claim 1, in, The first layer includes IGZO, and The second layer includes MoTi and / or WOx.

7. The display device according to claim 1, in, The first layer includes a first area covered by the second layer and a second area excluding the first area. The first region is a light-blocking region, and The second region is the light-transmitting region.

8. The display device according to claim 7, wherein, The area of ​​the first region is inversely proportional to the area of ​​the second region.

9. The display device according to claim 7, wherein, The area of ​​the first region is the same as the area of ​​the second region.

10. The display device according to claim 1, in, The light-emitting element layer includes: A pixel electrode, wherein the pixel electrode is located on the color filter layer; An organic light-emitting layer, the organic light-emitting layer being located on the pixel electrode; and The opposing electrode is located on the organic light-emitting layer. Wherein, the first layer and the pixel electrode constitute the first capacitor, and The second layer and the pixel electrode together constitute the second capacitor.

11. The display device according to claim 10, in, The first layer is spaced a first distance from the pixel electrode, and The second layer is spaced from the pixel electrode by a second distance equal to or shorter than the first distance.

12. The display device according to claim 10, in, Each of the plurality of sub-pixels includes a dam covering the edge of the pixel electrode, and Wherein, the width of the first layer is smaller than the width of the pixel electrode that is not covered by the embankment.

13. The display device according to claim 12, in, The plurality of sub-pixels includes two sub-pixels configured to emit light of different colors. The color filter layer includes a first color filter and a second color filter respectively arranged in the two sub-pixels, and The first color filter partially overlaps with the second color filter below the embankment.

14. The display device according to claim 12, in, The substrate includes pixel power lines that provide driving voltages to each of the plurality of sub-pixels, and The pixel power line overlaps with the embankment.

15. The display device according to claim 14, wherein, The width of the embankment is wider than the width of the pixel power line.

16. The display device according to claim 14, wherein, The pixel power lines are arranged to be spaced apart from the first layer and the second layer.

17. The display device according to claim 10, wherein, The thickness of the second layer is equal to or greater than the thickness of the first layer.

18. The display device according to claim 17, wherein, The second capacitance of the second capacitor is greater than the first capacitance of the first capacitor.

19. The display device according to claim 10, in, The pixel electrode includes: A recess, the recess being recessed in the direction from the opposing electrode toward the substrate; and The flat portion is arranged further away from the substrate than the recess.

20. The display device according to claim 19, in, The recess overlaps with the second layer, and the flat portion overlaps with the first layer.

21. The display device according to claim 19, wherein, The width of the recess is equal to or less than the width of the second layer.

22. The display device according to claim 19, wherein, The third capacitance formed between the flat portion and the first layer is smaller than the fourth capacitance formed between the recess and the second layer.

23. The display device according to claim 19, wherein, The organic light-emitting layer is formed along the contours of the recess and the flat portion.

24. The display device according to claim 19, further comprising: An outer coating layer is included between the pixel electrode and the color filter layer. The outer coating includes: A first outer coating layer is located between the recess and the color filter layer; and A second outer coating is attached to the first outer coating and is located between the flat portion and the color filter layer. The thickness of the first outer coating is thinner than the thickness of the second outer coating.

25. The display device according to claim 1, in, Each of the plurality of sub-pixels includes a light-emitting region that emits light, and The second layer is arranged to be adjacent to each side of the light-emitting region of one of the plurality of sub-pixels.

26. The display device according to claim 1, in, Each of the plurality of sub-pixels includes a light-emitting region that emits light, the first layer is disposed in each of the plurality of sub-pixels, and the second layer is disposed in one of the plurality of sub-pixels that is a white sub-pixel.

27. The display device according to claim 1, in, Each of the plurality of sub-pixels includes a light-emitting region that emits light. The light-emitting area includes multiple short sides and multiple long sides connected to the multiple short sides, and The second layer extends along one of the plurality of long sides and is arranged to be adjacent to each of the plurality of short sides.

28. The display device according to claim 1, in, Each of the plurality of sub-pixels includes a light-emitting region that emits light. The light-emitting area includes multiple short sides and multiple long sides connected to the multiple short sides, and The second layer extends along one of the plurality of short sides and is arranged to be adjacent to each of the plurality of long sides.

29. The display device according to claim 1, in, Each of the plurality of sub-pixels includes a light-emitting region that emits light. The light-emitting area includes multiple short sides and multiple long sides connected to the multiple short sides, and The second layer is arranged to be partially adjacent to one of the short sides of the plurality of short sides and partially adjacent to one of the long sides of the plurality of long sides.

30. The display device according to claim 1, in, Each of the plurality of sub-pixels includes a light-emitting region that emits light. Wherein, the second layer is arranged in the light-emitting region of a sub-pixel as adjacent to a side of the light-emitting region of the sub-pixel that is adjacent to the light-emitting region of an adjacent sub-pixel or the circuit region of the sub-pixel, or the second layer is arranged at the corner portion of the light-emitting region of the sub-pixel that is adjacent to both the circuit region of the sub-pixel and the circuit region of an adjacent sub-pixel.

Images