Miniature LED, miniature LED display panel and epitaxial structure

Abstract

A miniature LED comprises a bonding layer and an N-type semiconductor layer formed on the bonding layer. The light-emitting layer is formed on the N-type semiconductor layer, the P-type semiconductor layer is formed on the light-emitting layer, and the top conducting layer is formed on the P-type semiconductor layer.

Description

Technical Field

[0001] This disclosure generally relates to microLED manufacturing technology, and more specifically, to a microLED, a microLED display panel, and an epitaxial structure. Background Technology

[0002] Inorganic micropixel light-emitting diodes, also known as micro LEDs, microLEDs, or μ-LEDs, are becoming increasingly important due to their applications in a variety of fields, including self-emissive microdisplays, visible light communication, and optogenetics. MicroLEDs offer higher output performance than conventional LEDs due to their superior strain relaxation, improved light extraction efficiency, and uniform current diffusion. Compared to conventional LEDs, microLEDs also offer advantages such as improved thermal performance, faster response times, a wider operating temperature range, higher resolution, a wider color gamut, higher contrast, lower power consumption, and operability at higher current densities.

[0003] Micro-LED display panels are manufactured by integrating arrays of thousands or even millions of micro-LEDs with an integrated circuit (IC) backplane. Each pixel of a micro-LED display panel is formed by one or more micro-LEDs. Micro-LED display panels can be monochrome or multi-color panels. In particular, for multi-color LED panels, each pixel can also include multiple sub-pixels formed by multiple micro-LEDs, each micro-LED corresponding to a different color. For example, three micro-LEDs corresponding to red, green, and blue respectively can be stacked to form a pixel. Different colors can be mixed to produce a wide range of colors.

[0004] Current micro-LED technology faces several challenges. For example, the smaller the size of a micro-LED, the more severe the light-blocking effect, which may affect its luminous efficiency. Summary of the Invention

[0005] Embodiments of this disclosure provide a micro LED. The micro LED includes: a bonding layer; an N-type semiconductor layer formed on the bonding layer; a light-emitting layer formed on the N-type semiconductor layer; a P-type semiconductor layer formed on the light-emitting layer; and a top conductive layer formed on the P-type semiconductor layer.

[0006] Embodiments of this disclosure also provide a micro-LED display panel. The micro-LED display panel includes: an integrated circuit (IC) backplane including a bottom pad array, the bottom pad array including a plurality of conductive bottom pads; and a micro-LED array formed on the IC backplane, the micro-LED array including a plurality of micro-LEDs. One of the plurality of micro-LEDs is electrically connected to one of the plurality of conductive bottom pads.

[0007] Embodiments of this disclosure also provide an epitaxial structure for a micro LED. The epitaxial structure includes: a substrate; an etch stop layer formed on the substrate; a P-type epitaxial layer formed on the etch stop layer; a light-emitting layer formed on the P-type epitaxial layer; and an N-type epitaxial layer formed on the light-emitting layer. Attached Figure Description

[0008] The following detailed description and accompanying drawings illustrate embodiments and aspects of this disclosure. The various features shown in the figures are not drawn to scale.

[0009] Figure 1 A structural diagram of an exemplary micro-LED according to the prior art is shown.

[0010] Figure 2 A structural diagram of an exemplary microLED according to some embodiments of the present disclosure is shown.

[0011] Figure 3 Some embodiments according to this disclosure are shown. Figure 2 A structural diagram showing further details of the exemplary micro-LED illustrated.

[0012] Figure 4 A structural diagram of an exemplary microLED according to some embodiments of the present disclosure is shown.

[0013] Figure 5 A structural diagram of an exemplary microLED according to some embodiments of the present disclosure is shown.

[0014] Figure 6 A structural diagram of an exemplary microLED according to some embodiments of the present disclosure is shown.

[0015] Figure 7 A structural diagram of an exemplary microLED according to some embodiments of the present disclosure is shown.

[0016] Figure 8 A top view structural diagram of an exemplary micro-LED display panel according to some embodiments of the present disclosure is shown.

[0017] Figure 9 A structural diagram of an exemplary extensional structure according to some embodiments of the present disclosure is shown.

[0018] Figure 10 Some embodiments according to this disclosure are shown. Figure 9 The diagram shows a structural diagram of a sublayer of an exemplary epitaxial structure. Detailed Implementation

[0019] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings, wherein, unless otherwise stated, the same reference numerals in the different drawings denote the same or similar elements. The embodiments described below are not representative of all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses and methods consistent with aspects related to this disclosure. Specific aspects of this disclosure are described below in more detail. In the event of any conflict with terms and / or definitions incorporated by reference, the terms and definitions provided herein shall prevail.

[0020] Figure 1 A structural diagram of an exemplary micro LED 100 is shown. Figure 1 As shown, the micro-LED 100 has an N-side-up structure disposed on the IC backplane 110. From bottom to top, the micro-LED 100 includes a bonding layer 120, a P-type semiconductor layer 130, a light-emitting layer 140, an N-type semiconductor layer 150, and a top conductive layer 160. The bonding layer 120 includes a metal bonding layer 121 and a transparent conductive layer 122. An N-metal layer 170 is also provided between the N-type semiconductor layer 150 and the top conductive layer 160 to provide ohmic contact. With this structure, as the size of the micro-LED 100 becomes smaller, the light-shielding effect caused by the N-metal layer 170 may become severe.

[0021] To address the potential light-blocking problem caused by the N metal layer 170, embodiments of this disclosure provide a micro LED with a P-side-up structure.

[0022] Figures 2 to 7 Various features and variations of microLEDs with P-side-up structures are shown. Figure 8 A micro-display panel including these micro-LEDs is shown. Figure 9 and Figure 10 An epitaxial structure consistent with the fabrication of this micro-LED is shown.

[0023] Figure 2 A structural diagram of an exemplary microLED 200 according to some embodiments of the present disclosure is shown. Figure 2 As shown, the micro-LED 200 with a P-side-up structure includes a bonding layer 220 and an N-type semiconductor layer 230 disposed on the bonding layer 220. The bonding layer 220 is used to bond the N-type semiconductor layer 230 to the IC backplane 210. A light-emitting layer 240 is formed on the N-type semiconductor layer 230. A P-type semiconductor layer 250 is formed on the light-emitting layer 240. A top conductive layer 260 is formed on the P-type semiconductor layer 250. Figure 1Unlike the microLED 100 shown, the P-type semiconductor layer 250 is in contact with the top conductive layer 260. Since the P-type semiconductor layer 250 can easily form an ohmic contact with the top conductive layer 260, there is no need for a metal layer between the P-type semiconductor layer 250 and the top conductive layer 260 to provide an ohmic contact. Therefore, the light-blocking effect caused by the metal can be avoided.

[0024] In some embodiments, the light-emitting layer 240 includes at least one quantum well layer. The thickness of the quantum well layer is 20 nm to 40 nm, for example, 30 nm. In some embodiments, the material of the quantum well layer is GaInP / (Al x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the light-emitting layer 240 is a multiple quantum well (MQW).

[0025] Figure 3 Some embodiments according to this disclosure are shown. Figure 2 A structural diagram showing further details of the exemplary microLED illustrated. (As shown) Figure 3 As shown, the N-type semiconductor layer 230 further includes, from bottom to top, a doped N-type contact layer 231, an N-type cladding layer 232, and an N-type spacer layer 233. In some embodiments, the material of the doped N-type contact layer 231 is GaAs. In some embodiments, the thickness of the doped N-type contact layer 231 is 10 nm to 30 nm. The doping concentration of the doped N-type contact layer 231 is 2e⁻¹. 18 cm -3 up to 1e 19 cm -3 .

[0026] In some embodiments, the material of the N-type cladding layer 232 is Al. x In 1-x P, where x ranges from 0.1 to 0.5, for example, x is 0.5. Furthermore, in such an embodiment, the thickness of the N-type cladding layer 232 is no greater than 350 nm, for example, the thickness of the N-type capping layer 232 is 320 nm. The doping concentration of the N-type cladding layer 232 is 5e⁻¹. 17 cm -3 up to 1e 18 cm -3 .

[0027] In some embodiments, the material of the N-type spacer layer 233 is (Al) x Ga 1-x ) y In1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. The thickness of the N-type spacer layer 233 is 50 nm to 75 nm, for example 65 nm.

[0028] Still referencing Figure 3 The P-type semiconductor layer 250, from bottom to top, includes a P-type spacer layer 251, a P-type cladding layer 252, a first doped P-type transition layer 253, a second doped P-type transition layer 254, and a doped P-type contact layer 255. In some embodiments, the material of the P-type spacer layer 251 is (Al). x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the thickness of the P-type spacer layer 231 is 50 nm to 70 nm, for example, 65 nm.

[0029] In some embodiments, the material of the P-type cladding layer 252 is Al. x In 1-x P, where x is 0.3 to 0.5, for example, x is 0.5. In such an embodiment, the thickness of the P-type coating layer 252 is no greater than 380 nm, for example, the thickness of the P-type coating layer 252 is 360 nm.

[0030] In some embodiments, the material of the first doped p-type transition layer 253 is (Al) x Ga 1-x ) y In 1-y P, where x ranges from 0.1 to 0.3 and y ranges from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is that y is 1 to 5 times x. In some embodiments, the thickness of the first doped p-type transition layer 253 is 20 nm to 40 nm, for example, 30 nm.

[0031] In some embodiments, the material of the second doped p-type transition layer 254 is Al. x Ga 1-x As, where x ranges from 0.5 to 0.9, for example, x is 0.6. In some embodiments, the thickness of the second doped p-type transition layer 254 is from 10 nm to 30 nm, for example, 20 nm.

[0032] In some embodiments, the material of the doped P-type contact layer 255 is GaAs. The thickness of the doped P-type contact layer 255 is 10 nm to 30 nm, for example, 20 nm.

[0033] In some embodiments, the doping concentration of the second doped P-type transition layer 254 is greater than the doping concentration of the first doped P-type transition layer 253. The doping concentration of the doped P-type contact layer 255 is 1 to 10 times the doping concentration of the second doped P-type transition layer 254.

[0034] In some embodiments, the doping concentration of the doped P-type contact layer 255 is greater than the doping concentration of the second doped P-type transition layer 254. Furthermore, in some embodiments, the doping concentration of the second doped P-type transition layer 254 is 2 to 4 times the doping concentration of the first doped P-type transition layer 253.

[0035] For example, the doping concentration of the first doped P-type transition layer 253 is greater than 1e. 18 cm -3 The doping concentration of the second doped P-type transition layer 254 is 2e⁻¹. 18 cm -3 up to 4e 18 cm -3 Furthermore, the doping concentration of the p-type contact layer 255 is higher than 5e. 18 cm -3 .

[0036] In some embodiments, return to reference Figure 2 The thickness of the N-type semiconductor layer 230 is 300 nm to 500 nm, and the thickness of the P-type semiconductor layer 250 is 400 nm to 600 nm. In some embodiments, the thickness T1 from the top of the top conductive layer 260 to the bottom of the N-type semiconductor layer 230 is not greater than 2000 nm.

[0037] Figure 4 A structural diagram of an exemplary microLED 400 according to some embodiments of the present disclosure is shown. Figure 4 As shown, the sidewalls of the P-type semiconductor layer 450, the light-emitting layer 440, and the N-type semiconductor layer 430 are inclined. That is, the sidewalls of the P-type semiconductor layer 450, the light-emitting layer 440, and the N-type semiconductor layer 430 are along a straight line, and an inclination angle θ is formed between this straight line and the bottom of the N-type semiconductor layer 430. In some embodiments, the inclination angle θ of the sidewalls is 55° to 65°. The top surface area of ​​the P-type semiconductor layer 450 is smaller than the top surface area of ​​the N-type semiconductor layer 430. In some embodiments, the cross-section of the top surface of the microLED 400 is circular, and the diameter of the P-type semiconductor layer 450 is smaller than the diameter of the N-type semiconductor layer 430. Therefore, the microLED 400 has a mesa structure.

[0038] Figure 5 A structural diagram of an exemplary micro-LED 500 according to some embodiments of the present disclosure is shown. Figure 5 As shown, the sidewalls of the P-type semiconductor layer 550, the light-emitting layer 540, and the N-type semiconductor layer 530 are... Figure 5 The surface is almost vertical. In some embodiments, the tilt angle θ of the sidewalls is greater than 85°, for example, between 85° and 90°. Therefore, the micro-LED 500 has a vertical mesa structure, which improves beam angle performance. Furthermore, the luminous area can be larger, thereby improving luminous efficiency.

[0039] Return to reference Figure 4 The micro-LED 400 also includes a bonding layer 420, which comprises, from bottom to top, a first metal bonding layer 421, a transparent bonding layer 422, and a second metal bonding layer 423. The first metal bonding layer 421 and the second metal bonding layer 423 are made of conductive and opaque metal. In some embodiments, the transparent bonding layer 422 is a TCO (transparent conductive oxide) film, such as an ITO (indium tin oxide) film, an AZO (aluminum-doped zinc oxide) film, an ATO (antimony-doped tin oxide) film, or an FTO (fluorine-doped tin oxide) film. The N-type semiconductor layer 430 is bonded to the second metal bonding layer 423, the second metal bonding layer 423 is bonded to the transparent bonding layer 422, and the transparent bonding layer 422 is bonded to the first metal bonding layer 421. The IC backplane 410 includes a bottom pad 411 electrically connected to the first metal bonding layer 421.

[0040] Figure 6 A structural diagram of an exemplary microLED 600 according to some embodiments of the present disclosure is shown. Figure 6As shown, the micro-LED 600 includes a transparent bonding layer 622, which forms as a distributed Bragg reflector (DBR) layer between a first metal bonding layer 621 and a second metal bonding layer 623. The DBR layer includes a plurality of sputtered transparent bonding layers 622a and a plurality of porous transparent bonding layers 622b. The plurality of sputtered transparent bonding layers 622a and the plurality of porous transparent bonding layers 622b are stacked alternately. For example, in some embodiments, a first sputtered transparent bonding layer 622a is formed on a first metal bonding layer 621, a first porous transparent bonding layer 622b is formed on a first sputtered transparent bonding layer 622a, a second sputtered transparent bonding layer 622a is formed on a first porous transparent bonding layer 622b, a second porous transparent bonding layer 622b is formed on a second sputtered transparent bonding layer 622a, a third sputtered transparent bonding layer 622a is formed on a second porous transparent bonding layer 622b, a third porous transparent bonding layer 622b is formed on a third sputtered transparent bonding layer 622a, a fourth sputtered transparent bonding layer 622a is formed on a third porous transparent bonding layer 622b, and a second metal bonding layer 623 is formed on a fourth sputtered transparent bonding layer 622a. The number of sputtered transparent bonding layers 622a can be equal to the number of porous transparent bonding layers 622b plus one. Therefore, both the first metal bonding layer 621 and the second metal bonding layer 623 are bonded to the sputtered transparent bonding layer. In some embodiments, the number of sputtered transparent bonding layers 622a can be equal to the number of porous transparent bonding layers 622b. Therefore, the first metal bonding layer 621 and the second metal bonding layer 623 can be bonded to either the sputtered transparent bonding layer or the porous transparent bonding layer. In some embodiments, the number of sputtered transparent bonding layers 622a can be equal to the number of porous transparent bonding layers 622b minus one. Therefore, both the first metal bonding layer 621 and the second metal bonding layer 623 are bonded to the porous transparent bonding layer. It is understood that the number of sputtered transparent bonding layers 622a and the number of porous transparent bonding layers 622b are not limited herein and can vary according to practical application.

[0041] In some embodiments, the refractive index of each sputtered transparent bonding layer 622a is greater than 1.7, for example, 1.9, and the refractive index of each porous transparent bonding layer 622b is less than 1.5. In some embodiments, the sputtered transparent bonding layer 622a and the porous transparent bonding layer 622b are TCO films, such as one or more of ITO films, AZO films, ATO films, FTO films, etc.

[0042] Figure 7 A structural diagram of an exemplary microLED 700 according to some embodiments of the present disclosure is shown. Figure 7As shown, the bonding layer 720 includes a second metal bonding layer 723 formed on the transparent bonding layer 722, and a dielectric distributed Bragg reflector (DBR) layer 724 between the transparent bonding layer 722 and the first metal bonding layer 721. A side conductive structure 725 is disposed around the DBR layer 724 for connecting the transparent bonding layer 722 and the first metal bonding layer 721. In some embodiments, the dielectric DBR layer 724 is formed of a plurality of SiO2 layers and a plurality of SiNx layers, with the SiO2 layers and SiNx layers stacked alternately. In some embodiments, the refractive index of each SiO2 layer is 1.45, and the refractive index of each SiNx layer is 2.1. In some embodiments, charge carriers are injected via the side conductive structure 725. Therefore, a current path is formed between the transparent bonding layer 722 and the first metal bonding layer 721.

[0043] Figure 8 A top-view structural diagram of an exemplary micro-LED display panel according to some embodiments of the present disclosure is shown. Reference Figure 8 The micro-LED display panel 800 includes a micro-LED array 810 and an IC (integrated circuit) backplane 820. The micro-LED array 810 is located on the IC backplane 820 to form the image display area of ​​the micro-LED display panel 800. The remaining area of ​​the IC backplane 820 not covered by the micro-LED array 810 is formed as a non-functional area. The IC backplane 820 is formed on the back of the micro-LED array 810, with a portion extending outside the micro-LED array 810, i.e., not covered by the micro-LED array 810. The micro-LED array 810 includes a plurality of micro-LEDs 811 arranged in an array. The IC backplane 820 is configured to control the plurality of micro-LEDs 811. The IC backplane 820 may include a bottom pad array (not shown) corresponding to the micro-LED array 810. The bottom pad array includes a plurality of conductive bottom pads (e.g., Figure 4 The bottom pad 411 is one of the multiple conductive bottom pads 811, and one bottom pad corresponds to one microLED 811. One microLED is electrically connected to one of the multiple conductive bottom pads 811.

[0044] In some embodiments, the top conductive layer of the microLED (e.g., Figure 2 The top conductive layer 260 is interconnected with each of the plurality of micro-LEDs. That is, the top conductive layer is continuously formed on top of the micro-LED array 810 and connected to each micro-LED 811.

[0045] In some embodiments, the IC backplane 820 also includes a top connection pad 821. The top conductive layer is connected to the top connection pad 821 and can also be connected to external circuitry.

[0046] Each microLED described herein (e.g., microLEDs 100 to 700) has a very small volume. MicroLEDs can be used in microLED display panels. The light-emitting area of ​​a microLED display panel (e.g., microLED display panel 800) is very small, such as 1mm × 1mm, 3mm × 5mm, etc. In some embodiments, the light-emitting area is the area of ​​the microLED array in the microLED display panel. The microLED display panel includes one or more microLEDs forming a pixel array, where the microLEDs are pixels, such as a 1600 × 1200, 680 × 480, or 1920 × 1080 pixel array. The diameter of each microLED is in the range of approximately 200nm to 2μm. An IC backplane, for example, IC backplane 820, is formed on the back side of the microLED array 810 and is electrically connected to the microLED array 810. The IC backplane acquires signals such as image data from the outside via signal lines to control the corresponding microLEDs to emit or not emit light.

[0047] Some embodiments of this disclosure also provide an epitaxial structure for a microLED with a P-side structure to improve the manufacturing process. Temporary bonding techniques can be used when manufacturing the aforementioned P-side upward structure. Therefore, an epitaxial structure is provided.

[0048] Figure 9 A structural diagram of an exemplary extensional structure 900 according to some embodiments of the present disclosure is shown. For example... Figure 9 As shown, the epitaxial structure 900 for a micro-LED includes a substrate 910 disposed at the bottom of the epitaxial structure 900. The substrate 910 may include N-type GaAs for growing the epitaxial layer. In some embodiments, the thickness of the substrate 910 is not greater than 400µm, for example, the thickness of the substrate 910 is 350µm.

[0049] An etch stop layer 920 is formed on the substrate 910. The etch stop layer 920 is configured to separate the substrate 910 and the devices grown thereon. No ion doping is present in the etch stop layer 920. In some embodiments, the etch stop layer 920 comprises an alloy of AlGaInP. In some embodiments, the material of the etch stop layer 920 is (Al... x Ga 1-x ) y In 1-y P, where x ranges from 0 to 0.3 (e.g., x is 0.5), and y is 0.5. In some embodiments, the thickness of the etch stop layer 920 is no greater than 250 nm, for example, the thickness of the etch stop layer 920 is 200 nm.

[0050] A P-type epitaxial layer 930 is formed on the etch stop layer 920, a light-emitting layer 940 is formed on the P-type epitaxial layer 930, and an N-type epitaxial layer 950 is formed on the light-emitting layer 940. That is, during fabrication, a P-type epitaxial layer 930 is grown on the etch stop layer 920, a light-emitting layer 940 is grown on the P-type epitaxial layer 930, and an N-type epitaxial layer 950 is further grown on the light-emitting layer 940. In some embodiments, the thickness of the N-type epitaxial layer 950 is 300 nm to 500 nm, and the thickness of the P-type epitaxial layer 930 is 400 nm to 600 nm. In some embodiments, the thickness T2 from the top of the N-type epitaxial layer 950 to the bottom of the P-type epitaxial layer 930, i.e., the device thickness, is not greater than 1000 nm. In some embodiments, the thickness T3 of the epitaxial layer including the etch stop layer 920 is not greater than 1200 nm.

[0051] Using this structure, the epitaxial structure 900 does not require bonding, thus improving the manufacturing process and reducing costs. After removing the substrate 910 and flipping the device, a device with a P-side-up structure can be obtained. This device with the P-side-up structure can then be bonded to an IC backplane to obtain a micro-LED structure.

[0052] In some embodiments, the light-emitting layer 940 includes at least one quantum well layer. The thickness of the quantum well layer is 20 nm to 40 nm, for example, 30 nm. In some embodiments, the material of the quantum well layer is GaInP / (Al x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the light-emitting layer 340 is a multiple quantum well (MQW).

[0053] Figure 10 A structural diagram of a sublayer of an exemplary epitaxial structure 900 according to some embodiments of the present disclosure is shown. Figure 10 As shown, the N-type epitaxial layer 950 further includes an N-type spacer layer 951 formed on the light-emitting layer 940, an N-type cladding layer 952 formed on the N-type spacer layer 951, and a doped N-type contact layer 953 formed on the N-type capping layer 952. In some embodiments, the material of the doped N-type contact layer 953 is GaAs, and the thickness of the doped N-type contact layer 953 is 10 nm to 30 nm. The doping concentration of the doped N-type contact layer 953 is 2e⁻¹. 18 cm -3 up to 1e 19 cm -3 .

[0054] In some embodiments, the material of the N-type cladding layer 952 is Al. x In 1-x P, where x ranges from 0.1 to 0.5, for example, x is 0.5. The thickness of the N-type cladding layer 952 is no greater than 350 nm, for example, the thickness of the N-type capping layer 952 is 320 nm. The doping concentration of the N-type cladding layer 952 is 5e. 17 cm -3 up to 1e 18 cm -3 .

[0055] In some embodiments, the material of the N-type spacer layer 951 is (Al) x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. The thickness of the N-type spacer layer 951 is 50 nm to 75 nm, for example 65 nm.

[0056] Still referencing Figure 10 The P-type epitaxial layer 930 includes a doped P-type contact layer 931 formed on the etch stop layer 920, a second doped P-type transition layer 932 formed on the doped P-type contact layer 931, a first doped P-type transition layer 933 formed on the second doped P-type transition layer 932, a P-type cladding layer 934 formed on the first doped P-type transition layer 933, and a P-type spacer layer 935 formed on the P-type cladding layer 934. In some embodiments, the material of the P-type spacer layer 935 is (Al). x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the thickness of the P-type spacer layer 935 is 50 nm to 70 nm, for example, 65 nm.

[0057] In some embodiments, the material of the P-type cladding layer 934 is Al. x In 1-x P, where x is 0.3 to 0.5, for example, x is 0.5. The thickness of the P-type coating 934 is no greater than 380 nm, for example, the thickness of the P-type coating 934 is 360 nm.

[0058] In some embodiments, the material of the first doped p-type transition layer 933 is (Al) x Ga 1-x )y In 1-y P, where x ranges from 0.1 to 0.3 and y ranges from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is that y is 1 to 5 times x. The thickness of the first doped p-type transition layer 933 is 20 nm to 40 nm, for example, 30 nm.

[0059] In some embodiments, the material of the second doped p-type transition layer 932 is Al. x Ga 1-x As, where x ranges from 0.5 to 0.9, for example, x is 0.6. In some embodiments, the thickness of the second doped p-type transition layer 932 is from 10 nm to 30 nm, for example, 20 nm.

[0060] In some embodiments, the material of the doped P-type contact layer 931 is GaAs. The thickness of the doped P-type contact layer 931 is 10 nm to 30 nm, for example, 20 nm.

[0061] In some embodiments, the doping concentration of the second doped P-type transition layer 932 is greater than the doping concentration of the first doped P-type transition layer 933. For example, the doping concentration of the doped P-type contact layer 931 is 1 to 10 times the doping concentration of the second doped P-type transition layer 932.

[0062] In some embodiments, the doping concentration of the doped P-type contact layer 931 is greater than the doping concentration of the second doped P-type transition layer 932. Furthermore, in some embodiments, the doping concentration of the second doped P-type transition layer 932 is 2 to 4 times the doping concentration of the first doped P-type transition layer 933.

[0063] For example, the doping concentration of the first doped P-type transition layer 933 is greater than 1e. 18 cm -3 The doping concentration of the second doped P-type transition layer 932 is 2e⁻¹. 18 cm -3 up to 4e 18 cm -3 Furthermore, the doping concentration of the p-type contact layer 931 is higher than 5e. 18 cm -3 .

[0064] In one example, refer to Figure 9 and Figure 10The thickness T2 from the top of the N-type epitaxial layer 950 to the bottom of the P-type epitaxial layer 930, i.e., the device thickness, is 930 nm, and the thickness T3 of the epitaxial layer including the etch stop layer 920 is 1130 nm. In this example, the thickness of the doped N-type contact layer 953 is 20 nm, the thickness of the N-type cladding layer 952 is 320 nm, the thickness of the N-type spacer layer 951 is 65 nm, the thickness of the light-emitting layer 940 is 30 nm, the thickness of the P-type spacer layer 935 is 65 nm, the thickness of the P-type cladding layer 934 is 360 nm, the thickness of the first doped P-type transition layer 933 is 30 nm, the thickness of the second doped P-type transition layer 932 is 20 nm, the thickness of the doped P-type contact layer 931 is 20 nm, the thickness of the etch stop layer is 200 nm, and the thickness of the substrate is 350 µm.

[0065] Those skilled in the art should understand that the micro LED display panel is not limited to the structure described above, and may include more or fewer components than shown, or may combine some components, or may use different components.

[0066] It should be noted that relational terms such as “first” and “second” in this document are used only to distinguish one entity or operation from another, and do not require or imply any actual relationship or order between these entities or operations. Furthermore, the words “contains,” “has,” “includes,” and “includes,” as well as other similar forms, are intended to have the same meaning and are open-ended, because one or more items following any of these words are not intended to be an exhaustive list of such one or more items, or to be limited to only the listed one or more items.

[0067] As used herein, unless otherwise expressly stated, the term "or" covers all possible combinations unless impractical. For example, if it is specified that a database may include A or B, then unless otherwise expressly stated or impractical, the database may include A or B, or A and B. As a second example, if it is specified that a database may include A, B, or C, then unless otherwise expressly stated or impractical, the database may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.

[0068] In the foregoing description, numerous specific details have been described, which may vary depending on the implementation. Certain adjustments and modifications may be made to some of the described embodiments. Other embodiments will be apparent to those skilled in the art upon consideration of the description and practice of this disclosure herein. This specification and embodiments are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the appended claims. The sequence of steps shown in the figures is for illustrative purposes only and is not intended to limit the scope to any particular sequence of steps. Therefore, those skilled in the art will understand that these steps may be performed in a different order while implementing the same method.

[0069] Exemplary embodiments have been disclosed in the accompanying drawings and description. However, many variations and modifications can be made to these embodiments. Therefore, although specific terms are used, they are used in a general and descriptive sense only and not for limiting purposes.

Claims

1. A miniature LED, characterized in that, include: Bonding layer; An N-type semiconductor layer is formed on the bonding layer; A light-emitting layer is formed on the N-type semiconductor layer; A P-type semiconductor layer is formed on the light-emitting layer; as well as A top conductive layer is formed on the P-type semiconductor layer.

2. The micro LED according to claim 1, characterized in that, The light-emitting layer includes at least one quantum well layer.

3. The micro LED according to claim 2, characterized in that, The thickness of the quantum well layer is 20 nm to 40 nm.

4. The micro LED according to claim 2, characterized in that, The quantum well layer is GaInP / (Al) x Ga 1-x ) y In 1- y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.

5.

5. The micro LED according to claim 4, characterized in that, x is 1 to 2 times y.

6. The micro LED according to any one of claims 1 to 5, characterized in that, The N-type semiconductor layer, from bottom to top, includes a doped N-type contact layer, an N-type cladding layer, and an N-type spacer layer.

7. The micro LED according to claim 6, characterized in that, The doping concentration of the doped N-type contact layer is 2e. 18 cm -3 up to 1e 19 cm -3 .

8. The micro LED according to claim 6, characterized in that, The N-type coating layer is Al. x In 1-x P, where x ranges from 0.1 to 0.

5.

9. The micro LED according to claim 6, characterized in that, The N-type spacer layer is (AlxGa) 1-x )yIn 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.1 to 0.

5.

10. The micro LED according to claim 9, characterized in that, x is 1 to 2 times y.

11. The micro LED according to any one of claims 1 to 10, characterized in that, The P-type semiconductor layer, from bottom to top, also includes a P-type spacer layer, a P-type cladding layer, a first doped P-type transition layer, a second doped P-type transition layer, and a doped P-type contact layer.

12. The micro LED according to claim 11, characterized in that, The P-type spacer layer is (AlxGa) 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.

5.

13. The micro LED according to claim 12, characterized in that, x is 1 to 2 times y.

14. The micro LED according to claim 11, characterized in that, The P-type coating layer is Al. x In 1-x P, where x is between 0.3 and 0.

5.

15. The micro LED according to claim 11, characterized in that, The first doped P-type transition layer is (Al) x Ga 1-x ) y In 1-y P, where x ranges from 0.1 to 0.3 and y ranges from 0.3 to 0.

5.

16. The micro LED according to claim 15, characterized in that, y is 1 to 5 times x.

17. The microLED according to any one of claims 11 to 16, characterized in that, The second doped p-type transition layer is Al x Ga 1-x As, where x ranges from 0.5 to 0.

9.

18. The microLED according to any one of claims 11 to 16, characterized in that, The doped P-type contact layer is GaAs.

19. The microLED according to any one of claims 11 to 16, characterized in that, The doping concentration of the second doped P-type transition layer is greater than that of the first doped P-type transition layer.

20. The micro LED according to claim 19, characterized in that, The doping concentration of the doped P-type contact layer is 1 to 10 times that of the doped P-type transition layer.

21. The microLED according to any one of claims 11 to 20, characterized in that, The doping concentration of the doped P-type contact layer is greater than the doping concentration of the second doped P-type transition layer.

22. The micro LED according to claim 21, characterized in that, The doping concentration of the second doped P-type transition layer is 2 to 4 times that of the first doped P-type transition layer.

23. The microLED according to any one of claims 1 to 22, characterized in that, The thickness of the N-type semiconductor layer is 300 nm to 500 nm, and the thickness of the P-type semiconductor layer is 400 nm to 600 nm.

24. The micro LED according to claim 23, characterized in that, The thickness from the top of the top conductive layer to the bottom of the N-type semiconductor layer is no greater than 2000 nm.

25. The micro LED according to any one of claims 1 to 24, characterized in that, The sidewalls of the P-type semiconductor layer, the light-emitting layer, and the N-type semiconductor layer are inclined.

26. The micro LED according to claim 25, characterized in that, The inclination angle of the sidewall is 55° to 65°.

27. The micro LED according to claim 25, characterized in that, The inclination angle of the sidewall is greater than 85°.

28. The microLED according to any one of claims 25 to 27, characterized in that, The top surface area of ​​the P-type semiconductor layer is smaller than that of the N-type semiconductor layer.

29. The micro LED according to claim 1, characterized in that, The sidewalls of the microLED are vertical.

30. The micro LED according to any one of claims 1 to 29, characterized in that, The bonding layer, from bottom to top, also includes a first metal bonding layer, a transparent bonding layer, and a second metal bonding layer.

31. The micro LED according to claim 30, characterized in that, The transparent bonding layer includes multiple sputtered transparent bonding layers and multiple porous transparent bonding layers, with the multiple sputtered transparent bonding layers and the multiple porous transparent bonding layers stacked alternately.

32. The micro LED according to claim 30, characterized in that, The bonding layer further includes: A dielectric distributed Bragg reflector (DBR) layer is located between the transparent bonding layer and the first metallic bonding layer; and A side conductive structure is disposed on one side of the DBR layer for connecting the transparent bonding layer and the first metal bonding layer.

33. A miniature LED display panel, characterized in that, include: An integrated circuit (IC) backplane includes a bottom pad array, the bottom pad array comprising a plurality of conductive bottom pads; as well as A micro-LED array is formed on the backplane of the IC, the micro-LED array comprising a plurality of micro-LEDs according to any one of claims 1 to 32; One of the multiple micro-LEDs is electrically connected to one of the multiple conductive bottom pads.

34. The micro LED display panel according to claim 33, characterized in that, The top conductive layers of the plurality of microLEDs are interconnected.

35. The micro LED display panel according to claim 34, characterized in that, The IC backplane also includes top connection pads, and each top conductive layer is connected to the top connection pads of the IC backplane.

36. An epitaxial structure for micro LEDs, characterized in that, include: substrate; An etching stop layer is formed on the substrate; A P-type epitaxial layer is formed on the etch stop layer; A light-emitting layer is formed on the P-type epitaxial layer; as well as An N-type epitaxial layer is formed on the light-emitting layer.

37. The epitaxial structure according to claim 36, characterized in that, The light-emitting layer includes at least one quantum well layer.

38. The epitaxial structure according to claim 37, characterized in that, The thickness of the quantum well layer is 20 nm to 40 nm.

39. The epitaxial structure according to claim 37, characterized in that, The quantum well layer is GaInP / (Al) x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.

5.

40. The epitaxial structure according to claim 39, characterized in that, x is 1 to 2 times y.

41. The epitaxial structure according to any one of claims 36 to 40, characterized in that, The N-type epitaxial layer includes: An N-type spacer layer is formed on the light-emitting layer; An N-type cladding layer is formed on the N-type spacer layer; and A doped N-type contact layer is formed on the N-type coating layer.

42. The epitaxial structure according to claim 41, characterized in that, The doping concentration of the doped N-type contact layer is 2e. 18 cm -3 up to 1e 19 cm -3 .

43. The epitaxial structure according to claim 41, characterized in that, The N-type coating layer is Al. x In 1-x P, where x ranges from 0.1 to 0.

5.

44. The epitaxial structure according to claim 41, characterized in that, The N-type spacer layer is (AlxGa) 1-x )yIn 1- y P, where x ranges from 0.5 to 0.9 and y ranges from 0.1 to 0.

5.

45. The epitaxial structure according to claim 44, characterized in that, x is 1 to 2 times y.

46. ​​The epitaxial structure according to any one of claims 36 to 45, characterized in that, The P-type epitaxial layer includes: A doped P-type contact layer is formed on the etch stop layer; A second doped P-type transition layer is formed on the doped P-type contact layer; A first doped P-type transition layer is formed on the second doped P-type transition layer; A p-type coating layer is formed on the first doped p-type transition layer; and A P-type spacer layer is formed on the P-type covering layer.

47. The epitaxial structure according to claim 46, characterized in that, The P-type spacer layer is (AlxGa) 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.

5.

48. The epitaxial structure according to claim 47, characterized in that, x is 1 to 2 times y.

49. The epitaxial structure according to any one of claims 46 to 48, characterized in that, The P-type coating layer is Al. x In 1-x P, where x is between 0.3 and 0.

5.

50. The epitaxial structure according to any one of claims 46 to 49, characterized in that, The first doped P-type transition layer is (Al) x Ga 1-x ) y In 1-y P, where x ranges from 0.1 to 0.3 and y ranges from 0.3 to 0.

5.

51. The epitaxial structure according to claim 50, characterized in that, y is 1 to 5 times x.

52. The epitaxial structure according to any one of claims 46 to 51, characterized in that, The second doped p-type transition layer is Al x Ga 1-x As, where x ranges from 0.5 to 0.

9.

53. The epitaxial structure according to any one of claims 46 to 52, characterized in that, The doped P-type contact layer is GaAs.

54. The epitaxial structure according to any one of claims 46 to 53, characterized in that, The doping concentration of the second doped P-type transition layer is greater than that of the first doped P-type transition layer.

55. The epitaxial structure according to claim 54, characterized in that, The doping concentration of the doped P-type contact layer is 1 to 10 times that of the doped P-type transition layer.

56. The epitaxial structure according to any one of claims 46 to 55, characterized in that, The doping concentration of the doped P-type contact layer is greater than the doping concentration of the second doped P-type transition layer.

57. The epitaxial structure according to claim 56, characterized in that, The doping concentration of the second doped P-type transition layer is 2 to 4 times that of the first doped P-type transition layer.

58. The epitaxial structure according to any one of claims 36 to 57, characterized in that, The thickness of the N-type epitaxial layer is 300 nm to 500 nm, and the thickness of the P-type epitaxial layer is 400 nm to 600 nm.

59. The epitaxial structure according to claim 58, characterized in that, The thickness from the top of the N-type epitaxial layer to the bottom of the P-type epitaxial layer is no greater than 1000 nm.

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