Data line system and data line for intelligently switching data transmission and charging

Abstract

The invention relates to the technical field of data lines, and particularly discloses a data line system and a data line for intelligently switching data transmission and charging, and the system comprises a dual-core synchronization management module which is used for enabling dual cores to enter an initial detection state through encryption synchronization signaling when equipment is connected; the asynchronous signal processing module is used for generating state judgment parameters through multi-scale sliding window processing and time-frequency domain feature fusion; the consensus decision arbitration module outputs a backtracking trigger signal through dynamic projection transformation and self-adaptive threshold comparison; the state backtracking recovery module is used for generating a retry instruction with a random delay period based on the historical backtracking success rate and the signal quality evaluation; the safety mode control module is used for identifying dominant features by analyzing historical failure records and switching to a safety operation mode; through distributed dual-core cooperative processing and an intelligent fault recovery mechanism, the technical problems of confusion of protocol stacks and deadlock of a state machine in a complex electromagnetic environment are solved, and the anti-interference capability and reliability of the system are improved.

Description

Technical Field

[0001] This invention relates to the field of data cable technology, specifically to a data cable system and data cable that intelligently switch between data transmission and charging. Background Technology

[0002] With the rapid proliferation of smart devices, smart data cables supporting data transmission and charging have become indispensable connectivity accessories. Existing smart data cables typically employ embedded control chips for protocol identification and function switching, automatically selecting data transmission or charging mode upon connection via a handshake negotiation mechanism. However, in complex real-world environments, especially in industrial settings and transportation vehicles where strong electromagnetic interference exists, traditional single-core control architectures and data cable systems exhibit significant limitations. Control chips are susceptible to noise, leading to protocol identification errors, and the state machine during the handshake process may deadlock due to interference, causing the data cable to completely fail.

[0003] Existing technologies lack solutions to overcome the protocol stack confusion and state machine deadlock problems caused by signal interference in complex electromagnetic environments, preventing complete system failure and ensuring minimum availability of the data cable under harsh conditions. Through a series of innovative designs, including distributed dual-core collaborative processing, asynchronous signal acquisition, consensus decision arbitration, state backtracking recovery, and security mode degradation, comprehensive protection from fault prevention to intelligent recovery is achieved, improving the system's robustness and reliability. Summary of the Invention

[0004] The purpose of this invention is to provide a data cable system and data cable that intelligently switch between data transmission and charging, so as to solve the problems mentioned above.

[0005] The objective of this invention can be achieved through the following technical solutions:

[0006] A data cable system for intelligently switching between data transmission and charging includes:

[0007] The dual-core synchronization management module is used to initialize and collaboratively start up when the data cable is connected to the device. It starts the first control core and the second control core and controls them to exchange encrypted synchronization signaling for state calibration, so that the two cores enter a consistent initial detection state.

[0008] The asynchronous signal processing module takes the initial detection state as input, and the two cores independently and asynchronously acquire the original electrical signals from the communication pin, perform preprocessing and feature extraction, and output their own independent state judgment parameters.

[0009] The consensus decision arbitration module takes the state judgment parameters of the dual cores as input, receives the state transition request generated by any control core, compares and arbitrates between the two cores through encrypted state request packets, and outputs a backtracking trigger signal.

[0010] The state rollback and recovery module takes the rollback trigger signal as input, forces the dual cores to clear the current disputed state and roll back to the previous stable state confirmed by both parties. After the rollback is completed, it outputs a retry instruction with a random delay period.

[0011] The security mode control module forces the system to switch to a secure operation mode when consensus decision failures occur consecutively a predetermined number of times, driving the data line to work according to preset basic parameters.

[0012] As a further aspect of the present invention: the step of causing both cores to enter a consistent initial detection state specifically includes:

[0013] After the power supply pin is powered on, the first control core and the second control core generate random synchronization seeds respectively, and exchange random synchronization seeds through the internal encryption channel;

[0014] Based on the exchanged random synchronization seed, the control cores of both parties generate encrypted synchronization signaling and cross-verify their respective generated encrypted synchronization signaling through a verification channel.

[0015] When cross-validation is consistent, both control cores simultaneously load preset initial state parameters and enter the initial detection state; when cross-validation is inconsistent, the random synchronization seed generation step is re-executed.

[0016] As a further aspect of the present invention: the preprocessing and feature extraction, and the output of independent state judgment parameters, specifically include:

[0017] The acquired raw electrical signals are processed by a multi-scale sliding window to extract signal amplitude variation features and signal stability features at different time scales, thereby generating a preprocessed signal.

[0018] The time-domain pulse count and frequency-domain energy distribution of the preprocessed signal are calculated separately, and the time-domain pulse count and frequency-domain energy distribution are weighted and fused to form a feature vector.

[0019] The feature vector is matched with the preset protocol feature template for similarity. When the matching degree exceeds the dynamic threshold, a valid state judgment parameter is generated.

[0020] As a further aspect of the present invention: the step of comparing and arbitrating the encrypted state request packet between the two cores and outputting a backtracking trigger signal specifically includes:

[0021] Receive status judgment parameters and corresponding historical consensus success rates, and obtain dynamic arbitration thresholds from preset adjustment curves based on historical consensus success rates;

[0022] The difference between the state judgment parameters of the first control core and the state judgment parameters of the second control core is calculated, and the calculated real-time difference is compared with the dynamic arbitration threshold.

[0023] When the real-time difference continues to exceed the dynamic arbitration threshold, a backtracking trigger signal is generated and the historical consensus success rate is updated.

[0024] As a further aspect of the present invention: the calculation of the difference between the state judgment parameters of the first control core and the state judgment parameters of the second control core specifically includes:

[0025] The state judgment parameter is decomposed into multiple parameter components, and the contribution weight of each parameter component in the difference calculation is determined based on the historical fluctuation range of each parameter component.

[0026] The parameter components corresponding to the control cores of both parties are subjected to difference calculation, and the difference calculation result is weighted with the contribution weight to generate a multidimensional difference vector;

[0027] A dynamic projection transformation is performed on the multidimensional difference vector, and the projection magnitude on the arbitration decision plane is calculated. The projection magnitude is used as the real-time difference degree.

[0028] As a further aspect of the present invention: the retry instruction with a random delay period specifically includes:

[0029] Based on the historical backtracking success rate statistics, the basic delay value is obtained from the preset delay base table;

[0030] Based on the current dual-core interactive signal quality evaluation parameters, the baseline delay value is dynamically adjusted to generate an optimized delay benchmark;

[0031] Based on the optimized delay baseline, a random disturbance component is introduced to form a random delay period and output a retry command.

[0032] As a further aspect of the present invention: the dynamic adjustment of the base delay value to generate an optimized delay benchmark specifically includes:

[0033] Extract the timing stability features and amplitude consistency features from the dual-core interactive signal, and calculate the timing stability deviation and amplitude consistency fluctuation coefficient respectively.

[0034] Multiply the timing stability deviation by the amplitude consistency fluctuation coefficient to obtain the comprehensive signal quality evaluation factor;

[0035] The corresponding delay adjustment coefficient is obtained by querying the preset delay adjustment mapping table based on the signal quality comprehensive evaluation factor;

[0036] Multiply the base delay value by the delay adjustment factor to generate the optimized delay baseline.

[0037] As a further aspect of the present invention: the switching to the safe operating mode and driving the data line to work according to preset basic parameters specifically includes:

[0038] Analyze the trends of key parameters in historical failure records to identify the dominant characteristics that lead to consensus decision failure;

[0039] Based on the dominant characteristics, a matching combination of basic parameters is selected from a pre-defined degradation strategy library;

[0040] Based on the combination of basic parameters, corresponding configuration instructions are generated to drive the data line into a safe operating state.

[0041] As a further aspect of the present invention: the identification of the dominant features leading to consensus decision failure specifically includes:

[0042] Extract multiple consecutive failure samples from historical failure records, and use the sequence of state judgment parameter differences in each failure sample as the parameter change trajectory.

[0043] The parameter change trajectory is segmented and sliced, and the cumulative change of each parameter component within each slice interval is calculated to obtain the cumulative contribution of each parameter component.

[0044] The parameter components are sorted according to their cumulative contribution, and the parameter components whose cumulative contribution exceeds a set threshold are selected as the dominant features.

[0045] A data cable that intelligently switches between data transmission and charging includes:

[0046] At least one processor;

[0047] At least one memory for storing at least one program;

[0048] When the at least one program is executed by the at least one processor, the at least one processor implements the data cable system for intelligent switching of data transmission and charging.

[0049] The beneficial effects of this invention are:

[0050] (1) This invention constructs multiple protections through dual-core independent asynchronous signal acquisition, distributed consensus decision-making, and state backtracking mechanisms. Specifically, the dual-core synchronous management module ensures consistency of the initial state through encrypted signaling exchange and cross-validation; the asynchronous signal processing module effectively suppresses the influence of noise through multi-scale sliding windows and time-frequency domain feature fusion; and the consensus decision arbitration module achieves accurate quantification of differences through dynamic projection transformation and adaptive thresholds. When a single core is interfered with and makes a misjudgment, the other core can serve as a verification benchmark, and the consensus mechanism prevents the erroneous state from migrating.

[0051] (2) This invention achieves autonomous fault diagnosis and degradation recovery of the system through a safety mode control module. This module analyzes the parameter change trajectory of historical failure records, uses segmented slicing and weighted contribution calculation to accurately identify the dominant fault characteristics, and dynamically selects the optimal combination of basic parameters from the degradation strategy library accordingly. For example, when the identified protocol negotiation-related parameters are the dominant characteristics, it automatically switches to the basic charging mode to avoid complex protocol interactions; when environmental interference is the dominant factor, it adopts the lowest speed robust communication mode. This accurate degradation strategy based on fault characteristics ensures that basic functions can still be maintained in extreme environments. Attached Figure Description

[0052] The invention will now be further described with reference to the accompanying drawings.

[0053] Figure 1 This is a system block diagram of the present invention;

[0054] Figure 2 This is a data wireframe diagram in this invention. Detailed Implementation

[0055] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0056] Example 1, please refer to Figure 1 As shown, the present invention is a data cable system for intelligently switching between data transmission and charging, comprising:

[0057] The dual-core synchronization management module is used to initialize and collaboratively start up when the data cable is connected to the device. It starts the first control core and the second control core and controls them to exchange encrypted synchronization signaling for state calibration, so that the two cores enter a consistent initial detection state.

[0058] The asynchronous signal processing module takes the initial detection state as input, and the two cores independently and asynchronously acquire the original electrical signals from the communication pin, perform preprocessing and feature extraction, and output their own independent state judgment parameters.

[0059] The consensus decision arbitration module takes the state judgment parameters of the dual cores as input, receives the state transition request generated by any control core, compares and arbitrates between the two cores through encrypted state request packets, and outputs a backtracking trigger signal.

[0060] The state rollback and recovery module takes the rollback trigger signal as input, forces the dual cores to clear the current disputed state and roll back to the previous stable state confirmed by both parties. After the rollback is completed, it outputs a retry instruction with a random delay period.

[0061] The security mode control module forces the system to switch to a secure operation mode when consensus decision failures occur consecutively a predetermined number of times, driving the data line to work according to preset basic parameters.

[0062] In the dual-core synchronization management module, when the data line is connected to the device, after the power supply pin voltage stabilizes, the first and second control cores initiate independent random number generation processes. Each control core obtains a physical random source as an entropy source by acquiring the phase jitter characteristics of its internal oscillator. Specifically, each control core continuously acquires the metastable phase values ​​of the oscillator edge 64 times, combining the parity states of these phase values ​​into a 64-bit binary sequence as a random synchronization seed. The two control cores exchange their generated random synchronization seeds via a dedicated internal serial communication channel using differential signaling. This channel uses the AES-128 algorithm to encrypt the transmitted data.

[0063] Each control core, upon receiving a random synchronization seed from the other, executes the same processing procedure. Specifically, it performs a bitwise XOR operation between its own generated random synchronization seed and the received random synchronization seed to generate a 128-bit fused seed. Then, using this fused seed as input, it calculates a 256-bit encrypted synchronization signaling using the SHA-256 hash algorithm. The two control cores, through independent verification channels, transmit their calculated encrypted synchronization signaling to each other in parallel for cross-verification. During verification, each control core compares the received encrypted synchronization signaling from the other with its own calculated encrypted synchronization signaling bit by bit.

[0064] When the encrypted synchronization signaling of the two control cores is completely consistent, both simultaneously read the preset initial state parameters from the non-volatile memory. These initial state parameters include: operating voltage reference value of 5V, data transmission rate reference value of 480Mbps, and current limit reference value of 1.5A. After reading, both control cores simultaneously set their respective running status registers to "initial detection state" and start their internal timers. When cross-validation is inconsistent, the two control cores will clear the exchanged random synchronization seeds, re-execute the random number generation process, and after three retries, record the error status in a specific status register.

[0065] In the asynchronous signal processing module, after entering the initial detection state, the two control cores begin the signal acquisition and processing flow respectively. The preprocessing stage employs a multi-scale sliding window processing method, specifically setting three observation windows of different durations: a 1-millisecond short window, a 5-millisecond medium window, and a 20-millisecond long window. Within each window, the control core performs the following processing on the acquired raw electrical signal: within the 1-millisecond window, it calculates the difference between the signal's peak and trough values ​​as the instantaneous amplitude change; within the 5-millisecond window, it calculates the standard deviation of the signal amplitude as a short-term stability indicator; and within the 20-millisecond window, it calculates the combination of the signal's zero-crossing rate and amplitude slope as a long-term stability feature. These feature values ​​extracted at these three scales are normalized and then combined to form the preprocessed signal.

[0066] The feature extraction stage analyzes the signal from both the time and frequency domains. The specific calculation method for the time-domain pulse count is as follows: First, a threshold based on the signal baseline amplitude is set, which is the baseline amplitude plus three times the standard deviation. Then, the number of pulses exceeding this threshold in the preprocessed signal is counted, and the duration of each pulse is recorded. The product of the pulse count and the average duration is used as the time-domain pulse count value. The frequency-domain energy distribution is calculated using a Fast Fourier Transform (FFT). After converting the preprocessed signal to the frequency domain, three key frequency bands are defined: a 0-10kHz fundamental band, a 10-50kHz intermediate band, and a 50-100kHz high-frequency band. The logarithmic ratio of the signal energy within each band is calculated, forming a 3D frequency-domain energy distribution vector.

[0067] During feature fusion, the time-domain pulse count and the frequency-domain energy distribution vector are combined using a weighted approach. The weights are determined as follows: First, the signal-to-noise ratio (SNR) of the current signal is calculated. When the time-domain SNR is higher than 40 dB, the time-domain weight is 0.6 and the frequency-domain weight is 0.4; when the time-domain SNR is between 20 and 40 dB, the time-domain weight is 0.4 and the frequency-domain weight is 0.6; when the time-domain SNR is lower than 20 dB, the time-domain weight is 0.2 and the frequency-domain weight is 0.8. The weighted time-domain features and frequency-domain features are then concatenated to form a 6-dimensional feature vector.

[0068] The generation of status judgment parameters is achieved through similarity matching. Preset protocol feature templates include three standard modes: USB-PD protocol, QC protocol, and basic charging protocol. Similarity calculation uses a cosine similarity algorithm: the feature vector is multiplied by the dot product of each protocol template vector, and then divided by the product of their respective moduli. The dynamic threshold is set based on the historical matching success rate, specifically calculated as: Dynamic threshold = Basic threshold 0.8 + 0.1 × Success rate of the last 10 matches. When the similarity between a feature vector and a protocol template exceeds the corresponding dynamic threshold, status judgment parameters containing the protocol type and confidence level are generated.

[0069] In the consensus decision arbitration module, the difference calculation process begins with the decomposition of the state judgment parameters. These parameters are decomposed into six components: protocol type confidence, signal amplitude matching, timing characteristic conformity, frequency domain distribution similarity, historical decision consistency, and environmental interference index. The historical fluctuation range of each component is obtained by statistically analyzing the most recent 100 valid records. Specifically, the fluctuation range is calculated as the difference between the maximum and minimum values ​​of that component within these 100 records. The contribution weight is determined as follows: the larger the fluctuation range, the smaller the weight assigned to that component. Specifically, the weight is equal to the sum of the fluctuation ranges of the other five components divided by five times the fluctuation range of the current component, ensuring that the sum of the weights of all components equals 1.

[0070] After obtaining the contribution weights of each parameter component, the difference and weighted calculations of the parameter components are performed. First, the absolute differences between the two control cores on the six parameter components are calculated separately, resulting in six difference components. Then, each difference component is multiplied by its corresponding contribution weight to obtain a weighted difference component. These six weighted difference components form a six-dimensional multidimensional difference vector. The specific process of weighted calculation is as follows: the weighted difference of each parameter component is equal to the product of the absolute difference of that parameter component and its corresponding contribution weight. The weighted differences of the six parameter components are arranged in a fixed order to form a multidimensional difference vector.

[0071] The specific implementation of dynamic projection transformation includes the following steps: First, an arbitration decision plane is established based on historical arbitration records. This plane consists of two main characteristic directions. The first characteristic direction corresponds to the weighted differences of protocol-related parameters (including protocol type confidence, signal amplitude matching, and timing feature compliance). The second characteristic direction corresponds to the weighted differences of environment-related parameters (including frequency domain distribution similarity, historical decision consistency, and environmental interference indicators). During projection transformation, the six-dimensional multidimensional difference vector is projected onto these two characteristic directions, and its projection length in the first characteristic direction and the projection length in the second characteristic direction are calculated. The projection modulus is calculated using the Euclidean norm, which is the square root of the sum of the squares of the two projection lengths.

[0072] The final determination of the real-time discrepancy needs to be compared with a dynamic arbitration threshold. The dynamic arbitration threshold is obtained based on the historical consensus success rate, which is the percentage of consensus reached in the most recent 20 arbitration decisions. The adjustment curve uses a piecewise linear function: when the historical consensus success rate is below 60%, the dynamic arbitration threshold is 0.7; when the historical consensus success rate is between 60% and 80%, the dynamic arbitration threshold decreases linearly from 0.7 to 0.5; when the historical consensus success rate is above 80%, the dynamic arbitration threshold is 0.5. During the comparison process, the real-time discrepancy is compared with the dynamic arbitration threshold for three consecutive periods. When the real-time discrepancy exceeds the dynamic arbitration threshold for three consecutive periods, a backtracking trigger signal is generated, and the historical consensus success rate is updated, incorporating the latest arbitration result into the statistics. The update of the historical consensus success rate uses a sliding window method, keeping the statistical base of the most recent 20 records unchanged, removing the earliest record, adding the latest record, and recalculating the success rate.

[0073] In the state backtracking and recovery module, the base delay value is obtained from a preset delay base table based on the historical backtracking success rate statistics. The historical backtracking success rate is calculated by statistically analyzing the proportion of successful recovery to a stable state in the most recent 50 backtracking operations, using the following formula: ;in Indicates the success rate of historical regression. This indicates the number of successful attempts. The delay base table is a preset two-dimensional mapping table, with the horizontal axis representing the historical backtracking success rate. (Divided into segments: 0-0.3, 0.3-0.6, 0.6-1.0), with the vertical axis representing the corresponding base delay value. (Unit: milliseconds), for example when When ≤0.3 =100, when 0.3 < ≤0.6 =50, when >0.6 =20. The control core calculates in real time... The value is queried from this table and output directly. .

[0074] The baseline delay value is dynamically adjusted based on current dual-core interactive signal quality assessment parameters to generate an optimized delay benchmark. This process includes extracting timing stability features and amplitude consistency features, and calculating corresponding indices. Timing stability deviation is also considered. The specific formula is calculated by analyzing the timestamp sequence of the dual-core interaction signal: ;in This indicates the number of sampling points (set to 100). Indicates the first A timestamp, Indicates the average time interval ( ); Amplitude Consistency Fluctuation Coefficient The formula for calculating using the signal amplitude sequence is as follows: ; The delay adjustment mapping table is set to a preset lookup table, based on... Values ​​mapped to delay adjustment coefficients ,For example When ≤0.1 =1.0, 0.1< ≤0.5 =1.5, Q>0.5 =2.0). Optimize latency benchmark. , Calculated by multiplication: ;

[0075] A random disturbance component is introduced based on the optimized delay baseline to form a random delay period and output a retry command. Random disturbance component It is generated using a linear congruential generator, with the following formula: ,in Generate uniformly distributed random numbers ranging from 0 to 1. Random delay period. The calculation is as follows: Automatically triggered after the cycle ends, the control core will The value is written to the timer register and counting begins. After counting is complete, a high-level signal is output as a retry instruction.

[0076] In the security mode control module, the switching process for the security operation mode begins with a deep analysis of historical failure records. These records are stored in non-volatile memory, preserving complete data from the most recent 100 consensus decision failures, including the sequence of state judgment parameter differences, environmental parameters, and timing information at the time of each failure. The parameter change trajectory is composed of the state judgment parameter difference sequence, which includes six parameter components: protocol type confidence difference, signal amplitude matching difference, timing feature conformity difference, frequency domain distribution similarity difference, historical decision consistency difference, and environmental interference index difference. The parameter change trajectory for each failure sample is recorded chronologically, with a sampling interval of 1 millisecond and a duration of 50 milliseconds for each sample, containing data from 50 sampling points.

[0077] The parameter change trajectory is segmented and sliced ​​using a fixed time window approach, dividing the 50-millisecond trajectory into five consecutive 10-millisecond slice intervals. Within each slice interval, the cumulative change of the six parameter components is calculated. The cumulative change is calculated as follows: for each parameter component, the sum of the absolute values ​​of all sampled points within that slice interval is calculated. Taking the protocol type confidence difference as an example, it is calculated in the first... The formula for calculating the cumulative change of each slice interval is: ;in Indicates the first The confidence difference value of protocol type for each sampling point The value range is from 0 to 4. The cumulative changes of the other five parameter components in each slice interval are calculated in the same way, and finally 30 cumulative change values ​​of the 6 parameter components in 5 slice intervals are obtained.

[0078] The cumulative contribution of each parameter component is calculated by summing the cumulative changes of each parameter component across all slice intervals. The specific calculation method is as follows: for each parameter component, its cumulative changes across the five slice intervals are weighted and summed. The weighting coefficients are allocated according to the importance of the slice intervals, with the weights for the five slice intervals from earliest to latest being 0.1, 0.15, 0.25, 0.3, and 0.2, respectively. For example, the formula for calculating the cumulative contribution of protocol type confidence differences is: ;in Indicates cumulative contribution. , , , , This represents the cumulative change in cumulative contribution within the first to fifth slice intervals. The cumulative contributions of other parameter components are calculated using the same method, resulting in the cumulative contribution values ​​for all six parameter components. A threshold is set at 1.5 times the average cumulative contribution of all parameter components, and parameter components with cumulative contributions exceeding this threshold are identified as dominant features.

[0079] The degradation strategy library is a pre-configured lookup table containing basic parameter combinations corresponding to three typical dominant feature combinations. When the dominant features are differences in protocol type confidence and signal amplitude matching, basic parameter combination A is selected, including 5V operating voltage, 500mA current limit, and USB 2.0 data transfer mode. When the dominant features are differences in timing feature compliance and frequency domain distribution similarity, basic parameter combination B is selected, including 5V operating voltage, 1A current limit, and charging-only mode. When the dominant feature is a difference in environmental interference indicators, basic parameter combination C is selected, including 5V operating voltage, 500mA current limit, and lowest charging speed mode. These basic parameter combinations are obtained directly from the degradation strategy library without additional calculation.

[0080] Configuration instructions are generated based on the selected combination of fundamental parameters, converting each parameter into hardware register configuration values. Operating voltage parameters are converted into the voltage divider ratio of the regulator control register, current limit parameters into the threshold setting of the current sensing module, and data transmission mode parameters into the mode selection bits of the USBPHY control register. These configuration values ​​are assembled into a 32-bit configuration instruction according to a predetermined instruction format and sent to the configuration registers of each functional module via the internal bus. After the configuration instruction is sent, the hardware state machine is activated to switch to a safe operating mode. This process is completed within 10 microseconds, ensuring that the data line quickly recovers from an abnormal state to a controllable and safe operating state.

[0081] Example 2, please refer to Figure 2 As shown, the present invention also provides a data cable for intelligently switching between data transmission and charging, comprising:

[0082] At least one processor;

[0083] At least one memory for storing at least one program;

[0084] When the at least one program is executed by the at least one processor, the at least one processor implements the data cable system for intelligent switching of data transmission and charging.

[0085] The working principle of this invention is as follows: A dual-core synchronous management module activates two control cores and exchanges encrypted synchronous signaling to complete state calibration upon device connection. An asynchronous signal processing module uses a multi-scale sliding window to preprocess and extract features from the acquired raw electrical signals, generating state judgment parameters that include protocol type and confidence level. A consensus decision arbitration module calculates the difference between the dual-core state judgment parameters and compares dynamic arbitration thresholds, outputting a backtracking trigger signal. A state backtracking recovery module generates retry instructions with random delay periods based on historical backtracking success rates and signal quality assessments. Finally, a safe mode control module analyzes historical failure records to identify dominant features and selects matching basic parameter combinations from the degradation strategy library to drive the data line into a safe operating state, thereby achieving intelligent switching and fault recovery of data line functions in complex electromagnetic environments.

[0086] The foregoing has provided a detailed description of one embodiment of the present invention, but this description is merely a preferred embodiment and should not be construed as limiting the scope of the invention. All equivalent variations and modifications made within the scope of the claims of this invention should still fall within the patent coverage of this invention.

Claims

1. A smart switch data transmission and charging data line system, characterized in that, include: The dual-core synchronization management module is used to initialize and collaboratively start up when the data cable is connected to the device. It starts the first control core and the second control core and controls them to exchange encrypted synchronization signaling for state calibration, so that the two cores enter a consistent initial detection state. The asynchronous signal processing module takes the initial detection state as input, and the two cores independently and asynchronously acquire the original electrical signals from the communication pin, perform preprocessing and feature extraction, and output their own independent state judgment parameters. The consensus decision arbitration module takes the state judgment parameters of the dual cores as input, receives the state transition request generated by any control core, compares and arbitrates between the two cores through encrypted state request packets, and outputs a backtracking trigger signal. The state rollback and recovery module takes the rollback trigger signal as input, forces the dual cores to clear the current disputed state and roll back to the previous stable state confirmed by both parties. After the rollback is completed, it outputs a retry instruction with a random delay period. The security mode control module forces the system to switch to a secure operation mode when consensus decision failures occur consecutively a predetermined number of times, driving the data line to work according to preset basic parameters.

2. The data line system of claim 1, wherein, The process of enabling both cores to enter a consistent initial detection state specifically includes: After the power supply pin is powered on, the first control core and the second control core generate random synchronization seeds respectively, and exchange random synchronization seeds through the internal encryption channel; Based on the exchanged random synchronization seed, the control cores of both parties generate encrypted synchronization signaling and cross-verify their respective generated encrypted synchronization signaling through a verification channel. When cross-validation is consistent, both control cores simultaneously load preset initial state parameters and enter the initial detection state; when cross-validation is inconsistent, the random synchronization seed generation step is re-executed.

3. The data line system of claim 1, wherein, The preprocessing and feature extraction processes, which output independent state judgment parameters, specifically include: The acquired raw electrical signals are processed by a multi-scale sliding window to extract signal amplitude variation features and signal stability features at different time scales, thereby generating a preprocessed signal. The time-domain pulse count and frequency-domain energy distribution of the preprocessed signal are calculated separately, and the time-domain pulse count and frequency-domain energy distribution are weighted and fused to form a feature vector. The feature vector is matched with the preset protocol feature template for similarity. When the matching degree exceeds the dynamic threshold, a valid state judgment parameter is generated.

4. The data line system of claim 1, wherein, The process of comparing and arbitrating encrypted state request packets between the two cores and outputting a backtracking trigger signal specifically includes: Receive status judgment parameters and corresponding historical consensus success rates, and obtain dynamic arbitration thresholds from preset adjustment curves based on historical consensus success rates; The difference between the state judgment parameters of the first control core and the state judgment parameters of the second control core is calculated, and the calculated real-time difference is compared with the dynamic arbitration threshold. When the real-time difference continues to exceed the dynamic arbitration threshold, a backtracking trigger signal is generated and the historical consensus success rate is updated.

5. The data line system of claim 4, wherein, The step of calculating the difference between the state judgment parameters of the first control core and the state judgment parameters of the second control core specifically includes: The state judgment parameter is decomposed into multiple parameter components, and the contribution weight of each parameter component in the difference degree calculation is determined based on the historical fluctuation range of the parameter component; The parameter components corresponding to the control cores of the two parties are subjected to difference operation, and the difference operation result is weighted with the contribution weight to generate a multi-dimensional difference vector; The multi-dimensional difference vector is subjected to dynamic projection transformation, the projection modulus on the arbitration decision plane is calculated, and the projection modulus is taken as the real-time difference degree.

6. The data line system of claim 1, wherein, The output retry instruction with a random delay period specifically includes: Based on the historical backtracking success rate statistical result, a basic delay value is obtained from a preset delay base table; The basic delay value is dynamically adjusted in combination with the current dual-core interaction signal quality evaluation parameter to generate an optimized delay benchmark; On the basis of the optimized delay benchmark, a random disturbance component is introduced to form a random delay period and output a retry instruction.

7. The data line system of claim 6, wherein, The basic delay value is dynamically adjusted to generate an optimized delay benchmark, specifically including: The timing stability feature and the amplitude consistency feature in the dual-core interaction signal are extracted, and the timing stability deviation and the amplitude consistency fluctuation coefficient are calculated respectively; The timing stability deviation is multiplied by the amplitude consistency fluctuation coefficient to obtain a signal quality comprehensive evaluation factor; The signal quality comprehensive evaluation factor is used to query a preset delay adjustment mapping table to obtain a corresponding delay adjustment coefficient; The basic delay value is multiplied by the delay adjustment coefficient to generate an optimized delay benchmark.

8. The data line system of claim 1, wherein, The switching to the safe operation mode and driving the data line according to the preset basic parameter specifically includes: The key parameter change trend in the historical failure record is analyzed to identify the dominant feature causing the consensus decision failure; The matching basic parameter combination is selected from a preset degradation strategy library according to the dominant feature; The corresponding configuration instruction is generated based on the basic parameter combination to drive the data line into a safe operation state.

9. The data line system of claim 8, wherein, The dominant feature causing the consensus decision failure is identified, specifically including: Multiple continuous failure samples are extracted from the historical failure record, and the state judgment parameter difference degree sequence in each failure sample is taken as a parameter change trajectory; The parameter change trajectory is subjected to segmentation and slicing processing, the cumulative change amount of each parameter component in each slice interval is calculated, and the cumulative contribution of each parameter component is obtained; The parameter components are sorted according to the cumulative contribution, and the parameter components with cumulative contribution exceeding a set threshold are selected as the dominant features.

10. A data line for intelligently switching data transmission and charging, characterized in that, It includes: At least one processor; At least one memory for storing at least one program; When the at least one program is executed by the at least one processor, the at least one processor implements the data line system for intelligently switching data transmission and charging according to any one of claims 1-9.

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