A method and system for detecting and controlling the quality of a pulse signal of a carbon dioxide laser

Abstract

The application discloses a kind of carbon dioxide laser pulse signal quality detection and anti-interference control method and system, it is related to the field of device using stimulated emission, this method includes: when enabling effective state indication is effective, external pulse width modulation signal is sampled, and the sequence of multiple-point sampling buffer is obtained, the rising edge and the falling edge of external pulse width modulation signal are determined, and the pulse period measurement value and the pulse width measurement value of current pulse are calculated;Determine the preset duty cycle interval to which the duty cycle of current pulse belongs, and generate a duty cycle interval flag;Measure power measurement value, and compare with the proportional threshold value generated based on current pulse width measurement value, to determine power abnormal state;When power abnormal state is abnormal, determine shielding period in preset mapping table according to duty cycle interval flag, generate protection control signal, and perform anti-interference control to laser. By implementing the present application, abnormal detection and anti-interference control of laser output in a larger duty cycle range can be realized.

Description

Technical Field

[0001] This application relates to the field of devices utilizing stimulated emission, and more particularly to a method and system for detecting and controlling the quality of pulse signals of a carbon dioxide laser. Background Technology

[0002] Carbon dioxide lasers, as an important type of gas laser, have been widely used in industrial processing (such as cutting, welding, and marking), medical applications, and scientific research due to their advantages such as high conversion efficiency, wide output power range, and good beam quality. In practical applications, pulse width modulation (PWM) technology is often used to precisely control the laser's output power by adjusting the duty cycle of the pulse signal to adapt to different process requirements.

[0003] In related technologies, to ensure the safe and stable operation of the laser, a power detection module is installed at the laser's power output end to continuously monitor the laser's output optical power. Simultaneously, a fixed power protection threshold is preset within the control system. During operation, the control system compares the real-time monitored power value with this power protection threshold. If the instantaneous power or the average power integrated within a short time window exceeds this power protection threshold, the protection circuit is triggered, cutting off the laser excitation or issuing an alarm signal to prevent damage to the laser itself or the workpiece due to abnormal power.

[0004] However, this protection method, which uses a single fixed threshold, is limited in effectiveness when faced with a wide range of duty cycle adjustments. To accommodate high-power operation at high duty cycles, the fixed threshold must be set relatively high, but this will cause the system to become less sensitive to power anomalies when operating at low duty cycles, making it difficult to achieve effective protection that matches the current operating state. Summary of the Invention

[0005] This application provides a method and system for detecting and controlling the pulse signal quality of a carbon dioxide laser, which is used to achieve abnormal detection and interference control of the laser output power over a wider duty cycle range.

[0006] In a first aspect, this application provides a method for pulse signal quality detection and anti-interference control of a carbon dioxide laser, applied to a laser pulse control system. The method includes: clock cycle sampling of a control enable signal to determine an enable active state; clock cycle sampling of an external pulse width modulation signal to obtain a multi-point sampling buffer sequence when the enable active state is active; determining the rising and falling edges of the external pulse width modulation signal based on the multi-point sampling buffer sequence; calculating the pulse period and pulse width measurement values ​​of the current pulse based on the rising and falling edges; determining the preset duty cycle interval to which the current pulse's duty cycle belongs based on the pulse period and pulse width measurement values, and generating a duty cycle interval flag; cumulatively measuring the forward power detection signal of the laser during the pulse active period to obtain a power measurement value, and comparing the power measurement value with a proportional threshold generated based on the current pulse width measurement value to determine an abnormal power state; when the abnormal power state is determined to be abnormal, performing address matching in a preset mapping table based on the duty cycle interval flag to obtain a shielding period; and generating a protection control signal based on the shielding period to perform anti-interference control on the laser.

[0007] In the above embodiments, the laser pulse control system accumulates the power detection signal during the pulse's effective period, compares the accumulated value with a proportional threshold dynamically generated based on the current pulse width, and realizes power anomaly detection adapted to the duty cycle. When a power anomaly is detected, the system queries the corresponding shielding period based on the duty cycle interval flag, generates a protection control signal to perform anti-disturbance control on the laser, and realizes an adaptive protection mechanism across the entire duty cycle range.

[0008] In conjunction with some embodiments of the first aspect, in some embodiments, the step of determining the rising and falling edges of the external pulse width modulation signal based on the multi-point sampling buffer sequence specifically includes: dividing the multi-point sampling buffer sequence into a first half window and a second half window; determining a rising edge when all sampled values ​​in the first half window are low and all sampled values ​​in the second half window are high; and determining a falling edge when all sampled values ​​in the first half window are high and all sampled values ​​in the second half window are low.

[0009] In the above embodiment, the laser pulse control system divides the sampling sequence into two windows, one before and one after, and checks the level consistency of the sampled values ​​in each window. When the first half of the window is all low and the second half is all high, it indicates that the signal has undergone a low-to-high transition within the sampling window, which the system identifies as a rising edge. Conversely, when the first half is all high and the second half is all low, it is identified as a falling edge. By using multi-point consistency judgment, signal glitches and noise interference are effectively filtered out, improving the reliability and accuracy of edge detection.

[0010] In conjunction with some embodiments of the first aspect, in some embodiments, the step of determining the preset duty cycle interval to which the current pulse's duty cycle belongs based on the pulse period measurement value and the pulse width measurement value, and generating a duty cycle interval flag, specifically includes: performing a binary right shift operation of different bit lengths on the pulse period measurement value to obtain multiple power-of-two frequency division results; performing an addition combination operation on the selected power-of-two frequency division results to obtain duty cycle clock count thresholds corresponding to different duty cycle percentages; comparing the current pulse width measurement value with the duty cycle clock count threshold to determine the duty cycle interval to which the current pulse belongs, and generating a duty cycle interval flag.

[0011] In the above embodiments, the laser pulse control system utilizes a binary right shift operation to achieve efficient duty cycle interval determination. By performing right shifts of different numbers on the pulse period measurement value, frequency division results such as 1 / 2, 1 / 4, and 1 / 8 of the period value are obtained. Specific frequency division results are selected and added together to generate a threshold sequence corresponding to different duty cycle percentages. For example, 1 / 2 corresponds to a 50% duty cycle, 1 / 4 corresponds to a 25% duty cycle, and 3 / 4 is obtained by adding 1 / 2 and 1 / 4 to get a 75% duty cycle. The current pulse width is compared with each threshold to determine its duty cycle interval and generate a corresponding flag, which can improve the accuracy of duty cycle information.

[0012] In conjunction with some embodiments of the first aspect, in some embodiments, the step of sampling the external pulse width modulation signal for clock cycles to obtain a multi-point sampling buffer sequence when the enable valid state indication is valid specifically includes: when the enable valid state indication is valid, determining the delay count value obtained by accumulating and counting the clock cycles after the laser pulse control system is powered on; when the delay count value does not reach a preset delay threshold, selecting a preheating preset signal as an input source and connecting it to the cascaded register chain to obtain a multi-point sampling buffer sequence; when the delay count value reaches the preset delay threshold, selecting an external pulse width modulation signal as an input source and connecting it to the cascaded register chain to obtain a multi-point sampling buffer sequence.

[0013] In the above embodiment, the laser pulse control system starts a delay counter after power-on and continuously accumulates the clock cycle. During the period before the delay count value reaches the preset threshold, the system selects an internally generated preheating preset signal as the input source. This signal has a fixed low duty cycle characteristic, which enables the laser to operate at a lower power during the preheating stage, avoiding overshoot damage during cold start. When the delay count value reaches the threshold, it indicates that the preheating is complete, and the system switches to an external pulse width modulation signal to enter the normal operating mode, ensuring a smooth transition in the laser startup process and extending the device's service life.

[0014] In conjunction with some embodiments of the first aspect, in some embodiments, the step of selecting a preheating preset signal as an input source to connect to the cascaded register chain when the delay count value has not reached the preset delay threshold, to obtain a multi-point sampling buffer sequence, specifically includes: performing multi-sampling and logical combination judgment on the externally input test enable signal to obtain the test enable register state; when the test enable register state is valid, selecting a test signal as an input source to connect to the cascaded register chain to obtain a multi-point sampling buffer sequence; when the test enable register state is invalid and the delay count value has not reached the preset delay threshold, selecting a preheating preset signal as an input source to connect to the cascaded register chain to obtain a multi-point sampling buffer sequence.

[0015] In the above embodiments, the laser pulse control system performs multi-sampling of the external test enable signal and eliminates the influence of signal jitter by judging the consistency of multiple consecutive clock cycles, thereby obtaining a stable test enable state. In test mode, the system prioritizes the test signal as the input source, which facilitates system debugging and functional verification. When the test enable is invalid and the system is still in the warm-up stage, the system selects the preset warm-up signal. This three-level signal source selection mechanism not only ensures the normal working process but also provides a flexible test interface, thereby improving the maintainability and debugging efficiency of the system.

[0016] In conjunction with some embodiments of the first aspect, in some embodiments, after the step of calculating the pulse period measurement value and pulse width measurement value of the current pulse based on the rising edge and falling edge, the method further includes: extracting the historical pulse period measurement value of the previous cycle; calculating the absolute value of the difference between the pulse period measurement value of the current cycle and the historical pulse period measurement value to obtain the cycle deviation amount; and generating a cycle quality abnormality flag when the cycle deviation amount exceeds a preset cycle deviation tolerance.

[0017] In the above embodiments, the laser pulse control system saves the measurement value of the previous cycle as a historical reference, calculates the deviation between the current cycle and the historical cycle, and by setting a cycle deviation tolerance, the system can detect the cycle jitter or sudden change of the external pulse signal. When the deviation exceeds the tolerance range, it indicates that the input signal quality has deteriorated or there is interference. The system generates a cycle quality abnormality flag, which can promptly detect unstable factors of the input signal and avoid abnormal laser output caused by signal quality problems.

[0018] In conjunction with some embodiments of the first aspect, in some embodiments, the step of generating a periodic quality anomaly flag when the periodic deviation exceeds a preset periodic deviation tolerance specifically includes: when the periodic deviation exceeds the preset periodic deviation tolerance, performing an increment operation on the internal periodic quality counter to obtain a periodic quality count value; when the periodic deviation is less than the preset periodic deviation tolerance, clearing the periodic quality counter to zero; and generating a periodic quality anomaly flag when the periodic quality count value reaches a threshold for the number of consecutive non-conforming items.

[0019] In the above embodiments, the laser pulse control system adopts a continuous judgment mechanism to improve the reliability of periodic quality detection. When the periodic deviation exceeds the limit, the system increments the internal counter instead of immediately alarming. Only when the deviation exceeds the limit for multiple consecutive periods and the count value reaches the preset threshold for the number of consecutive non-compliance times is an abnormal flag generated. If a period with normal deviation occurs in the middle, the counter is immediately cleared and counted again. This effectively filters out occasional signal jitter interference, avoids false alarms, and can accurately identify continuous signal quality problems, thereby improving the system's anti-interference capability and judgment accuracy.

[0020] In a second aspect, embodiments of this application provide a laser pulse control system, which includes: one or more processors and a memory; the memory is coupled to the one or more processors, and the memory is used to store computer program code, which includes computer instructions, and the one or more processors call the computer instructions to cause the laser pulse control system to perform the method described in the first aspect and any possible implementation thereof.

[0021] Thirdly, embodiments of this application provide a computer-readable storage medium including instructions that, when executed on a laser pulse control system, cause the laser pulse control system to perform the method described in the first aspect and any possible implementation thereof.

[0022] Fourthly, embodiments of this application provide a computer program product containing instructions that, when the computer program product is run on a laser pulse control system, cause the laser pulse control system to perform the method described in the first aspect and any possible implementation thereof.

[0023] Understandably, the laser pulse control system provided in the second aspect, the computer storage medium provided in the third aspect, and the computer program product provided in the fourth aspect are all used to execute the methods provided in the embodiments of this application. Therefore, the beneficial effects they can achieve can be referred to the beneficial effects in the corresponding methods, and will not be repeated here.

[0024] One or more technical solutions provided in the embodiments of this application have at least the following technical effects or advantages:

[0025] 1. Due to the adoption of a power anomaly detection mechanism based on dynamic duty cycle adjustment, the duty cycle range is dynamically determined and a corresponding proportional threshold is generated by measuring the pulse period and width parameters in real time. Therefore, the system can adaptively adjust the protection threshold according to the current working state, using a lower power protection threshold at low duty cycles and a higher power protection threshold at high duty cycles. This effectively solves the problem that fixed thresholds in existing technologies cannot adapt to a wide duty cycle range, thereby achieving accurate power anomaly detection and effective protection across the entire duty cycle range.

[0026] 2. Due to the adoption of a phased signal source switching and delayed start control mechanism, by selecting the internal preheating preset signal during the preheating stage after the system is powered on, and switching to the external pulse width modulation signal after the preheating is completed, the laser can start up smoothly with lower power, avoiding power overshoot and thermal stress concentration during cold start. This effectively solves the problems of device damage and shortened lifespan that are prone to occur during the laser start-up stage in the prior art, thereby achieving smooth start-up and long-term stable operation of the laser.

[0027] 3. Due to the adoption of a periodic quality monitoring mechanism based on continuous judgment, by calculating the deviation between adjacent cycles and setting a threshold for the number of consecutive non-compliance cycles, an abnormal flag is generated only when the deviation exceeds the limit for multiple consecutive cycles. Therefore, the system can accurately distinguish between occasional interference and continuous signal quality problems, which not only avoids false alarms caused by instantaneous jitter, but also promptly detects real signal anomalies. This effectively solves the system stability problem caused by insufficient monitoring of input signal quality in existing technologies, and thus achieves highly reliable pulse signal quality detection and anti-interference control. Attached Figure Description

[0028] Figure 1 This is a flowchart illustrating a method for detecting and controlling the quality of a carbon dioxide laser pulse signal in an embodiment of this application.

[0029] Figure 2 This is another flowchart illustrating the method for detecting and controlling the quality of carbon dioxide laser pulse signals in this application.

[0030] Figure 3 This is a schematic diagram of the physical device structure of a laser pulse control system in an embodiment of this application. Detailed Implementation

[0031] The terminology used in the following embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. As used in the specification of this application, the singular expressions “a,” “an,” “the,” “the,” and “this” are intended to include the plural expressions as well, unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used in this application refers to any or all possible combinations including one or more of the listed items.

[0032] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as implying or suggesting relative importance or implicitly indicating the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature, and in the description of the embodiments of this application, unless otherwise stated, "multiple" means two or more.

[0033] In practical industrial applications of carbon dioxide lasers, the laser pulse control system needs to handle a variety of specialized technical parameters and signals. The pulse width modulation (PWM) signal is the core control signal for controlling the laser's output power. This signal controls the average output power of the laser by adjusting the ratio of the high-level duration to the entire cycle time. Duty cycle, as a key parameter of the PWM signal, is defined as the ratio of the pulse high-level time to the pulse period, usually expressed as a percentage. During laser processing, different materials and processes require different duty cycle settings. For example, metal cutting may require a high duty cycle of over 80% to obtain sufficient cutting power, while precision marking may only require a low duty cycle of less than 20% to avoid excessive material ablation.

[0034] Forward power detection of the laser is achieved through a photodetector placed at the output of the laser resonant cavity. This detector converts the laser power into an electrical signal for real-time monitoring by the control system. Due to thermal imbalance in the gain medium and mode competition within the resonant cavity during laser startup, power spikes and unstable output are prone to occur. Therefore, a preheating process is required to bring the laser components to thermal equilibrium. Cascaded register chains are a common structure in digital signal processing. By connecting multiple registers in series to form a shift register group, it is possible to continuously sample the input signal and store historical data for multiple clock cycles, providing a data foundation for edge detection and signal quality analysis.

[0035] In complex industrial environments, laser control systems face various disturbances such as electromagnetic interference, power fluctuations, and mechanical vibrations. These factors can cause glitches, jitter, or periodic changes in the control signal, affecting the stability of laser output and processing quality. Therefore, disturbance rejection control has become a key technology to ensure the reliable operation of lasers, requiring optimized design across the entire chain from signal detection and anomaly identification to protection response.

[0036] The following describes the process of the method provided in this implementation. Please refer to [link / reference]. Figure 1 This is a flowchart illustrating a method for detecting and controlling the quality of a carbon dioxide laser pulse signal in an embodiment of this application.

[0037] S101. Sample the control enable signal for a clock cycle to determine the enable status.

[0038] The control enable signal refers to the main control switch signal of the laser pulse control system, used to indicate whether the system allows laser output control. Clock cycle sampling refers to periodically reading the signal according to a fixed frequency of the system clock, typically using a sampling frequency of tens to hundreds of megahertz. The enable valid state indicates the valid or invalid status of the control enable signal after sampling and judgment.

[0039] Specifically, the laser pulse control system samples the externally input control enable signal at the rising edge of each system clock cycle and stores the sampled value in an internal register. To eliminate potential glitches on the signal lines, the system employs multi-sampling and consistency judgment methods, continuously sampling the signal value for multiple clock cycles. Only when all consecutive sampled values ​​are valid is the enable state confirmed as true. This process ensures that the system only begins subsequent pulse signal processing after a stable enable command has been clearly received.

[0040] In some embodiments, reliable sampling and state determination of the control enable signal can be achieved in several ways: Optionally, a three-sampling decision method is used, sampling the control enable signal within three consecutive clock cycles, performing a logical AND operation on the three sampled values, and determining that the enable is valid only when all three values ​​are high. This method can effectively filter out interference pulses with a duration of less than two clock cycles. Optionally, a state machine approach is used to implement the enable state determination. A three-state state machine is designed, including an idle state, a pre-enable state, and an enable state. After detecting the enable signal in the idle state, the system transitions to the pre-enable state. After confirming the enable signal is valid again in the pre-enable state, the system transitions to the enable state. If an invalid enable signal is detected at any time, the system immediately returns to the idle state. This method provides more flexible state transition control. It is understood that other digital filtering or state determination methods can also be used to achieve reliable detection of the enable signal, which is not limited here.

[0041] In some embodiments, the control enable signal may experience a brief failure and then recover during system operation. To address this, the system sets an enable signal failure protection time window. Within this time window, even if a brief failure of the enable signal is detected, the system maintains its current operating state. Only when the enable signal remains continuously invalid for more than the protection time window will the system execute a protection action to stop laser output, thus avoiding frequent start-stops caused by poor signal line contact or transient interference.

[0042] S102. When the enable status indicator is valid, the external pulse width modulation signal is sampled for clock cycles to obtain a multi-point sampling buffer sequence.

[0043] The external pulse width modulation signal refers to the PWM control signal from the host controller or human-machine interface, used to control the laser's output power. Clock cycle sampling means synchronously sampling the PWM signal at the system clock frequency. A multi-point sampling buffer sequence refers to a data sequence formed by storing data from multiple consecutive sampling points in chronological order, used for subsequent signal analysis and processing.

[0044] Specifically, once the laser pulse control system confirms the enabled state, it begins high-speed sampling of the input PWM signal. The system uses cascaded D flip-flops to form a shift register chain. Each clock cycle, a new sampled value is input to the first stage of the register chain, while the values ​​of each stage are shifted backward, forming a buffer sequence containing the most recent N sampled values. For example, using an 8-stage register chain, the sampling history of the most recent 8 clock cycles can be stored. This multi-point sampling buffer sequence provides a continuous time-domain data foundation for subsequent edge detection and signal quality analysis.

[0045] In some embodiments, the sampling and buffering of external pulse width modulation signals can be implemented in several ways: Optionally, a ring buffer structure can be used, employing a circular queue constructed using dual-port RAM. The write pointer increments according to the clock cycle and wraps back to the starting position when it reaches the end of the buffer. The read pointer can read historical data of a specified length from any position. This method facilitates the implementation of variable-length sampling windows. Optionally, a parallel sampling register array can be used, employing multiple independent registers to sample the signal simultaneously. The sampling times of each register differ by a fixed phase delay. By combining the sampling results of multiple registers, a higher equivalent sampling rate can be obtained, improving the temporal resolution of edge detection. It is understood that other digital signal sampling and storage techniques can also be used to implement multi-point sampling buffering, which is not limited here.

[0046] In some embodiments, metastability issues may arise due to the asynchrony between the external PWM signal and the system clock. To address this, the system adds two levels of synchronization registers at the signal input. The first level register captures the asynchronous input signal, and the second level register eliminates metastability, ensuring that subsequent sampling yields stable logic levels and preventing metastability from propagating into subsequent logic circuits and causing functional abnormalities.

[0047] S103. Based on the multi-point sampling buffer sequence, determine the rising and falling edges of the external pulse width modulation signal.

[0048] The rising edge refers to the transition moment of the PWM signal from low to high, representing the start of the pulse. The falling edge refers to the transition moment of the PWM signal from high to low, representing the end of the pulse. The multi-point sampling buffer sequence provides continuous sampled data of the signal on the time axis for identifying level transitions.

[0049] Specifically, the laser pulse control system performs sliding window analysis on the buffer sequence, dividing the sequence into two sub-windows. The system checks whether all sampled values ​​in the first window are consistently at a certain level, and simultaneously checks whether all sampled values ​​in the second window are consistently at the opposite level. When the pattern of low before high after is satisfied, it is identified as a rising edge; when the pattern of high before low after is satisfied, it is identified as a falling edge. This method effectively suppresses glitches and noise on the signal through multi-point consistency judgment; only stable level transitions are identified as valid edges. The timing accuracy of edge detection depends on the system clock frequency; the higher the clock frequency, the higher the time resolution.

[0050] In some embodiments, edge detection based on multi-point sampling can be implemented in several ways: Optionally, a digital differentiation method can be used to calculate the difference between adjacent sampling points. When the difference exceeds a preset threshold, it is determined to be an edge, and the edge direction is confirmed by the consistency of the sign of the differences between multiple points. This method is computationally simple but is sensitive to noise. Optionally, a pattern matching method can be used. Standard pattern sequences for rising and falling edges are predefined, and the sampling buffer sequence is correlated with the standard patterns. The correlation peak position is the edge position. This method has better noise resistance but higher computational complexity. It is understood that other digital signal processing algorithms can also be used to implement edge detection, which is not limited here.

[0051] In some embodiments, the relatively gentle slope of the PWM signal edge can lead to uncertainty in edge detection. To address this, the system employs the Schmitt trigger principle, setting different decision thresholds for rising and falling edges to create a hysteresis interval. Only when the signal level completely crosses the hysteresis interval is it considered a valid edge, thus avoiding multiple false triggers caused by level fluctuations within the edge transition interval.

[0052] S104. Based on the rising edge and falling edge, calculate the pulse period measurement and pulse width measurement of the current pulse.

[0053] The pulse period measurement refers to the time interval between two adjacent rising edges, expressed in system clock cycles. The pulse width measurement refers to the time interval from the rising edge to the falling edge, representing the duration of the pulse high level. The detection times of the rising and falling edges provide time reference points for the calculation of the period and width.

[0054] Specifically, the laser pulse control system starts an internal counter when a rising edge is detected, and this counter increments at the system clock frequency. When a falling edge is detected, the system latches the current count value as the pulse width measurement. When another rising edge is detected, the system latches the current count value as the pulse period measurement, and simultaneously resets the counter to restart counting. In this way, the system can accurately measure the time parameters of each pulse, with a measurement resolution equal to the system clock period. For example, at a 100MHz system clock, the time measurement resolution is 10 nanoseconds.

[0055] In some embodiments, precise measurement of pulse timing parameters can be achieved in several ways: Optionally, a time-to-digital converter (TDC) technique can be used, adding a delay line interpolation circuit to the counter to subdivide a clock cycle into multiple smaller time intervals, achieving sub-clock cycle measurement accuracy and improving time resolution to the picosecond level; alternatively, a cross-correlation measurement method can be used, employing two clocks with slightly different phases to sample the signal in dual channels, and calculating more refined time information than the clock cycle by analyzing the differences in the sampling results of the two channels. It is understood that other high-precision time measurement techniques can also be used, and are not limited here.

[0056] In some embodiments, there may be abnormal situations such as missing pulse signals or additional pulse interference. To address this, the system will set up a period measurement timeout protection mechanism. When the counter value exceeds the preset maximum period threshold, it will be determined as a pulse loss and an alarm will be generated. At the same time, a minimum pulse width limit will be set to ignore narrow pulses with a width less than the threshold, so as to avoid misjudging noise spikes as valid pulses.

[0057] S105. Based on the pulse period measurement value and the pulse width measurement value, determine the preset duty cycle interval to which the current pulse duty cycle belongs, and generate a duty cycle interval flag.

[0058] Duty cycle, or pulse width to pulse period, is a key parameter determining the average output power of a laser. Preset duty cycle ranges refer to multiple duty cycle ranges predefined by the system, such as 0-10%, 10-25%, 25-50%, 50-75%, and 75-100%. The duty cycle range identifier is a numerical code used to identify the current duty cycle range.

[0059] Specifically, the laser pulse control system first calculates the duty cycle of the current pulse. Since direct division consumes significant hardware resources, the system uses a comparison-based approach to determine the duty cycle range. The system performs a binary right shift operation on the pulse period measurement, obtaining 1 / 2, 1 / 4, and 1 / 8 of the period. These fractions are combined to generate decision thresholds for each duty cycle range. The pulse width measurement is then compared to these thresholds, and the duty cycle range is determined based on the comparison result. For example, if the pulse width is greater than 0.75 times the period, the duty cycle is determined to be in the 75-100% range. The system assigns a unique identifier to each range for subsequent table lookup.

[0060] In some embodiments, efficient determination of duty cycle intervals can be achieved in several ways: Optionally, a binary search algorithm can be used, organizing the duty cycle interval thresholds into an ordered array, and quickly locating the interval to which the current duty cycle belongs through binary comparison. The algorithm complexity is O(logN), suitable for scenarios with a large number of intervals. Optionally, a parallel comparator array can be used, employing multiple comparators to simultaneously compare the pulse width with each interval threshold, and directly obtaining the interval flag through a priority encoder. This method has low latency but consumes significant hardware resources. It is understood that other interval determination algorithms can also be used to achieve duty cycle classification, which is not limited here.

[0061] In some embodiments, there may be frequent jumps in the duty cycle when it is near the interval boundary. To address this, the system sets a hysteresis band at the interval boundary, using different thresholds for upward and downward crossings. For example, the threshold for entering a high interval from a low interval is 26%, while the threshold for returning from a high interval to a low interval is 24%, forming a 2% hysteresis band to avoid frequent switching of the interval flag when the duty cycle fluctuates near the boundary value.

[0062] S106. During the pulse active period, the forward power detection signal of the laser is cumulatively measured to obtain a power measurement value, and the power measurement value is compared with a proportional threshold generated based on the current pulse width measurement value to determine the power abnormality state.

[0063] The forward power detection signal refers to the electrical signal generated by the photodetector at the laser output end, which is proportional to the laser power. Accumulation measurement refers to integrating or summing the power signal during the high-level pulse. The power measurement value represents the accumulated power during a single pulse. The proportional threshold is a power protection threshold dynamically calculated based on the current pulse width.

[0064] Specifically, after detecting the rising edge of the PWM signal, the laser pulse control system begins analog-to-digital conversion and accumulation of the forward power detection signal, continuing until the falling edge is detected. The system calculates a dynamic threshold based on the current pulse width measurement, generating a protection threshold adapted to the duty cycle by multiplying the pulse width by a proportional coefficient. For example, if the maximum power per unit time is set to P0, the threshold for a pulse width of T is P0×T×K, where K is a safety factor. The actual accumulated power value is compared with the dynamic threshold; if it exceeds the threshold, it is determined to be a power anomaly. This adaptive threshold mechanism ensures sensitive anomaly detection under different duty cycles.

[0065] In some embodiments, power signal accumulation measurement and anomaly detection can be achieved in several ways: Optionally, a digital integrator can be used to accumulate power by adding ADC sampled values ​​at fixed time intervals. The integration result reflects the total energy during the pulse, which is suitable for applications where the power signal changes relatively smoothly. Optionally, a peak hold circuit can be used in conjunction with sampling to capture the power peak during the pulse and record the peak duration. The pulse energy is estimated by multiplying the peak value by the time. This method is more sensitive to power spikes. It is understood that other power measurement and evaluation methods can also be used, and are not limited here.

[0066] In some embodiments, false alarms may occur during the initial power build-up process of the laser. To address this, the system sets a power build-up time window, pausing power anomaly detection for a certain period after the start of each pulse, and resuming normal power monitoring once the laser output stabilizes. Simultaneously, a power rise curve model is built using historical data to achieve more accurate anomaly identification.

[0067] S107. When the power abnormality state is determined to be abnormal, the address matching is performed in the preset mapping table according to the duty cycle interval flag to obtain the shielding period.

[0068] The power anomaly status indicates that the laser power has exceeded the safe range. The preset mapping table is a lookup table storing the correspondence between duty cycle intervals and shielding periods. The shielding period refers to the length of time the laser output is paused after an anomaly is detected, used to protect the laser and the workpiece. Address matching is the process of looking up the corresponding shielding period in the mapping table based on the interval marker.

[0069] Specifically, the laser pulse control system pre-establishes a mapping table between duty cycle ranges and shielding periods. This table is optimized based on the heat accumulation characteristics and cooling requirements under different duty cycles. Higher duty cycle ranges correspond to longer shielding periods because the heat generated during high-power operation requires more time to dissipate; lower duty cycle ranges correspond to shorter shielding periods, allowing for faster recovery. The system uses the duty cycle range flag as an address to read the corresponding shielding period parameter from ROM or a register array. For example, a 75-100% duty cycle range might correspond to a 500-millisecond shielding period, while the 0-25% range only requires a 100-millisecond shielding period.

[0070] In some embodiments, the storage and access of the mapping table can be implemented in several ways: Optionally, a hardware lookup table can be used, utilizing the block RAM resources inside the FPGA to store the mapping relationship, and reading directly through interval flags. This results in fixed and minimal access latency, suitable for applications with high real-time requirements. Alternatively, a polynomial fitting method can be used, employing a mathematical formula to describe the relationship between the duty cycle and the shielding period, calculating the shielding period. This saves storage resources but increases computational overhead. It is understood that other data storage and mapping methods can also be used, and are not limited here.

[0071] In some embodiments, there may be a need for customized protection parameters due to special processes. To address this, the system provides an online update interface for the mapping table, allowing modification of the shielding cycle parameters corresponding to each interval via a communication interface. The modified parameters are stored in a power-off retention memory, ensuring they remain effective after a system restart, thus meeting the customized needs of different application scenarios.

[0072] S108. Generate a protection control signal based on the shielding period to perform anti-interference control on the laser.

[0073] The shielding period specifies the duration of the protection action. The protection control signal is an enable signal used to control the laser power output; this signal is invalid during the protection period to cut off the laser output. Disturbance immunity control refers to a control strategy that prevents damage caused by abnormal conditions by temporarily stopping the laser output, and automatically resumes operation after the shielding period ends.

[0074] Specifically, the laser pulse control system starts a shielding cycle timer. During the timer's operation, the protection control signal is set to an invalid state. This signal directly controls the laser's pump source or Q-switch, achieving rapid cutoff of laser output. The system simultaneously records information such as the protection trigger time, duty cycle range, and abnormal power values ​​for fault analysis. After the shielding cycle ends, the system automatically restores the protection control signal to an valid state, allowing the laser to resume normal operation. The entire protection process requires no manual intervention, achieving an automated anomaly response and recovery mechanism.

[0075] In some embodiments, protection control and automatic recovery can be implemented in multiple ways: Optionally, a state machine control method can be adopted, designing a state machine that includes a normal state, a protection state, and a recovery state. In the protection state, a shielding timer is executed. After the timer expires, the power is checked in the recovery state to confirm normal operation before returning to the normal state, providing a more reliable recovery mechanism. Optionally, a hierarchical protection strategy can be adopted. The first anomaly uses a short shielding period; if anomalies occur consecutively, the shielding period is progressively extended. After multiple anomalies, the protection state is locked and requires manual reset, balancing the needs of automatic recovery and safety protection. It is understood that other protection control strategies can also be used, and are not limited here.

[0076] In some embodiments, excessively frequent protection actions may negatively impact production efficiency. To address this, the system counts the number of protection triggers per unit time. When the trigger frequency exceeds a threshold, it automatically adjusts the protection sensitivity parameters or extends the shielding cycle. Simultaneously, it generates a maintenance reminder signal to prompt operators to check the system status, thereby optimizing production continuity while ensuring safety.

[0077] Building upon the foregoing embodiments, some application scenarios may require more refined control functions. For example, during the laser startup phase, directly applying an external PWM signal may cause a cold start shock; during system debugging, flexible signal source switching capabilities are needed; and during long-term operation, monitoring the input signal quality is also crucial. The method provided in this embodiment is described in further detail below. Please refer to... Figure 2 This is another flowchart illustrating the method for detecting and controlling the quality of carbon dioxide laser pulse signals in this application.

[0078] S201. Sample the control enable signal for a clock cycle to determine the enable status.

[0079] Refer to step S101, which will not be repeated here.

[0080] S202. When the enable status indication is valid, determine the delay count value obtained by accumulating the clock cycle after the laser pulse control system is powered on.

[0081] Here, "power-on" refers to the moment when the laser pulse control system is powered on and begins operation. "Clock cycle accumulation count" refers to the process of incrementing the counter by 1 for each system clock cycle starting from the moment of power-on. The delay count value represents the number of clock cycles elapsed from power-on to the current moment, used to determine whether the system has completed its warm-up preparation.

[0082] Specifically, the laser pulse control system immediately starts a delay counter after power-on reset. The counter's initial value is zero, and it increments on the rising edge of each system clock cycle. The counter uses a sufficient bit width to cover the longest warm-up time requirement; for example, a 32-bit counter can count approximately 42 seconds at a 100MHz clock. After confirming that the enable is valid, the system reads the current delay count value to determine whether the warm-up phase has been completed. This delay mechanism ensures that all laser components have sufficient time to reach thermal equilibrium.

[0083] In some embodiments, power-on delay counting can be implemented in several ways: Optionally, a preset countdown counter can be used, loading a preset delay value upon power-on. When the counter decrements to zero, a warm-up completion flag is generated. This method facilitates adjustment of the delay time and can directly generate a completion signal. Optionally, a real-time clock method can be used, employing an independent low-frequency clock source (e.g., 32.768kHz) to drive the timer, reducing power consumption and providing a more stable time base, unaffected by changes in the system master clock frequency. It is understood that other timing methods can also be used to implement start-up delay control, and this is not limited here.

[0084] In some embodiments, there may be situations where the laser restarts quickly after an abnormal power outage. In this case, the laser may still maintain a certain temperature and does not require a full warm-up time. To address this, the system adds a temperature sensor interface to read the temperature information of the laser tube and power module, dynamically adjusting the warm-up time based on the actual temperature, thereby shortening the startup waiting time while ensuring safety.

[0085] S203. When the delay count value does not reach the preset delay threshold, select the preheating preset signal as the input source to connect to the cascaded register chain to obtain a multi-point sampling buffer sequence.

[0086] The preset delay threshold refers to the number of clock cycles corresponding to the preheating time, typically set to a few seconds to tens of seconds depending on the laser model and ambient temperature. The preheating preset signal is a fixed-parameter PWM signal generated internally by the system, characterized by a low duty cycle and a stable period. The cascaded register chain is used for continuous sampling and buffering of the selected signal source.

[0087] Specifically, the laser pulse control system integrates a preheating signal generator, which produces a PWM signal with a duty cycle of approximately 10-20%, typically set to a frequency within the range of 1-5 kHz. During the preheating phase, the system uses a multiplexer to connect the preset preheating signal to the sampling path, while shielding external PWM input. The low duty cycle of the preheating signal ensures that the laser operates at lower power, and the generated heat is used to uniformly heat the laser tube and resonant cavity structure, avoiding thermal shock during cold starts. The sampled multi-point sequence is used to monitor the normality of the preheating signal.

[0088] In some embodiments, the preheating signal can be generated and selected in several ways: Optionally, a numerically controlled oscillator (NCO) can be used to generate the preheating signal, producing a precise PWM waveform through a phase accumulator and waveform lookup table. The duty cycle and frequency parameters can be configured through registers, providing flexible preheating control. Optionally, a simple frequency divider chain and combinational logic can be used to generate a preheating signal with fixed parameters. This method is simple and reliable in hardware implementation and suitable for applications with fixed parameters. It is understood that other signal generation and selection schemes can also be used, and no limitation is made here.

[0089] In some embodiments, there is a need to monitor the laser status during the preheating process. To address this, the system periodically changes the preheating signal parameters during the preheating period, for example, by generating a brief high duty cycle pulse every few seconds, detecting the laser's response characteristics, and judging the preheating effect by analyzing the rise time and stability of the output power, thus achieving intelligent preheating process control.

[0090] S204. When the delay count value reaches the preset delay threshold, select an external pulse width modulation signal as the input source and connect it to the cascaded register chain to obtain a multi-point sampling buffer sequence.

[0091] The delay count reaching the threshold indicates that the preheating time has met the requirements. The external pulse width modulation signal comes from the user's control commands and contains the actual processing parameters. Signal source switching is achieved through a multiplexer to ensure a smooth transition.

[0092] Specifically, when the laser pulse control system detects that the delay count value has reached or exceeded a preset threshold, a preheating completion flag is generated. The system control multiplexer switches the signal source from the internal preheating signal to the external PWM input. The switching process is completed during the low level of the PWM signal to avoid glitches. After the switching is complete, the system begins to control the laser output according to the parameters of the external PWM signal, entering the normal operating mode. The multi-point sampling buffer sequence at this time reflects the characteristics of the actual control signal.

[0093] In some embodiments, smooth switching of signal sources can be achieved in several ways: Optionally, a double-buffered switching mechanism can be used, employing two sets of sampling paths to process the preheating signal and the external signal respectively, and achieving a smooth transition through crossfade-in and crossfade-out at the switching moment to avoid power surges during switching; Optionally, synchronous switching control can be used, monitoring the phase relationship between the two signals, and performing switching when both signals are at low levels and their phases are close, minimizing switching disturbances. It is understood that other signal switching techniques can also be used, and are not limited here.

[0094] In some embodiments, there may be a situation where the external PWM signal is not ready after preheating is completed. To address this, the system will continue to output a low duty cycle sustaining signal after preheating is complete to keep the laser temperature stable, while monitoring the validity of the external PWM signal. Switching will only be performed after a stable external signal is detected, ensuring the reliability of the operating mode transition.

[0095] S205. Based on the multi-point sampling buffer sequence, determine the rising and falling edges of the external pulse width modulation signal. Refer to step S103, which will not be repeated here.

[0096] To further improve the reliability and flexibility of the system, a more accurate judgment mechanism is needed when edge signals are detected, a more efficient implementation method is needed when calculating duty cycle, a more convenient test interface is needed when debugging the system, and a more robust judgment logic is needed when monitoring periodic quality.

[0097] In some embodiments, the laser pulse control system employs a more stringent window division method to address metastability and glitches that may occur during edge detection. Specifically, the laser pulse control system divides the multi-point sampling buffer sequence into a first half window and a second half window. A rising edge is defined when all sampled values ​​in the first half window are low and all sampled values ​​in the second half window are high. A falling edge is defined when all sampled values ​​in the first half window are high and all sampled values ​​in the second half window are low.

[0098] The first and second half of the window are two subsets that divide the sampling buffer sequence evenly in chronological order. All sampled values ​​represent a certain level, which is a consistency criterion within the window. The determination of the rising and falling edges must satisfy a strict level transition pattern.

[0099] Specifically, the laser pulse control system divides the buffer sequence of N sampling points into two windows: a first N / 2 point window and a second N / 2 point window. The system performs a logical AND operation on the first half of the window and a logical OR operation on the second half. For rising edge detection, the first half's AND operation result must be 0 (all low) and the second half's OR operation result must be 1 (all high); for falling edge detection, the first half's OR operation result must be 1 (all high) and the second half's AND operation result must be 0 (all low). This method effectively filters out glitches that may occur in the middle of the window by requiring the voltage levels within each half of the window to be completely consistent.

[0100] In some embodiments, window segmentation edge detection can be optimized in several ways: Optionally, an overlapping window detection method can be used, where some sampling points overlap between adjacent detection windows, improving the temporal resolution of edge detection and reducing detection delay caused by window boundaries; Optionally, a weighted window judgment can be used, assigning higher weights to sampling points near the window center and lower weights to edge sampling points, and judging the level state through a weighted voting method to improve the positioning accuracy of the edge. It is understood that other window processing algorithms can also be used, and are not limited here.

[0101] In some embodiments, PWM signal edge jitter may cause intermediate levels to appear within the window. To address this, the system adds an edge slope detection function, calculates the monotonicity of the sampled values ​​within the window, and only confirms a valid edge when the first half to the second half exhibits a strictly monotonic change, further improving the reliability of edge detection.

[0102] S206. Based on the rising and falling edges, calculate the pulse period and pulse width measurements of the current pulse. Refer to step S104; details are omitted here.

[0103] S207. Extract the historical pulse cycle measurement value of the previous cycle.

[0104] The historical pulse cycle measurement refers to the measurement result of the previous complete pulse cycle, stored in the system register. The retrieval process refers to reading historical data from the storage location for comparative analysis. The previous cycle refers to the pulse cycle preceding the currently being processed pulse.

[0105] Specifically, after completing a measurement for each pulse cycle, the laser pulse control system stores the measurement result in a historical data register and simultaneously transfers previous historical values ​​to another register to form a historical data queue. When starting a new cycle analysis, the system reads the measurement value from the previous cycle from the historical register. This historical data provides a reference benchmark for cycle stability analysis. The system typically saves historical data for the most recent 2-4 cycles for trend analysis and anomaly detection.

[0106] In some embodiments, historical measurement data can be managed in several ways: Optionally, a circular buffer can be used to store multiple historical period values, and read / write pointers can be used to manage the storage and retrieval of data, allowing convenient access to data at any historical position and supporting more complex time series analysis algorithms; alternatively, a shift register group can be used to store historical data, with all historical data shifted one position forward synchronously each time new data arrives, and the oldest data being discarded, resulting in simple hardware implementation and fast access speed. It is understood that other data storage management methods can also be used, and are not limited here.

[0107] In some embodiments, there may be a situation where there is no valid historical data when the system starts up. To address this, the system will initialize the historical register using the current measurement value at the beginning of startup, or set a reasonable default value as the initial historical data, to avoid misjudgments caused by invalid historical data during the startup phase and ensure that the period comparison function works normally from the second pulse onwards.

[0108] S208. Calculate the absolute value of the difference between the current pulse period measurement and the historical pulse period measurement to obtain the period deviation.

[0109] The difference between the measured pulse periods reflects the degree of change between adjacent periods. Absolute value calculation eliminates the influence of the direction of change, focusing only on the amplitude. The period deviation is used to evaluate the periodic stability of the input signal and is an important indicator of signal quality.

[0110] Specifically, the laser pulse control system uses a subtractor to calculate the difference between the current period measurement and the historical value. Since the measured value is unsigned, the system needs to determine the relationship between the two values ​​to ensure that subtracting the larger value from the smaller value yields the correct difference. Then, by determining the sign bit of the difference, the system inverts it and adds one if necessary to obtain the absolute value. The calculated period deviation reflects the degree of period jitter in the PWM signal. Under normal circumstances, this value should be very small; a large deviation may indicate that the signal source is unstable or there is interference.

[0111] In some embodiments, the period deviation can be calculated in several ways: Optionally, a relative deviation calculation method can be used, dividing the absolute deviation by the historical period value to obtain the relative deviation percentage. This method can adapt to PWM signals of different frequency ranges and provide a normalized deviation metric. Optionally, a moving average deviation calculation can be used, averaging the deviation amounts of the most recent multiple periods to filter out the influence of instantaneous jitter and obtain a more stable period quality evaluation index. It is understood that other deviation calculation and evaluation methods can also be used, and are not limited here.

[0112] In some embodiments, there are application scenarios where the PWM signal frequency is intentionally altered, such as in frequency sweep machining processes. To address this, the system provides enable control for period deviation detection. When frequency conversion is required, period quality monitoring can be temporarily disabled, or the deviation tolerance can be dynamically adjusted based on a preset frequency change curve to adapt to specific process requirements.

[0113] S209. When the period deviation exceeds the preset period deviation tolerance, a period quality abnormality flag is generated.

[0114] The preset period deviation tolerance is the maximum allowable period variation, typically set to 1-5% of the normal period. The period quality anomaly flag indicates a stability problem with the input signal. Exceeding the tolerance means the period jitter has reached a level that affects the normal operation of the system.

[0115] Specifically, the laser pulse control system compares the calculated period deviation with a preset tolerance value, which is determined based on the system's clock frequency and the nominal frequency of the PWM signal. For example, for a 10kHz PWM signal, with a 100MHz system clock, one period is approximately 10,000 clock cycles, and a 1% tolerance corresponds to a deviation of 100 clock cycles. When the deviation exceeds the tolerance, the system sets a period quality anomaly flag, which can be used to trigger an alarm or influence subsequent protection decisions.

[0116] In some embodiments, periodic deviation tolerances can be set and applied in various ways: Optionally, adaptive tolerance adjustment can be adopted, whereby the system statistically analyzes the distribution characteristics of periodic deviations during normal operation, automatically calculates an appropriate tolerance value, and sets it to the average deviation plus three times the standard deviation to achieve statistically significant anomaly detection; alternatively, a tiered tolerance mechanism can be adopted, setting two tolerance values: a warning level and an error level. Slight exceedances generate warnings without affecting operation, while severe exceedances trigger protection actions, providing a more flexible anomaly response. It is understood that other tolerance settings and judgment strategies can also be used, and are not limited here.

[0117] In some embodiments, to avoid false alarms caused by transient interference, the laser pulse control system needs to use a continuous periodic quality judgment mechanism. That is, when the periodic deviation exceeds the preset periodic deviation tolerance, the laser pulse control system increments the internal periodic quality counter to obtain the periodic quality count value; when the periodic deviation is less than the preset periodic deviation tolerance, the periodic quality counter is cleared to zero; and when the periodic quality count value reaches the threshold of consecutive non-compliance, a periodic quality anomaly flag is generated.

[0118] The cycle quality counter records the number of consecutive cycles exceeding the limit. Incrementing increments the counter value by 1. Resetting resets the counter to 0. The consecutive non-compliance threshold defines the minimum number of consecutive exceedances required to trigger an anomaly flag.

[0119] Specifically, the laser pulse control system maintains a periodic quality counter, initially set to 0. Whenever a deviation exceeding the tolerance for a pulse cycle is detected, the counter increments by 1; when the deviation is within the tolerance range, the counter is immediately reset to zero. A periodic quality anomaly flag is only generated when the counter value reaches a preset threshold (e.g., 3-5 times). This mechanism ensures that only persistent periodic anomalies trigger an alarm, effectively filtering out sporadic interference. The counter's bit width is determined by the threshold value; typically, 4 bits are sufficient.

[0120] In some embodiments, the continuity judgment logic can be optimized in several ways: Optionally, a leakage integrator method can be used, where the counter is not simply reset to zero in each cycle but decays proportionally, with the weight added when exceeding the limit being greater than the weight reduced when normal, thus achieving weighted consideration of historical information; Optionally, a sliding window statistics method can be used, recording the quality status of the most recent N cycles, triggering an anomaly when the number of exceedances within the window exceeds a set proportion, providing a more flexible judgment strategy. It is understood that other counting and judgment algorithms can also be used, and are not limited here.

[0121] In some embodiments, different applications may have different requirements for cycle stability. To address this, the system provides an online configuration function for the threshold of consecutive non-conforming cycles. Users can adjust this parameter according to specific application needs; for high-precision machining, a lower threshold can be set to increase sensitivity, while for rough machining, a higher threshold can be set to reduce false alarms.

[0122] S210. Based on the pulse period measurement and pulse width measurement, determine the preset duty cycle interval to which the current pulse's duty cycle belongs, and generate a duty cycle interval flag. Refer to step S105; details will not be repeated here.

[0123] In some embodiments, to achieve efficient duty cycle interval determination and avoid complex division operations, the laser pulse control system performs a binary right shift operation of different bit lengths on the pulse period measurement value to obtain multiple power-of-two frequency division results; the selected power-of-two frequency division results are combined by addition to obtain duty cycle clock count thresholds corresponding to different duty cycle percentages; the current pulse width measurement value is compared with the duty cycle clock count threshold to determine the duty cycle interval to which the current pulse belongs and generate a duty cycle interval flag.

[0124] The binary right shift operation is equivalent to division by a power of 2, which is an efficient method for implementing division in hardware. The frequency division results by powers of 2 include values ​​of 1 / 2, 1 / 4, 1 / 8, and 1 / 16 of the period. The duty cycle clock count threshold is the duty cycle boundary point expressed in clock cycles.

[0125] Specifically, the laser pulse control system uses simple shift logic to divide the period value. Shifting right by 1 bit yields a 50% threshold, shifting right by 2 bits yields a 25% threshold, and shifting right by 3 bits yields a 12.5% ​​threshold. By combining different frequency division results, other duty cycle thresholds can be obtained; for example, a 75% threshold equals the sum of 50% and 25%, and a 37.5% threshold equals the sum of 25% and 12.5%. The system pre-calculates the required thresholds and uses a parallel comparator to simultaneously compare the pulse width with these thresholds. Based on the comparison results, the duty cycle interval flag is directly obtained through a priority encoder. The entire process requires no multiplication or division operations, only shift, addition, and comparison operations.

[0126] In some embodiments, shift-based duty cycle calculation can be implemented in several ways: Optionally, a pipelined structure can be used to implement multi-stage threshold calculation, allocating shift, addition, and comparison operations to different pipeline stages. Although this increases latency, it raises the upper limit of the system's clock frequency. Optionally, a lookup table can be used to assist in the calculation. For commonly used duty cycle interval combinations, the coefficients of shift and addition are pre-calculated and stored in a small-capacity ROM, reducing the complexity of combinational logic. It is understood that other optimized calculation methods can also be used, which are not limited here.

[0127] In some embodiments, there may be application requirements for finer-grained duty cycle interval division. To address this, the system employs multi-level shift combinations, obtaining smaller fractional values ​​by shifting more bits to the right, such as 1 / 32, 1 / 64, etc. Combining these subdivision values ​​can achieve duty cycle interval division with an accuracy of 1.5625%, meeting the requirements for high-precision control.

[0128] S211. During the pulse's effective period, the forward power detection signal of the laser is cumulatively measured to obtain a power measurement value. This power measurement value is then compared with a proportional threshold generated based on the current pulse width measurement value to determine an abnormal power state. Refer to step S106; details are omitted here.

[0129] S212. When the power anomaly is determined to be abnormal, address matching is performed in the preset mapping table according to the duty cycle interval flag to obtain the shielding period. Refer to step S107, which will not be repeated here.

[0130] S213. Generate a protection control signal based on the shielding period to perform anti-interference control on the laser. Refer to step S108, which will not be repeated here.

[0131] In this embodiment, a multi-level protection mechanism based on dynamic duty cycle adjustment is established, and adaptive power anomaly detection is achieved through real-time measurement and classification. This solves the limitation of fixed threshold protection in wide duty cycle applications, thereby realizing reliable protection and stable operation of the carbon dioxide laser under various working conditions.

[0132] The laser pulse control system in the embodiments of this invention is described below from the perspective of hardware processing. Please refer to [link / reference]. Figure 3 This is a schematic diagram of the physical device structure of a laser pulse control system in an embodiment of this application.

[0133] It should be noted that, Figure 3 The structure of the laser pulse control system shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments of the present invention.

[0134] like Figure 3 As shown, the laser pulse control system includes a CPU 301, which can perform various appropriate actions and processes according to a program stored in ROM 302 or a program loaded from storage section 308 into RAM 303, such as executing the methods described in the above embodiments. RAM 303 also stores various programs and data required for system operation. The CPU 301, ROM 302, and RAM 303 are interconnected via bus 304. I / O interface 305 is also connected to bus 304.

[0135] The following components are connected to I / O interface 305: input section 306 including audio input devices, push-button switches, etc.; output section 307 including liquid crystal display (LCD) and audio output devices, indicator lights, etc.; storage section 308 including hard disks, etc.; and communication section 309 including network interface cards such as LAN (Local Area Network) cards, modems, etc. Communication section 309 performs communication processing via a network such as the Internet. Drive 310 is also connected to I / O interface 305 as needed. Removable media 311, such as disks, optical disks, magneto-optical disks, semiconductor memories, etc., are installed on drive 310 as needed so that computer programs read from them can be installed into storage section 308 as needed.

[0136] In particular, according to embodiments of the present invention, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of the present invention include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing computer programs for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via communication section 309, and / or installed from removable medium 311. When the computer program is executed by CPU 301, it performs the various functions defined in the present invention.

[0137] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. Each block in a flowchart or block diagram may represent a module, program segment, or portion of code, which contains one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those shown in the drawings.

[0138] Specifically, the laser pulse control system of this embodiment includes a processor and a memory. The memory stores a computer program. When the computer program is executed by the processor, it implements the carbon dioxide laser pulse signal quality detection and anti-interference control method provided in the above embodiment.

[0139] In another aspect, the present invention also provides a computer-readable storage medium, which may be included in the laser pulse control system described in the above embodiments; or it may exist independently and not assembled into the laser pulse control system. The storage medium carries one or more computer programs that, when executed by a processor of the laser pulse control system, cause the laser pulse control system to implement the carbon dioxide laser pulse signal quality detection and anti-interference control method provided in the above embodiments.

[0140] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit it. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

[0141] As used in the above embodiments, depending on the context, the term "when..." can be interpreted as meaning "if...", "after...", "in response to determining...", or "in response to detecting...". Similarly, depending on the context, the phrase "when determining..." or "if (the stated condition or event) is interpreted as meaning "if determining...", "in response to determining...", "when (the stated condition or event) is detected", or "in response to detecting (the stated condition or event)".

Claims

1. A method for detecting and controlling the pulse signal quality of a carbon dioxide laser, characterized in that, The method, applied to a laser pulse control system, includes: The control enable signal is sampled for clock cycles to determine the enable status; When the enable state indicator is valid, the external pulse width modulation signal is sampled for clock cycles to obtain a multi-point sampling buffer sequence; Based on the multi-point sampling buffer sequence, the rising and falling edges of the external pulse width modulation signal are determined; Based on the rising edge and the falling edge, the pulse period measurement value and pulse width measurement value of the current pulse are calculated; Based on the pulse period measurement value and the pulse width measurement value, determine the preset duty cycle interval to which the current pulse's duty cycle belongs, and generate a duty cycle interval flag; During the pulse's effective period, the forward power detection signal of the laser is cumulatively measured to obtain a power measurement value, which is then compared with a proportional threshold generated based on the current pulse width measurement value to determine an abnormal power state. When the power anomaly is determined to be abnormal, the shielding period is obtained by address matching in a preset mapping table according to the duty cycle interval flag. A protection control signal is generated based on the shielding period to perform anti-interference control on the laser.

2. The method according to claim 1, characterized in that, The step of determining the rising and falling edges of the external pulse width modulation signal based on the multi-point sampling buffer sequence specifically includes: The multi-point sampling buffer sequence is divided into a first half window and a second half window; A rising edge is defined as when all sampled values ​​in the first half of the window are low and all sampled values ​​in the second half of the window are high. A falling edge is defined as when all sampled values ​​in the first half of the window are high and all sampled values ​​in the second half of the window are low.

3. The method according to claim 1, characterized in that, The step of determining the preset duty cycle interval to which the current pulse's duty cycle belongs based on the pulse period measurement value and the pulse width measurement value, and generating a duty cycle interval flag, specifically includes: Perform a binary right shift operation with different bit widths on the pulse period measurement value to obtain multiple power-of-two frequency division results; The selected power-order frequency division results are combined by addition to obtain the duty cycle clock counting thresholds corresponding to different duty cycle percentages. The current pulse width measurement value is compared with the duty cycle clock count threshold to determine the duty cycle interval to which the current pulse belongs, and the duty cycle interval flag is generated.

4. The method according to claim 1, characterized in that, The step of sampling the external pulse width modulation signal for a clock cycle to obtain a multi-point sampling buffer sequence when the enable state indication is valid specifically includes: When the enable state indication is valid, determine the delay count value obtained by accumulating the clock cycle after the laser pulse control system is powered on; When the delay count value does not reach the preset delay threshold, a preheating preset signal is selected as the input source and connected to the cascaded register chain to obtain the multi-point sampling buffer sequence. When the delay count value reaches the preset delay threshold, the external pulse width modulation signal is selected as the input source and connected to the cascaded register chain to obtain the multi-point sampling buffer sequence.

5. The method according to claim 4, characterized in that, The step of selecting a preheating preset signal as an input source to connect to the cascaded register chain when the delay count value does not reach the preset delay threshold, to obtain the multi-point sampling buffer sequence, specifically includes: The externally input test enable signal is sampled and logically combined for judgment to obtain the test enable register state; When the test enable register is active, a test signal is selected as the input source and connected to the cascaded register chain to obtain the multi-point sampling buffer sequence. When the test enable register is invalid and the delay count value has not reached the preset delay threshold, the preheating preset signal is selected as the input source to access the cascaded register chain to obtain the multi-point sampling buffer sequence.

6. The method according to claim 1, characterized in that, After the step of calculating the pulse period measurement and pulse width measurement of the current pulse based on the rising edge and the falling edge, the method further includes: Extract the historical pulse cycle measurement value from the previous cycle; The absolute value of the difference between the current pulse period measurement and the historical pulse period measurement is calculated to obtain the period deviation. When the period deviation exceeds the preset period deviation tolerance, a period quality anomaly flag is generated.

7. The method according to claim 6, characterized in that, The step of generating a periodic quality anomaly flag when the periodic deviation exceeds a preset periodic deviation tolerance specifically includes: When the period deviation exceeds the preset period deviation tolerance, the internal period mass counter is incremented to obtain the period mass count value. When the period deviation is less than the preset period deviation tolerance, the period quality counter is reset to zero. When the cycle quality count value reaches the threshold for the number of consecutive non-conforming items, the cycle quality anomaly flag is generated.

8. A laser pulse control system, characterized in that, The laser pulse control system includes: one or more processors and a memory; the memory is coupled to the one or more processors, the memory is used to store computer program code, the computer program code including computer instructions, and the one or more processors call the computer instructions to cause the laser pulse control system to perform the method as described in any one of claims 1-7.

9. A computer-readable storage medium comprising instructions, characterized in that, When the instruction is executed on the laser pulse control system, it causes the laser pulse control system to perform the method as described in any one of claims 1-7.

10. A computer program product, characterized in that, When the computer program product is run on the laser pulse control system, it causes the laser pulse control system to perform the method as described in any one of claims 1-7.

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