Display panel and display device

Abstract

The invention discloses a display panel and a display device, and belongs to the technical field of display. The display panel comprises a substrate, a plurality of pixel units and a first metal connecting piece. A plurality of pixel units arranged in an array are arranged on a substrate, each pixel unit comprises a plurality of light-emitting structures arranged in a stacked mode, and a first metal connecting piece corresponding to the pixel unit is electrically connected with a first semiconductor layer of each light-emitting structure in the pixel unit and the substrate. Compared with the common cathode layer (for example, the whole layer of ITO), the resistance of the first metal connecting piece is smaller, and the conductivity of the first metal connecting piece is higher, so that the undesirable phenomenon that the voltage drop is more obvious can be effectively avoided, the brightness of a picture displayed by the display panel is uniform and consistent as much as possible, and the display effect of the display panel is improved. In addition, the first metal connecting piece is arranged to replace the common electrode layer arranged on the whole layer, so that the probability of undesirable phenomena such as large-segment-difference fracture of the common electrode layer on the whole layer can be effectively avoided.

Description

Display panel and display device Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the rise of emerging technologies such as smart wearable devices, augmented reality, and virtual reality, high-end display technology has become an urgent market demand. Micro-light emitting diodes (Micro LEDs) are a next-generation display technology with self-luminous properties. Micro LED displays offer advantages such as higher brightness and stability, improved luminous efficiency, lower power consumption, and faster response times.

[0003] Currently, a display panel generally includes: a substrate, a plurality of pixel units disposed on the substrate, and a common cathode layer disposed on the entire surface. The plurality of pixel units share the common cathode layer disposed on the entire surface.

[0004] However, the resistance of the common cathode layer set on the entire surface of the display panel is relatively large. Usually, the voltage drop in the common cathode layer is more obvious the farther away from the power supply point, resulting in uneven light emission in the display panel, and thus poor display effect of the display panel.

[0005] Summary of the Invention

[0006] The present invention provides a display device that can solve the problem that display devices in the prior art require a large driving force, which makes driving difficult. The technical solution is as follows:

[0007] In one aspect, a display panel is provided, comprising:

[0008] substrate;

[0009] A plurality of pixel units arranged in an array on one side of the substrate, the pixel units comprising: a plurality of light-emitting structures stacked in layers, the orthographic projection area of ​​each of the light-emitting structures on the substrate gradually decreasing in a direction away from the substrate;

[0010] and at least two first metal connectors corresponding one-to-one to at least two of the pixel units, wherein the first metal connectors are electrically connected to the first semiconductor layer of each of the light-emitting structures in the corresponding pixel units, and the first metal connectors are electrically connected to the substrate;

[0011] The substrate is configured to provide the same signal to the at least two first metal connectors.

[0012] Optionally, the first metal connecting member includes: a first connecting portion and a second connecting portion connected to each other, wherein the orthographic projection of the first connecting portion on the substrate is located within the orthographic projection of the pixel unit on the substrate, and the orthographic projection of the second connecting portion on the substrate is located outside the orthographic projection of the pixel unit on the substrate;

[0013] The first connecting portion is electrically connected to the first semiconductor layer of each light emitting structure in the pixel unit, and an end of the second connecting portion facing away from the first connecting portion is electrically connected to the substrate.

[0014] Optionally, the orthographic projection of the first metal connector on the substrate is entirely located within the orthographic projection of the pixel unit on the substrate; the display panel further includes: a first wire, one end of the first wire is electrically connected to the first metal connector, and the other end of the first wire is electrically connected to the substrate.

[0015] Optionally, the pixel unit has a first through hole that passes through each of the light-emitting structures in sequence; the other end of the first wire passes through the first through hole and is electrically connected to the substrate.

[0016] Optionally, the display panel further includes: a plurality of second metal connectors corresponding one-to-one to the plurality of light-emitting structures in one pixel unit, the second metal connectors being electrically connected to the second semiconductor layer of the corresponding light-emitting structure and to the substrate.

[0017] Optionally, the second metal connecting member includes: a third connecting portion and a fourth connecting portion connected to each other, the orthographic projection of the third connecting portion on the substrate is located within the orthographic projection of the pixel unit on the substrate, and the orthographic projection of the fourth connecting portion on the substrate is located outside the orthographic projection of the pixel unit on the substrate;

[0018] The third connecting portion is electrically connected to the second semiconductor layer of the corresponding light emitting structure, and one end of the fourth connecting portion facing away from the third connecting portion is electrically connected to the substrate.

[0019] Optionally, the orthographic projection of the second metal connector on the substrate is entirely located within the orthographic projection of the pixel unit on the substrate; the display panel also includes: a second wire, one end of the second wire is electrically connected to the second metal connector, and the other end of the second wire is electrically connected to the substrate.

[0020] Optionally, the pixel unit has a second through hole, the second through hole passes through at least the light emitting structure closest to the substrate in the pixel unit, and the other end of the second wire passes through the second through hole and is electrically connected to the substrate.

[0021] Optionally, the pixel unit further includes: a plurality of driving electrode layers; the plurality of driving electrode layers correspond one-to-one to the plurality of light-emitting structures, the driving electrode layers are located on the side of the corresponding light-emitting structure close to the substrate, and overlap with the side of the second semiconductor layer in the corresponding light-emitting structure away from the first semiconductor layer; the plurality of driving electrode layers correspond one-to-one to the plurality of second metal connectors, and the second metal connectors overlap with the corresponding driving electrode layers.

[0022] Optionally, a portion of the orthographic projection of the driving electrode layer on the substrate is located outside the orthographic projection of the corresponding light-emitting structure on the substrate, and at least a portion of the second metal connecting member is located on the side of the corresponding driving electrode layer away from the substrate, and overlaps with a portion of the driving electrode layer that is not covered by the corresponding light-emitting structure.

[0023] Optionally, for the adjacent first drive electrode layer and the second drive electrode layer in the pixel unit, and the light-emitting structure located between the first drive electrode layer and the second drive electrode layer, the orthographic projection of the light-emitting structure on the substrate is located within the orthographic projection of the first drive electrode layer on the substrate, the orthographic projection of the second drive electrode layer on the substrate is located within the orthographic projection of the light-emitting structure on the substrate, and the orthographic projections of the first drive electrode layer, the light-emitting structure, and the second drive electrode layer on the substrate decrease in sequence;

[0024] The first driving electrode layer is closer to the substrate than the second driving electrode layer.

[0025] Optionally, the multiple light-emitting structures in the pixel unit include: a first light-emitting structure and at least one second light-emitting structure, wherein the first light-emitting structure is the light-emitting structure farthest from the substrate among the multiple light-emitting structures, and the at least one second light-emitting structure is a light-emitting structure located between the first light-emitting structure and the substrate;

[0026] A portion of the first metal connector is located on a side of the second light emitting structure facing away from the substrate, and overlaps with a portion of the first semiconductor layer of the second light emitting structure that is not covered by the second driving electrode layer.

[0027] Optionally, the pixel unit further includes: a common electrode layer located on a side of the first light-emitting structure facing away from the substrate, the common electrode layer overlapping a side of the first semiconductor layer in the first light-emitting structure facing away from the second semiconductor layer, and an orthographic projection of the common electrode layer on the substrate being located within an orthographic projection of the first light-emitting structure on the substrate;

[0028] Part of the first metal connecting member is located on a side of the common electrode layer away from the first light-emitting structure, and overlaps with the common electrode layer.

[0029] Optionally, the light emitting structure includes: the first semiconductor layer and the second semiconductor layer arranged opposite to each other, and a light emitting layer located between the first semiconductor layer and the second semiconductor layer, and the second semiconductor layer is closer to the substrate relative to the first semiconductor layer.

[0030] Optionally, the display panel further includes: a first insulating layer, the first insulating layer covering a side surface of the light emitting structure and covering at least a portion of a surface of the light emitting structure facing away from the substrate;

[0031] The first insulating layer has a plurality of first vias and a plurality of second vias, the first metal connector is electrically connected to the first semiconductor layer of the plurality of light-emitting structures through the plurality of first vias, and the plurality of second metal connectors are electrically connected to the second semiconductor layer of the plurality of light-emitting structures through the plurality of second vias.

[0032] Optionally, when the pixel unit has a through hole, the first insulating layer covers an inner wall of the through hole.

[0033] Optionally, the pixel unit further includes: a transparent bonding layer located between two adjacent light-emitting structures, and a reflective bonding layer located between the light-emitting structure and the substrate.

[0034] Optionally, for two adjacently arranged light-emitting structures in the pixel unit, the outer boundary of the orthographic projection of one light-emitting structure on the substrate does not overlap with the outer boundary of the orthographic projection of the other light-emitting structure on the substrate; or, the outer boundary of a part of the orthographic projection of one light-emitting structure on the substrate overlaps with a part of the outer boundary of the orthographic projection of the other light-emitting structure on the substrate.

[0035] Optionally, the substrate includes: a plurality of driving circuits corresponding one-to-one to a plurality of light-emitting structures in one of the pixel units, and a common signal connection terminal; the driving circuit is electrically connected to the corresponding light-emitting structure through the second metal connector, and the at least two first metal connectors are electrically connected to the common signal connection terminal.

[0036] In another aspect, a display device is provided, comprising:

[0037] The display panel is any one of the display panels given above.

[0038] The beneficial effects of the technical solutions provided in the embodiments of the present application include at least:

[0039] A display panel may include: a substrate, a plurality of pixel units and a plurality of first metal connectors. A plurality of pixel units arranged in an array are provided on the substrate, each pixel unit includes a plurality of light-emitting structures arranged in a stacked manner, and the first metal connector corresponding to the pixel unit is electrically connected to the first semiconductor layer of each light-emitting structure in the pixel unit and the substrate. Since the first metal connector has a smaller resistance than the commonly provided cathode layer (for example, a whole layer of ITO) and a higher conductivity, it can effectively avoid the undesirable phenomenon of a more obvious voltage drop, so that the brightness of the image displayed by the display panel is as uniform as possible, thereby improving the display effect of the display panel. In addition, by providing the first metal connector instead of the whole-layer common electrode layer, the probability of undesirable phenomena such as large-step fractures in the whole layer of common electrode layer can be effectively avoided, so that the yield and reliability of the display panel are better. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0041] FIG1 is a top view of a display panel provided in an embodiment of the present application;

[0042] FIG2 is a top view of a partial structure of a display panel provided in an embodiment of the present application;

[0043] FIG3 is a cross-sectional view of the display panel shown in FIG2 taken along line AA′;

[0044] FIG4 is a partial structural top view of another display panel provided in an embodiment of the present application;

[0045] FIG5 is a cross-sectional view of FIG4 taken along line BB';

[0046] FIG6 is a partial structural top view of another display panel provided in an embodiment of the present application;

[0047] FIG7 is a cross-sectional view of FIG6 taken along line CC';

[0048] FIG8 is a partial structural top view of another display panel provided in an embodiment of the present application;

[0049] FIG9 is a cross-sectional view of FIG8 taken along line DD';

[0050] FIG10 is a cross-sectional view taken along line EE' of FIG8 ;

[0051] FIG11 is a cross-sectional view of a portion of a display panel at one viewing angle provided by an embodiment of the present application;

[0052] FIG12 is a cross-sectional view of a portion of the display panel from another perspective provided by an embodiment of the present application;

[0053] FIG13 is a cross-sectional view taken along the line FF' of FIG4;

[0054] FIG14 is a top view of a partial structure of a display panel provided by another embodiment of the present application;

[0055] FIG15 is a flow chart of a method for manufacturing a display panel according to an embodiment of the present application;

[0056] FIG16 is a schematic diagram of a film structure of a pixel unit formed on a substrate according to an embodiment of the present application;

[0057] FIG17 is a schematic diagram of a film structure forming a stepped structure provided in an embodiment of the present application;

[0058] FIG18 is a schematic diagram of a film structure for forming a first insulating layer provided in an embodiment of the present application;

[0059] FIG19 is a schematic diagram of forming a plurality of first via holes and a plurality of second via holes according to an embodiment of the present application;

[0060] FIG20 is a schematic diagram of a film layer forming a first metal connector and a portion of a second metal connector provided in an embodiment of the present application;

[0061] FIG21 is a schematic diagram of a film structure for forming a second insulating layer provided in an embodiment of the present application;

[0062] FIG22 is a schematic diagram of a structure for forming a second conductive line provided in an embodiment of the present application.

[0063] The above drawings illustrate specific embodiments of the present application, which will be described in more detail below. These drawings and the textual description are not intended to limit the scope of the present application in any way, but rather to illustrate the concepts of the present application to those skilled in the art by reference to specific embodiments. DETAILED DESCRIPTION

[0064] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0065] Please refer to Figures 1, 2, and 3. Figure 1 is a top view of a display panel provided in an embodiment of the present application. Figure 2 is a top view of a portion of the structure of a display panel provided in an embodiment of the present application. Figure 3 is a cross-sectional view of the display panel shown in Figure 2 taken along line AA'. The display panel can be a display panel integrated into a Micro LED display device. The display panel may include: a substrate 10, a plurality of pixel units 20 arranged in an array, and a first metal connector 30.

[0066] The multiple pixel units 20 arranged in an array in the display device can be located on one side of the substrate 10, and each pixel unit 20 may include: a plurality of light-emitting structures 21 arranged in a stacked manner, and the area of ​​the positive projection of each light-emitting structure 21 on the substrate 10 in the display panel gradually decreases in the direction away from the substrate 10 (the Z-axis direction in the figure).

[0067] The display device includes at least two first metal connectors 30 corresponding one-to-one to at least two pixel units 20. Each first metal connector 30 can be electrically connected to the first semiconductor layer 21a of each light-emitting structure 21 in the corresponding pixel unit 20, and the first metal connector 30 can be electrically connected to the substrate 10. For example, the first metal connector 30 can be in a strip shape, and the strip-shaped first metal connector 30 can be electrically connected to the first semiconductor layer 21a of each light-emitting structure 21 in the corresponding pixel unit 20 and to the substrate 10. For example, each pixel unit 20 in the plurality of pixel units 20 can correspond to one first metal connector 30.

[0068] The substrate 10 in the display panel can be configured to provide the same signal to at least two first metal connectors 30. The first metal connectors 30 then provide the electrical signals required for light emission to the respective light-emitting structures 21 in the corresponding pixel units 20. For example, the substrate in the display panel may include: a substrate (not shown in the figure), and a driver integrated on the substrate, the driver being electrically connected to the plurality of pixel units and the first metal connectors to provide the display panel with the electrical signals required for normal operation. For example, the substrate may be a plate-like structure made of a material such as silicon, glass, or sapphire, and the driver may be bonded to a side of the substrate away from the pixel units.

[0069] In an embodiment of the present application, a plurality of pixel units 20 arranged in an array are provided on a substrate 10, each pixel unit 20 includes a plurality of light-emitting structures 21 arranged in a stacked manner, and a first metal connector 30 corresponding to the pixel unit 20 is electrically connected to the first semiconductor layer 21a of each light-emitting structure 21 in the pixel unit 20 and the substrate 10. Since the first metal connector 30 has a smaller resistance than the commonly provided cathode layer (for example, a whole layer of ITO) and has a higher conductivity, it can effectively avoid the undesirable phenomenon of a more obvious voltage drop, so that the brightness of the image displayed by the display panel is as uniform as possible, thereby improving the display effect of the display panel. In addition, by providing the first metal connector 30 instead of the common electrode layer provided as a whole layer, the probability of undesirable phenomena such as large step-difference fractures in the common electrode layer can be effectively avoided, so that the yield and reliability of the display panel are better.

[0070] In related art, multiple pixel units also share a common electrode layer, which makes the overall area of ​​the common electrode layer larger and more prone to large-step fractures. In this application, each pixel unit uses a separate first metal connector to electrically connect the first semiconductor layer of each light-emitting structure, avoiding the undesirable phenomenon of large-step fractures between adjacent pixel units.

[0071] In summary, the embodiment of the present application provides a display panel, which may include: a substrate, a plurality of pixel units and a first metal connector. By arranging a plurality of pixel units arranged in an array on the substrate, each pixel unit includes a plurality of light-emitting structures arranged in a stacked manner, and the first metal connector corresponding to this pixel unit is electrically connected to the first semiconductor layer of each light-emitting structure in the pixel unit and the substrate. Since the resistance of the first metal connector is smaller than that of the commonly arranged cathode layer (for example, a whole layer of ITO) and its conductivity is higher, it can effectively avoid the undesirable phenomenon of a more obvious voltage drop, so that the brightness of the picture displayed by the display panel is as uniform as possible, thereby improving the display effect of the display panel. In addition, by arranging the first metal connector instead of the common electrode layer arranged in the whole layer, the probability of undesirable phenomena such as large-step fractures in the whole layer of common electrode layer can be effectively avoided, so that the yield and reliability of the display panel are better.

[0072] Optionally, there are multiple optional implementations for the arrangement position of each pixel unit 20 and the first metal connection member 30. The following embodiments of the present application use two optional implementations as examples for schematic illustration:

[0073] For the first optional implementation, please refer to Figures 4 and 5. Figure 4 is a top view of a partial structure of another display panel provided in an embodiment of the present application, and Figure 5 is a cross-sectional view of Figure 4 at point BB'. The first metal connector 30 in the display panel may include: a first connecting portion 31 and a second connecting portion 32 connected to each other. The orthographic projection of the first connecting portion 31 in the first metal connector 30 on the substrate 10 may be located within the orthographic projection of the pixel unit 20 on the substrate 10. The orthographic projection of the second connecting portion 32 in the first metal connector 30 on the substrate 10 may be located outside the orthographic projection of the pixel unit 20 on the substrate 10. The first connecting portion 31 in the first metal connector 30 may be electrically connected to the first semiconductor layer 21a of each light-emitting structure 21 in the pixel unit 20, and the end of the second connecting portion 32 in the first metal connector 30 facing away from the first connecting portion 31 may be electrically connected to the substrate 10. In this case, by providing a first connecting portion 31 and a second connecting portion 32 that are connected to each other in the first metal connector 30, the first connecting portion 31 is electrically connected to the first semiconductor layer 21a of each light-emitting structure 21 in the corresponding pixel unit 20, and the second connecting portion 32 is electrically connected to the substrate 10. In this way, the substrate 10 can provide an electrical signal to the first connecting portion 31 through the second connecting portion 32, and then provide an electrical signal to the first semiconductor layer 21a of each light-emitting structure 21. In addition, the first connecting portion 31 and the second connecting portion 32 are both provided at the edge position of the pixel unit, which can ensure that the light-emitting area of ​​each light-emitting structure is large. It should be noted that the first connecting portion 31 and the second connecting portion 32 can be an integral structure; or, they can be formed separately and then fixedly connected by welding or other methods.

[0074] For a second optional implementation, please refer to Figures 6 and 7. Figure 6 is a top view of a partial structure of another display panel provided in an embodiment of the present application, and Figure 7 is a cross-sectional view taken along line C-C' of Figure 6. The orthographic projection of the first metal connector 30 in the display panel on the substrate 10 can be located within the orthographic projection of the corresponding pixel unit 20 on the substrate 10. The display panel can also include a first conductive wire 40, one end of which can be electrically connected to the first metal connector 30, and the other end of which can be electrically connected to the substrate 10. In this case, by setting the orthographic projections of the first metal connector 30 on the substrate 10 to all be located within the orthographic projections of the corresponding pixel unit 20 on the substrate 10, and connecting the first metal connector 30 to the substrate 10 via the first conductive wire 40, the length of the first metal connector 30 in the Z-axis direction can be reduced, thereby reducing the risk of the first metal connector 30 breaking. For example, after one end of the first conductive wire 40 is connected to the first metal connector 30, it bends downward from the outer edge of the pixel unit 20 and then electrically connects to the substrate 10.

[0075] In an embodiment of the present application, as shown in Figures 6 and 7, each pixel unit 20 may have a first through hole V1 that sequentially passes through each light-emitting structure 21 in the pixel unit 20. One end of the first conductive wire 40 in the display panel may be electrically connected to the first metal connector 30, and the other end of the first conductive wire 40 may pass through the first through hole V1 and then be electrically connected to the substrate 10. In this case, by providing a first through hole V1 that passes through each light-emitting structure 21 in the pixel unit 20, after one end of the first conductive wire 40 is connected to the first metal connector 30, the other end can pass through the first through hole V1 and then be electrically connected to the substrate 10. In this way, the first conductive wire 40 can be integrated into the interior of the pixel unit 20, thereby improving the degree of integration of the pixel unit 20. It should be noted that in order to avoid the undesirable phenomenon of a short circuit caused by the first conductive wire 40 contacting the inner wall of the first through hole V1, the inner diameter of the first through hole V1 can be set to be larger than the outer diameter of the first conductive wire 40.

[0076] Optionally, please refer to Figures 8, 9 and 10. Figure 8 is a top view of a partial structure of another display panel provided in an embodiment of the present application, Figure 9 is a cross-sectional view of Figure 8 taken at D-D', and Figure 10 is a cross-sectional view of Figure 8 taken at E-E'. The display panel may further include: a plurality of second metal connectors 50 corresponding one-to-one to the plurality of light-emitting structures 21 in a pixel unit 20. The second metal connector 50 can be electrically connected to the second semiconductor layer 21b of the light-emitting structure 21 corresponding to the second metal connector, and electrically connected to the substrate 10. In this case, by providing a second metal connector 50 corresponding one-to-one to each light-emitting structure 21 in each pixel unit 20, the second metal connector 50 is electrically connected to the second semiconductor layer 21b in the corresponding light-emitting structure 21, and electrically connected to the substrate 10. In this way, an electrical signal can be provided to the corresponding light-emitting structure 21 through each second metal connector 50, so that each light-emitting structure 21 can emit light independently. It should be noted that the first metal connector 30 can simultaneously provide electrical signals to multiple light-emitting structures 21 in the pixel unit 20, and each second metal connector 50 can provide an electrical signal to a corresponding light-emitting structure 21 in the pixel unit 20. In this way, light can be emitted through the light-emitting layer between the first semiconductor layer 21a and the second semiconductor layer 21b in the light-emitting structure 21.

[0077] In the embodiments of the present application, there are multiple optional implementations for the arrangement positions of each pixel unit and the second metal connection member. The following embodiments of the present application are schematically described using two optional implementations as examples:

[0078] In a first optional implementation, as shown in FIG9 , at least one second metal connector 50 may include a third connector 51 and a fourth connector 52 connected to each other. The orthographic projection of the third connector 51 in the second metal connector 50 on the substrate 10 may be located within the orthographic projection of the pixel unit 20 on the substrate 10, and the orthographic projection of the fourth connector 52 in the second metal connector 50 on the substrate 10 may be located outside the orthographic projection of the pixel unit 20 on the substrate 10. The third connector 51 in the second metal connector 50 may be electrically connected to the second semiconductor layer 21 b of the light emitting structure 21 corresponding to the second metal connector 50, and the end of the fourth connector 52 in the second metal connector 50 facing away from the third connector 51 may be electrically connected to the substrate 10. In this case, by providing the interconnected third connector 51 and fourth connector 52 in the second metal connector 50, the third connector 51 is electrically connected to the second semiconductor layer 21 b of the light emitting structure 21, and the fourth connector 52 is electrically connected to the substrate 10. In this way, the substrate 10 can provide an electrical signal to the third connecting portion 51 via the fourth connecting portion 52, thereby providing an electrical signal to the second semiconductor layer 21b in the light-emitting structure 21. Furthermore, the third connecting portion 51 and the fourth connecting portion 52 are both located at the edge of the pixel unit, ensuring that each light-emitting structure has a larger light-emitting area. It should be noted that the third connecting portion 51 and the fourth connecting portion 52 can be an integral structure; alternatively, they can be formed separately and then fixedly connected by welding or other methods.

[0079] For example, as shown in Figures 9 and 10, the multiple second metal connectors 50 corresponding one-to-one to the multiple light-emitting structures 21 in a pixel unit 20 can each include: a third connecting portion 51 and a fourth connecting portion 52 connected to each other. The orthographic projection of the third connecting portion 51 on the substrate 10 can be located within the orthographic projection of the pixel unit 20 on the substrate 10, and the orthographic projection of the fourth connecting portion 52 on the substrate 10 can be located outside the orthographic projection of the pixel unit 20 on the substrate 10. The third connecting portion 51 in the second metal connector 50 can be electrically connected to the second semiconductor layer 21b of the corresponding light-emitting structure 21, and the end of the fourth connecting portion 52 in the second metal connector 50 facing away from the third connecting portion 51 can be electrically connected to the substrate 10.

[0080] For a second optional implementation, please refer to Figures 11 and 12. Figure 11 is a cross-sectional view of a portion of the display panel structure provided by an embodiment of the present application at one viewing angle, and Figure 12 is a cross-sectional view of a portion of the display panel structure provided by an embodiment of the present application at another viewing angle. The orthographic projection of at least one second metal connector 50 in the display panel on the substrate 10 can be entirely located within the orthographic projection of the pixel unit 20 on the substrate 10. The display panel may further include: at least one second conductive wire 60, one end of which can be electrically connected to the second metal connector 50, and the other end of the second conductive wire 60 can be electrically connected to the substrate 10. In this case, by setting the orthographic projection of the second metal connector 50 on the substrate 10 to be entirely located within the orthographic projection of the pixel unit 20 on the substrate 10, and connecting the second metal connector 50 to the substrate 10 via the second conductive wire 60. In this way, the length of the second metal connector 50 in the Z-axis direction can be reduced, thereby reducing the risk of the second metal connector 50 breaking. For example, after one end of the second wire 60 is connected to the second metal connector 50 , it can be bent downward from the outer edge of the pixel unit 20 to be electrically connected to the substrate 10 .

[0081] For example, the orthographic projections of the second metal connectors 50 on the substrate 10 may all be located within the orthographic projections of the pixel units 20 on the substrate 10. At least one second conductive wire 60 corresponds one-to-one to at least one second metal connector 50, and the second metal connector 50 is connected to the substrate 10 via the corresponding second conductive wire 60.

[0082] In the embodiments of the present application, please refer to Figures 4 and 13. Figure 13 is a cross-sectional view taken along line F-F' of Figure 4. The pixel unit 20 may have at least one second through hole V2. This second through hole V2 may penetrate at least the light-emitting structure 21 closest to the substrate 10 in the pixel unit 20, and the other end of the second conductive wire 60 may penetrate the second through hole V2 and then be electrically connected to the substrate 10. In this case, by providing the second through hole V2 in the pixel unit 20, after one end of the second conductive wire 60 is connected to the second metal connector 50, the other end may penetrate the second through hole V2 and then be electrically connected to the substrate 10. In this way, the second conductive wire 60 can be integrated within the pixel unit 20, thereby improving the degree of integration of the pixel unit. It should be noted that to avoid the undesirable phenomenon of the second conductive wire 60 contacting the inner wall of the second through hole V2 and causing a short circuit, the inner diameter of the second through hole V2 can be set to be larger than the outer diameter of the second conductive wire 60. It should also be noted that the arrangement of the second through holes for different light-emitting structures will be further described later.

[0083] Optionally, as shown in FIG13 , each pixel unit 20 in the display panel may further include: a plurality of drive electrode layers 22, which may correspond one-to-one to a plurality of light-emitting structures 21. Each drive electrode layer 22 may be located on a side of the light-emitting structure 21 corresponding to the drive electrode layer close to the substrate 10, and overlap with a side of the second semiconductor layer 21b in the corresponding light-emitting structure 21 that is away from the first semiconductor layer 21a in the light-emitting structure 21. The plurality of drive electrode layers 22 may also correspond one-to-one to a plurality of second metal connectors 50, and the second metal connector 50 may overlap with the drive electrode layer 22 corresponding to the second metal connector. In this case, each drive electrode layer 22 overlaps with the second semiconductor layer 21b in the corresponding light-emitting structure 21 and overlaps with the corresponding second metal connector 50. In this way, the substrate 10 can provide an electrical signal to the corresponding drive electrode layer 22 through the second metal connector 50, thereby providing an electrical signal to the second semiconductor layer 21b. For example, the driving electrode layer 22 may be a layered structure made of a transparent conductive material, such as ITO. It should be noted that when the pixel unit 20 has a second through hole V2, the second through hole V2 penetrates at least the driving electrode layer 22 closest to the substrate 10 in the pixel unit 20.

[0084] In an embodiment of the present application, as shown in FIG13 , a portion of the orthographic projection of each driving electrode layer 22 on the substrate 10 may be located outside the orthographic projection of the light-emitting structure 21 corresponding to the driving electrode layer 22 on the substrate 10. At least a portion of the second metal connector 50 may be located on the side of the corresponding driving electrode layer 22 facing away from the substrate 10, and overlap with the portion of the driving electrode layer 22 not covered by the corresponding light-emitting structure 21. For example, taking the light-emitting structure closest to the substrate 10 as an example, the orthographic projection of the driving electrode layer 22 corresponding to the light-emitting structure 21 on the substrate 10 may be located outside the orthographic projection of the light-emitting structure 21 on the substrate 10. At least a portion of the second metal connector 50 may be located on the side of the driving electrode layer 22 facing away from the substrate 10, and overlap with the portion of the driving electrode layer 22 not covered by the light-emitting structure 21. In this way, the portion of the driving electrode layer 22 not covered by the light-emitting structure 21 can provide support for at least a portion of the second metal connector 50, facilitating the placement of the second metal connector 50 in the pixel unit 20. It should be noted that when the pixel unit 20 has the second through hole V2 , the second through hole V2 passes through the driving electrode layer 22 in the light emitting structure 21 , and the second wire 60 is disposed in the second through hole V2 .

[0085] Optionally, as shown in FIG13 , for the adjacent first and second drive electrode layers Q1, Q2 in each pixel unit 20, as well as the light-emitting structure 21 located between the first and second drive electrode layers Q1, Q2, the orthographic projection of the light-emitting structure 21 on the substrate 10 can be located within the orthographic projection of the first drive electrode layer Q1 on the substrate 10. The orthographic projection of the second drive electrode layer Q2 on the substrate 10 can also be located within the orthographic projection of the light-emitting structure 21 on the substrate 10, and the orthographic projections of the first drive electrode layer Q1, the light-emitting structure 21, and the second drive electrode layer Q2 on the substrate 10 can decrease in sequence. The first drive electrode layer Q1 can be closer to the substrate 10 than the second drive electrode layer Q2. In this case, since the orthographic projections of the adjacent first and second drive electrode layers Q1, Q2, and the light-emitting structure 21 located between the two electrode layers on the substrate 10 decrease in sequence, a stepped structure can be formed in the pixel unit 20, facilitating the arrangement of the first and second metal connectors 30, 50. It should be noted that the light-emitting structure 21 located between the first driving electrode layer Q1 and the second driving electrode layer Q2 may be the light-emitting structure corresponding to the first driving electrode layer Q1, and the light-emitting structure corresponding to the second driving electrode layer Q2 may be located on the side of the second driving electrode layer Q2 away from the first driving electrode layer Q1.

[0086] In an embodiment of the present application, as shown in FIG13 , the multiple light-emitting structures 21 in each pixel unit 20 may include: a first light-emitting structure A1 and at least one second light-emitting structure. The first light-emitting structure A1 may be the light-emitting structure farthest from the substrate 10 among the multiple light-emitting structures, and the at least one second light-emitting structure may be a light-emitting structure located between the first light-emitting structure A1 and the substrate 10. A portion of the first metal connector 30 may be located on the side of the second light-emitting structure facing away from the substrate 10 and overlap with the portion of the first semiconductor layer 21a of the second light-emitting structure that is not covered by the second drive electrode layer Q2. In this way, the portion of the first semiconductor layer 21a of the second light-emitting structure that is not covered by the second drive electrode layer Q2 can provide support for the first metal connector 30, facilitating the installation of the second metal connector 30 in the pixel unit 20.

[0087] In the present application, each pixel unit 20 in the display panel may include two stacked second light-emitting structures and a first light-emitting structure A1. The first metal connector 30 may be electrically connected to the first semiconductor layer 21a of the first light-emitting structure A1 in the corresponding pixel unit 20, the first semiconductor layer 21a of one second light-emitting structure A2 in the corresponding pixel unit 20, and the first semiconductor layer 21a of another second light-emitting structure A3 in the corresponding pixel unit 20. Based on the light-emitting principle of the display device, the wavelengths of light emitted by one second light-emitting structure A2, another second light-emitting structure A3, and the first light-emitting structure A1 gradually decrease. For example, one second light-emitting structure A2 is the light-emitting structure closest to the substrate 10, and another second light-emitting structure A3 is the light-emitting structure located between the one second light-emitting structure A2 and the first light-emitting structure A1. The color of light emitted by one second light-emitting structure A2 may be red; the color of light emitted by the other second light-emitting structure A3 may be green; and the color of light emitted by the first light-emitting structure A1 may be blue. It should be noted that, for example, as shown in Figures 7 and 13, when the pixel unit 20 has a second through hole V2 and the second through hole V2 can provide a mounting path for the second conductive wire 60 in the first light-emitting structure A1, the second through hole V2 can penetrate the driving electrode layer 22 in the first light-emitting structure A1 and the two second light-emitting structures below. When the pixel unit 20 has a second through hole V2 and the second through hole V2 can provide a mounting path for the second conductive wire 60 in another second light-emitting structure A3, the second through hole V2 can penetrate the driving electrode layer 22 in the other second light-emitting structure A3 and the second light-emitting structure A2 below. When the pixel unit 20 has a second through hole V2 and the second through hole V2 can provide a mounting path for the second conductive wire 60 in one second light-emitting structure A2, the second through hole V2 can penetrate the driving electrode layer 22 in one second light-emitting structure A2.

[0088] Optionally, as shown in FIG13 , each pixel unit 20 may further include a common electrode layer 23 located on the side of the first light-emitting structure A1 facing away from the substrate 10. The common electrode layer 23 may overlap the side of the first semiconductor layer 21a in the first light-emitting structure A1 facing away from the second semiconductor layer 21b in the first light-emitting structure A1. The orthographic projection of the common electrode layer 23 on the substrate 10 may be located within the orthographic projection of the first light-emitting structure A1 on the substrate 10. A portion of the first metal connector 30 may be located on the side of the common electrode layer 23 facing away from the first light-emitting structure A1 and may overlap the common electrode layer 23. In this way, when the first metal connector 30 is used to connect the first semiconductor layers of the various light-emitting structures, only a relatively small common electrode layer is required in the pixel unit 20 as the common electrode, thereby avoiding the undesirable phenomenon of large-step fractures in the common electrode layer. For example, the boundary of the orthographic projection of the common electrode layer 23 on the substrate 10 may coincide with the boundary of the orthographic projection of the first semiconductor layer 21a in the first light-emitting structure A1 on the substrate 10.

[0089] In an embodiment of the present application, as shown in FIG13 , each light-emitting structure 21 in a pixel unit 20 may include: a first semiconductor layer 21a and a second semiconductor layer 21b disposed opposite each other, and a light-emitting layer 21c located between the first semiconductor layer 21a and the second semiconductor layer 21b. The second semiconductor layer 21b may be closer to the substrate 10 than the first semiconductor layer 21a. For example, taking a second light-emitting structure A2 as an example, the second light-emitting structure A2 may include: a first semiconductor layer 21a and a second semiconductor layer 21b disposed opposite each other, and a light-emitting layer 21c located between the first semiconductor layer 21a and the second semiconductor layer 21b. The second semiconductor layer 21b is closer to the substrate 10 than the first semiconductor layer 21a. For example, the first semiconductor layer 21a may be the N-type semiconductor layer in the second light-emitting structure A2, the second semiconductor layer 21b may be the P-type semiconductor layer in the second light-emitting structure A2, and the light-emitting layer 21c may be the quantum well layer in the second light-emitting structure A2.

[0090] A second light-emitting structure A2 can emit red light. The N-type semiconductor layer in the second light-emitting structure A2 can be made of materials such as AlGaInP or Si, the P-type semiconductor in the second light-emitting structure A2 can be made of materials such as GaP or Mg, and the light-emitting layer in the second light-emitting structure A2 can be made of materials such as AlGaInP or GalInP. Another second light-emitting structure A3 can emit green light. The N-type semiconductor layer in the second light-emitting structure A3 can be made of materials such as GaN or Si, the P-type semiconductor in the second light-emitting structure A3 can be made of materials such as GaN or Mg, and the light-emitting layer in the second light-emitting structure A3 can be made of materials such as InGaN or GaN. The first light-emitting structure A1 can emit blue light. The N-type semiconductor layer in the first light-emitting structure A1 can be made of materials such as GaN or Si, the P-type semiconductor in the first light-emitting structure A1 can be made of materials such as GaN or Mg, and the light-emitting layer in the first light-emitting structure A1 can be made of materials such as InGaN or GaN.

[0091] Optionally, as shown in Figures 11 and 12, the display panel may further include: a first insulating layer 70, which may cover the side surfaces of the light-emitting structure 21 and at least a portion of the surface of the light-emitting structure 21 facing away from the substrate 10. The first insulating layer 70 may have a plurality of first vias V3 and a plurality of second vias V4. The first metal connector 30 may be electrically connected to the first semiconductor layer 21a of the light-emitting structure 21 through the plurality of first vias V3, and the plurality of second metal connectors 50 may be electrically connected to the second semiconductor layer 21b of the plurality of light-emitting structures 21 through the plurality of second vias V4. In this case, the first insulating layer 70 can support the first metal connector 30 and the second metal connector 50, and can insulate the first metal connector 30 from structures that do not require electrical connection, and can also insulate the second metal connector 50 from structures that do not require electrical connection, thereby ensuring the reliability of the pixel unit 20. It should be noted that the multiple first vias V3 can correspond one-to-one to the multiple light-emitting structures 21, and the orthographic projection of the first vias V3 on the substrate 10 can be located within the orthographic projection of the first semiconductor layer 21a of the corresponding light-emitting structure 21 on the substrate 10. The multiple second vias V4 can correspond one-to-one to the multiple light-emitting structures 21, and can correspond one-to-one to the multiple driving electrode layers 22. Among them, the orthographic projection of the second vias V4 on the substrate 10 can be located within the orthographic projection of the corresponding driving electrode layer 22 on the substrate 10, and the second metal connector 50 can be electrically connected to the corresponding driving electrode layer 22 through the corresponding second vias V4. It should also be noted that when a common electrode layer 23 is provided on the side of the first semiconductor layer in the first light-emitting structure facing away from the substrate, the first metal connector 30 can overlap with the common electrode layer 23 through the first vias V3.

[0092] In an embodiment of the present application, when the pixel unit 20 has a through hole, the first insulating layer 70 can cover the inner wall of the through hole. In the present application, as shown in Figures 9 and 13, when the pixel unit 20 has a first through hole V1 and / or a second through hole V2, the first insulating layer 70 can cover the inner wall of the first through hole V1, and the portion of the first insulating layer 70 located within the first through hole V1 can be located between the portion of the first wire 40 located within the first through hole V1 and the inner wall of the first through hole V1. The first insulating layer 70 can cover the inner wall of the second through hole V2, and the portion of the first insulating layer 70 located within the second through hole V2 can be located between the portion of the second wire 60 located within the second through hole V2 and the inner wall of the second through hole V2. In this way, by providing an insulating layer on the inner wall of the through hole, it is possible to further insulate the wires provided in the through hole. In the present application, as shown in FIG11 , the display panel may further include a second insulating layer 80, which may cover the first metal connector 30 and / or the second metal connector 50 on a side facing away from the first insulating layer 70. Thus, the first metal connector 30 may be further protected by the second insulating layer 80, and the second metal connector 50 may be further protected by the second insulating layer 80. For example, the material of the first insulating layer and the material of the second insulating layer may be the same, for example, the material of the insulating layer may be at least one of SiO2 and SiN.

[0093] Optionally, as shown in FIG12 , the pixel unit 20 may further include: a transparent bonding layer 24 located between two adjacent light-emitting structures 21, and a reflective bonding layer 25 located between the light-emitting structure 21 and the substrate 10. For example, a reflective bonding layer 25 is provided between a second light-emitting structure A2 and the substrate 10, a transparent bonding layer 24a is provided between a second light-emitting structure A2 and another second light-emitting structure A3, and a transparent bonding layer 24b is provided between another second light-emitting structure A3 and the first light-emitting structure A1. For example, a reflective bonding layer 25 may be provided between the driving electrode layer of a second light-emitting structure A2 and the substrate 10; a transparent bonding layer 24a may be provided between the first semiconductor layer 21a of a second light-emitting structure A2 and the driving electrode layer of another second light-emitting structure A3; and a transparent bonding layer 24b may be provided between the first semiconductor layer 21a of another second light-emitting structure A3 and the driving electrode layer of the first light-emitting structure A1. For example, the reflective bonding layer 25 may be a metal bonding layer, such as at least one of Au-Au bonding, Au-Sn bonding, Au-Ln bonding, Ti-Ti bonding, and Cu-Cu bonding. The transparent bonding layer 24 may be made of at least one of transparent plastic, SiO2, and SOG.

[0094] In an embodiment of the present application, as shown in Figures 2, 4, 6 or 8, for two adjacent light-emitting structures 21 in a pixel unit 20, the outer boundary of the orthographic projection of one light-emitting structure 21 on the substrate 10 may not overlap with the outer boundary of the orthographic projection of the other light-emitting structure 21 on the substrate 10. Alternatively, please refer to Figure 14, which is a top view of a partial structure of a display panel provided by another embodiment of the present application. The outer boundary of a portion of the orthographic projection of one light-emitting structure 21 on the substrate 10 may overlap with the outer boundary of a portion of the orthographic projection of the other light-emitting structure 21 on the substrate 10, and the outer boundary of another portion of the orthographic projection of one light-emitting structure 21 on the substrate 10 may not overlap with the outer boundary of another portion of the orthographic projection of the other light-emitting structure 21 on the substrate 10. For example, the boundaries of the orthographic projections of each light-emitting structure 21 in the pixel unit 20 on the substrate 10 are square, and the orthographic projections of each light-emitting structure 21 on the substrate 10 form a plurality of concentric rings. Alternatively, the boundaries of the orthographic projections of the light-emitting structures 21 in the pixel unit 20 on the substrate 10 are square, and notches with different orthographic projection areas on the substrate are formed at the corners of each light-emitting structure 21 to expose the edge of the corner of each light-emitting structure 21. The boundaries of the orthographic projections of the portion between two adjacent corners of each light-emitting structure 21 on the substrate 10 may overlap. It should be noted that the light-emitting structures 21 in each pixel unit 20 may share a common optical axis.

[0095] Optionally, as shown in Figures 11 and 12, the substrate 10 in the display panel may include: multiple driving circuits 10a corresponding one-to-one to multiple light-emitting structures in a pixel unit 20, and a common signal connection terminal 10b. The driving circuit 10a can be electrically connected to the corresponding light-emitting structure 21 through a second metal connector 50, and at least two first metal connectors 30 can be electrically connected to the common signal terminal 10b (it should be noted that only the common signal terminal corresponding to one pixel unit is shown in the figure). In this way, the driving circuit 10a can be electrically connected to the corresponding light-emitting structure 21 through the second metal connector 50 to transmit an electrical signal to the light-emitting structure 21, and the common signal terminal 10b can simultaneously provide an electrical signal to multiple light-emitting structures 21 in the pixel unit through the first metal connector 30. For example, the driving circuit 10a can be at least one of a thin film transistor driving circuit, a low temperature polysilicon driving circuit, a CMOS integrated circuit driving circuit, and a high mobility transistor driving circuit. In the present application, the driving electrode layer in the light-emitting structure can be used as the anode layer in the light-emitting structure, and the common electrode layer can be used as the common cathode layer.

[0096] In summary, the embodiment of the present application provides a display panel, which may include: a substrate, a plurality of pixel units and a first metal connector. By arranging a plurality of pixel units arranged in an array on the substrate, each pixel unit includes a plurality of light-emitting structures arranged in a stacked manner, and the first metal connector corresponding to this pixel unit is electrically connected to the first semiconductor layer of each light-emitting structure in the pixel unit and the substrate. Since the resistance of the first metal connector is smaller than that of the commonly arranged cathode layer (for example, a whole layer of ITO) and its conductivity is higher, it can effectively avoid the undesirable phenomenon of a more obvious voltage drop, so that the brightness of the picture displayed by the display panel is as uniform as possible, thereby improving the display effect of the display panel. In addition, by arranging the first metal connector instead of the common electrode layer arranged in the whole layer, the probability of undesirable phenomena such as large-step fractures in the whole layer of common electrode layer can be effectively avoided, so that the yield and reliability of the display panel are better.

[0097] The present application also provides a method for manufacturing a display panel, which is used to manufacture the display panel in the above embodiment. The method may include:

[0098] Step S1: forming a plurality of pixel units on one side of a substrate, wherein each pixel unit comprises: a plurality of light-emitting structures stacked in layers, and the orthographic projection area of ​​each light-emitting structure on the substrate gradually decreases in a direction away from the substrate.

[0099] Step S2: forming a first metal connector. At least two pixel units may correspond to at least two first metal connectors one-to-one. The first metal connector is electrically connected to the first semiconductor layer of each light-emitting structure in the corresponding pixel unit at the same time, and the first metal connector is electrically connected to the substrate.

[0100] In summary, the manufacturing method of the display panel provided in the embodiment of the present application includes: forming a plurality of pixel units and a first metal connector on one side of a substrate. Since the first metal connector has a smaller resistance than the commonly provided cathode layer (for example, a whole layer of ITO) and a higher conductivity, it can effectively avoid the undesirable phenomenon of a more obvious voltage drop, so that the brightness of the image displayed by the display panel is as uniform as possible, thereby improving the display effect of the display panel. In addition, by providing the first metal connector instead of the whole-layer common electrode layer, the probability of undesirable phenomena such as large-step fractures in the whole-layer common electrode layer can be effectively avoided, so that the yield and reliability of the display panel are better.

[0101] Please refer to FIG15, which is a flow chart of a method for manufacturing a display panel provided in an embodiment of the present application. The method for manufacturing a display panel can be used to manufacture the display panel shown in FIG4. The method for manufacturing a display panel may include:

[0102] Step S101: forming a plurality of pixel units on a substrate.

[0103] For example, taking the three light-emitting structures in the pixel unit as an example, please refer to Figure 16, which is a schematic diagram of the film layer structure of a pixel unit formed on a substrate provided in an embodiment of the present application. First, three different light-emitting structures can be formed on three different epitaxial wafers, and after the epitaxial wafers are peeled off, the three light-emitting structures and the substrate are bonded as a whole through three bonding layers. For example, a second light-emitting structure is bonded to the substrate through a reflective bonding layer, a second light-emitting structure is bonded to another second light-emitting structure through a transparent bonding layer, and another second light-emitting structure is bonded to the first light-emitting structure through a transparent bonding layer. It should be noted that for the structure and materials of a second light-emitting structure, another second light-emitting structure, the first light-emitting structure and the bonding layer, please refer to the above embodiment, which will not be repeated here.

[0104] Step S102 : The multiple light-emitting structures in each pixel unit form a stepped structure.

[0105] For example, please refer to Figure 17, which is a schematic diagram of a film layer structure forming a stepped structure provided in an embodiment of the present application. Patterned etching can be performed on the three light-emitting structures by performing multiple patterning processes in the form of photolithography or etching to expose the first semiconductor layer and the driving electrode layer of each light-emitting structure, and to etch out the second through holes corresponding to the different light-emitting structures. For example, the area of ​​the orthographic projections of the three light-emitting structures on the substrate gradually decreases in the direction away from the substrate. It should be noted that Figure 17 only shows the second via hole corresponding to one light-emitting structure.

[0106] Step S103 : forming a first insulating layer on the side surfaces of the plurality of light-emitting structures and on the side facing away from the substrate.

[0107] For example, please refer to Figure 18, which is a schematic diagram of a film structure for forming a first insulating layer according to an embodiment of the present application. The first insulating layer can be formed on the side of each light-emitting structure and on the side facing away from the substrate by any of a variety of methods, such as deposition, coating, and sputtering. Next, please refer to Figure 19, which is a schematic diagram of forming a plurality of first via holes and a plurality of second via holes according to an embodiment of the present application. A single patterning process can be performed on the first insulating layer to form the plurality of first via holes and the plurality of second via holes.

[0108] Step S104 : forming a first metal connector on one side of the first insulating layer, and forming a second metal connector at each of the plurality of second via holes.

[0109] For example, please refer to Figure 20, which is a schematic diagram of a film layer forming a first metal connector and a portion of a second metal connector, provided in an embodiment of the present application. The first metal connector can be formed on one side of the first insulating layer by vapor deposition. The first metal connector is overlapped with the first semiconductor layer of the multiple light-emitting structures through multiple first vias, and is overlapped with the common electrode layer through the first semiconductor layer. In addition, multiple second metal connectors are formed at the multiple second vias by vapor deposition.

[0110] Step S105 : forming a second insulating layer on a side of the first insulating layer away from the light emitting structure.

[0111] For example, please refer to Figure 21, which is a schematic diagram of a film layer structure for forming a second insulating layer provided in an embodiment of the present application. The second insulating layer can be formed on one side of the first metal connector by any of a variety of methods such as deposition, coating, sputtering, etc., and the second insulating layer can protect the first metal connector. Then, a patterning process is performed to expose the position in the second through hole that contacts the backplane. It should be noted that a second insulating layer can also be formed on the entire surface to cover each pixel unit, and then a patterning process is performed to expose the position in the second through hole that contacts the substrate.

[0112] Step S106: forming a second conductive line in the second through hole.

[0113] For example, please refer to Figure 22, which is a schematic diagram of a structure for forming a second conductive wire according to an embodiment of the present application. The second conductive wire is formed by a method such as supper sputtering, one end of the second conductive wire is electrically connected to the second metal connector, and the other end of the second conductive wire is electrically connected to the drive circuit on the substrate.

[0114] It should be noted that the one-time patterning process in the above embodiment may include: photoresist coating, exposure, development and photoresist stripping.

[0115] In summary, the manufacturing method of the display panel provided in the embodiment of the present application includes: forming a plurality of pixel units and a first metal connector on one side of a substrate. Since the first metal connector has a smaller resistance than the commonly provided cathode layer (for example, a whole layer of ITO) and a higher conductivity, it can effectively avoid the undesirable phenomenon of a more obvious voltage drop, so that the brightness of the image displayed by the display panel is as uniform as possible, thereby improving the display effect of the display panel. In addition, by providing the first metal connector instead of the whole-layer common electrode layer, the probability of undesirable phenomena such as large-step fractures in the whole-layer common electrode layer can be effectively avoided, so that the yield and reliability of the display panel are better.

[0116] Those skilled in the art will clearly understand that for the convenience and brevity of description, the principles of the various film layer structures in the display panel described above can refer to the corresponding contents in the aforementioned structural embodiments of the display panel and will not be repeated here.

[0117] The present application also provides a display device, which can be any product or component with a display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, navigation system, or wearable device. The display device can include a display panel, which can be any of the display panels described above.

[0118] It should be noted that in the accompanying drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. It will also be understood that when an element or layer is referred to as being "on" another element or layer, it may be directly on the other element, or there may be an intermediate layer. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it may be directly under the other element, or there may be more than one intermediate layer or element. In addition, it will also be understood that when a layer or element is referred to as being "between" two layers or elements, it may be the only layer between the two layers or elements, or there may also be more than one intermediate layer or element. Similar reference numerals throughout the text indicate similar elements.

[0119] In this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance. The term "plurality" refers to two or more than two, unless expressly limited otherwise.

[0120] The above description is merely an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A display panel, characterized in that: include: substrate; A plurality of pixel units arranged in an array on one side of the substrate, the pixel units comprising: a plurality of light-emitting structures arranged in a stacked manner, the area of ​​the orthographic projection of each of the light-emitting structures on the substrate gradually decreasing in a direction away from the substrate; and at least two first metal connectors corresponding to at least two of the pixel units, wherein the first metal connectors are electrically connected to the first semiconductor layers of the light emitting structures in the corresponding pixel units at the same time, and the first metal connectors are electrically connected to the substrate; Wherein, the substrate is configured to provide the same signal to the at least two first metal connectors.

2. The display panel according to claim 1, characterized in that: The first metal connecting member comprises: a first connecting portion and a second connecting portion connected to each other, the orthographic projection of the first connecting portion on the substrate being located within the orthographic projection of the pixel unit on the substrate, and the orthographic projection of the second connecting portion on the substrate being located outside the orthographic projection of the pixel unit on the substrate; The first connection portion is electrically connected to the first semiconductor layer of each of the light emitting structures in the pixel unit, and one end of the second connection portion facing away from the first connection portion is electrically connected to the substrate.

3. The display panel according to claim 1, characterized in that: The orthographic projection of the first metal connector on the substrate is entirely located within the orthographic projection of the pixel unit on the substrate; the display panel further comprises: a first wire, one end of which is electrically connected to the first metal connector, and the other end of which is electrically connected to the substrate.

4. The display panel according to claim 3, characterized in that: The pixel unit has a first through hole that passes through each of the light-emitting structures in sequence; the other end of the first wire passes through the first through hole and is electrically connected to the substrate.

5. The display panel according to any one of claims 1 to 4, characterized in that: The display panel further includes: a plurality of second metal connectors corresponding one-to-one to the plurality of light emitting structures in one of the pixel units, wherein the second metal connectors are electrically connected to the second semiconductor layers of the corresponding light emitting structures and to the substrate.

6. The display panel according to claim 5, characterized in that: The second metal connecting member comprises: a third connecting portion and a fourth connecting portion connected to each other, the orthographic projection of the third connecting portion on the substrate is located within the orthographic projection of the pixel unit on the substrate, and the orthographic projection of the fourth connecting portion on the substrate is located outside the orthographic projection of the pixel unit on the substrate; The third connection portion is electrically connected to the second semiconductor layer of the corresponding light emitting structure, and one end of the fourth connection portion away from the third connection portion is electrically connected to the substrate.

7. The display panel according to claim 5, characterized in that: The orthographic projections of the second metal connector on the substrate are all located within the orthographic projections of the pixel unit on the substrate; the display panel also includes: a second wire, one end of which is electrically connected to the second metal connector, and the other end of the second wire is electrically connected to the substrate.

8. The display panel according to claim 7, characterized in that: The pixel unit has a second through hole, which passes through at least the light emitting structure closest to the substrate in the pixel unit, and the other end of the second wire passes through the second through hole and is electrically connected to the substrate.

9. The display panel according to claim 6, characterized in that: The pixel unit also includes: multiple driving electrode layers; the multiple driving electrode layers correspond one-to-one to the multiple light-emitting structures, the driving electrode layers are located on a side of the corresponding light-emitting structure close to the substrate, and overlap with a side of the second semiconductor layer in the corresponding light-emitting structure away from the first semiconductor layer; the multiple driving electrode layers correspond one-to-one to the multiple second metal connectors, and the second metal connectors overlap with the corresponding driving electrode layers.

10. The display panel according to claim 9, characterized in that: A portion of the orthographic projection of the driving electrode layer on the substrate is located outside the orthographic projection of the corresponding light-emitting structure on the substrate, and at least a portion of the second metal connecting member is located on a side of the corresponding driving electrode layer away from the substrate, and overlaps with a portion of the driving electrode layer that is not covered by the corresponding light-emitting structure.

11. The display panel according to claim 9, characterized in that: For the adjacently arranged first driving electrode layer and the second driving electrode layer in the pixel unit, and the light-emitting structure located between the first driving electrode layer and the second driving electrode layer, the orthographic projection of the light-emitting structure on the substrate is located within the orthographic projection of the first driving electrode layer on the substrate, the orthographic projection of the second driving electrode layer on the substrate is located within the orthographic projection of the light-emitting structure on the substrate, and the orthographic projections of the first driving electrode layer, the light-emitting structure and the second driving electrode layer on the substrate decrease in sequence; The first driving electrode layer is closer to the substrate than the second driving electrode layer.

12. The display panel according to claim 11, characterized in that: The plurality of light-emitting structures in the pixel unit include: a first light-emitting structure and at least one second light-emitting structure, wherein the first light-emitting structure is a light-emitting structure farthest from the substrate among the plurality of light-emitting structures, and the at least one second light-emitting structure is a light-emitting structure located between the first light-emitting structure and the substrate; A portion of the first metal connector is located on a side of the second light emitting structure away from the substrate, and overlaps a portion of the first semiconductor layer of the second light emitting structure that is not covered by the second driving electrode layer.

13. The display panel according to claim 12, characterized in that: The pixel unit further includes: a common electrode layer located on a side of the first light emitting structure away from the substrate, the common electrode layer overlaps a side of the first semiconductor layer in the first light emitting structure away from the second semiconductor layer, and an orthographic projection of the common electrode layer on the substrate is located within an orthographic projection of the first light emitting structure on the substrate; Part of the first metal connecting member is located on a side of the common electrode layer away from the first light-emitting structure and overlaps with the common electrode layer.

14. The display panel according to any one of claims 6 to 13, characterized in that: The light emitting structure includes: the first semiconductor layer and the second semiconductor layer which are arranged opposite to each other, and a light emitting layer located between the first semiconductor layer and the second semiconductor layer, wherein the second semiconductor layer is closer to the substrate than the first semiconductor layer.

15. The display panel according to any one of claims 6 to 13, characterized in that: The display panel further includes: a first insulating layer, the first insulating layer covering the side surface of the light emitting structure and covering at least a portion of a surface of the light emitting structure facing away from the substrate; Among them, the first insulating layer has multiple first vias and multiple second vias, the first metal connector is electrically connected to the first semiconductor layer of the multiple light-emitting structures through the multiple first vias, and the multiple second metal connectors are electrically connected to the second semiconductor layer of the multiple light-emitting structures through the multiple second vias.

16. The display panel according to claim 15, characterized in that: In the case where the pixel unit has a through hole, the first insulating layer covers an inner wall of the through hole.

17. The display panel according to any one of claims 1-4 and 6-13, characterized in that: The pixel unit further includes: a transparent bonding layer located between two adjacent light emitting structures, and a reflective bonding layer located between the light emitting structure and the substrate.

18. The display panel according to any one of claims 1-4 and 6-13, characterized in that: For two adjacently arranged light-emitting structures in the pixel unit, an outer boundary of an orthographic projection of one of the light-emitting structures on the substrate does not overlap with an outer boundary of an orthographic projection of the other light-emitting structure on the substrate; Alternatively, an outer boundary of a portion of an orthographic projection of one of the light-emitting structures on the substrate coincides with an outer boundary of a portion of an orthographic projection of another light-emitting structure on the substrate.

19. The display panel according to any one of claims 6 to 13, characterized in that: The substrate includes: a plurality of driving circuits corresponding one-to-one to a plurality of light-emitting structures in one of the pixel units, and a common signal connection terminal; the driving circuit is electrically connected to the corresponding light-emitting structure through the second metal connection member, and the at least two first metal connection members are both electrically connected to the common signal connection terminal.

20. A display device, characterized in that: include: A display panel, wherein the display panel is the display panel described in any one of claims 1 to 19.

Images