Multi-case cascade vibration noise data acquisition clock synchronization method

Abstract

The invention belongs to the technical field of industrial measurement and control, and discloses a multi-case cascade vibration noise data acquisition clock synchronization method. A clock drift prediction model based on deep learning is constructed by acquiring local clock signals and environment parameters of all cases in real time, and accurate prediction of clock behaviors is achieved. A multi-mode communication strategy combining optical fibers and wireless radio frequency is innovatively adopted, reliable transmission mechanisms which are redundant to each other are formed, and the anti-interference capability is remarkably enhanced. A dynamic compensation mechanism based on the fuzzy logic controller can intelligently adjust compensation parameters according to clock states and environment changes, and accurate correction is achieved. A multi-level verification mechanism including local self-inspection, mutual inspection between cases and global optimization is established, a graph neural network technology is introduced to carry out system-level optimization, and the system has self-learning and self-optimization capabilities. According to the method, the time consistency of the vibration noise data is remarkably improved.

Description

Technical Field

[0001] This invention relates to the field of industrial measurement and control technology, and more specifically, to a method for synchronizing the clock for vibration and noise data acquisition in a multi-chassis cascade. Background Technology

[0002] Vibration and noise data acquisition and analysis technology is widely used in industrial equipment condition monitoring, fault diagnosis, and predictive maintenance, playing a vital role in ensuring the safe and stable operation of industrial production. With the development of industrial automation and intelligent manufacturing, the demand for vibration and noise monitoring of large and complex equipment is increasing. Single acquisition devices can no longer meet the application requirements of numerous monitoring points, wide distribution, and large data volumes, leading to the emergence of multi-chassis cascaded vibration and noise data acquisition systems. These systems typically consist of multiple acquisition chassis, each responsible for data acquisition in a specific area, collectively forming a complete monitoring network.

[0003] Currently, multi-chassis cascaded vibration and noise data acquisition systems face technical challenges in clock synchronization, hindering system performance and data analysis accuracy. Traditional clock synchronization technologies typically employ simple master-slave synchronization or NTP / PTP protocols, which are ineffective in addressing the multiple challenges of complex industrial environments. In industrial settings with drastic temperature fluctuations, such as high-temperature areas in steel plants or low-temperature cold storage facilities, ambient temperature changes can cause crystal oscillator frequency drift of 10-20 ppm. Existing technologies lack real-time compensation mechanisms for environmental factors, leading to rapid accumulation of clock differences between acquisition devices. Furthermore, the prevalent strong electromagnetic interference in industrial environments, such as the start-up and shutdown of large motors and the operation of welding equipment, exacerbates clock signal phase jitter. The vulnerability of a single communication link causes a sharp decline in synchronization signal transmission quality, or even interruption, as interference intensity increases. Existing technologies often employ static compensation strategies, which cannot adapt to the dynamic changes in clock characteristics during long-term operation. Particularly in vibration monitoring systems operating continuously for months, the cumulative effect of clock drift leads to a gradual increase in data timestamp deviation, severely impacting the accuracy of equipment fault diagnosis and lifespan prediction. Meanwhile, distributed acquisition systems lack a global coordination mechanism, and the independent operation of each subsystem leads to "information silos," making system-level optimization and adjustment impossible. In applications such as vibration monitoring of large rotating machinery, microsecond-level time deviations can cause phase analysis errors, resulting in misjudgments and missed diagnoses. Furthermore, existing technologies lack the ability to predict clock behavior and can only passively respond to deviations that have already occurred. Delay compensation leads to unclear timing relationships of key transient events (such as impact vibrations), severely affecting fault propagation path analysis and root cause localization.

[0004] In view of this, the present invention proposes a clock synchronization method for vibration and noise data acquisition in multi-chassis cascade to solve the above problems. Summary of the Invention

[0005] To overcome the aforementioned deficiencies of the prior art and to achieve the above objectives, the present invention provides the following technical solution: a method for synchronizing a multi-chassis cascaded vibration and noise data acquisition clock, comprising: Acquire the local clock signal and environmental parameters of the data acquisition device in each chassis of a multi-chassis cascaded vibration and noise data acquisition system; Based on the frequency distribution characteristics and phase offset characteristics of the local clock signal, and combined with the multidimensional influence factors of the environmental parameters, a clock drift prediction model for the data acquisition device in each chassis is constructed. Based on the clock drift prediction model, the master clock unit and the slave clock unit are determined; Based on the local clock signal of the master clock unit and the environmental parameters, a dynamically adjusted reference clock signal is generated, and the reference clock signal is transmitted to each slave clock unit through a multi-mode communication link. Based on the deviation characteristics between the reference clock signal and the local clock signal received by each slave clock unit, and combined with the clock drift prediction model, clock synchronization compensation parameters for each slave clock unit are obtained; frequency correction and phase correction are performed on the local clock signal of each slave clock unit based on the clock synchronization compensation parameters. Based on the transmission delay characteristics and signal integrity of the multimodal communication link, the clock synchronization error distribution of each slave clock unit is obtained; based on the clock synchronization error distribution, the transmission mode and signal encoding method of the multimodal communication link are dynamically adjusted. A multi-level clock synchronization verification mechanism is constructed based on the clock synchronization status of each slave clock unit and the real-time update results of the clock drift prediction model.

[0006] The technical effects and advantages of the multi-chassis cascade vibration and noise data acquisition clock synchronization method of the present invention are as follows: This invention constructs a deep learning-based clock drift prediction model, which accurately grasps the dynamic characteristics of clocks in each chassis, enabling accurate prediction of future drift trends and shifting from passive response to proactive prevention, effectively avoiding the accumulation of clock deviations. Combined with real-time monitoring and influencing factor modeling of environmental parameters such as temperature, humidity, and electromagnetic interference, the method possesses strong environmental adaptability, maintaining high-precision clock synchronization even under harsh operating conditions with drastic temperature fluctuations and strong electromagnetic interference. The multi-modal communication strategy combining fiber optics and wireless radio frequency forms a redundant and reliable transmission mechanism, significantly enhancing anti-interference capability and fault tolerance in complex network environments. The dynamic compensation mechanism based on a fuzzy logic controller intelligently adjusts compensation parameters according to clock state and environmental changes, achieving a smooth and accurate correction process. A multi-level verification mechanism, from local self-testing and inter-chassis mutual testing to global optimization, forms a complete synchronization quality assurance system, greatly improving system stability and reliability. In particular, the introduction of graph neural network global optimization technology provides self-learning and self-optimization capabilities, enabling continuous adaptation to various changes during long-term operation. Attached Figure Description

[0007] Figure 1 This is a schematic diagram of a multi-chassis cascade vibration and noise data acquisition clock synchronization method according to the present invention. Detailed Implementation

[0008] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0009] This application provides a method for synchronizing the clock for vibration and noise data acquisition in a multi-chassis cascade configuration. The execution entities of the method include, but are not limited to: data acquisition equipment, industrial control systems, monitoring gateways, edge computing units, etc., which can be considered as general computing nodes in this application. The industrial control systems include, but are not limited to: industrial PLC controllers, distributed monitoring systems, and at least one programmable controller.

[0010] This invention provides a clock synchronization method for multi-chassis cascaded vibration and noise data acquisition. By acquiring the local clock signal and environmental parameters of each chassis in real time, an accurate clock drift prediction model is constructed. Combined with a multi-modal communication link to transmit the reference clock signal, high-precision clock synchronization between multiple chassis is achieved through dynamic monitoring and parameter adjustment. It is highly adaptable, capable of optimizing synchronization parameters in real time according to environmental changes and chassis characteristics, significantly improving the time consistency of data acquisition and ensuring the accuracy of vibration and noise data analysis.

[0011] In this embodiment of the invention, the detailed implementation steps of a multi-chassis cascade vibration and noise data acquisition clock synchronization method include: First, the local clock signal and environmental parameters of the data acquisition device within each chassis of the multi-chassis cascaded vibration and noise data acquisition system are acquired. Environmental parameters include the internal temperature, humidity, and electromagnetic interference intensity of the chassis. The local clock signal is generated by the clock chip inside the data acquisition device; its frequency stability and phase characteristics are key indicators for evaluating clock performance. Environmental parameters are acquired in real time by sensors integrated within the chassis, providing fundamental data for subsequent clock drift analysis and ensuring the relevance and effectiveness of the synchronization method.

[0012] Based on the frequency distribution and phase offset characteristics of the local clock signal, and combined with multidimensional influencing factors of environmental parameters, a clock drift prediction model is constructed for the data acquisition device within each chassis. This model quantifies the drift pattern of the clock signal under different environmental conditions, reflecting the dynamic changes in drift. The clock drift prediction model is derived through deep learning network analysis of frequency characteristic parameters and environmental influencing factors, providing a decision-making basis for subsequent master / slave clock selection. The model's high-accuracy prediction capability ensures that synchronization problems caused by clock drift can be addressed in advance.

[0013] Based on the clock drift prediction model, the master clock unit and slave clock units are determined. The master clock unit is the data acquisition device within the chassis with the highest output stability of the clock drift prediction model in the multi-chassis cascaded vibration and noise data acquisition system. The slave clock units are the remaining data acquisition devices within the chassis, excluding the master clock unit. This stability-based selection strategy ensures that the entire system uses the most stable clock source as the reference, improving overall synchronization accuracy. The selection of the master clock unit is dynamic; the system adjusts it based on real-time clock stability assessments to ensure the reference clock remains in optimal condition at all times.

[0014] Based on the local clock signal of the master clock unit and environmental parameters, a dynamically adjusted reference clock signal is generated and transmitted to each slave clock unit via a multimode communication link, which includes both fiber optic and wireless radio frequency links. The reference clock signal is a high-precision time reference that has undergone environmental compensation and stability enhancement. Multimode transmission ensures reliable signal delivery even in complex environments. This multimode communication strategy combines the high stability of fiber optics with the flexibility of wireless transmission, forming a redundant and reliable communication mechanism that significantly improves the transmission reliability of the clock synchronization signal.

[0015] Based on the deviation characteristics between the reference clock signal received by each slave clock unit and the local clock signal, and combined with a clock drift prediction model, clock synchronization compensation parameters for each slave clock unit are obtained. Frequency and phase corrections are then performed on the local clock signal of each slave clock unit based on these compensation parameters. The compensation parameters are crucial for accurately correcting clock deviations and are generated using a fuzzy logic controller to ensure the smoothness and accuracy of the correction process. The correction process employs an adaptive algorithm that adjusts the correction strategy according to dynamic changes in the deviation, ensuring that each slave clock unit remains highly synchronized with the master clock.

[0016] Based on the transmission delay characteristics and signal integrity of the multimodal communication link, the clock synchronization error distribution of each slave clock unit is obtained. Based on this clock synchronization error distribution, the transmission mode and signal encoding method of the multimodal communication link are dynamically adjusted. The performance of the communication link directly affects the clock synchronization accuracy. Through real-time monitoring and dynamic adjustment, the system can cope with network fluctuations and signal interference. The optimization of the transmission mode and encoding method is based on delay stability and signal integrity assessments, ensuring high-quality clock signal transmission under various network conditions.

[0017] Based on the clock synchronization status of each clock unit and the real-time update results of the clock drift prediction model, a multi-level clock synchronization verification mechanism is constructed. This mechanism includes local self-test verification, inter-chassis mutual testing verification, and global optimization verification to achieve high-precision synchronization of clock signals in a multi-chassis cascaded vibration and noise data acquisition system. The multi-level verification mechanism forms a complete synchronization quality assurance system, improving system robustness through different levels of detection and correction. Global optimization verification utilizes graph neural network technology to analyze the synchronization status of the entire system, generating optimization strategies to ensure long-term stable operation of the system.

[0018] In this embodiment of the invention, a clock drift prediction model is constructed for each data acquisition device within the chassis, including: The local clock signal is periodically sampled to obtain the frequency distribution curve and phase shift curve for each sampling period. Periodic sampling is a fundamental step in acquiring clock characteristics, capturing subtle changes in the clock signal through a high-precision sampling circuit. The sampling frequency is set to 10kHz, with 10,000 sample points per sampling period to ensure comprehensive capture of the clock signal characteristics. Zero-crossing detection technology is used during sampling to accurately identify the phase characteristics of the clock signal, improving the accuracy of phase shift measurement. The frequency distribution curve is obtained through short-time Fourier transform, and the phase shift curve is formed by the timing record output from the phase detector; together, they constitute a complete description of the clock signal characteristics.

[0019] Based on the frequency distribution curve, skewness and kurtosis are extracted as frequency distribution characteristic parameters; based on the phase offset curve, periodic fluctuation amplitude and aperiodic drift trend of the phase offset are extracted as phase offset characteristic parameters. Characteristic parameter extraction is a crucial step in transforming complex curves into quantifiable indicators, directly affecting the model's accuracy. Skewness reflects the asymmetry of the frequency distribution, and kurtosis reflects the sharpness of the distribution; both jointly characterize the stability of the clock frequency. The phase offset parameter is divided into periodic and aperiodic components, reflecting the clock's short-term stability and long-term drift trend, respectively. The accurate extraction of these parameters employs a combination of statistical analysis and time-series analysis to ensure the comprehensiveness and representativeness of the feature extraction.

[0020] Based on environmental parameters, the linear influence factors of temperature on clock frequency, the nonlinear influence factors of humidity on clock frequency, and the influence factors of electromagnetic interference intensity on clock phase disturbance are calculated. These environmental influence factors quantify the degree of influence of each environmental parameter on clock performance and are important inputs to the prediction model. The temperature influence factor is calculated through linear regression analysis, reflecting the impact of a 1°C change in temperature on the clock frequency, typically ranging from 0.1 to 2 ppm / °C. The humidity influence factor is described using a quadratic polynomial model, capturing the nonlinear impact of humidity changes on the characteristics of components such as quartz crystal oscillators. The electromagnetic interference influence factor is obtained through correlation analysis, quantifying the correspondence between electromagnetic interference intensity and phase jitter. The calculation of these influence factors fully considers the characteristic differences of different chassis environments, providing targeted input parameters for the model.

[0021] Multidimensional influencing factors of frequency distribution characteristics, phase shift characteristics, and environmental parameters are input into a pre-defined deep learning network model. This model comprises convolutional neural network (CNN) layers and long short-term memory (LSTM) layers. The CNN layers extract spatial features of the frequency distribution and phase shift characteristics, while the LSTM layers capture the temporal dependencies of the multidimensional influencing factors of the environmental parameters. This deep learning network model is the core component for achieving high-precision predictions and can discover complex nonlinear relationships. The CNN layers employ a three-layer structure, each containing 16-64 convolutional kernels of varying sizes, effectively extracting spatial patterns of frequency and phase features. The LSTM layers contain two layers of 128 neurons each, specifically addressing the effects of environmental parameters changing over time. The combination of these two network structures forms a hybrid model with spatiotemporal awareness, significantly improving prediction accuracy and robustness.

[0022] Based on the output of the deep learning network model, a clock drift prediction model is generated for each data acquisition device within the chassis. The output of this model includes predicted frequency drift and phase drift values ​​for a preset future time period. The drift prediction model transforms the deep learning results into specific predictive metrics, directly guiding subsequent synchronization control. The prediction time period is adjustable from 10 minutes to 24 hours to meet the needs of different application scenarios. The frequency drift prediction value, expressed in ppm, describes the trend of clock frequency change over time; the phase drift prediction value, expressed in degrees or nanoseconds, describes the cumulative effect of phase deviation. These two prediction values ​​together constitute a comprehensive prediction of the clock's future behavior, providing a scientific basis for master / slave clock selection and synchronization parameter optimization.

[0023] In this embodiment of the invention, generating a dynamically adjusted reference clock signal includes: The local clock signal of the master clock unit undergoes high-precision frequency division to obtain the base clock signal. Frequency division is an effective means to reduce clock frequency jitter and improve signal stability. The process employs integer frequency division technology, dividing the 10MHz crystal oscillator signal of the master clock unit to 1MHz as the base clock signal. The frequency division circuit adopts a low phase noise design, controlling the jitter during the frequency division process to within 1ps, ensuring the high precision characteristics of the divided signal. The waveform of the base clock signal is a square wave with a duty cycle of 50% ± 0.1% and rise and fall times controlled within 5ns, providing a stable foundation for subsequent modulation.

[0024] Based on the environmental parameters of the master clock unit, the frequency modulation coefficient and phase modulation coefficient of the base clock signal affected by environmental disturbances are calculated. The frequency modulation coefficient is obtained by weighted summation of temperature and humidity, while the phase modulation coefficient is obtained by Fourier transform spectrum analysis of electromagnetic interference intensity. The modulation coefficient is the core parameter for environmental compensation, determining the adjustment amplitude of the base clock signal. The formula for calculating the frequency modulation coefficient is: Where T is the temperature deviation and H is the humidity percentage. These are the weighting coefficients calibrated for the experiment. The phase modulation coefficients are obtained by performing a Fast Fourier Transform on the electromagnetic interference signal, analyzing its energy distribution characteristics, and calculating the matching degree with the clock phase-sensitive frequency band. These two coefficients together form the quantitative basis of environmental compensation, ensuring that the reference clock signal can effectively resist the influence of environmental changes.

[0025] The base clock signal is dynamically modulated based on the frequency and phase modulation coefficients to generate a reference clock signal. Dynamic modulation is a crucial step in generating a highly stable reference clock, achieving active compensation for environmental disturbances through precise parameter control. Frequency modulation employs Direct Digital Synthesis (DDS) technology, achieving frequency fine-tuning with an accuracy of 0.01 ppm by adjusting the frequency control word. Phase modulation uses variable delay line technology to achieve phase adjustment with an accuracy of 1 degree. Both frequency and phase dimensions are considered simultaneously during the modulation process, forming a comprehensive compensation mechanism. The generation of the reference clock signal also includes waveform shaping, optimizing the signal's harmonic characteristics through a low-pass filter, reducing high-order harmonic content, and improving signal purity.

[0026] Real-time stability assessment of the reference clock signal is performed. This assessment includes calculating the Allan variance and frequency jitter value of the reference clock signal within a preset time window. If the Allan variance exceeds a preset variance threshold or the frequency jitter value exceeds a preset jitter threshold, the local clock signal regeneration process of the master clock unit is triggered. Stability assessment is a crucial step in quality control, ensuring that the reference clock signal maintains high accuracy at all times. The Allan variance is calculated using a non-overlapping method, with time windows set at three scales: 1 second, 10 seconds, and 100 seconds, comprehensively assessing stability across different time scales. The preset variance threshold is determined based on the system's synchronization accuracy requirements. The frequency jitter value is measured using a zero-crossing time interval, and the preset jitter threshold is 5 × 10⁻⁶. -9 When the evaluation metrics exceed the threshold, the system will automatically trigger a regeneration process to ensure the continuous stability of the reference clock signal.

[0027] In this embodiment of the invention, transmitting the reference clock signal to each slave clock unit via a multimodal communication link includes: The reference clock signal is multimodal encoded to generate fiber optic transmission signals and wireless radio frequency (RF) transmission signals. The fiber optic transmission signal uses a pulse position modulation (PPM)-based encoding method, while the RF transmission signal uses an orthogonal frequency division multiplexing (OFDM)-based encoding method. Multimodal encoding is a key technology for improving transmission reliability and anti-interference capabilities. The fiber optic transmission signal uses 8-bit PPM to encode the time information of the clock signal into pulse positions, which has low bandwidth requirements for the transmission channel and strong anti-interference capabilities. The RF transmission signal uses 64-subcarrier OFDM technology combined with 16QAM modulation to provide high spectral efficiency and anti-multipath fading capabilities. Both encoding methods are optimized for wired and wireless channel characteristics respectively, ensuring high-quality signal transmission under different transmission environments.

[0028] Based on the real-time channel quality of the multimodal communication link, the transmission weights of fiber optic transmission signals and wireless radio frequency transmission signals are dynamically allocated. Channel quality is obtained by calculating the signal-to-noise ratio (SNR) and bit error rate (BER), and the allocation of transmission weights is based on the weighted sum of the reciprocal of the SNR and the BER. Dynamic weight allocation is an intelligent strategy that fully utilizes multimodal communication resources and can adaptively adjust the transmission strategy according to channel conditions. Channel quality assessment is performed once per second, and the SNR and BER are measured using a dedicated test sequence. The formula for calculating transmission weights is: λ is an adjustable weighting factor, typically set to 0.7. The sum of the weights of the fiber optic link and the wireless radio frequency link is 1. The system dynamically adjusts the resource allocation of the two transmission methods based on the calculation results. When the quality of one link degrades, the weight of the other link is automatically increased to ensure the overall reliability of the transmission.

[0029] In fiber optic links, multi-stage repeater amplifiers are used, and their gain is dynamically adjusted according to the attenuation characteristics of the fiber optic transmission signal. In wireless radio frequency (RF) links, adaptive antenna arrays are used, and their beam direction is dynamically adjusted according to the channel interference characteristics of the RF transmission signal. Link physical layer optimization is a crucial measure to ensure transmission quality, and it involves targeted designs for the characteristics of different transmission media. The repeater amplifiers in the fiber optic links employ erbium-doped fiber amplifier (EDFA) technology, with an amplification node placed every 5-10 kilometers in long-distance transmission. The gain range is adjustable from 10-30 dB, and it automatically adjusts according to the received optical power to ensure signal strength stability. The RF links use a 4×4 MIMO adaptive antenna array, combined with beamforming technology, to dynamically adjust the beam direction and shape based on channel state information, improving signal reception quality and suppressing interference. These physical layer optimization measures significantly improve the stability and anti-interference capability of the communication link.

[0030] In each clock unit, a multimode signal decoding module is set up. This module weights and fuses the received fiber optic and wireless RF transmission signals according to transmission weights to recover the reference clock signal. Signal decoding and fusion are crucial steps in recovering a high-quality reference clock, utilizing multi-source information through intelligent algorithms. The decoding module employs a parallel processing architecture, simultaneously demodulating and decoding both fiber optic and wireless signals. Maximum likelihood detection is used for fiber optic signal decoding, while the soft-decision Viterbi algorithm is used for wireless signal decoding; both have strong noise resistance. Weighted fusion employs Kalman filtering technology, optimally synthesizing the recovered clock information based on the noise characteristics and transmission weights of each signal source. The formula is as follows: ,in and The signals recovered are from the fiber optic and wireless channels, respectively. and The corresponding weights are used. The fused signal is processed by a phase-locked loop to generate a local clock signal that is highly synchronized with the master clock unit.

[0031] In this embodiment of the invention, obtaining the clock synchronization compensation parameters for each slave clock unit includes: The system performs a time-domain comparison between the reference clock signal received from each clock unit and the local clock signal to obtain frequency and phase deviation sequences. Time-domain comparison is the fundamental method for directly quantifying clock differences and is implemented using a high-precision time interval counter. During the comparison, the system simultaneously samples the rising edges of both the reference clock signal and the local clock signal, calculates the corresponding time difference, and forms a time series. The frequency deviation sequence is calculated using the rate of change of adjacent time differences, expressed in ppm; the phase deviation sequence is directly derived from the time difference, expressed in degrees or nanoseconds. The sampling frequency is set to 1 kHz, each measurement lasts 30 seconds, and 30,000 sample points are acquired to ensure the statistical validity of the data. This direct comparison method avoids errors that may be introduced by indirect measurements and improves the accuracy of deviation detection.

[0032] Based on the output of the clock drift prediction model, the changing trends of the frequency deviation sequence and phase deviation sequence are predicted over a predetermined time period. This trend prediction forms the basis for proactive compensation, allowing for early intervention against clock drift by analyzing historical data and the prediction model. The prediction process combines the output of the clock drift prediction model with the currently measured deviation sequence, using an autoregressive moving average (ARMA) model for short-term trend prediction. The prediction period is set to 5 minutes, and the prediction results include the rate of change of frequency deviation and the cumulative trend of phase deviation. This forward-looking prediction significantly improves the timeliness and accuracy of compensation, avoiding the lag effects that may result from relying solely on current measurements.

[0033] Based on the frequency deviation sequence, phase deviation sequence, and their trends, a deviation feature matrix is ​​constructed. The row vectors of the deviation feature matrix include the mean, variance, and skewness of the frequency deviation, and the mean, variance, and kurtosis of the phase deviation. The deviation feature matrix extracts high-dimensional features from the deviation data, providing comprehensive input for subsequent fuzzy control. The matrix construction employs a sliding window analysis method with a window length of 5 seconds and a step size of 1 second, calculating statistical characteristics for the data within each window. The frequency deviation features reflect frequency stability and variation patterns, while the phase deviation features reflect phase accumulation effects and fluctuation characteristics. The combination of these features comprehensively describes the static and dynamic characteristics of the clock deviation, laying the foundation for accurate compensation parameter generation.

[0034] The deviation feature matrix is ​​input to a preset fuzzy logic controller. Based on a preset fuzzy rule base and membership function, the fuzzy logic controller outputs clock synchronization compensation parameters, including frequency compensation gain, phase compensation offset, and compensation convergence speed. Fuzzy logic control is an effective method for handling complex nonlinear systems, integrating expert experience and system characteristics. The controller design uses the Mamdani model, with the six elements of the deviation feature matrix as input variables. Each variable defines 5-7 fuzzy sets, such as "very small," "small," "medium," "large," and "very large." The fuzzy rule base contains approximately 50 expert rules, such as "if the mean frequency deviation is large and the trend is increasing, then the frequency compensation gain is large." The inference process uses the min-max synthesis method, and defuzzification uses the centroid method to generate accurate compensation parameters. The frequency compensation gain ranges from 0.1 to 2.0, the phase compensation offset ranges from -180° to +180°, and the compensation convergence speed ranges from 0.1 to 1.0. These three parameters together determine the clock correction method and intensity.

[0035] Based on the clock synchronization compensation parameters, an adaptive gradient descent algorithm is used to perform frequency and phase correction on the local clock signal of the clock unit. The step size of the adaptive gradient descent algorithm is dynamically adjusted according to the compensation convergence speed. Adaptive correction is the execution step for clock synchronization, achieving consistency with the reference clock by precisely controlling the local clock parameters. Frequency correction is achieved by adjusting the control voltage of the voltage-controlled crystal oscillator (VCXO), with a control resolution of 0.01 ppm; phase correction is achieved by a digital phase accumulator, with an adjustment accuracy of 0.1 degrees. The objective function of the gradient descent algorithm is the weighted sum of squares of the clock deviation, which is minimized through iterative optimization. The step size parameter α is dynamically adjusted according to the compensation convergence speed, as shown in the formula: ,in The base step size is given by v, which represents the compensation convergence speed. This adaptive adjustment strategy balances convergence speed and stability, avoiding oscillation problems that may be caused by overcorrection, and ensuring the smoothness and accuracy of the clock synchronization process.

[0036] In this embodiment of the invention, dynamically adjusting the transmission mode and signal encoding method of the multimodal communication link includes: Real-time monitoring of transmission delay characteristics of multimodal communication links is performed to acquire delay jitter sequences for both fiber optic and wireless radio frequency links. Transmission delay characteristics are a key indicator for evaluating communication link performance and directly affect clock synchronization accuracy. Monitoring employs bidirectional timestamping technology, recording transmission and reception timestamps at both ends of the communication link, calculating round-trip delays, and analyzing their variation characteristics. The monitoring frequency is set to 10 times per second, with each measurement lasting 100 milliseconds, forming a continuous delay time series. The jitter sequence is obtained by calculating the difference between adjacent delay values, reflecting the degree of link delay fluctuation. The system performs statistical analysis on the jitter sequence, extracting characteristic parameters such as mean, standard deviation, and maximum value to comprehensively evaluate the link's delay stability. This real-time monitoring mechanism enables the system to quickly detect changes in link status, providing a basis for subsequent adjustments.

[0037] Based on the delay jitter sequence, the delay stability index for fiber optic links and wireless radio frequency links is calculated. The delay stability index is obtained by dividing the standard deviation of the delay jitter by its mean. The delay stability index is a normalized measure for evaluating link quality, eliminating the influence of differences in the absolute delay values ​​between different links. The calculation formula is: Where σ is the standard deviation of jitter and μ is the mean jitter. This metric is dimensionless, typically ranging from 0.01 to 1.0; a smaller value indicates more stable link latency. The system updates the stability metric every 10 seconds and saves historical data from the last 30 minutes to analyze long-term trends in link performance. This standardized stability assessment method provides a unified standard for comparing the performance of different types of links, facilitating optimal resource allocation decisions by the system.

[0038] If the delay stability index of the fiber optic link is greater than that of the wireless radio frequency (RF) link, the transmission weight of the fiber optic transmission signal is increased, and the encoding method of the fiber optic transmission signal is switched to a differential pulse code modulation (DPCM)-based method. Conversely, if the delay stability index of the RF link is greater than that of the fiber optic link, the transmission weight of the RF transmission signal is increased, and the encoding method of the RF transmission signal is switched to a low-density parity-check (LDPC)-based method. Dynamic adjustment of transmission mode and encoding method is a key measure to improve communication adaptability. The transmission weight adjustment adopts a proportional allocation method, dynamically allocating transmission resources according to the ratio of the stability indices of the two links. Encoding method switching further enhances signal robustness; DPCM is particularly suitable for jitter suppression in fiber optic environments, with a coding efficiency 30% higher than that of basic PPM. Low-density parity-check (LDPC) has error correction capabilities close to the Shannon limit, providing strong anti-interference protection when wireless channel conditions deteriorate. This adaptive switching strategy enables the system to select the optimal transmission scheme for different link conditions, significantly improving communication reliability and efficiency.

[0039] Signal integrity is assessed for multimodal communication links by calculating the eye diagram opening and bit error rate (BER) of the received signal. If the signal integrity falls below a preset integrity threshold, a retraining process for the channel equalizer in the multimodal communication link is triggered. Signal integrity assessment is the final step in ensuring communication quality, guaranteeing the availability of the received signal. Eye diagram analysis uses a digital oscilloscope to capture the signal waveform in real time, calculating the vertical and horizontal openings of the eye diagram to quantify the signal quality level. The BER test involves sending a known pseudo-random bit sequence, counting the number of erroneous bits at the receiver, and calculating the error rate. The preset integrity threshold is an eye diagram opening of no less than 70% and a BER no higher than 10%. -6 When the evaluation result falls below a threshold, the system automatically triggers retraining of the channel equalizer. The equalizer employs adaptive filtering technology, iteratively optimizing the filter coefficients using the minimum mean square error (LMS) algorithm to compensate for distortion introduced by the channel. The training sequence is 1024 bits long, and the training process typically completes within 100 milliseconds, having minimal impact on normal communication. This automatic adjustment mechanism ensures consistently high-quality signal transmission, providing a reliable communication foundation for clock synchronization.

[0040] In this embodiment of the invention, the construction of a multi-level clock synchronization verification mechanism includes: In local self-testing, each slave clock unit periodically calculates the frequency stability and phase continuity of its local clock signal. Frequency stability is obtained by calculating the autocorrelation coefficient of the frequency sequence, and phase continuity is obtained by calculating the number of phase transitions. If the frequency stability is lower than a preset stability threshold or the phase continuity is lower than a preset continuity threshold, a recalibration process for the local clock signal is triggered. Local self-testing is the first line of defense in multi-level verification, enabling timely detection of anomalies in individual nodes. Frequency stability is calculated using autocorrelation analysis, performing an autocorrelation function calculation on the frequency sequence, and taking the correlation coefficient at lag k=1 as the stability index, ranging from [-1, 1]. The closer the value is to 1, the better the stability. Phase continuity is calculated by detecting the number of phase transitions exceeding a preset threshold (usually 5 degrees). Fewer transitions indicate better continuity. The preset stability threshold is usually set to 0.85, and the preset continuity threshold is dynamically set according to the sampling time length, typically requiring no more than 3 transitions within 10 seconds. The self-check cycle is 10 seconds. When an anomaly is detected, the system will immediately trigger a recalibration process to ensure the basic stability of the local clock and provide a reliable foundation for overall synchronization.

[0041] In inter-chassis mutual inspection and verification, the slave clock units in adjacent chassis exchange clock status messages via a multi-mode communication link. These messages include timestamps, frequency deviation values, and phase deviation values. Based on the clock status messages, the synchronization deviation between adjacent chassis is calculated. If the synchronization deviation exceeds a preset deviation threshold, a clock synchronization renegotiation process between the adjacent chassis is triggered. Inter-chassis mutual inspection is an effective mechanism for verifying relative synchronization and can detect synchronization anomalies in local areas. Status message exchange uses a point-to-point communication mode, exchanging messages every 5 seconds. The messages use a compact binary format, with a total length not exceeding 128 bytes. The timestamp accuracy in the clock status messages is at the nanosecond level, the frequency deviation resolution is 0.01ppm, and the phase deviation resolution is 0.1 degrees. The synchronization deviation calculation considers transmission delay compensation, using a bidirectional timestamp method to eliminate the impact of unidirectional delay. The preset deviation thresholds are typically set to a frequency deviation not exceeding ±0.5ppm and a phase deviation not exceeding ±5 degrees. When a deviation exceeding the threshold is detected, the relevant chassis will initiate a renegotiation process, quickly restoring synchronization through more frequent status exchanges and parameter adjustments. This distributed mutual inspection mechanism significantly improves the system's synchronization consistency and fault isolation capabilities.

[0042] In the global optimization verification, a central control unit is set up. This central control unit periodically collects clock synchronization status data from each slave clock unit, including clock deviation, correction count, and synchronization stability. Based on this data, a clock synchronization status graph model is constructed. Nodes in the model represent slave clock units, and edges represent synchronization errors in the inter-chassis communication links. The clock synchronization status graph model is then optimized using a graph neural network to output a global clock synchronization adjustment strategy. This strategy includes a master clock unit re-election rule and a topology optimization scheme for the communication links. Global optimization verification is a system-level monitoring and adjustment mechanism that improves long-term system stability through holistic analysis. The central control unit collects system-wide synchronization status data hourly, forming a complete state snapshot. The clock synchronization status graph model uses a weighted directed graph structure, where node weights reflect the stability of each unit, and edge weights reflect communication quality and synchronization error. The graph neural network employs a graph convolutional network (GCN) architecture, containing three convolutional layers and two fully connected layers, capturing the inter-node relationships through a message passing mechanism. Supervised learning is used for network training, with historical adjustment results as labels, and gradient descent is used to optimize network parameters. The optimization strategy includes a master clock candidate unit sorting list and communication topology adjustment suggestions. The system periodically evaluates whether the current master clock needs to be replaced and whether the communication links need to be reconfigured based on the strategy. This global optimization method based on graph neural networks fully utilizes the system's topology information, enabling it to discover and resolve systemic problems that are difficult to identify with single-point detection, significantly improving the stability and reliability of overall synchronization performance.

[0043] In this embodiment of the invention, the real-time updating of the clock drift prediction model includes: Error analysis is performed on the output of the deep learning network model. This analysis is achieved by calculating the mean square error (MSE) between the predicted and actual frequency drift values, and the MSE between the predicted and actual phase drift values. Error analysis is fundamental for evaluating model accuracy and guiding model updates. During the analysis, each prediction result is recorded and compared with actual measurements, and the statistical characteristics of the error are calculated. Frequency drift prediction errors are typically expressed in ppm, while phase drift prediction errors are expressed in degrees or nanoseconds. The MSE is calculated using a sliding window method with a 24-hour window and a 1-hour step size to ensure the continuity and timeliness of error assessment. Trend indicators of the error are also calculated, such as the autocorrelation and periodicity of the error sequence, to determine if there are systematic biases in the model. This comprehensive error analysis provides a clear direction for model optimization, ensuring the targeted and effective nature of the update process.

[0044] Based on error analysis results, the hyperparameters of the deep learning network model are dynamically adjusted. These hyperparameters include the kernel size of convolutional neural network layers and the number of hidden nodes in long short-term memory (LSTM) network layers. Hyperparameter tuning is an effective means of improving model performance, and the algorithm automatically selects the optimal network structure. The tuning process employs Bayesian optimization, using the root mean square of the prediction error as the objective function to search for the optimal combination in a predefined parameter space. The candidate set for kernel size is {3×3, 5×5, 7×7}, and the candidate set for the number of hidden nodes is {64, 128, 256}. The optimization algorithm uses Gaussian process regression to establish a mapping relationship between hyperparameters and performance, selecting the next set of hyperparameters to be evaluated by maximizing the acquisition function. After each adjustment, the performance of the new model is evaluated using a validation set, and new parameters are only applied if the performance improvement exceeds 5%. This adaptive tuning strategy based on performance feedback ensures that the model structure best matches the current data characteristics, improving prediction accuracy.

[0045] Incremental updates are performed on the multidimensional influencing factors of environmental parameters. These updates are obtained by calculating the weighted sum of the real-time and historical rates of change for each environmental parameter. Updating these influencing factors is a crucial step in adapting to dynamic environmental changes and ensuring the timeliness of the model input. The update employs an incremental learning method, and the formula for calculating the new factor values ​​is as follows: Where β is the update rate parameter, usually set to 0.2. These are the currently calculated impact factor values. The real-time change rate of environmental parameters is obtained through differencing, while the historical change rate is the average value over the past 24 hours. Temperature, humidity, and electromagnetic interference are updated separately, taking into account the different characteristics and time scales of each parameter. The update frequency is once per hour to ensure that the impact factors can reflect changes in environmental characteristics in a timely manner, especially during day-night cycles or seasonal changes. This smooth incremental update strategy avoids the model's overreaction to short-term fluctuations while maintaining sensitivity to long-term trends.

[0046] Based on the adjusted hyperparameters and updated multidimensional influencing factors, the deep learning network model is retrained to generate an updated clock drift prediction model. If the error of the updated clock drift prediction model is lower than a preset error threshold, it is applied to the clock synchronization process of a multi-chassis cascaded vibration and noise data acquisition system. Model retraining is the final step in the update cycle, transforming the optimized parameters into practically usable predictive capabilities. The training process employs transfer learning techniques, using the current model as a foundation and fine-tuning it with recently collected data, rather than training from scratch. The training dataset includes clock signals and environmental parameter records from the past 7 days, divided into training and validation sets in an 8:2 ratio. Training uses mini-batch gradient descent with a batch size of 64, a learning rate of 0.001, and a training cycle of 100 epochs. An early stopping strategy is implemented during training; training stops when the validation error no longer decreases after 5 consecutive epochs to avoid overfitting. The preset error thresholds are a mean square error of frequency prediction not exceeding 0.1 ppm and a mean square error of phase prediction not exceeding 1 degree. Only models that pass validation are deployed to the actual system, ensuring that each update brings performance improvements. This rigorous quality control mechanism ensures the reliability and effectiveness of model updates, enabling continuous optimization and adaptation to environmental changes.

[0047] This invention achieves high-precision clock synchronization in a multi-chassis cascaded vibration and noise data acquisition system through clock drift prediction model construction, multimodal communication link optimization, adaptive adjustment of clock synchronization compensation parameters, and a multi-level verification mechanism. The adaptive optimization feature of this invention can adjust synchronization parameters in real time according to environmental changes and system characteristics, significantly improving the time consistency of data acquisition and ensuring the accuracy of vibration and noise analysis.

[0048] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

[0049] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0050] In the description of this invention, it should be understood that the terms "first," "second," etc., are used only for distinguishing descriptions and should not be construed as indicating or implying relative importance.

[0051] In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0052] In the description of this invention, "several" means one or more, and "a large number" means two or more.

[0053] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0054] All formulas in this manual are dimensionless and calculated numerically. The formulas are derived from software simulations based on a large amount of collected data to obtain the most recent real-world results. The preset parameters and thresholds in the formulas are set by those skilled in the art according to the actual situation.

[0055] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims

1. A method for synchronizing the clock for vibration and noise data acquisition in a multi-chassis cascade configuration, characterized in that, include: Acquire the local clock signal and environmental parameters of the data acquisition device in each chassis of a multi-chassis cascaded vibration and noise data acquisition system; Based on the frequency distribution characteristics and phase offset characteristics of the local clock signal, and combined with the multidimensional influence factors of the environmental parameters, a clock drift prediction model for the data acquisition device in each chassis is constructed. Based on the clock drift prediction model, the master clock unit and the slave clock unit are determined; Based on the local clock signal of the master clock unit and the environmental parameters, a dynamically adjusted reference clock signal is generated, and the reference clock signal is transmitted to each slave clock unit through a multi-mode communication link. Based on the deviation characteristics between the reference clock signal and the local clock signal received by each slave clock unit, and combined with the clock drift prediction model, clock synchronization compensation parameters for each slave clock unit are obtained; frequency correction and phase correction are performed on the local clock signal of each slave clock unit based on the clock synchronization compensation parameters. Based on the transmission delay characteristics and signal integrity of the multimodal communication link, the clock synchronization error distribution of each slave clock unit is obtained; Based on the clock synchronization error distribution, the transmission mode and signal encoding method of the multimodal communication link are dynamically adjusted. A multi-level clock synchronization verification mechanism is constructed based on the clock synchronization status of each slave clock unit and the real-time update results of the clock drift prediction model.

2. The method for synchronizing the clock for vibration and noise data acquisition in a multi-chassis cascade as described in claim 1, characterized in that, The construction of the clock drift prediction model for each data acquisition device within the chassis includes: The local clock signal is periodically sampled to obtain the frequency distribution curve and phase offset curve within each sampling period; Based on the frequency distribution curve, the skewness and kurtosis of the frequency distribution are extracted as frequency distribution characteristic parameters; based on the phase shift curve, the periodic fluctuation amplitude and non-periodic drift trend of the phase shift are extracted as phase shift characteristic parameters. Based on the environmental parameters, calculate the linear influence factor of temperature on clock frequency, the nonlinear influence factor of humidity on clock frequency, and the disturbance influence factor of electromagnetic interference intensity on clock phase. The frequency distribution characteristic parameters, the phase shift characteristic parameters, and the multidimensional influencing factors of the environmental parameters are input into a preset deep learning network model, which includes a convolutional neural network layer and a long short-term memory network layer. Based on the output of the deep learning network model, a clock drift prediction model is generated for each data acquisition device in the chassis. The output of the clock drift prediction model includes the predicted frequency drift and the predicted phase drift within a preset time period in the future.

3. The method for synchronizing the clock for vibration and noise data acquisition in a multi-chassis cascade as described in claim 1, characterized in that, The generation of the dynamically adjusted reference clock signal includes: The local clock signal of the master clock unit is subjected to high-precision frequency division processing to obtain the base clock signal after frequency division; Based on the environmental parameters of the master clock unit, calculate the frequency modulation coefficient and phase modulation coefficient of the base clock signal affected by the environmental disturbance; The base clock signal is dynamically modulated based on the frequency modulation coefficient and the phase modulation coefficient to generate the reference clock signal; The reference clock signal is subjected to real-time stability evaluation, which includes calculating the Allan variance and frequency jitter value of the reference clock signal within a preset time window; if the Allan variance is greater than a preset variance threshold or the frequency jitter value is greater than a preset jitter threshold, the local clock signal regeneration process of the master clock unit is triggered.

4. The method for synchronizing the clock for vibration and noise data acquisition in a multi-chassis cascade as described in claim 1, characterized in that, The transmission of the reference clock signal to each slave clock unit via a multimodal communication link includes: The reference clock signal is multimodal encoded to generate fiber optic transmission signal and wireless radio frequency transmission signal; Based on the real-time channel quality of the multimodal communication link, the transmission weights of the optical fiber transmission signal and the wireless radio frequency transmission signal are dynamically allocated. In the optical fiber link, a multi-stage repeater amplifier is provided, and the gain of the multi-stage repeater amplifier is dynamically adjusted according to the attenuation characteristics of the optical fiber transmission signal; in the wireless radio frequency link, an adaptive antenna array is provided, and the beam direction of the adaptive antenna array is dynamically adjusted according to the channel interference characteristics of the wireless radio frequency transmission signal. In each slave clock unit, a multi-mode signal decoding module is set up to recover the reference clock signal.

5. The method for synchronizing a multi-chassis cascaded vibration and noise data acquisition clock according to claim 1, characterized in that, The process of obtaining the clock synchronization compensation parameters for each slave clock unit includes: The reference clock signal received from each clock unit is compared with the local clock signal in the time domain to obtain the frequency deviation sequence and the phase deviation sequence; Based on the output of the clock drift prediction model, predict the changing trends of the frequency deviation sequence and the phase deviation sequence within a preset time period in the future; Based on the frequency deviation sequence, the phase deviation sequence, and their changing trends, a deviation feature matrix is ​​constructed; The deviation feature matrix is ​​input to a preset fuzzy logic controller, which outputs the clock synchronization compensation parameters based on a preset fuzzy rule base and membership function. Based on the clock synchronization compensation parameters, an adaptive gradient descent algorithm is used to perform frequency and phase correction on the local clock signal of the slave clock unit. The step size of the adaptive gradient descent algorithm is dynamically adjusted according to the compensation convergence speed.

6. The method for synchronizing the clock for vibration and noise data acquisition in a multi-chassis cascade as described in claim 1, characterized in that, The dynamic adjustment of the transmission mode and signal encoding method of the multimodal communication link includes: The transmission delay characteristics of the multimodal communication link are monitored in real time to obtain the delay jitter sequence of the optical fiber link and the delay jitter sequence of the wireless radio frequency link. Based on the delay jitter sequence, the delay stability index of the optical fiber link and the wireless radio frequency link is calculated. The delay stability index is obtained by the ratio of the standard deviation of the delay jitter to the mean. If the delay stability index of the optical fiber link is greater than the delay stability index of the wireless radio frequency link, then the transmission weight of the optical fiber transmission signal is increased, and the encoding method of the optical fiber transmission signal is switched to a differential pulse code modulation method; if the delay stability index of the wireless radio frequency link is greater than the delay stability index of the optical fiber link, then the transmission weight of the wireless radio frequency transmission signal is increased, and the encoding method of the wireless radio frequency transmission signal is switched to a low-density parity check code method. The signal integrity of the multimodal communication link is evaluated by calculating the eye diagram opening and bit error rate of the received signal. If the signal integrity is lower than a preset integrity threshold, the channel equalizer retraining process of the multimodal communication link is triggered.

7. The method for synchronizing a multi-chassis cascaded vibration and noise data acquisition clock according to claim 1, characterized in that, The construction of the multi-level clock synchronization verification mechanism includes: In the local self-test, each slave clock unit periodically calculates the frequency stability and phase continuity of the local clock signal. The frequency stability is obtained by calculating the autocorrelation coefficient of the frequency sequence, and the phase continuity is obtained by calculating the number of phase transitions. If the frequency stability is lower than a preset stability threshold or the phase continuity is lower than a preset continuity threshold, the local clock signal recalibration process is triggered. In the inter-chassis mutual inspection and verification, the slave clock units in adjacent chassis exchange clock status messages through the multi-mode communication link. The clock status message includes a timestamp, frequency deviation value, and phase deviation value. Based on the clock status message, the synchronization deviation of the clock signal between adjacent chassis is calculated. If the synchronization deviation is greater than a preset deviation threshold, the clock synchronization renegotiation process between adjacent chassis is triggered. In the global optimization verification, a central control unit is set up. The central control unit periodically collects clock synchronization status data from each slave clock unit. The clock synchronization status data includes clock deviation value, number of corrections, and synchronization stability. Based on the clock synchronization status data, a clock synchronization status graph model is constructed. The clock synchronization status graph model is optimized by a graph neural network to output a global clock synchronization adjustment strategy. The global clock synchronization adjustment strategy includes a master clock unit re-election rule and a communication link topology optimization scheme.

8. The method for synchronizing the clock for vibration and noise data acquisition in a multi-chassis cascade as described in claim 2, characterized in that, The real-time update of the clock drift prediction model includes: Error analysis is performed on the output of the deep learning network model; Based on the error analysis results, the hyperparameters of the deep learning network model are dynamically adjusted. The hyperparameters include the kernel size of the convolutional neural network layer and the number of hidden nodes in the long short-term memory network layer. Incrementally update the multidimensional influencing factors of the environmental parameters; Based on the adjusted hyperparameters and the updated multidimensional influence factors, the deep learning network model is retrained to generate the updated clock drift prediction model. If the error of the updated clock drift prediction model is lower than a preset error threshold, the updated clock drift prediction model is applied to the clock synchronization process of the multi-chassis cascaded vibration and noise data acquisition system.

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