Communication method and device

Abstract

The invention provides a communication method and device, relates to the technical field of communication, and can reduce the sending power of a sending end device and improve the transmission performance when the sending end device communicates with a receiving end device based on an LDPC coding mode. The method comprises the following steps: grouping information bit sequences with the length of K to obtain a first sequence with the length of K1 and a second sequence with the length of K2; transforming the first sequence to obtain a third sequence with the length of M; determining a fourth sequence with the length of K3 according to the third sequence and the second sequence, and performing LDPC coding on the fourth sequence to obtain a fifth sequence with the length of E; according to the first interleaving pattern, interleaving the fifth sequence to obtain a sixth sequence; and modulating the sixth sequence to obtain a modulation symbol sequence, and outputting the modulation symbol sequence. Wherein K1 is smaller than K, and K2 is equal to K-K1; m is greater than or equal to K1; k3 is equal to M + K2; the first interlaced pattern is related to modulation orders, E, M.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to a communication method and apparatus. Background Technology

[0002] In a communication system, the transmitting device can use a low-density parity-check code (LDPC) to encode the information bit sequence, modulate the encoded sequence, and send the modulated sequence to the receiving device.

[0003] In this process, the transmitting device can prioritize mapping information bits to symbol bits and parity bits to the least reliable amplitude bits during modulation, thereby improving transmission performance. Considering this design, further improvements can be made to the transmission performance by transforming the bit sequence before encoding (e.g., using probabilistic shaping techniques).

[0004] Therefore, when the transmitting device encodes using the LDPC method, how to achieve efficient transmission has become an urgent technical problem to be solved. Summary of the Invention

[0005] This application provides a communication method and apparatus that can reduce the transmission power of the transmitting device and improve transmission performance when the transmitting device communicates with the receiving device based on LDPC encoding.

[0006] Firstly, this application provides a communication method that can be executed by a transmitting device. Unless otherwise specified, "transmitting device" in this application can refer to the transmitting device itself, a component within the transmitting device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the transmitting device. The method includes: grouping an information bit sequence of length K to obtain a first sequence of length K1 and a second sequence of length K2; transforming the first sequence to obtain a third sequence of length M; determining a fourth sequence of length K3 based on the third and second sequences; performing LDPC encoding on the fourth sequence to obtain a fifth sequence of length E; interleaving the fifth sequence according to a first interleaving pattern to obtain a sixth sequence; modulating the sixth sequence to obtain a modulation symbol sequence; and outputting the modulation symbol sequence. Wherein, K1 is less than K, K2 equals K-K1; M is greater than or equal to K1; K3 equals M+K2; and the first interleaving pattern is related to the modulation order, E, and M.

[0007] Based on the first aspect, the transmitting device can transform the first sequence after grouping to obtain "shaping gain," reducing transmission energy and power. Simultaneously, the transmitting device can also interleave the fifth sequence according to a first interleaving pattern. This first interleaving pattern is related to the modulation order, E, and M, which allows information bits to be preferentially mapped to symbol bits and parity bits to be preferentially mapped to the least reliable amplitude bits, improving the performance of the coding system and error correction performance. In other words, the communication method provided in this application can combine the probabilistic shaping transformation process with LDPC coding, obtaining shaping gain while reducing transmission power, improving transmission performance, and simultaneously enhancing error correction performance.

[0008] In one possible design, the first sequence is transformed to obtain a third sequence of length M, including: performing a distribution matching transformation on the first sequence to obtain the third sequence.

[0009] Based on this possible design, the first sequence can be subjected to a distribution matching transformation to obtain the shaping gain.

[0010] In one possible design, the value of M is determined based on Y, where Y is the number of modulation symbols corresponding to the transmission resources.

[0011] In one possible design, M equals the product of P and Y, where P is an even number.

[0012] Based on the two possible designs mentioned above, the value of M can be an even multiple of Y, ensuring that the M transformed bits of the third sequence can be evenly distributed in the real and imaginary parts of the Y modulation symbols.

[0013] In one possible design, M is 2Y; or, M is 4Y; or, M is 6Y; where Y is the number of modulation symbols corresponding to the transmission resources.

[0014] Based on this possible design, when M equals 2Y, the third sequence corresponds to one bit of fixed amplitude for both the real and imaginary parts of the Y modulation symbols. When M equals 4Y, the third sequence corresponds to two bits of fixed amplitude for both the real and imaginary parts of the Y modulation symbols. When M equals 6Y, the third sequence corresponds to three bits of fixed amplitude for both the real and imaginary parts of the Y modulation symbols.

[0015] In one possible design, determining a fourth sequence of length K3 based on the third and second sequences includes: determining the fourth sequence based on the first interleaving sequence, according to the third and second sequences.

[0016] Based on this possible design, the third and second sequences can be processed based on the first interleaved sequence to obtain the fourth sequence.

[0017] In one possible design, the first interleaving sequence comprises M elements and K2 elements, with the M elements preceding some or all of the K2 elements.

[0018] Based on this possible design, by setting the M elements before some or all of the K2 elements, it is possible to interleave the M transformed bits into more reliable M / 2 / Y amplitude bits during subsequent interleaving according to the first interleaving pattern, thereby improving transmission performance.

[0019] In one possible design, where M elements are located before some of the K2 elements, the remaining K2 elements are located before the M elements.

[0020] In one possible design, the number of the remaining elements of the K2 elements is X, where X is related to Zc, which is the extension factor of the low-density parity-check code LDPC encoding.

[0021] Based on the two possible designs mentioned above, by setting the X elements of the second sequence before the M elements, the bits corresponding to the X elements can be punctured during subsequent rate matching. This allows the M transformed bits to be interleaved into more reliable M / 2 / Y amplitude bits during subsequent interleaving according to the first interleaving pattern, thereby improving transmission performance.

[0022] In one possible design, the first interleaving sequence is related to one or more of the following parameters: modulation order, length of the second sequence, M, column weight of the LDPC basis matrix, row weight of the LDPC parity check matrix, column weight of the LDPC parity check matrix, row weight of the first interleaving pattern, or E.

[0023] Based on this possible design, several feasible solutions are provided for the design of the first interleaving sequence.

[0024] In one possible design, the fourth sequence includes, in ascending order of numbering, the third sequence and the second sequence; or, the fourth sequence includes, in ascending order of numbering, X bits of the second sequence, the third sequence, and K2-X bits of the second sequence.

[0025] In one possible design, X is related to Zc, where Zc is the extension factor of LDPC encoding.

[0026] Based on the two possible designs mentioned above, by placing the second sequence before some or all of the elements of the third sequence, the second sequence can be interleaved to a more reliable M / 2 / Y amplitude bits during subsequent interleaving according to the first interleaving pattern, thereby improving transmission performance.

[0027] In one possible design, the length of the first interleaving pattern is equal to the modulation order Q, and the values ​​of the second to the (P+1)th elements of the first interleaving pattern range from 0 to P-1; P equals M / Y, where Y is the number of modulation symbols corresponding to the transmission resource, and P is an even number.

[0028] Based on this possible design, by taking the values ​​of the second to the (P+1)th elements of the first interleaving pattern as 0 to P-1, the third sequence can be interleaved to a more reliable M / 2 / Y amplitude bits when interleaving according to the first interleaving pattern, thereby improving transmission performance.

[0029] In one possible design, the values ​​of the QP elements of the first interlacing pattern, excluding the 2nd to P+1th elements, are: P, P+1, P+2 to Q-1.

[0030] In one possible design, the values ​​of the 0th to the 1st elements of the first interlacing pattern are P to P+1; the values ​​of the P+2th to Q-1th elements of the first interlacing pattern are P+2 to Q-1.

[0031] Based on the two possible designs mentioned above, the values ​​of the other QP elements of the first interleaved pattern, excluding the second to the (P+1)th elements, can be interleaved without restriction, in order to simplify the decoding implementation.

[0032] In one possible design, the fifth sequence is interleaved according to the first interleaving pattern to obtain the sixth sequence, including: mapping the U-th bit in the fifth sequence to the V-th position in the sixth sequence according to the first interleaving pattern; wherein U is related to the first interleaving pattern, E, and modulation order; V is related to the modulation order and E, U = 0, 1, 2, ..., E-1; e2 = 0, 1, 2, ..., E-1.

[0033] In one possible design, U equals W(i)*E / Q+j; where W(i) represents the i-th element in the first interleaving pattern, i = 0, 1, 2, ..., Q-1; Q is the modulation order, j = 0, 1, 2, ..., E / Q-1.

[0034] In one possible design, V equals i + j * Q; where i = 0, 1, 2, ..., Q-1; j = 0, 1, 2, ..., E / Q-1; and Q is the modulation order.

[0035] Based on the three possible designs mentioned above, the transmitting device can perform interleaving in the manner described above to improve transmission performance.

[0036] In one possible design, the second to the (P+1)th elements of the first interleaving pattern correspond to the positions of the transformed bits in the fifth sequence in the sixth sequence, where P equals M / Y, Y is the number of modulation symbols corresponding to the transmission resource, and P is an even number.

[0037] In one possible design, the last A elements in the first interleaving pattern, excluding the second to the (P+1)th elements, correspond to the positions of the check bits in the fifth sequence in the sixth sequence.

[0038] In one possible design, the first B elements of the first interleaving pattern, excluding the 2nd to P+1th elements, correspond to the positions of the untransformed bits in the fifth sequence in the sixth sequence; B equals E / YAP.

[0039] Based on the three possible designs described above, interleaving can be performed as described above. The transformed M bits are placed in the more reliable amplitude bits, the parity bits are placed in the least reliable bits other than the positions corresponding to the M bits, and the untransformed bits are placed in the most reliable positions other than the positions corresponding to the M bits, thus simplifying the decoding implementation.

[0040] In one possible design, when the modulation order is 10 and P equals 6, the first interleaving pattern is [6 7 01 2 3 4 5 8 9]; or, when the modulation order is 10 and P equals 4, the first interleaving pattern is [4 5 0 1 23 6 7 8 9]; or, when the modulation order is 10 and P equals 2, the first interleaving pattern is [2 3 0 1 4 5 67 8 9]; where P equals M / Y, and Y is the number of modulation symbols corresponding to the transmission resource.

[0041] In one possible design, when the modulation order is 8 and P equals 4, the first interleaving pattern is [4 5 01 2 3 6 7]; or, when the modulation order is 8 and P equals 2, the first interleaving pattern is [2 3 0 1 4 5 67]; where P equals M / Y, and Y is the number of modulation symbols corresponding to the transmission resources.

[0042] In one possible design, with a modulation order of 6 and P equal to 2, the first interleaving pattern is [2 3 01 4 5]; where P equals M / Y, and Y is the number of modulation symbols corresponding to the transmission resources.

[0043] In one possible design, with a modulation order of 4 and P equal to 2, the first interleaving pattern is [2 3 01]; where P equals M / Y, and Y is the number of modulation symbols corresponding to the transmission resources.

[0044] Based on the above four possible designs, multiple feasible solutions are provided for the first interlacing pattern.

[0045] In one possible design, the fourth sequence is LDPC encoded to obtain a fifth sequence of length E, which includes: LDPC encoding and rate matching of the fourth sequence to obtain the fifth sequence.

[0046] In one possible design, the modulation symbol sequence includes Y modulation symbols, each corresponding to Q bits in the sixth sequence after interleaving based on the first interleaving pattern.

[0047] In one possible design, K1 is determined based on Y, where Y is the number of modulation symbols corresponding to the transmission resources.

[0048] Based on this possible design, for a modulation order Q, the real part of each modulation symbol corresponds to Q / 2 bits, and the imaginary part also corresponds to Q / 2 bits. These Q / 2 bits include one symbol bit and Q / 2-1 modulation bits. For modulation schemes with a modulation order Q greater than or equal to 6 (such as 64QAM, 256QAM, and 1024QAM), not all amplitude bits in the Q / 2 bits corresponding to the real and imaginary parts of each modulation symbol can be transformed. If the last amplitude bit in the Q / 2 bits is transformed, a parity bit must be carried in the symbol bit, thus affecting performance. Therefore, the last amplitude bit can be left untransformed, and the parity bit can be mapped to this last amplitude bit later, avoiding mapping information bits to the least reliable subchannel (i.e., this last amplitude bit) and improving transmission performance. Based on this, having determined the number of amplitude bits to be transformed, the length K1 of the first sequence can be determined according to Y.

[0049] In one possible design, K1 is equal to the product of r and Y, where r is a positive number.

[0050] In one possible design, r is predefined; or r is related to the modulation order; or r is related to the modulation order and the modulation and coding scheme (MCS); or r is related to the transformation method that modulates the first sequence.

[0051] In one possible design, r is related to the modulation order, including: r is greater than 0 and less than or equal to the difference between the modulation order and 4; wherein the modulation order is greater than 4.

[0052] In one possible design, r is determined by the modulation order and MCS, including: r is greater than 0 and less than or equal to the difference between the modulation order and 4; wherein the modulation order is greater than 4; when the modulation order is the same, r corresponding to the first MCS is less than or equal to r corresponding to the second MCS; wherein the index of the first MCS is less than the index of the second MCS.

[0053] Based on the two possible designs above, the "4" in "difference between modulation order and 4" represents 1 symbol bit corresponding to the real part of the modulation symbol, the last amplitude bit corresponding to the real part of the modulation symbol, 1 symbol bit corresponding to the imaginary part of the modulation symbol, and the last amplitude bit corresponding to the imaginary part of the modulation symbol.

[0054] In one possible design, the value of r is in the range of (0,2]; or, the value of r is in the range of (0,4]; or, the value of r is in the range of (0,6]; or, the value of r is in the range of [2,4]; or, the value of r is in the range of [2,6].

[0055] Based on this possible design, multiple feasible options are provided for the value of r.

[0056] Secondly, this application provides a communication method that can be executed by a receiving device. Unless otherwise specified, the term "receiving device" in this application can refer to the receiving device itself, a component in the receiving device (e.g., a processor, chip, or chip system), or a logic module or software that can implement all or part of the functions of the receiving device. The method includes: receiving information to be decoded from a transmitting device; wherein the information to be decoded corresponds to an information bit sequence of length K; demodulating the information to be decoded to obtain a first symbol sequence of length E; deinterleaving the first symbol sequence according to a first interleaving pattern to obtain a second symbol sequence; wherein the first interleaving pattern is related to the modulation order, E, and M; M is the inverse transform length of the sequence; decoding the second symbol sequence to obtain a seventh sequence of length K3; determining an eighth sequence of length M and a ninth sequence of length K2 according to the seventh sequence; K3 equals M+K2; performing an inverse transform on the eighth sequence to obtain a tenth sequence of length K1; M is greater than or equal to K1; K1 equals K-K2; and determining the decoding result of the information bit sequence according to the tenth and ninth sequences.

[0057] Based on the second aspect, corresponding to "the transmitting device transforms the first sequence after grouping to obtain shaping gain, reduce transmission energy, and reduce transmission power. At the same time, the transmitting device can also interleave the fifth sequence according to the first interleaving pattern, which is related to the modulation order, E, and M, so that information bits are preferentially mapped to symbol bits and parity bits are preferentially mapped to the least reliable amplitude bits, thereby improving the performance of the coding system and the error correction performance," the receiving device can perform a corresponding decoding process based on this coding process to obtain the decoding result, improve transmission performance, and simplify the decoding implementation.

[0058] Thirdly, this application provides a communication method that can be executed by a transmitting device. Unless otherwise specified, the term "transmitting device" in this application can refer to the transmitting device itself, a component in the transmitting device (e.g., a processor, chip, or chip system), or a logic module or software that can implement all or part of the functions of the transmitting device. The method includes: grouping an information bit sequence of length K to obtain a first sequence of length K1, a second sequence of length K2, and a third sequence of length K3, where K1 is a positive integer less than K, K2 equals 2Y, Y is the number of modulation symbols corresponding to the transmission resources, and K3 equals K-K1-K2; transforming the first sequence to obtain a fourth sequence of length M, where M is greater than or equal to K1; determining a fifth sequence of length K4 based on the fourth, second, and third sequences; performing LDPC encoding on the fifth sequence to obtain a sixth sequence of length E, where K4 equals M+K2+K3; performing row and column interleaving on the sixth sequence according to a second interleaving pattern to obtain a seventh sequence; modulating the seventh sequence to obtain a modulation symbol sequence, and outputting the modulation symbol sequence.

[0059] Based on the third aspect, the transmitting device can transform the first sequence after grouping to obtain "shaping gain," reducing transmission energy and power. Simultaneously, the transmitting device can also perform row-column interleaving on the sixth sequence according to the second interleaving pattern, allowing information bits to be preferentially mapped to symbol bits and parity bits to be preferentially mapped to the least reliable amplitude bits, improving the performance of the coding system and error correction performance. In other words, the communication method provided in this application can combine the probabilistic shaping transformation process with LDPC coding, obtaining shaping gain while reducing transmission power, improving transmission performance, and simultaneously enhancing error correction performance.

[0060] In one possible design, the first sequence is transformed to obtain a fourth sequence of length M, including: performing a distribution matching transformation on the first sequence to obtain the fourth sequence.

[0061] Based on this possible design, the first sequence can be subjected to a distribution matching transformation to obtain the shaping gain.

[0062] In one possible design, the value of M is determined based on Y.

[0063] In one possible design, M equals the product of P and Y, where P is an even number.

[0064] Based on the two possible designs mentioned above, the value of M can be an even multiple of Y, ensuring that the M transformed bits of the third sequence can be evenly distributed in the real and imaginary parts of the Y modulation symbols.

[0065] In one possible design, M can be 2Y; or M can be 4Y; or M can be 6Y.

[0066] Based on this possible design, when M equals 2Y, the fourth sequence corresponds to one bit of fixed amplitude for both the real and imaginary parts of the Y modulation symbols. When M equals 4Y, the fourth sequence corresponds to two bits of fixed amplitude for both the real and imaginary parts of the Y modulation symbols. When M equals 6Y, the fourth sequence corresponds to three bits of fixed amplitude for both the real and imaginary parts of the Y modulation symbols.

[0067] In one possible design, determining a fifth sequence of length K4 based on the fourth, second, and third sequences includes: determining the fifth sequence based on the second interleaved sequence, according to the fourth, second, and third sequences.

[0068] Based on this possible design, the fourth sequence, the second sequence, and the third sequence can be processed based on the second interleaved sequence to obtain the fourth sequence.

[0069] In one possible design, the second interleaving sequence includes K2 elements, M elements, and K3 elements, with the K2 elements preceding the M elements, and the K2 and M elements preceding some or all of the K3 elements.

[0070] Based on this possible design, by setting the K2 elements and M elements before some or all of the K3 elements, it is possible to interleave the K2 elements to the symbol bits and the M transformed bits to the more reliable M / 2 / Y amplitude bits during subsequent interleaving according to the second interleaving pattern, thereby improving transmission performance.

[0071] In one possible design, where K2 elements and M elements are located before some elements of K3 elements, the remaining elements of K3 elements are located before K2 elements and M elements.

[0072] In one possible design, the number of the remaining elements of the K3 elements is X, where X is related to Zc, which is the extension factor of the low-density parity-check code (LDPC).

[0073] Based on the two possible designs mentioned above, by setting the X elements of the third sequence before the M elements, the bits corresponding to the X elements can be punctured during subsequent rate matching. This allows the K2 elements to be interleaved to the symbol bits and the M transformed bits to the more reliable M / 2 / Y amplitude bits during subsequent interleaving according to the second interleaving pattern, thereby improving transmission performance.

[0074] In one possible design, the second interleaving sequence is related to one or more of the following parameters: modulation order, length of the third sequence, M, column weight of the LDPC basis matrix, row weight of the LDPC parity check matrix, column weight of the LDPC parity check matrix, row weight of the second interleaving pattern, or E.

[0075] Based on this possible design, several feasible schemes are provided for the design of the second interleaving sequence.

[0076] In one possible design, the fifth sequence includes, in ascending order of numbering, the second sequence, the fourth sequence, and the third sequence; or, the fifth sequence includes, in ascending order of numbering, X bits of the third sequence, the second sequence, the fourth sequence, and K-K1-2Y-X bits of the third sequence.

[0077] In one possible design, X is related to Zc, where Zc is the extension factor of LDPC encoding.

[0078] Based on the two possible designs mentioned above, by placing the second and fourth sequences before some or all of the elements of the third sequence, it is possible to interleave the second sequence to the symbol bits and the fourth sequence to the more reliable M / 2 / Y amplitude bits when interleaving according to the second interleaving pattern, thereby improving transmission performance.

[0079] In one possible design, the sixth sequence is interleaved according to the second interleaving pattern to obtain the seventh sequence, including: mapping the U-th bit in the sixth sequence to the V-th position in the seventh sequence according to the second interleaving pattern; wherein U is related to E and the modulation order; V is related to the modulation order and E, U = 0, 1, 2, ..., E-1; V = 0, 1, 2, ..., E-1.

[0080] In one possible design, U equals i*E / Q+j; where i = 0, 1, 2, ..., Q-1; Q is the modulation order, and j = 0, 1, 2, ..., E / Q-1.

[0081] In one possible design, V equals i + j * Q; where i = 0, 1, 2, ..., Q-1; j = 0, 1, 2, ..., E / Q-1; and Q is the modulation order.

[0082] Based on the three possible designs mentioned above, the transmitting device can perform interleaving in the manner described above to improve transmission performance.

[0083] In one possible design, the second to the (P+1)th elements of the second interleaving pattern correspond to the positions of the transformed bits in the sixth sequence in the seventh sequence, where P equals M / Y and P is an even number.

[0084] In one possible design, the last A elements in the second interleaving pattern, excluding the 2nd to P+1th elements, correspond to the position of the parity bit in the sixth sequence in the seventh sequence, where P equals M / Y and P is an even number.

[0085] In one possible design, the first two elements of the second interleaving pattern correspond to the positions of the untransformed information bits (i.e., the second sequence) in the sixth sequence in the seventh sequence, and the information bits are the information bits in the second sequence.

[0086] In one possible design, the first C elements of the second interleaving pattern, excluding the 0th to the (P+1th)th elements, correspond to the positions of the untransformed bits in the sixth sequence in the seventh sequence, where C equals E / Y-2-PA.

[0087] Based on the four possible designs mentioned above, the transmitting device can perform interleaving in the manner described above to improve transmission performance.

[0088] In one possible design, the fifth sequence is LDPC encoded to obtain a sixth sequence of length E, which includes: LDPC encoding and rate matching of the fifth sequence to obtain the sixth sequence.

[0089] In one possible design, the modulation symbol sequence includes Y modulation symbols, each corresponding to Q bits in the seventh sequence after interleaving based on the second interleaving pattern.

[0090] In one possible design, K1 is determined based on Y.

[0091] In one possible design, K1 is equal to the product of r and Y, where r is an integer greater than 0.

[0092] In one possible design, r is predefined; or r is related to the modulation order; or r is related to the modulation order and the modulation and coding scheme (MCS); or r is related to the transformation method that modulates the first sequence.

[0093] In one possible design, r is related to the modulation order, including: r is greater than 0 and less than or equal to the difference between the modulation order and 4; wherein the modulation order is greater than 4.

[0094] In one possible design, r is related to the modulation order and MCS, including: r is greater than 0 and less than or equal to the difference between the modulation order and 4; wherein the modulation order is greater than 4; when the modulation order is the same, r corresponding to the first MCS is less than or equal to r corresponding to the second MCS; wherein the index of the first MCS is less than the index of the second MCS.

[0095] Based on the two possible designs above, the "4" in "difference between modulation order and 4" represents 1 symbol bit corresponding to the real part of the modulation symbol, the last amplitude bit corresponding to the real part of the modulation symbol, 1 symbol bit corresponding to the imaginary part of the modulation symbol, and the last amplitude bit corresponding to the imaginary part of the modulation symbol.

[0096] In one possible design, the value of r is in the range of (0,2]; or, the value of r is in the range of (0,4]; or, the value of r is in the range of (0,6]; or, the value of r is in the range of [2,4]; or, the value of r is in the range of [2,6].

[0097] Based on this possible design, multiple feasible options are provided for the value of r.

[0098] Fourthly, this application provides a communication method that can be executed by a receiving device. Unless otherwise specified, the term "receiving device" in this application can refer to the receiving device itself, a component in the receiving device (e.g., a processor, chip, or chip system), or a logic module or software that can implement all or part of the functions of the receiving device. The method includes: receiving information to be decoded from a transmitting device; wherein the information to be decoded corresponds to an information bit sequence of length K; demodulating the information to be decoded to obtain a first symbol sequence of length E; deinterleaving the first symbol sequence according to a second interleaving pattern to obtain a second symbol sequence; decoding the second symbol sequence to obtain an eighth sequence of length K4; determining a ninth sequence of length M, a tenth sequence of length K2, and an eleventh sequence of length K3 according to the eighth sequence; wherein K4 is the sum of M, K2, and K3; M is the inverse transform length of the sequence; K2 equals 2Y, and Y is the number of modulation symbols corresponding to the transmission resource; performing an inverse transform on the ninth sequence to obtain a twelfth sequence of length K1; M is greater than or equal to K1; K1 equals K-K2-K3; and determining the decoding result of the information bit sequence according to the twelfth, tenth, and eleventh sequences.

[0099] Based on the fourth aspect, corresponding to "the transmitting device transforms the first sequence after grouping to obtain shaping gain, reduce transmission energy, and reduce transmission power. At the same time, the transmitting device can also interleave the sixth sequence according to the second interleaving pattern, which can make information bits preferentially mapped to symbol bits and parity bits preferentially mapped to the least reliable amplitude bits, thereby improving the performance of the coding system and the error correction performance," the receiving device can perform a corresponding decoding process based on this coding process to obtain the decoding result, improve transmission performance, and simplify decoding implementation.

[0100] Fifthly, this application provides a communication device that can be applied to the transmitting end device described in the first or third aspect to realize the functions performed by the transmitting end device. The communication device can be the transmitting end device itself, or it can be a chip, chip system, or system-on-a-chip of the transmitting end device, etc. The communication device can execute the functions performed by the transmitting end device through hardware, or it can execute corresponding software through hardware. The hardware or software includes one or more modules corresponding to the above functions. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations, or it can cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations, or it can cooperate with the transceiver module to complete the following processing operations, without limitation.

[0101] For example, the processing module is used to group the information bit sequence of length K to obtain a first sequence of length K1 and a second sequence of length K2; K1 is less than K, and K2 is equal to K-K1; the processing module is also used to transform the first sequence to obtain a third sequence of length M; M is greater than or equal to K1; the processing module is also used to determine a fourth sequence of length K3 based on the third and second sequences, and to perform LDPC encoding on the fourth sequence to obtain a fifth sequence of length E; K3 is equal to M+K2; the processing module is also used to interleave the fifth sequence according to a first interleaving pattern to obtain a sixth sequence; the first interleaving pattern is related to the modulation order, E, and M; the processing module is also used to modulate the sixth sequence to obtain a modulation symbol sequence, and the transceiver module is used to output the modulation symbol sequence.

[0102] In another example, the processing module is used to group the information bit sequence of length K to obtain a first sequence of length K1, a second sequence of length K2, and a third sequence of length K3, where K1 is a positive integer less than K, K2 equals 2Y, Y is the number of modulation symbols corresponding to the transmission resources, and K3 equals K-K1-K2. The processing module is also used to transform the first sequence to obtain a fourth sequence of length M, where M is greater than or equal to K1. The processing module is also used to determine a fifth sequence of length K4 based on the fourth, second, and third sequences, and to perform LDPC encoding on the fifth sequence to obtain a sixth sequence of length E, where K4 equals M+K2+K3. The processing module is also used to perform row and column interleaving on the sixth sequence according to the second interleaving pattern to obtain a seventh sequence. The seventh sequence is then modulated to obtain a modulation symbol sequence. The transceiver module is used to output the modulation symbol sequence.

[0103] Optionally, the transceiver module and processing module of the communication device in the fifth aspect may also perform the corresponding functions in the first aspect or any possible design of the first aspect, or perform the corresponding functions in the third aspect or any possible design of the third aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0104] Sixthly, this application provides a communication device that can be applied to the receiving end device described in the second or fourth aspect above to realize the functions performed by the receiving end device. The communication device can be the receiving end device itself, or it can be a chip, chip system, or system-on-a-chip of the receiving end device, etc. The communication device can execute the functions performed by the receiving end device through hardware, or it can execute corresponding software through hardware. The hardware or software includes one or more modules corresponding to the above functions. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations, or it can cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations, or it can cooperate with the transceiver module to complete the following processing operations, without limitation.

[0105] For example, the transceiver module is used to receive information to be decoded from the transmitting device; wherein the information to be decoded corresponds to an information bit sequence of length K; the processing module is used to demodulate the information to be decoded to obtain a first symbol sequence of length E; and to deinterleave the first symbol sequence according to a first interleaving pattern to obtain a second symbol sequence; wherein the first interleaving pattern is related to the modulation order, E, and M; M is the inverse transform length of the sequence; the processing module is also used to decode the second symbol sequence to obtain a seventh sequence of length K3; and to determine an eighth sequence of length M and a ninth sequence of length K2 according to the seventh sequence; K3 is equal to M+K2; the processing module is also used to perform an inverse transform on the eighth sequence to obtain a tenth sequence of length K1; M is greater than or equal to K1; K1 is equal to K-K2; the processing module is also used to determine the decoding result of the information bit sequence according to the tenth and ninth sequences.

[0106] In another example, the transceiver module is used to receive information to be decoded from the transmitting device; wherein the information to be decoded corresponds to an information bit sequence of length K; the processing module is used to demodulate the information to be decoded to obtain a first symbol sequence of length E; according to a second interleaving pattern, the first symbol sequence is de-interleaved to obtain a second symbol sequence; the second symbol sequence is decoded to obtain an eighth sequence of length K4; according to the eighth sequence, a ninth sequence of length M, a tenth sequence of length K2, and an eleventh sequence of length K3 are determined; wherein K4 is the sum of M, K2, and K3; M is the inverse transform length of the sequence; K2 equals 2Y, and Y is the number of modulation symbols corresponding to the transmission resources; the processing module is also used to perform an inverse transform on the ninth sequence to obtain a twelfth sequence of length K1; M is greater than or equal to K1; K1 equals K-K2-K3; the processing module is also used to determine the decoding result of the information bit sequence according to the twelfth, tenth, and eleventh sequences.

[0107] Optionally, the transceiver module and processing module of the communication device in the sixth aspect may also perform the corresponding functions in the second aspect or any possible design of the second aspect, or perform the corresponding functions in the fourth aspect or any possible design of the fourth aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0108] In a seventh aspect, this application provides a communication device comprising one or more processors; the one or more processors being configured to run computer programs or instructions, such that when the one or more processors execute the computer instructions or instructions, the communication method described in any one of the first to fourth aspects is performed.

[0109] In one possible design, the communication device further includes one or more memories coupled to one or more processors, the memories used to store the aforementioned computer programs or instructions. In one possible implementation, the memories are located outside the communication device. In another possible implementation, the memories are located inside the communication device. In embodiments of this application, the processor and memory may also be integrated into a single device, i.e., the processor and memory may be integrated together. In one possible implementation, the communication device further includes a transceiver for receiving and / or transmitting information.

[0110] In one possible design, the communication device further includes one or more communication interfaces coupled to one or more processors, and the communication interfaces are used to communicate with other modules outside the communication device.

[0111] Eighthly, this application provides a communication device including an interface circuit and a logic circuit; the interface circuit is used for inputting and / or outputting information; the logic circuit is used for performing the communication method as described in any one of the first to fourth aspects, processing and / or generating information based on the information.

[0112] Ninthly, this application provides a computer-readable storage medium storing computer instructions or programs that, when executed on a computer, cause the communication method described in any one of the first to fourth aspects to be performed.

[0113] In a tenth aspect, this application provides a computer program product containing computer instructions that, when run on a computer, causes the communication method described in any one of the first to fourth aspects to be executed.

[0114] In one aspect, this application provides a computer program that, when run on a computer, causes the communication method described in any one of the first to fourth aspects to be executed.

[0115] In a twelfth aspect, this application provides a chip comprising: a processor coupled to a memory for storing programs or instructions, wherein when the programs or instructions are executed by the processor, a communication method as described in any one of the first to fourth aspects is executed.

[0116] The technical effects of any of the design methods in aspects seven through twelfth are similar to those in aspects one through four above, and will not be elaborated upon further.

[0117] In a thirteenth aspect, this application provides a communication system that may include communication means for performing the communication described in the first aspect or any possible design of the first aspect, and communication means for performing the communication described in the second aspect or any possible design of the second aspect; or, it may include communication means for performing the communication described in the third aspect or any possible design of the third aspect, and communication means for performing the communication described in the fourth aspect or any possible design of the fourth aspect. Attached Figure Description

[0118] Figure 1 A schematic diagram of a BG provided for an embodiment of this application;

[0119] Figure 2 A schematic diagram of a probability shaping process provided in an embodiment of this application;

[0120] Figure 3 This is a schematic diagram of constellation distribution provided in an embodiment of this application;

[0121] Figure 4 A schematic diagram of a communication system provided in an embodiment of this application;

[0122] Figure 5 A flowchart of encoding and decoding is provided for embodiments of this application;

[0123] Figure 6 This is a schematic diagram of the composition of a communication device provided in an embodiment of this application;

[0124] Figure 7 A flowchart illustrating a communication method provided in an embodiment of this application;

[0125] Figure 8 A schematic diagram of an encoding process provided in an embodiment of this application;

[0126] Figure 9 This is a schematic diagram of constellation distribution provided in an embodiment of this application;

[0127] Figure 10 A schematic diagram of a fourth sequence provided in an embodiment of this application;

[0128] Figure 11 A flowchart illustrating a communication method provided in an embodiment of this application;

[0129] Figure 12 A schematic diagram of an encoding process provided in an embodiment of this application;

[0130] Figure 13 A schematic diagram of a fifth sequence provided in an embodiment of this application;

[0131] Figure 14 A schematic diagram of a transmitting device provided in an embodiment of this application;

[0132] Figure 15 A schematic diagram of a receiving device provided in an embodiment of this application;

[0133] Figure 16 A schematic diagram of a communication device provided in an embodiment of this application;

[0134] Figure 17 This is a schematic diagram of a communication device provided in an embodiment of this application. Detailed Implementation

[0135] Before describing the embodiments of this application, the technical terms involved in the embodiments of this application will be described.

[0136] Low-density parity check (LDPC) codes were first proposed by Gallager in his doctoral dissertation in the 1960s. Around 1995, MacKay and Neal et al. re-examined LDPC codes and further discovered that LDPC codes have good performance, which quickly aroused strong reactions and great attention.

[0137] A key characteristic of LDPC codes is that their parity-check matrix is ​​typically sparse. In New Radio (NR) communication systems, the data channel can employ LDPC coding. Specifically, the transmitting device can encode the information bit sequence using LDPC coding, modulate the encoded sequence, and then transmit the modulated sequence to the receiving device.

[0138] Commonly used LDPC codes typically have a quasi-cyclic (QC) structure, also known as QC-LDPC codes. The LDPC codes in NR communication systems (i.e., NR-LDPC codes) are also QC-LDPC codes.

[0139] In QC-LDPC codes, a base graph (BG) is used. During use, QC expansion is performed based on the lifting size and its corresponding shifting value parameter to obtain the final parity-check matrix. Elements in the BG are either 0 or 1. QC expansion involves expanding the 1 elements in the BG to an identity matrix of the lifting size and then cyclically shifting them according to the shifting parameter; and expanding the 0 elements in the BG to a zero matrix of the corresponding size (i.e., a square matrix of all zeros multiplied by the lifting size). Compared to directly storing the parity-check matrix, this method reduces storage overhead and simplifies decoding.

[0140] It is understandable that BG describes the relationship between X, Y, and F: BG = (X, Y, F), where X corresponds to the variable, Y corresponds to the check equation, and F is the connection between the variables. The check matrix obtained after QC expansion describes the relationship between V, C, and E, where V is the variable node, C is the check node, and E is the connection between the variables. Based on the above QC expansion process, we know that N = |V| = Zc|X|, the number of rows in the check matrix M = |C| = Zc|Y|, and the number of edges in the check matrix is ​​|E| = Z|F|.

[0141] For example, the BG adopted in an NR communication system can be as follows: Figure 1As shown, part A corresponds to the high-bitrate information column region, part B corresponds to the high-bitrate core verification region, part C is a 0 matrix, region D is the incremental redundancy part of the matrix, corresponding to the low-bitrate matrix, and part E is the incremental redundancy region, which is an identity matrix structure.

[0142] When the transmitting device encodes based on the above BG, it can extend the above BG to obtain the parity check matrix H (it can be understood that the parity check matrix also satisfies...). Figure 1 The partitioning characteristics in the code are used for encoding based on the parity check matrix. Specifically, the transmitting device can place the information bit sequence in the information bits corresponding to part A, encode it to obtain the parity bit sequences corresponding to parts B and C, and then encode the information bit sequence (X) corresponding to part A. A The parity bit sequence [X] corresponding to parts B and C. B ,X C The output is used as the encoded codeword X = [X A ,X B ,X C ]. [X A ,X B ,X C [X] satisfies the constraints of the parity check matrix H, i.e., [X] A ,X B ,X C ]*H'=0.

[0143] Generally, the transmitting device can refer to steps 1 to 4 below (some steps are optional, such as the interleaving step not being required in some designs) to perform LDPC encoding, rate matching, interleaving, and modulation on the information bit sequence to obtain the modulation symbol sequence, and then send the modulation symbol sequence to the receiving device:

[0144] Step 1: The transmitting device performs LDPC encoding on the information bit sequence to obtain the encoded bit sequence.

[0145] The transmitting device can encode an information bit sequence c0, c1, c2, c3, ..., cK-1 of length K to obtain an encoded bit sequence d0, d1, d2, ..., dN-1 of length N, which satisfies the check relation.

[0146] For LDPC BG 1, N equals 66Zc. For LDPC BG 2, N equals 50Zc. Zc is the expansion factor of the LDPC encoding.

[0147] The above check relationship implicitly establishes a one-to-one correspondence between information bits and columns in the check matrix, i.e., c0 corresponds to the first column of H, c1 corresponds to the second column of H, and so on. Furthermore, the first 2Zc bits of c0, c1, c2, c3, ..., cK-1 are punctured, meaning that d0, d1, d2, ..., dN-1 do not include the first 2Zc bits of c0, c1, c2, c3, ..., cK-1.

[0148] For example, the transmitting device may perform LDPC encoding on the information bit sequence by referring to steps a to d below:

[0149] Step a: Find the set of elements in Table 1 below that contain Zc and whose index is iLS.

[0150] Table 1

[0151]

[0152]

[0153] Step b: Determine the value of dk-2Zc according to the following description.

[0154]

[0155] Step c: Generate N+2Zc-K check bits w = [w0, w1, w2, ..., wN+2Zc-K-1,]T, so that... Where c = c0, c1, c2, c3, ..., cK-1T, and 0 represents a column vector in which all elements are equal to 0.

[0156] For LDPC BG 1, H BG The matrix has 46 rows and 68 columns, with row indices i = 0, 1, 2, ..., 45 and column indices j = 0, 1, 2, ..., 67. For LDPC BG 2, H BG The matrix has 42 rows and 52 columns, with row indices i = 0, 1, 2, ..., 41 and column indices j = 0, 1, 2, ..., 41.

[0157] H can BG Each element is replaced with a Zc*Zc matrix to obtain matrix H, as follows: H BG Each element with a value of 0 is replaced with a matrix of all zeros of size Zc*Zc. BGEach element with a value of 1 is replaced with a cyclic permutation matrix I(Pi,j) of size Zc*Zc, where i and j are the row and column indices of the element, and I(Pi,j) is obtained by cyclically shifting the identity matrix I of size Zc*Zc to the right by Pi,j times. The value of Pi,j is given by Pi,j = mod(Vi,j,Zc). The value of Vi,j is given by the set index iLS and LDPC BG.

[0158] Step d: Determine the value of dk-2Zc according to the following description.

[0159]

[0160] Step 2: The transmitting device performs rate matching on the bit sequence after LDPC encoding to obtain a rate-matched bit sequence of length E.

[0161] The transmitting device can place the encoded bit sequence in a circular buffer and read out a bit sequence of the corresponding length from it according to the configured starting point, as the bit sequence after rate matching.

[0162] Specifically, the encoded bit sequence d is written into the r-th coded block of length N. cb In the circular buffer.

[0163] Here, rvid represents the redundancy version number of the current transmission (rvid = 0, 1, 2 or 3), and the rate-matched output bit sequence ek can be generated as shown below, where k is determined according to the rvid value and LDPC BG:

[0164]

[0165] Step 3: The transmitting device interleaves the rate-matched bit sequence to obtain the interleaved bit sequence.

[0166] As can be seen from step 2 above, the information bit sequence e0, e1, e2, ..., eE-1 after rate matching is arranged in the order of information bits first and parity bits last. The transmitting device can perform row and column interleaving on the bit sequence after rate matching so that the information bits are preferentially mapped to the symbol bits and the parity bits are preferentially mapped to the least reliable amplitude bits, thereby improving transmission performance.

[0167] Specifically, the transmitting device can interleave the rate-matched bit sequence e0, e1, e2, ..., eE-1 according to the following description to obtain the interleaved bit sequence f0, f1, f2, ..., fE-1, where Qm is the modulation order:

[0168]

[0169] Step 4: The transmitting device modulates the interleaved bit sequence to obtain a modulated symbol sequence.

[0170] The transmitting device can modulate the interleaved bit sequence f0, f1, f2, ..., fE-1 according to the following formula to obtain the corresponding modulation symbol sequence:

[0171] For 1024QAM:

[0172]

[0173] For 256QAM:

[0174]

[0175] For 64QAM:

[0176]

[0177] For 16QAM:

[0178]

[0179] Based on the above description, when the transmitting device encodes using the LDPC method, it can prioritize mapping information bits to symbol bits and map parity bits to the least reliable amplitude bits to improve transmission performance.

[0180] Furthermore, transmission performance can be further improved in communication systems through probabilistic shaping. Since different modulation symbols in higher-order modulation have different energies, transmitting more low-energy symbols and fewer high-energy symbols can save average energy and reduce the transmission power of the transmitting equipment.

[0181] Higher-order modulation refers to mapping multiple bits to the same channel symbol, thereby further improving spectral efficiency. Common higher-order modulation schemes include 16QAM, 64QAM, and 256AM. Table 2 shows a bit mapping relationship for a 16ASK signal. During modulation, the modulation symbol x can be determined based on bits b0, b1, b2, and b3, serving as the modulation symbol to be transmitted. Here, b0 is the symbol bit, and b1, b2, and b3 are amplitude bits. The amplitude bits are ordered from highest to lowest reliability as follows: b0, b1, b2, b3.

[0182] Table 2

[0183]

[0184] Theoretical analysis shows that for Gaussian white noise channels, the greatest energy saving occurs when the transmitted symbol distribution follows a Gaussian distribution. Compared to a uniform distribution, up to 1.53 dB of transmitted power can be saved. Probabilistic shaping is a common "shaping" technique, and its typical flowchart can be seen as follows: Figure 2 As shown, by cascading a precoder (also known as a distribution matcher or a transformation) before the encoder, the information bits are mapped ("shaped") to a sequence that follows a specific distribution. During the encoding process, systematic coding is used so that the bit sequence that meets the specific distribution appears directly in the encoded sequence. This achieves the shaping of the final modulation symbol, saves average energy, and reduces transmission power.

[0185] For example, the constellation distribution after "remodeling" can be as follows: Figure 3 As shown, the horizontal axis represents the sign, the vertical axis represents the probability, and the square of the sign represents the energy level. The smaller the square of the sign, the lower the energy; the larger the square of the sign, the higher the energy. Figure 3 It can be seen that the probability of low-energy symbols appearing is higher than that of high-energy symbols.

[0186] However, existing LDPC coding (such as NR-LDPC) does not support probabilistic shaping, meaning that the transmitting device cannot reduce transmission power through probabilistic shaping while using LDPC coding.

[0187] Specifically, there is a contradiction between the "shaping gain" obtained by the probabilistic shaping scheme and the "improved transmission performance" of NR LDPC codes: To obtain the "shaping gain," the probabilistic shaping scheme typically shapes all amplitude bits and uses the parity bit as the symbol bit of the modulation symbol quadrant (such as bit b0 in Table 2 above). However, to obtain the gain for "improved transmission performance," NR LDPC codes typically prioritize the system bits as symbol bits (because symbol bits have higher reliability), and prioritize mapping the parity bit to the least reliable amplitude bits. Based on this method, the system bits are prioritized in the high-reliability bits, achieving the purpose of performance improvement.

[0188] In summary, when the transmitting device encodes using the LDPC method, reducing the transmitting power of the transmitting device becomes an urgent technical problem to be solved.

[0189] To address this technical problem, embodiments of this application provide a communication method. In this method, a transmitting device can group an information bit sequence of length K to obtain a first sequence of length K1 and a second sequence of length K2; transform the first sequence to obtain a third sequence of length M; determine a fourth sequence of length K3 based on the third and second sequences; perform LDPC encoding on the fourth sequence to obtain a fifth sequence of length E; interleave the fifth sequence according to a first interleaving pattern to obtain a sixth sequence; modulate the sixth sequence to obtain a modulation symbol sequence, and output the modulation symbol sequence. Wherein, K1 is less than K, K2 equals K-K1; M is greater than or equal to K1; K3 equals M+K2; the first interleaving pattern is related to the modulation order, E, and M.

[0190] In this embodiment, the transmitting device can transform the first sequence after grouping to obtain "shaping gain," reducing transmission energy and power. Simultaneously, the transmitting device can also interleave the fifth sequence according to a first interleaving pattern. This first interleaving pattern is related to the modulation order, E, and M, which allows information bits to be preferentially mapped to symbol bits and parity bits to be preferentially mapped to the least reliable amplitude bits, improving the performance of the coding system and error correction performance. In other words, the communication method provided in this embodiment can combine the probabilistic shaping transformation process with LDPC coding, obtaining shaping gain while reducing transmission power, improving transmission performance, and simultaneously enhancing error correction performance.

[0191] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0192] The communication method provided in this application embodiment can be used in any communication system, such as a third-generation partnership project (3GPP) communication system, for example, a long-term evolution (LTE) system; or a fifth-generation (5G) mobile communication system, a hybrid LTE and 5G network system, an NR system, an NR vehicle-to-everything (V2X) system, a device-to-device (D2D) communication system, a machine-to-machine (M2M) communication system, an Internet of Things (IoT) system, a narrowband Internet of Things (NB-IoT) system, a global system for mobile communications (GSM), an enhanced data rate for GSM evolution (EDGE) system, a wideband code division multiple access (WCDMA) system, a code division multiple access (CDMA2000) system, or a time division synchronous code division multiple access (TDMA) system. Division-synchronization code division multiple access (TD-SCDMA), enhanced mobile broadband (eMBB), ultra-reliable and low-latency communication (URLLC), enhanced machine-type communication (eMTC), and various types of future communication systems are also included. Non-terrestrial network (NTN) systems (such as satellite communication systems) and non-3GPP communication systems are not restricted.

[0193] The communication method provided in this application can be applied to various communication scenarios. For example, it can be applied to one or more of the following communication scenarios: coding of control channels, coding of data channels, etc., without limitation.

[0194] The following is based on Figure 4 Taking an example, the communication system provided in the embodiments of this application will be described.

[0195] Figure 4 A schematic diagram of a communication system provided in an embodiment of this application is shown below. Figure 4 As shown, the communication system may include at least one terminal device and at least one network device.

[0196] in, Figure 4 The terminal device can be located within the beam / cell coverage area of ​​the network device, and the network device can provide communication services to the terminal device. For example, the network device can use channel coding to encode downlink data and then transmit it to the terminal device via air interface after constellation modulation (i.e., the network device is the transmitting device, and the terminal device is the receiving device); the terminal device can also use channel coding to encode uplink data and then transmit it to the network device via air interface after constellation modulation (i.e., the terminal device is the transmitting device, and the network device is the receiving device). It is understood that when network devices communicate with each other, or when terminal devices communicate with each other, communication can also be based on channel coding; that is, the transmitting and receiving devices can both be network devices or both be terminal devices, without restriction.

[0197] Figure 4 The terminal equipment in this context can be a device with wireless transceiver capabilities or a chip or chip system that can be configured on the device. It allows users to access the network and is used to provide voice and / or data connectivity to users. Terminal equipment can also be called user equipment (UE), subscriber unit, terminal, mobile station (MS), or mobile terminal (MT), etc.

[0198] For example, Figure 4The terminal device can be a mobile phone, tablet computer, or computer with wireless transceiver capabilities. Terminal devices can also be user stations, mobile stations, remote stations, remote terminal devices, mobile terminal devices, user terminal devices, wireless communication devices, user agents, user devices, cellular phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices, processing devices connected to wireless modems, in-vehicle devices, wearable devices, terminal devices in the Internet of Things (IoT), home appliances, virtual reality (VR) terminals, augmented reality (AR) terminals, wireless terminals in industrial control, wireless terminals in autonomous driving, wireless terminals in telemedicine, wireless terminals in smart grids, wireless terminals in smart cities, wireless terminals in smart homes, vehicles with vehicle-to-vehicle (V2V) communication capabilities, intelligent connected vehicles, and UAV-to-UAV communication. Unmanned aerial vehicles (UAVs) with U2U communication capabilities, terminal devices in future networks, or terminal devices in future evolved public land mobile networks (PLMNs) are not subject to restrictions.

[0199] in, Figure 4 The network equipment in this context can be any device deployed in the access network capable of wireless communication with terminal devices. It can also be a chip or chip system configurable within such devices, a logical node or module, or a function implemented in software. Its main responsibilities include air interface-side wireless physical control, resource scheduling, wireless resource management, quality of service management, data compression and encryption, wireless access control, and mobility management. Specifically, the network equipment can be either wired or wireless access-enabled.

[0200] For example, a network device can consist of one or more access network (AN) / radio access network (RAN) nodes. AN / RAN nodes can be various types of base stations, such as: satellite base stations, evolved Node Bs (gNBs), transmission reception points (TRPs), evolved Node Bs (eNBs), radio network controllers (RNCs), Node Bs (NBs), base station controllers (BSCs), base transceiver stations (BTSs), home base stations (e.g., home evolved Node Bs, or home Node Bs (HNBs), macro base stations, micro base stations, pico base stations, small cells, relay stations, balloon stations, drone stations, wireless backhaul nodes, baseband units (BBUs), or wireless fidelity (Wi-Fi) access points (APs), etc. It is understood that network devices can be terrestrial devices or non-terrestrial devices (such as satellites, drones, high-altitude communication equipment, etc.). Furthermore, in communication systems employing different wireless access technologies, the names of network devices with base station functions may differ, and this application does not impose any restrictions on this.

[0201] In another example, the network equipment may include a BBU and a remote radio unit (RRU). The BBU and RRU can be located in different places; for example, the RRU can be moved remotely to a high-traffic area, while the BBU is located in the central equipment room. The BBU and RRU can also be located in the same equipment room. The BBU and RRU can also be different components under the same rack.

[0202] In another example, the network device can be a device that includes centralized unit (CU) nodes, distributed unit (DU) nodes, or both CU and DU nodes. For instance, the network device can be logically divided into CUs and DUs, with some protocol layer functions centrally controlled by the CU, and the remaining partial or complete protocol layer functions distributed in the DU, which is centrally controlled by the CU. The CU and DU can be separate entities or included in the same network element, such as a BBU. Furthermore, the centralized unit (CU) can be further divided into a control plane (CU-CP) and a user plane (CU-UP).

[0203] In another example, the network device may also be a device that includes a radio unit (RU), or a device that includes a CU, a DU, and a RU. The RU may be included in a radio frequency device or radio frequency unit, such as an RRU, an active antenna unit (AAU), or a remote radio head (RRH).

[0204] It is understood that CU (or CU-CP and CU-UP), DU, or RU may have different names in different systems, but those skilled in the art will understand their meaning. For example, in an open radioaccess network (O-RAN) system, CU can also be called O-CU (open CU), DU can also be called O-DU, CU-CP can also be called O-CU-CP, CU-UP can also be called O-CU-UP, and RU can also be called O-RU. For ease of description, this application uses CU, CU-CP, CU-UP, DU, and RU as examples. Any of the units among CU (or CU-CP, CU-UP), DU, and RU in this application can be implemented through a software module, a hardware module, or a combination of software and hardware modules.

[0205] Based on the above description of the terminal device and network device, optionally, the communication method provided in the embodiments of this application can be implemented by the aforementioned terminal device or network device, or by components of the terminal device or network device, such as by application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or software (such as program code in memory) deployed in the terminal device or network device, without limitation.

[0206] Optionally, in the embodiments of this application, the transmitting device (or source) and the receiving device (or sink) can adopt the following... Figure 5 The process shown involves encoding and decoding. The transmitting device can be... Figure 4 Any terminal device or network device in the communication system shown, the receiving device can also be Figure 4 Any terminal device or network device in the communication system shown.

[0207] In this process, the transmitting device performs source coding on its generated bits to obtain a source bit stream. Then, it performs channel coding on the source bit stream, modulates it, and transmits the modulated symbols to the receiving device through a noisy channel. When the receiving device receives the modulated symbols through the noisy channel, it demodulates them, performs channel decoding to recover the source bit stream, and then performs source recovery to obtain the decoded result.

[0208] In practical implementation, Figure 4 As shown in the figure: various terminal devices and network devices can adopt Figure 6 The shown composition structure, or including Figure 6 The components shown. Figure 6 This is a schematic diagram illustrating the composition of a communication device 600 provided in an embodiment of this application. The communication device 600 can be a terminal device or a chip or system-on-a-chip within a terminal device; it can also be a network device or a chip or system-on-a-chip within a network device. For example... Figure 6 As shown, the communication device 600 includes a processor 601, a transceiver 602, and a communication line 603.

[0209] Furthermore, the communication device 600 may also include a memory 604. The processor 601, memory 604, and transceiver 602 can be connected via a communication line 603.

[0210] The processor 601 can be a central processing unit (CPU), a network processor (NP), a digital signal processor (DSP), a microprocessor, a microcontroller, a programmable logic device (PLD), or any combination thereof. The processor 601 can also be other devices with processing capabilities, such as circuits, devices, or software modules, without limitation.

[0211] Transceiver 602 is used to communicate with other devices or other communication networks. These other communication networks can be Ethernet, radio access network (RAN), wireless local area networks (WLAN), etc. Transceiver 602 can be a module, circuit, transceiver, or any device capable of enabling communication.

[0212] Communication line 603 is used to transmit information between the components included in communication device 600.

[0213] Memory 604 is used to store instructions. These instructions can be computer programs.

[0214] The memory 604 can be a read-only memory (ROM) or other type of static storage device that can store static information and / or instructions; it can also be a random access memory (RAM) or other type of dynamic storage device that can store information and / or instructions; it can also be an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, etc., without limitation.

[0215] It should be noted that the memory 604 can exist independently of the processor 601, or it can be integrated with the processor 601. The memory 604 can be used to store instructions, program code, or some data, etc. The memory 604 can be located inside or outside the communication device 600, without limitation. The processor 601 is used to execute the instructions stored in the memory 604 to implement the communication method provided in the following embodiments of this application.

[0216] In one example, processor 601 may include one or more CPUs, for example Figure 6 CPU0 and CPU1 in the CPU.

[0217] As an optional implementation, the communication device 600 includes multiple processors, for example, besides Figure 6 In addition to processor 601, it may also include processor 607.

[0218] As an optional implementation, the communication device 600 also includes an output device 605 and an input device 606. For example, the input device 606 is a device such as a keyboard, mouse, microphone, or joystick, and the output device 605 is a device such as a display screen or speaker.

[0219] It should be noted that the communication device 600 can be a desktop computer, laptop computer, network server, mobile phone, tablet computer, wireless terminal, embedded device, chip system, or other device. Figure 6 Equipment with a similar structure. Furthermore... Figure 6 The structural composition shown does not constitute a limitation on the communication device, except... Figure 6In addition to the components shown, the communication device may include more or fewer components than illustrated, or combine certain components, or have different component arrangements.

[0220] In this embodiment of the application, the chip system may be composed of chips or may include chips and other discrete devices.

[0221] Furthermore, the actions, terms, etc., involved in the various embodiments of this application can be referenced interchangeably without limitation. The message names or parameter names in the messages exchanged between the various devices in the embodiments of this application are merely examples, and other names may be used in specific implementations without limitation.

[0222] The following is combined Figure 4 The communication system shown refers to the following Figure 7 The communication method provided in the embodiments of this application is described below, wherein the sending device can be... Figure 4 Any terminal device or network device in the communication system shown, the receiving device can also be Figure 4 Any terminal device or network device in the communication system shown. The transmitting or receiving device described in the following embodiments may have... Figure 6 The component shown.

[0223] Figure 7 A flowchart of a communication method provided in an embodiment of this application is shown below. Figure 7 As shown, the method may include:

[0224] Step 701: The transmitting device groups the information bit sequence of length K into a first sequence of length K1 and a second sequence of length K2.

[0225] The information bit sequence can include the information bits themselves, and K can be the number of information bits included in the information bit sequence. Alternatively, the information bit sequence can include information bits and cyclic redundancy check (CRC) bits, that is, the information bit sequence can be a CRC-encoded information bit sequence, and K can be the sum of the number of information bits and the number of CRC bits included in the information bit sequence.

[0226] The sending device can refer to, for example, Figure 8 The encoding process shown divides the information bit sequence into groups, resulting in a first sequence and a second sequence. There is no overlap between the first and second sequences.

[0227] The first sequence includes information bits that have been transformed (or shaped) during the information bit sequence, used as amplitude bits during modulation, and processed during the encoding process as follows: Figure 8 The transformation module shown.

[0228] The second sequence represents the information bits in the information bit sequence other than the first sequence, which are not processed during the encoding process. Figure 8 Instead of the transformation module shown, it directly performs bit mapping. During modulation, some information bits in the second sequence are used to determine the quadrant of the modulation symbol (i.e., symbol bits); some information bits are used as information bits corresponding to the large column weight, which will be punctured during rate matching (this set may be empty); the remaining information bits are used as amplitude bits (this set may be empty).

[0229] The length K1 of the first sequence can be determined by Y, and the length K2 of the second sequence is equal to K-K1. K1 is less than K, and K, K1, and K2 are all positive integers.

[0230] Where Y represents the number of modulation symbols corresponding to the transmission resources. Optionally, if the transmitting device is a network device, the transmission resources of the transmitting device can be determined by the network device itself. If the transmitting device is a terminal device, the transmission resources of the transmitting device can be configured by the network device.

[0231] When dividing the information bit sequence into a first sequence and a second sequence, the grouping can be based on the following principle: For modulation order Q, the real part of each modulation symbol corresponds to Q / 2 bits, and the imaginary part also corresponds to Q / 2 bits. These Q / 2 bits include one symbol bit and Q / 2-1 modulation bits. For modulation schemes with a modulation order Q greater than or equal to 6 (such as 64QAM, 256QAM, and 1024QAM), not all amplitude bits in the Q / 2 bits corresponding to the real and imaginary parts of each modulation symbol should be transformed. If the last amplitude bit in the Q / 2 bits is transformed, a check bit must be carried in the symbol bit, affecting performance. Therefore, the last amplitude bit can be left untransformed, and the check bit can be mapped to this last amplitude bit subsequently, avoiding mapping the information bit to the least reliable sub-channel (i.e., this last amplitude bit) and improving transmission performance.

[0232] For example, when the modulation order Q equals 10, each modulation symbol has a real part of 5 bits and an imaginary part of 5 bits. These 5 bits include 1 symbol bit (b0) and 4 amplitude bits (b1, b2, b3, b4). In this case, a maximum of 3 amplitude bits can be transformed, meaning b4 is not transformed. Subsequently, the parity bit can be mapped to b4, avoiding mapping the information bit to b4 and improving transmission performance. Similarly, when the modulation order Q equals 8, each modulation symbol has a real part of 4 bits and an imaginary part of 4 bits. These 4 bits include 1 symbol bit (b0) and 3 amplitude bits (b1, b2, b3). In this case, a maximum of 2 amplitude bits can be transformed, meaning b3 is not transformed. When the modulation order Q is equal to 6, the real part of each modulation symbol corresponds to 3 bits, and the imaginary part also corresponds to 3 bits. These 3 bits include 1 symbol bit (b0) and 2 amplitude bits (b1, b2). In this case, at most 1 amplitude bit can be transformed, that is, b2 is not transformed.

[0233] Based on the above grouping principle, for example, K1 is equal to the product of r and Y, where r is a positive number. r represents Figure 8 The ratio of the input length of the transformation module to the number of modulation symbols corresponding to the transmission resources.

[0234] In the first possible design, r is related to the modulation order.

[0235] Where r is greater than 0 and less than or equal to the difference between the modulation order and 4; where the modulation order is greater than 4.

[0236] In the phrase “difference between modulation order and 4”, “4” represents one symbol bit corresponding to the real part of the modulation symbol, one last amplitude bit corresponding to the real part of the modulation symbol, one symbol bit corresponding to the imaginary part of the modulation symbol, and one last amplitude bit corresponding to the imaginary part of the modulation symbol.

[0237] For example, taking a modulation order of 10 as an example, based on the above grouping principle, the amplitude bits corresponding to the real and imaginary parts of the modulation symbol can be transformed separately, such as... Figure 9As shown, the modulation symbol has two probabilities. In this case, the value of r can be in the range of (0,2]. For example, the value of r can be 1.5 (equivalent to an integer cost of 0.25) or 1.4 (equivalent to an integer cost of 0.3), etc., without restriction. Alternatively, the two amplitude bits corresponding to the real and imaginary parts of the modulation symbol can be transformed separately, resulting in four probabilities for the modulation symbol. In this case, the value of r can be in the range of (0,2], or the value of r can be in the range of (0,4], or the value of r can also be in the range of [2,4]. For example, the value of r can be 1.5 or 1. 4. Values ​​such as 2.8 or 3.2 are not restricted. Alternatively, the three amplitude bits corresponding to the real and imaginary parts of the modulation symbol can be transformed separately. There are eight probabilities for the modulation symbol. In this case, the value of r can be in the range of (0,2]; or, the value of r can be in the range of (0,4]; or, the value of r can be in the range of (0,6]; or, the value of r can be in the range of [2,4]; or, the value of r can be in the range of [2,6]; or, the value of r can be in the range of [4,6]. For example, the value of r can be 1.5, 1.4, 2.8, or 3.2, etc., without restriction.

[0238] In another example, taking a modulation order of 8 as an example, based on the above grouping principle, the amplitude bits corresponding to the real and imaginary parts of the modulation symbol can be transformed separately. The modulation symbol has two probabilities. In this case, the value of r can be in the range of (0,2]. For example, the value of r can be 1.5 (equivalent to an integer cost of 0.25) or 1.4 (equivalent to an integer cost of 0.3), etc., without restriction. Alternatively, the two amplitude bits corresponding to the real and imaginary parts of the modulation symbol can be transformed separately. The modulation symbol has four probabilities. In this case, the value of r can be in the range of (0,2], or the value of r can be in the range of (0,4], or the value of r can also be in the range of [2,4]. For example, the value of r can be 1.5, 1.4, 2.8, or 3.2, etc., without restriction.

[0239] In another example, taking a modulation order of 6 as an example, based on the above grouping principle, the amplitude bits corresponding to the real and imaginary parts of the modulation symbol can be transformed separately. The modulation symbol has two probabilities. In this case, the value of r can be in the range of (0,2]. For example, the value of r can be 1.5 (equivalent to an integer cost of 0.25) or 1.4 (equivalent to an integer cost of 0.3), etc., without restriction.

[0240] In the second possible design, r is related to the modulation order and the modulation and coding scheme (MCS).

[0241] Where r is greater than 0 and less than or equal to the difference between the modulation order and 4; the modulation order is greater than 4. When the modulation orders are the same, r corresponding to the first MCS is less than or equal to r corresponding to the second MCS; the index of the first MCS is less than the index of the second MCS.

[0242] Optionally, a corresponding r can be configured for each MCS.

[0243] For example, taking a modulation order of 10 as an example, based on the above grouping principle, one amplitude bit corresponding to the real and imaginary parts of the modulation symbol can be transformed separately. The modulation symbol has two probabilities. In this case, the value range of r can be (0, 2]. Within this range, a corresponding r can be configured for each MCS. The r corresponding to the MCS with a smaller sequence number (such as the first MCS) is less than or equal to the r corresponding to the MCS with a larger sequence number (such as the second MCS). For example, the value of r configured for the MCS with sequence number 20 can be 1.1, and the value of r configured for the MCS with sequence number 23 can be 1.5. Alternatively, two amplitude bits corresponding to the real and imaginary parts of the modulation symbol can be transformed separately. The modulation symbol has four probabilities. In this case, the value range of r can be (0, 2], or the value range of r can be (0, 2]. The value of r can be [2,4], or the value range of r can also be [2,4]. Within this value range, a corresponding r can be configured for each MCS. The r corresponding to the MCS with a smaller sequence number is less than or equal to the r corresponding to the MCS with a larger sequence number. Alternatively, the three amplitude bits corresponding to the real and imaginary parts of the modulation symbol can be transformed separately. There are 8 probabilities for the modulation symbol. In this case, the value range of r can be (0,2]; or the value range of r can be (0,4]; or the value range of r can be (0,6]; or the value range of r can be [2,4]; or the value range of r can be [2,6]; or the value range of r can be [4,6]. Within this value range, a corresponding r can be configured for each MCS. The r corresponding to the MCS with a smaller sequence number is less than or equal to the r corresponding to the MCS with a larger sequence number.

[0244] In another example, taking a modulation order of 8 as an example, based on the above grouping principle, the amplitude bits corresponding to the real and imaginary parts of the modulation symbol can be transformed separately. The modulation symbol has two probabilities. In this case, the value of r can be in the range of (0,2]. Within this range, a corresponding r can be configured for each MCS, with the r corresponding to the MCS with the smaller index being less than or equal to the r corresponding to the MCS with the larger index. Alternatively, the two amplitude bits corresponding to the real and imaginary parts of the modulation symbol can be transformed separately, resulting in four probabilities for the modulation symbol. In this case, the value of r can be in the range of (0,2], (0,4], or [2,4]. Within this range, a corresponding r can be configured for each MCS, with the r corresponding to the MCS with the smaller index being less than or equal to the r corresponding to the MCS with the larger index.

[0245] In another example, taking a modulation order of 6 as an example, based on the above grouping principle, the amplitude bits corresponding to the real and imaginary parts of the modulation symbol can be transformed respectively. The modulation symbol has two probabilities. In this case, the value range of r can be (0,2]. Within this value range, a corresponding r can be configured for each MCS. The r corresponding to the MCS with the smaller sequence number is less than or equal to the r corresponding to the MCS with the larger sequence number.

[0246] In the third possible design, r is related to the transformation method used to transform the first sequence.

[0247] In the fourth possible design, r is predefined.

[0248] In this approach, after determining the specific value of r in advance based on the aforementioned grouping principle, the specific value of r can be predefined using a communication protocol pre-definition method, so that the sending device can determine the specific value of r according to the communication protocol. The description of determining the specific value of r based on the grouping principle can be found in the relevant descriptions of the first to third possible designs mentioned above, and will not be repeated here.

[0249] Step 702: The transmitting device transforms the first sequence to obtain a third sequence of length M.

[0250] Where M is greater than or equal to K1.

[0251] The sending device can refer to, for example, Figure 8 The encoding process shown transforms the first sequence to obtain the third sequence. The transformation of the first sequence by the transmitting device can also be described as the transmitting device performing a distribution matching transformation on the first sequence.

[0252] In the first possible design, the transmitting device can refer to the aforementioned... Figure 2The precoding process is described in detail, and the first sequence is transformed by distribution matching to obtain the third sequence.

[0253] Based on the above description, the third sequence obtained after transforming the first sequence is a sequence that follows a specific distribution. For example, the third sequence may be a sequence that follows a non-uniform distribution.

[0254] The length M of the third sequence can be determined based on Y.

[0255] For example, the value of M is equal to the product of P and Y, where P is an even number.

[0256] For example, the value of M can be 2Y; or, the value of M can be 4Y; or, the value of M can be 6Y.

[0257] Understandably, when M equals 2Y, the third sequence corresponds to one bit of fixed amplitude for both the real and imaginary parts of the Y modulation symbols. When M equals 4Y, the third sequence corresponds to two bits of fixed amplitude for both the real and imaginary parts of the Y modulation symbols. When M equals 6Y, the third sequence corresponds to three bits of fixed amplitude for both the real and imaginary parts of the Y modulation symbols.

[0258] Step 703: The transmitting device determines a fourth sequence of length K3 based on the third sequence and the second sequence, and performs LDPC encoding on the fourth sequence to obtain a fifth sequence of length E.

[0259] Where K3 equals M+K2.

[0260] The sending device can refer to, for example, Figure 8 The encoding process shown processes the third and second sequences to obtain the fourth sequence.

[0261] The transmitting device can determine the fourth sequence based on the first interleaved sequence, the third sequence, and the second sequence.

[0262] Optionally, the first interleaving sequence is related to one or more of the following parameters: modulation order, length K2, M of the second sequence, column weights and row weights of the LDPC base matrix, column weights and row weights of the LDPC parity check matrix, first interleaving pattern, or length E after rate matching.

[0263] For example, the first interleaving sequence may include M elements and K2 elements, with the M elements preceding some or all of the K2 elements. In the case where the M elements precede some of the K2 elements, the remaining elements of the K2 elements precede the M elements.

[0264] Optionally, the number of the remaining elements of the K2 elements can be X, where X is related to Zc, which is the extension factor of the LDPC encoding.

[0265] For example, X is a positive integer multiple of Zc.

[0266] In the first possible implementation, when the M elements are located before all the elements of the K2 elements, such as Figure 10 As shown in (a), the fourth sequence includes the third sequence and the second sequence in ascending order of their numbers.

[0267] In the second possible implementation, when the M elements are located before some of the K2 elements, such as Figure 10 As shown in (b), the fourth sequence includes, in ascending order of number, X bits of the second sequence, the third sequence, and K2-X bits of the second sequence.

[0268] Based on the above description of the fourth sequence, the transmitting device can refer to the aforementioned descriptions of steps 1 and 2, as follows: Figure 8 The encoding process shown involves performing LDPC encoding on the fourth sequence to obtain the encoded bit sequence, and then performing rate matching on the encoded bit sequence to remove punched bits or pre-frozen bits, resulting in a fifth sequence of length E.

[0269] Where E is equal to the product of the modulation order Q and the number of modulation symbols Y corresponding to the transmission resources.

[0270] Step 704: The transmitting device interleaves the fifth sequence according to the first interleaving pattern to obtain the sixth sequence.

[0271] The sending device can refer to, for example, Figure 8 The encoding process shown involves interleaving the fifth sequence according to the first interleaving pattern to obtain the sixth sequence.

[0272] The first interleaving pattern is related to the modulation order, E, and M.

[0273] The length of the first interleaving pattern can be equal to the modulation order Q. The values ​​of the second to the (P+1)th elements of the first interleaving pattern are 0 to P-1. P equals M / Y and P is an even number.

[0274] Optionally, the values ​​of the QP elements of the first interleaved pattern, excluding the second to the (P+1)th elements, are P, P+1, P+2 to Q-1. It is understood that the values ​​of the QP elements of the first interleaved pattern, excluding the second to the (P+1)th elements, can be interleaved without restriction, in order to simplify the decoding implementation.

[0275] For example, the values ​​of the 0th to the 1st elements of the first interlacing pattern are P to P+1; the values ​​of the P+2th to Q-1th elements of the first interlacing pattern are P+2 to Q-1.

[0276] In the first example, when the modulation order is 10 and P equals 8 (i.e., the four amplitude bits corresponding to the real and imaginary parts of the modulation symbol are transformed respectively), the first interleaving pattern is [8 9 0 1 2 3 4 5 6 7]; or, when the modulation order is 10 and P equals 6 (i.e., the three amplitude bits corresponding to the real and imaginary parts of the modulation symbol are transformed respectively), the first interleaving pattern is [6 7 0 12 3 4 5 8 9]; or, when the modulation order is 10 and P equals 4 (i.e., the two amplitude bits corresponding to the real and imaginary parts of the modulation symbol are transformed respectively), the first interleaving pattern is [4 5 0 1 2 3 6 7 8 9]; or, when the modulation order is 10 and P equals 2 (i.e., the one amplitude bit corresponding to the real and imaginary parts of the modulation symbol is transformed respectively), the first interleaving pattern is [2 3 0 14 5]. 6 7 8 9].

[0277] In the second example, when the modulation order is 8 and P equals 6 (i.e., when the three amplitude bits corresponding to the real and imaginary parts of the modulation symbol are transformed respectively), the first interleaving pattern is [6 7 0 1 2 3 4 5]; or, when the modulation order is 8 and P equals 4 (i.e., when the two amplitude bits corresponding to the real and imaginary parts of the modulation symbol are transformed respectively), the first interleaving pattern is [4 5 0 1 2 36 7]; or, when the modulation order is 8 and P equals 2 (i.e., when the one amplitude bit corresponding to the real and imaginary parts of the modulation symbol is transformed respectively), the first interleaving pattern is [2 3 0 1 4 5 6 7].

[0278] In the third example, when the modulation order is 6 and P equals 4 (i.e., when the two amplitude bits corresponding to the real and imaginary parts of the modulation symbol are transformed respectively), the first interleaving pattern is [4 5 0 1 2 3]; or, when the modulation order is 6 and P equals 2 (i.e., when the one amplitude bit corresponding to the real and imaginary parts of the modulation symbol is transformed respectively), the first interleaving pattern is [2 3 0 1 4 5].

[0279] In the fourth example, when the modulation order is 4 and P equals 2 (i.e., the amplitude bits corresponding to the real and imaginary parts of the modulation symbol are transformed respectively), the first interleaving pattern is [2 3 0 1].

[0280] Based on the above description of the first interleaving pattern, specifically, the transmitting device can map the U-th bit in the fifth sequence to the V-th position in the sixth sequence according to the first interleaving pattern. This interleaves the bits corresponding to the sign bits to the beginning and the amplitude bits to the end, thereby improving transmission performance.

[0281] Among them, U is related to the first interleaving pattern, E, and modulation order; V is related to the modulation order and E, U = 0, 1, 2, ..., E-1; e2 = 0, 1, 2, ..., E-1.

[0282] For example, U equals W(i)*E / Q+j; where W(i) represents the i-th element in the first interleaving pattern, i = 0, 1, 2, ..., Q-1; Q is the modulation order, j = 0, 1, 2, ..., E / Q-1.

[0283] For example, V equals i + j * Q; where i = 0, 1, 2, ..., Q-1; j = 0, 1, 2, ..., E / Q-1; and Q is the modulation order.

[0284] Specifically, the transmitting device can interleave the rate-matched fifth sequence e0, e1, e2, ..., eE-1 according to the following description to obtain the interleaved sixth sequence f0, f1, f2, ..., fE-1:

[0285]

[0286] Based on the above description, it can be understood that the second to the (P+1)th elements in the first interleaving pattern correspond to the positions of the transformed bits in the fifth sequence in the sixth sequence.

[0287] In the first interleaving pattern, the last A elements (excluding the 2nd to P+1th elements) correspond to the positions of the parity bits in the fifth sequence in the sixth sequence. These parity bits are determined during LDPC encoding.

[0288] In the first interleaved pattern, the first B elements (excluding the 2nd to P+1th elements) correspond to the positions of the untransformed bits in the fifth sequence in the sixth sequence; B equals E / YAP.

[0289] Furthermore, when the modulation order is the same, the P value corresponding to the first MCS is less than or equal to the P value corresponding to the second MCS; wherein, the index of the first MCS is less than the index of the second MCS. For lower-order MCSs, P is less than or equal to the difference between the modulation order and 4. This improves transmission performance.

[0290] For example, taking a modulation order of 10 as an example, the maximum value of P can be 8, and for the lower MCS, the maximum value of P is 6.

[0291] Step 705: The transmitting device modulates the sixth sequence to obtain a modulation symbol sequence.

[0292] The modulation symbol sequence may include Y modulation symbols, each of which corresponds to Q bits in the sixth sequence after interleaving based on the first interleaving pattern.

[0293] Step 706: The transmitting device outputs a modulation symbol sequence; correspondingly, the receiving device receives the decoding information from the transmitting device.

[0294] The information to be decoded corresponds to an information bit sequence of length K.

[0295] The modulation symbol sequence output by the transmitting device may be affected by noise and other interference when transmitted through the channel, and the information to be decoded received by the receiving device is the modulation symbol sequence affected by noise and other interference.

[0296] Step 707: The receiving device demodulates the information to be decoded to obtain a first symbol sequence of length E.

[0297] Step 708: The receiving device deinterleaves the first symbol sequence according to the first interleaving pattern to obtain the second symbol sequence.

[0298] The first interleaving pattern is related to the modulation order, E, and M; M is the inverse transform length of the sequence. A description of this first interleaving pattern can be found in the relevant description in step 704 above, and will not be repeated here.

[0299] The length of the second symbol sequence is E.

[0300] Step 709: The receiving device decodes the second symbol sequence to obtain a seventh sequence of length K3; based on the seventh sequence, it determines an eighth sequence of length M and a ninth sequence of length K2.

[0301] Where K3 equals M+K2.

[0302] The receiving device can determine the first M bits of the seventh sequence as the eighth sequence and the last K2 bits as the ninth sequence.

[0303] Step 710: The receiving device performs an inverse transformation on the eighth sequence to obtain the tenth sequence of length K1.

[0304] Where M is greater than or equal to K1; K1 is equal to K-K2.

[0305] The receiving device can perform an inverse transformation on the eighth sequence, or it can be described as the receiving device performing an inverse distribution matching transformation on the eighth sequence to obtain the tenth sequence.

[0306] Step 711: The receiving device determines the decoding result of the information bit sequence based on the tenth sequence and the ninth sequence.

[0307] The receiving device can use the tenth sequence of length K1 and the ninth sequence of length K2 as the decoding result of length K.

[0308] Optionally, the first K1 bits of the decoding result are the tenth sequence, and the last K2 bits are the ninth sequence.

[0309] Based on the above Figure 7 The method shown allows the transmitting device to transform the first sequence after grouping to obtain "shaping gain," reducing transmission energy and power. Simultaneously, the transmitting device can interleave the fifth sequence according to a first interleaving pattern. This first interleaving pattern is related to the modulation order, E, and M, which allows information bits to be preferentially mapped to symbol bits and parity bits to be preferentially mapped to the least reliable amplitude bits, improving the coding system performance and error correction performance.

[0310] The above Figure 7 The method shown controls the number of bits M to be transformed and the parameters (such as r) of the corresponding information bit groups. Before LDPC encoding, bit mapping is performed based on the first interleaving sequence, and after LDPC encoding, interleaving is performed based on the first interleaving pattern. This method can support the combination of probability shaping transformation and LDPC encoding while keeping the subsequent modulation process unchanged. This can achieve shaping gain while reducing transmission power, improving transmission performance, and improving error correction performance.

[0311] With the above Figure 7 The difference lies in dividing the information bit sequence into two groups, such as Figure 11 As shown, the information bit sequence can also be divided into three groups.

[0312] Figure 11 A communication method provided in the embodiments of this application, such as Figure 11 As shown, the method includes:

[0313] Step 1101: The transmitting device divides the information bit sequence of length K into a first sequence of length K1, a second sequence of length K2, and a third sequence of length K3.

[0314] The description of the information bit sequence can be found in the relevant description in step 701 above, and will not be repeated here.

[0315] The sending device can refer to, for example, Figure 12The encoding process shown divides the information bit sequence into groups, resulting in a first sequence, a second sequence, and a third sequence. There is no overlap between the first, second, and third sequences.

[0316] The first sequence includes information bits that have been transformed (or shaped) during the information bit sequence, used as amplitude bits during modulation, and processed during the encoding process as follows: Figure 12 The transformation module shown.

[0317] The second sequence is used as symbol bits during modulation (i.e., to determine the quadrant of the constellation points), and does not undergo the same process as in the encoding process. Figure 12 Instead of using the transformation module shown, it directly performs bit mapping.

[0318] The third sequence represents the information bits in the information bit sequence other than the first and second sequences, which are not processed during the encoding process. Figure 12 Instead of the transformation module shown, it directly performs bit mapping. During modulation, a portion of the information bits in the third sequence are used as amplitude bits (i.e., to determine the amplitude of the constellation points), and the remaining information bits are used as information bits corresponding to the large column weights, which are punctured during rate matching (this set may be an empty set).

[0319] The length K1 of the first sequence can be determined by Y, the length K2 of the second sequence is equal to 2Y, and the length K3 of the third sequence is equal to K-K1-K2. K1 is a positive integer less than K, and K, K1, K2, and K3 are all positive integers.

[0320] Where Y represents the number of modulation symbols corresponding to the transmission resources. A description of Y can be found in the relevant description in step 701, and will not be repeated here.

[0321] When dividing the information bit sequence into the first, second, and third sequences, the grouping can be based on the following principles: For the modulation order Q, the real part of each modulation symbol corresponds to Q / 2 bits, and the imaginary part also corresponds to Q / 2 bits. The Q / 2 bits include one symbol bit and Q / 2-1 modulation bits. For modulation schemes with a modulation order Q greater than or equal to 6 (such as 64QAM, 256QAM, and 1024QAM), 2Y information bits (i.e., the second sequence) are preferentially selected from the information bit sequence as symbol bits. Then, K1 information bits (i.e., the first sequence) are selected from the information bit sequence for transformation, and the remaining K3 information bits in the information bit sequence are used as the third sequence.

[0322] Based on the above grouping principle, for example, K1 is equal to the product of r and Y, where r is a positive number. r represents Figure 12The ratio of the input length of the transformation module to the number of modulation symbols corresponding to the transmission resources. The description of r can be found in the relevant description in step 701 above, and will not be repeated here.

[0323] Step 1102: The transmitting device transforms the first sequence to obtain a fourth sequence of length M.

[0324] Where M is greater than or equal to K1.

[0325] The sending device can refer to, for example, Figure 12 The encoding process shown transforms the first sequence to obtain the fourth sequence. The transformation of the first sequence by the transmitting device can also be described as the transmitting device performing a distribution matching transformation on the first sequence.

[0326] In the first possible design, the transmitting device can refer to the aforementioned... Figure 2 The precoding process is described in detail, and the first sequence is transformed by distribution matching to obtain the fourth sequence.

[0327] In a second possible design, the transmitting device can also perform polar code distribution matching transformation on the first sequence to obtain the fourth sequence.

[0328] Among them, polar codes can be used as distribution matchers to implement distribution matching transformations.

[0329] The descriptions of the two possible designs can refer to the description of the transformation of the first sequence to obtain the third sequence in step 701 above, which will not be repeated here.

[0330] Based on the above description, the fourth sequence obtained after transforming the first sequence is a sequence that follows a specific distribution. For example, the fourth sequence is a sequence that follows a non-uniform distribution.

[0331] The length M of the fourth sequence can be determined based on Y.

[0332] For example, the value of M is equal to the product of P and Y, where P is an even number.

[0333] For example, the value of M can be 2Y; or, the value of M can be 4Y; or, the value of M can be 6Y.

[0334] Understandably, when M equals 2Y, the fourth sequence corresponds to one bit of fixed amplitude for both the real and imaginary parts of the Y modulation symbols. When M equals 4Y, the fourth sequence corresponds to two bits of fixed amplitude for both the real and imaginary parts of the Y modulation symbols. When M equals 6Y, the fourth sequence corresponds to three bits of fixed amplitude for both the real and imaginary parts of the Y modulation symbols.

[0335] Step 1103: The transmitting device determines a fifth sequence of length K4 based on the fourth sequence, the second sequence, and the third sequence, and performs LDPC encoding on the fifth sequence to obtain a sixth sequence of length E.

[0336] Where K4 equals M+K2+K3.

[0337] The sending device can refer to, for example, Figure 12 The encoding process shown processes the fourth, second, and third sequences to obtain the fifth sequence.

[0338] The transmitting device can determine the fifth sequence based on the second interleaved sequence, according to the fourth sequence, the second sequence, and the third sequence.

[0339] Optionally, the second interleaving sequence is related to one or more of the following parameters: modulation order, length K3 of the third sequence, M, column weights and row weights of the LDPC base matrix, column weights and row weights of the LDPC parity check matrix, second interleaving pattern, or the length E after rate matching.

[0340] For example, the second interleaving sequence may include K2 elements, M elements, and K3 elements, with the K2 elements preceding the M elements, and the K2 and M elements preceding some or all of the K3 elements. In the case where the K2 and M elements precede some of the K3 elements, the remaining elements of the K3 elements precede the K2 and M elements.

[0341] Optionally, the number of the remaining elements of the K3 elements is X, where X is related to Zc, which is the extension factor of the LDPC encoding.

[0342] For example, X is a positive integer multiple of Zc.

[0343] In the first possible implementation, when K2 elements and M elements are located before all elements of K3 elements, such as Figure 13 As shown in (a), the fifth sequence includes the second sequence, the fourth sequence, and the third sequence in ascending order of their numbers.

[0344] In the second possible implementation, when K2 elements and M elements are located before some of the K3 elements, such as Figure 13 As shown in (b), the fifth sequence includes, in ascending order of numbering, X bits of the third sequence, the second sequence, the fourth sequence, and K3-X bits of the third sequence.

[0345] Based on the above description of the fifth sequence, the transmitting device can refer to the aforementioned descriptions of steps 1 and 2, as follows: Figure 12The encoding process shown involves performing LDPC encoding on the fifth sequence to obtain the encoded bit sequence, and then performing rate matching on the encoded bit sequence to remove punched bits or pre-frozen bits, resulting in a sixth sequence of length E.

[0346] Where E is equal to the product of the modulation order Q and the number of modulation symbols Y corresponding to the transmission resources.

[0347] Step 1104: The transmitting device performs row and column interleaving on the sixth sequence according to the second interleaving pattern to obtain the seventh sequence.

[0348] The sending device can refer to, for example, Figure 12 The encoding process shown involves interleaving the sixth sequence according to the second interleaving pattern to obtain the seventh sequence.

[0349] The second interlacing pattern is a row-column interlacing pattern.

[0350] Specifically, the transmitting device can map the U-th bit in the sixth sequence to the V-th position in the seventh sequence according to the second interleaving pattern. This interleaves the bits corresponding to the sign bits to the beginning and the amplitude bits to the end, thereby improving transmission performance.

[0351] Where U is related to E and modulation order; V is related to modulation order and E, U = 0, 1, 2, ..., E-1; e2 = 0, 1, 2, ..., E-1.

[0352] For example, U equals i*E / Q+j; where i = 0, 1, 2, ..., Q-1; Q is the modulation order, and j = 0, 1, 2, ..., E / Q-1.

[0353] For example, V equals i + j * Q; where i = 0, 1, 2, ..., Q-1; j = 0, 1, 2, ..., E / Q-1; and Q is the modulation order.

[0354] Specifically, the transmitting device can interleave the rate-matched sixth sequence e0, e1, e2, ..., eE-1 according to the following description to obtain the interleaved seventh sequence f0, f1, f2, ..., fE-1:

[0355]

[0356] Based on the above description, it can be understood that the second to the (P+1)th elements in the second interleaving pattern correspond to the positions of the transformed bits in the sixth sequence in the seventh sequence.

[0357] In the second interleaving pattern, the last A elements (excluding the 2nd to P+1th elements) correspond to the positions of the parity bits in the sixth sequence in the seventh sequence. The parity bits are the parity bits after LDPC encoding.

[0358] The first two elements in the second interleaving pattern correspond to the positions of the untransformed information bits (i.e., the second sequence) in the sixth sequence in the seventh sequence, and the information bits are the information bits in the second sequence.

[0359] In the second interleaving pattern, the first C elements (excluding the 0th to the P+1th elements) correspond to the positions of the untransformed bits in the sixth sequence in the seventh sequence, and C equals E / Y-2-PA.

[0360] Furthermore, when the modulation order is the same, the P value corresponding to the first MCS is less than or equal to the P value corresponding to the second MCS; wherein, the index of the first MCS is less than the index of the second MCS. For lower-order MCSs, P is less than or equal to the difference between the modulation order and 4. This improves transmission performance.

[0361] For example, taking a modulation order of 10 as an example, the maximum value of P can be 8, and for the lower MCS, the maximum value of P is 6.

[0362] Step 1105: The transmitting device modulates the seventh sequence to obtain a modulation symbol sequence.

[0363] The modulation symbol sequence may include Y modulation symbols, each of which corresponds to Q bits in the seventh sequence after interleaving based on the second interleaving pattern.

[0364] Step 1106: The transmitting device outputs a modulation symbol sequence; correspondingly, the receiving device receives the decoding information from the transmitting device.

[0365] The information to be decoded corresponds to an information bit sequence of length K.

[0366] The modulation symbol sequence output by the transmitting device may be affected by noise and other interference when transmitted through the channel, and the information to be decoded received by the receiving device is the modulation symbol sequence affected by noise and other interference.

[0367] Step 1107: The receiving device demodulates the information to be decoded to obtain a first symbol sequence of length E.

[0368] Step 1108: The receiving device deinterleaves the first symbol sequence according to the second interleaving pattern to obtain the second symbol sequence.

[0369] The second interleaving pattern is a row-column interleaving pattern; M is the sequence inverse transform length. The description of this second interleaving pattern can be found in the relevant description in step 1104 above, and will not be repeated here.

[0370] The length of the second symbol sequence is E.

[0371] Step 1109: The receiving device decodes the second symbol sequence to obtain the eighth sequence of length K4; based on the eighth sequence, the ninth sequence of length M, the tenth sequence of length K2, and the eleventh sequence of length K3 are determined.

[0372] Where K4 is the sum of M, K2 and K3; K2 equals 2Y.

[0373] The receiving device can determine the first 2Y bits of the eighth sequence as the tenth sequence, the middle M bits as the ninth sequence, and the last K3 bits as the eleventh sequence.

[0374] Step 1110: The receiving device performs an inverse transformation on the ninth sequence to obtain the twelfth sequence of length K1.

[0375] Where M is greater than or equal to K1; K1 is equal to K-K2-K3.

[0376] The receiving device can perform an inverse transformation on the ninth sequence, or it can be described as the receiving device performing an inverse distribution matching transformation on the ninth sequence to obtain the twelfth sequence.

[0377] Step 1111: The receiving device determines the decoding result of the information bit sequence based on the twelfth, tenth, and eleventh sequences.

[0378] The receiving device can use the twelfth sequence of length K1, the tenth sequence of length K2, and the eleventh sequence of length K3 as the decoding result of length K.

[0379] Based on the above Figure 11 The method shown allows the transmitting device to transform the first sequence after grouping to obtain "shaping gain," reducing transmission energy and power. Simultaneously, the transmitting device can perform row-column interleaving on the sixth sequence according to the second interleaving pattern, which prioritizes mapping information bits to symbol bits and parity bits to the least reliable amplitude bits, improving coding system performance and error correction performance.

[0380] The above Figure 11 The method shown extracts a separate set of information bit sequences (i.e., the second sequence) before LDPC encoding to determine the modulation constellation quadrant, and redesigns the bit mapping before LDPC encoding so that the subsequent interleaving and modulation processes remain unchanged. By combining the probability shaping transformation process with LDPC encoding, it can reduce transmission power and improve transmission performance while obtaining shaping gain, and at the same time improve error correction performance.

[0381] It should be noted that the various embodiments of this application can be implemented independently or in combination, without limitation. Unless otherwise specified or in conflict, the terminology and / or descriptions between the different embodiments provided in this application are consistent and can be referenced mutually. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0382] It is understood that in the embodiments of this application, the executing entity may perform some or all of the steps in the embodiments of this application. These steps or operations are merely examples, and the embodiments of this application may also perform other operations or variations thereof. Furthermore, the various steps may be executed in different orders as presented in the embodiments of this application, and it is not necessarily necessary to execute all the operations in the embodiments of this application.

[0383] The foregoing primarily describes the solutions provided in this application from the perspective of device-to-device interaction. It is understood that each device, in order to achieve the aforementioned functions, includes corresponding hardware structures and / or software modules for executing each function. Those skilled in the art should readily recognize that, based on the algorithm steps of the examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0384] This application embodiment can divide each device into functional modules according to the above method example. For example, each function can be divided into a separate functional module, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. It should be noted that the module division in this application embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods.

[0385] When dividing each function into modules according to its corresponding function. Figure 14 A transmitting device 140 is shown, which can perform the above-described... Figures 7 to 13 The actions performed by the sending device in the method shown, and all related content of each step involved in the above method embodiments, can be referenced from the functional description of the corresponding functional module. The technical effects that can be obtained can be referred to the above method embodiments, and will not be repeated here.

[0386] The transmitting device 140 may include a transceiver module 1401 and a processing module 1402. Exemplarily, the transmitting device 140 may be a communication device, or a chip or other combination device or component having the aforementioned transmitting device functions applied in a communication device. When the transmitting device 140 is a communication device, the transceiver module 1401 may be a transceiver, which may include an antenna and radio frequency circuits, etc.; the processing module 1402 may be a processor (or processing circuit), such as a baseband processor, which may include one or more CPUs. When the transmitting device 140 is a component having the aforementioned transmitting device functions, the transceiver module 1401 may be a radio frequency unit; the processing module 1402 may be a processor (or processing circuit), such as a baseband processor. When the transmitting device 140 is a chip system, the transceiver module 1401 may be an input / output interface of a chip (e.g., a baseband chip); the processing module 1402 may be a processor (or processing circuit) of the chip system, and may include one or more central processing units. It should be understood that the transceiver module 1401 in the embodiments of this application can be implemented by a transceiver or transceiver-related circuit components; the processing module 1402 can be implemented by a processor or processor-related circuit components (or, referred to as processing circuit).

[0387] For example, transceiver module 1401 can be used to perform... Figures 7 to 13 In the illustrated embodiment, all transmit and receive operations performed by the transmitting device, and / or other processes used to support the techniques described herein; the processing module 1402 can be used to perform Figures 7 to 13 The embodiments shown include all operations performed by the transmitting device other than the sending and receiving operations, and / or other processes used to support the techniques described herein.

[0388] Figure 15 A receiving device 150 is shown, which can perform the above-described actions. Figures 7 to 13 The actions performed by the receiving device in the method shown, and all related content of each step involved in the above method embodiments, can be referenced from the functional description of the corresponding functional module. The technical effects that can be obtained can be referred to the above method embodiments, and will not be repeated here.

[0389] The receiving device 150 may include a transceiver module 1501 and a processing module 1502. For example, the receiving device 150 may be a communication device, or a chip or other combination device or component having the aforementioned receiving device functions. When the receiving device 150 is a communication device, the transceiver module 1501 may be a transceiver, which may include an antenna and radio frequency circuitry; the processing module 1502 may be a processor (or processing circuitry), such as a baseband processor, which may include one or more CPUs. When the receiving device 150 is a component having the aforementioned receiving device functions, the transceiver module 1501 may be a radio frequency unit; the processing module 1502 may be a processor (or processing circuitry), such as a baseband processor. When the receiving device 150 is a chip system, the transceiver module 1501 may be an input / output interface of a chip (e.g., a baseband chip); the processing module 1502 may be a processor (or processing circuitry) of the chip system, and may include one or more central processing units. It should be understood that the transceiver module 1501 in the embodiments of this application can be implemented by a transceiver or transceiver-related circuit components; the processing module 1502 can be implemented by a processor or processor-related circuit components (or, referred to as processing circuit).

[0390] For example, transceiver module 1501 can be used to perform... Figures 7 to 13 In the illustrated embodiment, all transmit and receive operations performed by the receiving device, and / or other processes used to support the techniques described herein; the processing module 1502 can be used to perform Figures 7 to 13 The embodiments shown include all operations performed by the receiving device other than the transmit and receive operations, and / or other processes used to support the techniques described herein.

[0391] As another feasible approach Figure 14 The transceiver module 1401 can be replaced by a transceiver unit, which can integrate the functions of the transceiver module 1401; the processing module 1402 can be replaced by a processor, which can integrate the functions of the processing module 1402. Furthermore, Figure 14 The transmitting device 140 shown may also include a memory. Alternatively, Figure 15 The transceiver module 1501 can be replaced by a transceiver unit, which can integrate the functions of the transceiver module 1501; the processing module 1502 can be replaced by a processor, which can integrate the functions of the processing module 1502. Furthermore, Figure 15 The receiver device 150 shown may also include a memory.

[0392] Alternatively, when the processing module 1402 is replaced by a processor and the transceiver module 1401 is replaced by a transceiver, the transmitting end device 140 involved in the embodiments of this application can also be... Figure 16The communication device 160 shown. Alternatively, when the processing module 1502 is replaced by a processor and the transceiver module 1501 is replaced by a transceiver, the receiving end device 150 involved in the embodiments of this application can also be... Figure 16 The communication device 160 shown.

[0393] The processor can be logic circuit 1601, and the transceiver can be interface circuit 1602. Furthermore, Figure 16 The communication device 160 shown may also include a memory 1603.

[0394] This application also provides a communication device, such as... Figure 17 As shown, this communication device can be applied to the above-mentioned... Figures 7 to 13 In any of the embodiments shown in the method, such as Figure 17 As shown, the communication device includes a processing module and a transceiver module. The processing module may be one or more processors, and the transceiver module may be a transceiver or a communication interface. This communication device can be used to implement the sending or receiving device involved in any of the above method embodiments, or to implement the functions of the device involved in any of the above method embodiments. The device or device function may be a network component in a hardware device, a software function running on dedicated hardware, or a virtualization function instantiated on a platform (e.g., a cloud platform). Optionally, the communication device may further include a storage module for storing the program code and data of the communication device.

[0395] In one example, the communication device acts as a transmitting device or is a chip applied in a transmitting device, and performs the steps executed by the transmitting device in the above method embodiments. The transceiver module is used for specific execution. Figures 7 to 13 The sending and / or receiving actions performed by the sending device in any of the embodiments herein may include, for example, other processes that support the sending device in performing the techniques described herein. The processing module may be used to support the communication device in performing the processing actions in the above method embodiments, for example, supporting the sending device in performing other processes of the techniques described herein.

[0396] To achieve the above functions, the chip of this application may include hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art will readily recognize that, based on the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0397] In one possible implementation, when the transmitting or receiving device is a chip, the transceiver module can be a communication interface, pins, or circuits. The communication interface can be used to input data to be processed to the processor and can output the processor's processing results. Specifically, the communication interface can be a general purpose input / output (GPIO) interface, which can connect to multiple peripheral devices (such as LCD displays, cameras, radio frequency (RF) modules, antennas, etc.). The communication interface is connected to the processor via a bus.

[0398] The processing module can be a processor, which can execute computer execution instructions stored in the storage module to cause the chip to perform... Figures 7 to 13 The method involved in any of the embodiments shown is further described below. The processor may include a controller, an arithmetic logic unit (ALU), and registers. For example, the controller is primarily responsible for instruction decoding and issuing control signals for the operations corresponding to the instructions. The ALU is primarily responsible for performing fixed-point or floating-point arithmetic operations, shift operations, and logical operations, and can also perform address operations and translations. The registers are primarily responsible for storing register operands and intermediate operation results temporarily stored during instruction execution. In specific implementations, the processor's hardware architecture can be an ASIC architecture, a microprocessor without interlocked piped stages architecture (MIPS), an advanced reduced instruction set machine (RISC) machine (ARM) architecture, or a network processor (NP) architecture, etc. The processor can be single-core or multi-core. The storage module can be an in-chip storage module, such as a register or cache. The storage module can also be an external storage module, such as ROM or other types of static storage devices that can store static information and instructions, RAM, etc.

[0399] It should be noted that the functions of the processor and interface can be implemented through hardware design, software design, or a combination of both; no restrictions are imposed here.

[0400] This application also provides a computer program product that, when executed by a computer, can implement the functions of any of the above method embodiments.

[0401] This application also provides a computer program that, when executed by a computer, can implement the functions of any of the above method embodiments.

[0402] This application also provides a computer-readable storage medium. All or part of the processes in the above method embodiments can be implemented by a computer program instructing related hardware. This program can be stored in the computer-readable storage medium, and when executed, it can include the processes of the above method embodiments. The computer-readable storage medium can be an internal storage unit of the terminal (including a data sending end and / or a data receiving end) of any of the foregoing embodiments, such as the terminal's hard disk or memory. The computer-readable storage medium can also be an external storage device of the terminal, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc., equipped on the terminal. Further, the computer-readable storage medium can include both the terminal's internal storage unit and external storage devices. The computer-readable storage medium is used to store the computer program and other programs and data required by the terminal. The computer-readable storage medium can also be used to temporarily store data that has been output or will be output.

[0403] It should be noted that the terms "first" and "second," etc., in the specification, claims, and drawings of this application are used to distinguish different objects, not to describe a specific order. "First" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first" and "second" may explicitly or implicitly include one or more of that feature. In the description of this embodiment, unless otherwise stated, "a plurality of" means two or more.

[0404] Furthermore, the terms “comprising” and “having”, and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus.

[0405] It should be understood that in this application, "at least one (item)" means one or more. "More than one" means two or more. "At least two (items)" means two or three or more. "And / or" is used to describe the relationship between related objects, indicating that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the related objects before and after are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple. Both "...when" and "if" indicate that a corresponding action will be taken under certain objective circumstances. They are not time limits, nor do they require a judgment action to be taken when the action is taken, nor do they imply any other limitations.

[0406] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner to facilitate understanding.

[0407] In this application, "sending information to...(terminal device)" can be understood as the destination of the information being the terminal device. This can include sending information directly or indirectly to the terminal device. "Receiving information from...(terminal device)" can be understood as the source of the information being the terminal device, and can include receiving information directly or indirectly from the terminal device. Information may undergo necessary processing between the source and destination, such as format changes, but the destination can understand the valid information from the source.

[0408] Through the above description of the embodiments, those skilled in the art can clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0409] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0410] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0411] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0412] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of this application embodiment, or all or part of the technical solution, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

Claims

1. A communication method, characterized in that, include: The information bit sequence of length K is grouped to obtain a first sequence of length K1 and a second sequence of length K2; where K1 is less than K and K2 is equal to K-K1. The first sequence is transformed to obtain a third sequence of length M; where M is greater than or equal to K1. Based on the third sequence and the second sequence, a fourth sequence of length K3 is determined, and the fourth sequence is LDPC encoded to obtain a fifth sequence of length E; where K3 is equal to M+K2. The fifth sequence is interleaved according to the first interleaving pattern to obtain the sixth sequence; the first interleaving pattern is related to the modulation order, E, and M; The sixth sequence is modulated to obtain a modulation symbol sequence, and the modulation symbol sequence is output.

2. The method according to claim 1, characterized in that, The first sequence is transformed to obtain a third sequence of length M, including: The first sequence is subjected to a distribution matching transformation to obtain the third sequence.

3. The method according to claim 1 or 2, characterized in that, The value of M is determined based on Y, where Y is the number of modulation symbols corresponding to the transmission resources.

4. The method according to claim 3, characterized in that, M is equal to the product of P and Y; where P is an even number.

5. The method according to any one of claims 1-4, characterized in that, The value of M is 2Y; or, the value of M is 4Y; or, the value of M is 6Y. Wherein, Y is the number of modulation symbols corresponding to the transmission resource.

6. The method according to any one of claims 1-5, characterized in that, The step of determining a fourth sequence of length K3 based on the third sequence and the second sequence includes: Based on the first interleaving sequence, the fourth sequence is determined according to the third sequence and the second sequence.

7. The method according to claim 6, characterized in that, The first interleaving sequence includes M elements and K2 elements, wherein the M elements are located before some or all of the K2 elements.

8. The method according to claim 7, characterized in that, When the M elements are located before a portion of the K2 elements, the remaining portions of the K2 elements are located before the M elements.

9. The method according to claim 8, characterized in that, The number of the remaining elements of the K2 elements is X, where X is related to Zc, which is the extension factor of the low-density parity-check code (LDPC).

10. The method according to any one of claims 6-9, characterized in that, The first interleaving sequence is related to one or more of the following parameters: the modulation order, the length of the second sequence, the M, the column weight and row weight of the LDPC basis matrix, the column weight and row weight of the LDPC parity check matrix, the first interleaving pattern, or the E.

11. The method according to any one of claims 1-10, characterized in that, The fourth sequence includes, in ascending order of numbering, the third sequence and the second sequence; or The fourth sequence includes, in ascending order of number, X bits of the second sequence, the third sequence, and K2-X bits of the second sequence.

12. The method according to claim 11, characterized in that, X is related to Zc, where Zc is the extension factor of LDPC encoding.

13. The method according to any one of claims 1-12, characterized in that, The length of the first interleaving pattern is equal to the modulation order Q, and the values ​​of the second to the (P+1)th elements of the first interleaving pattern are 0 to P-1; P is equal to M / Y, where Y is the number of modulation symbols corresponding to the transmission resource, and P is an even number.

14. The method according to claim 13, characterized in that, The values ​​of the QP elements of the first interlacing pattern, excluding the second to the (P+1)th elements, are: P, P+1, P+2 to Q-1.

15. The method according to claim 14, characterized in that, The values ​​of the 0th to the 1st elements of the first interlacing pattern are P to P+1; The values ​​of the (P+2)th to (Q-1)th elements of the first interlacing pattern are from P+2 to Q-1.

16. The method according to any one of claims 1-15, characterized in that, The step of interweaving the fifth sequence according to the first interweaving pattern to obtain the sixth sequence includes: According to the first interleaving pattern, the U-th bit in the fifth sequence is mapped to the V-th position in the sixth sequence; Wherein, U is related to the first interlacing pattern, E, and the modulation order; V is related to the modulation order and E, U = 0, 1, 2, ..., E-1; e2 = 0, 1, 2, ..., E-1.

17. The method according to claim 16, characterized in that, The U is equal to W(i)*E / Q+j; where W(i) represents the i-th element in the first interleaving pattern, i = 0, 1, 2, ..., Q-1; and Q is the modulation order, j = 0, 1, 2, ..., E / Q-1.

18. The method according to claim 16 or 17, characterized in that, The V is equal to i + j * Q; where i = 0, 1, 2, ..., Q-1; j = 0, 1, 2, ..., E / Q-1; and Q is the modulation order.

19. The method according to any one of claims 1-18, characterized in that, The second to the (P+1)th elements in the first interleaving pattern correspond to the positions of the transformed bits in the fifth sequence in the sixth sequence, where P equals M / Y, Y is the number of modulation symbols corresponding to the transmission resource, and P is an even number.

20. The method according to any one of claims 1-19, characterized in that, The last A elements in the first interleaving pattern, excluding the second to the (P+1)th elements, correspond to the positions of the check bits in the fifth sequence in the sixth sequence.

21. The method according to any one of claims 1-20, characterized in that, The first B elements in the first interleaving pattern, excluding the 2nd to P+1th elements, correspond to the positions of the untransformed bits in the fifth sequence in the sixth sequence; B equals E / YAP.

22. The method according to any one of claims 1-21, characterized in that, When the modulation order is the same, P corresponding to the first modulation and coding strategy (MCS) is less than or equal to P corresponding to the second MCS; wherein, the sequence number of the first MCS is less than the sequence number of the second MCS, P is equal to M / Y, and Y is the number of modulation symbols corresponding to the transmission resource.

23. The method according to claim 22, characterized in that, The value of P is less than or equal to the difference between the modulation order and 4.

24. The method according to any one of claims 1-23, characterized in that, The step of performing LDPC encoding on the fourth sequence to obtain a fifth sequence of length E includes: The fourth sequence is then subjected to LDPC encoding and rate matching to obtain the fifth sequence.

25. The method according to any one of claims 1-24, characterized in that, The modulation symbol sequence includes Y modulation symbols, each modulation symbol corresponding to Q bits in the sixth sequence after interleaving based on the first interleaving pattern.

26. A communication method, characterized in that, include: Receive information to be decoded from the transmitting device; wherein the information to be decoded corresponds to an information bit sequence of length K; The information to be decoded is demodulated to obtain a first symbol sequence of length E; According to the first interleaving pattern, the first symbol sequence is deinterleaved to obtain the second symbol sequence; wherein, the first interleaving pattern is related to the modulation order, E, and M; and M is the inverse transform length of the sequence. The second symbol sequence is decoded to obtain a seventh sequence of length K3; based on the seventh sequence, an eighth sequence of length M and a ninth sequence of length K2 are determined; K3 is equal to M+K2; The eighth sequence is inversely transformed to obtain the tenth sequence of length K1; M is greater than or equal to K1; K1 is equal to K-K2; The decoding result of the information bit sequence is determined based on the tenth sequence and the ninth sequence.

27. A communication method, characterized in that, include: The information bit sequence of length K is grouped to obtain a first sequence of length K1, a second sequence of length K2, and a third sequence of length K3, where K1 is a positive integer less than K, K2 is equal to 2Y, Y is the number of modulation symbols corresponding to the transmission resources, and K3 is equal to K-K1-K2. The first sequence is transformed to obtain a fourth sequence of length M; where M is greater than or equal to K1. Based on the fourth sequence, the second sequence, and the third sequence, a fifth sequence of length K4 is determined, and the fifth sequence is LDPC encoded to obtain a sixth sequence of length E; where K4 is equal to M+K2+K3. Based on the second interlacing pattern, the sixth sequence is subjected to row and column interlacing to obtain the seventh sequence; The seventh sequence is modulated to obtain a modulation symbol sequence, and the modulation symbol sequence is output.

28. The method according to claim 27, characterized in that, The transformation of the first sequence to obtain a fourth sequence of length M includes: The first sequence is subjected to a distribution matching transformation to obtain the fourth sequence.

29. The method according to claim 27 or 28, characterized in that, The value of M is determined based on the value of Y.

30. The method according to claim 29, characterized in that, M is equal to the product of P and Y; where P is an even number.

31. The method according to any one of claims 27-30, characterized in that, The value of M is 2Y; or the value of M is 4Y; or the value of M is 6Y.

32. The method according to any one of claims 27-31, characterized in that, Determining a fifth sequence of length K4 based on the fourth sequence, the second sequence, and the third sequence includes: Based on the second interleaving sequence, the fifth sequence is determined according to the fourth sequence, the second sequence, and the third sequence.

33. The method according to claim 32, characterized in that, The second interleaving sequence includes K2 elements, M elements, and K3 elements, wherein the K2 elements precede the M elements, and the K2 elements and the M elements precede some or all of the K3 elements.

34. The method according to claim 33, characterized in that, When the K2 elements and the M elements are located before some elements of the K3 elements, the remaining elements of the K3 elements are located before the K2 elements and the M elements.

35. The method according to claim 34, characterized in that, The number of the remaining elements of the K3 elements is X, where X is related to Zc, which is the extension factor of the low-density parity-check code (LDPC).

36. The method according to any one of claims 32-35, characterized in that, The second interleaving sequence is related to one or more of the following parameters: modulation order, length of the third sequence, M, column weight and row weight of the LDPC base matrix, column weight and row weight of the LDPC parity check matrix, the second interleaving pattern, or E.

37. The method according to any one of claims 27-36, characterized in that, The fifth sequence includes, in ascending order of number, the second sequence, the fourth sequence, and the third sequence; or The fifth sequence includes, in ascending order of number, X bits of the third sequence, the second sequence, the fourth sequence, and K-K1-2Y-X bits of the third sequence.

38. The method according to claim 37, characterized in that, X is related to Zc, where Zc is the extension factor of LDPC encoding.

39. The method according to any one of claims 27-38, characterized in that, The second to the (P+1)th elements in the second interleaving pattern correspond to the positions of the transformed bits in the sixth sequence in the seventh sequence, where P equals M / Y and P is an even number.

40. The method according to any one of claims 27-39, characterized in that, In the second interleaving pattern, the last A elements (excluding the 2nd to P+1th elements) correspond to the positions of the check bits in the sixth sequence in the seventh sequence, where P equals M / Y and P is an even number.

41. The method according to any one of claims 27-40, characterized in that, The first two elements in the second interleaving pattern correspond to the positions of the untransformed information bits in the sixth sequence in the seventh sequence, where the information bits are the information bits in the second sequence.

42. The method according to any one of claims 27-41, characterized in that, The first C elements in the second interleaving pattern, excluding the 0th to the (P+1)th elements, correspond to the positions of the untransformed bits in the sixth sequence in the seventh sequence, where C equals E / Y-2-PA.

43. The method according to any one of claims 27-42, characterized in that, When the modulation order is the same, P corresponding to the first modulation and coding strategy (MCS) is less than or equal to P corresponding to the second MCS; wherein, the index of the first MCS is less than the index of the second MCS, and P is equal to M / Y.

44. The method according to claim 43, characterized in that, The value of P is less than or equal to the difference between the modulation order and 4.

45. The method according to any one of claims 27-44, characterized in that, The step of performing LDPC encoding on the fifth sequence to obtain a sixth sequence of length E includes: The fifth sequence is then subjected to LDPC encoding and rate matching to obtain the sixth sequence.

46. ​​The method according to any one of claims 27-45, characterized in that, The modulation symbol sequence includes Y modulation symbols, each modulation symbol corresponding to Q bits in the seventh sequence after interleaving based on the second interleaving pattern.

47. A communication method, characterized in that, include: Receive information to be decoded from the transmitting device; wherein the information to be decoded corresponds to an information bit sequence of length K; The information to be decoded is demodulated to obtain a first symbol sequence of length E; Based on the second interleaving pattern, the first symbol sequence is de-interleaved in rows and columns to obtain the second symbol sequence; The second symbol sequence is decoded to obtain an eighth sequence of length K4; based on the eighth sequence, a ninth sequence of length M, a tenth sequence of length K2, and an eleventh sequence of length K3 are determined; wherein, K4 is the sum of M, K2, and K3; M is the sequence inverse transform length; K2 is equal to 2Y, and Y is the number of modulation symbols corresponding to the transmission resources; The ninth sequence is inversely transformed to obtain the twelfth sequence of length K1; M is greater than or equal to K1; K1 is equal to K-K2-K3; The decoding result of the information bit sequence is determined based on the twelfth sequence, the tenth sequence, and the eleventh sequence.

48. A communication device, characterized in that, The communication device includes a processor; the processor is configured to run a computer program or instructions that cause the communication method as described in any one of claims 1-25 to be executed, or cause the communication method as described in claim 26 to be executed, or cause the communication method as described in any one of claims 27-46 to be executed, or cause the communication method as described in claim 47 to be executed.

49. A communication device, characterized in that, The communication device includes an interface circuit and a logic circuit; the interface circuit is used to input and / or output information; the logic circuit is used to execute the communication method as described in any one of claims 1-25, or the communication method as described in claim 26, or the communication method as described in any one of claims 27-46, or the communication method as described in claim 47, and to process and / or generate the information based on the information.

50. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions or programs that, when executed on a computer, cause the communication method as described in any one of claims 1-25 to be executed, or the communication method as described in claim 26 to be executed, or the communication method as described in any one of claims 27-46 to be executed, or the communication method as described in claim 47 to be executed.

51. A computer program product, characterized in that, The computer program product includes computer instructions; when some or all of the computer instructions are executed on a computer, they cause the communication method as described in any one of claims 1-25 to be executed, or the communication method as described in claim 26 to be executed, or the communication method as described in any one of claims 27-46 to be executed, or the communication method as described in claim 47 to be executed.

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