Message processing device, message processing method, network interface chip and computer system

Abstract

The invention relates to a message processing device, a message processing method, a network interface chip and a computer system. The message processing device comprises a slicing module used for reading slicing indication information from a target descriptor corresponding to a target message, and performing slicing processing on the target message to obtain a plurality of target slicing messages under the condition that the slicing indication information indicates to perform slicing processing; the information acquisition module is used for reading type indication information, message header position information and processing indication information from the target descriptor; the rule determination module is used for determining a refreshing rule according to the type indication information; and the refreshing module is used for refreshing the message header of each target slice message based on the message header position information and the processing indication information according to the refreshing rule. By using the message processing device, the flexibility of processing the message slices can be improved.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to a message processing device, a message processing method, a network interface chip, and a computer system. Background Technology

[0002] With the rapid development of cloud computing, big data, and high-speed network technologies, network interface bandwidth continues to climb to 400G, or even 800G. To avoid the CPU becoming a bottleneck in processing large-scale network data, hardware slice offloading technology (TSO) has become a standard solution. This technology allows hardware devices to automatically slice packets based on the maximum transmission unit of the network path.

[0003] However, current network interface cards and other devices that support TSO have a limited flexibility in processing packet slices. Summary of the Invention

[0004] Based on this, a message processing device, message processing method, network interface chip, and computer system that can improve the flexibility of message segment processing are provided.

[0005] Firstly, this application provides a message processing apparatus. The message processing apparatus includes:

[0006] The slicing module is used to read slicing indication information from the target descriptor corresponding to the target packet, and to slice the target packet to obtain multiple target slice packets when the slicing indication information indicates that slicing processing is to be performed.

[0007] The information acquisition module is used to read type indication information, packet header position information, and processing indication information from the target descriptor. The type indication information is used to indicate whether it is an IPSec packet type and the type of each layer of packet headers. The packet header position information is used to indicate the starting position of each layer of packet headers. The processing indication information is used to indicate the refresh strategy for the identifiers of each layer of packet headers.

[0008] The rule determination module is used to determine the refresh rules based on the type indication information;

[0009] The refresh module is used to refresh the header of each target slice message according to the refresh rules, based on the header position information and processing instruction information.

[0010] In one embodiment, the refresh module is specifically used for:

[0011] Based on the message header location information, determine the update location of the target message header information corresponding to each layer of message header;

[0012] Based on the processing instructions, determine the update strategy for updating the header identifier of the IP packet header;

[0013] According to the refresh rules, and with reference to the update locations and update strategies, the target header information and header identifiers of each layer of the message header are refreshed.

[0014] In one embodiment, processing the instruction information includes at least one of the following:

[0015] Increment indicator information; used to indicate whether to perform an increment operation on the header identifier of each layer of IP packet header during the refresh process;

[0016] Randomization indication information; used to indicate whether to perform randomization operation on the header identifiers of each layer of message headers during the refresh process.

[0017] In one embodiment, the refresh module is specifically used for:

[0018] For each layer of IP packet header, if the increment indication information indicates that the header identifier of the IP packet header is incremented during the refresh process, the update strategy is determined to be to update the header identifier value of the IP packet header corresponding to each target slice packet by incrementing it sequentially.

[0019] For each IP packet header, if the randomization indication information indicates that the header identifier of the IP packet header should be randomized, the update strategy is determined to update the header identifier of the IP packet header corresponding to each target slice packet to the randomized identifier value.

[0020] In one embodiment, the type indication information includes at least one of the following:

[0021] IP header indication information; used to indicate the type of IP header at each layer;

[0022] Tunnel header indication information; used to indicate the type of tunnel header;

[0023] Transmission header indication information; used to indicate the type of transport layer message header;

[0024] Message indication information; used to indicate whether the target message is an IPSec message or a non-IPSec message;

[0025] In addition, when the target packet type is an IPSec packet type, the type indication information also includes:

[0026] Security protocol header indication information; used to indicate the type of security protocol header.

[0027] In one embodiment, the message header location information includes at least one of the following:

[0028] First length indication information; used to indicate the length from the start of the destination MAC address to the start of the first-level IP header;

[0029] The second length indicator information; used to indicate the length of the innermost IP header;

[0030] Third length indication information; used to indicate the length of the outermost IP header;

[0031] The fourth length indication information; used to indicate the length of the header between the innermost IP header and the outermost IP header;

[0032] The fifth length indication information; used to indicate the length of the transport layer message header;

[0033] In addition, when the target packet type is an IPSec packet, the packet header location information also includes:

[0034] The sixth length indicator; used to indicate the start position of the security protocol message header;

[0035] The seventh length indication information; used to indicate the length of the security protocol message header.

[0036] In one embodiment, the target message header information includes at least one of the following:

[0037] Total length of the IP packet header;

[0038] Header identifiers in the IP packet header;

[0039] IP header checksum;

[0040] The sequence number in the transmission header.

[0041] Secondly, this application also provides a message processing method, including:

[0042] Read the slice indication information from the target descriptor corresponding to the target message, and perform slice processing on the target message to obtain multiple target slice messages when the slice indication information indicates that slice processing is to be performed;

[0043] Read type indication information, header position information, and processing indication information from the target descriptor; the type indication information is used to indicate whether it is an IPSec packet type and the type of each layer of headers; the header position information is used to indicate the starting position of each layer of headers; the processing indication information is used to indicate the refresh policy for the identifiers of each layer of headers.

[0044] Determine the refresh rules based on the type indication information;

[0045] According to the refresh rules, the headers of each target slice message are refreshed based on the message header location information and processing instruction information.

[0046] Thirdly, this application also provides a network interface chip, which includes the message processing apparatus as described in any of the first aspects.

[0047] Fourthly, this application also provides a computer system including a network interface chip as described in the second aspect.

[0048] The aforementioned message processing device, message processing method, network interface chip, and computer system, the message processing device, based on type indication information, message header location information, and processing indication information, performs precise refresh processing on different types of messages and different types of message headers, improving the flexibility of message slice processing. It can process both IPSec and non-IPSec messages, resolving the compatibility issue between hardware TSO and IPSec security protocols, and achieving a high-performance, highly reliable hardware offloading solution that is compatible with the existing security ecosystem.

[0049] Other beneficial effects of this application will be further explained and illustrated in detail when combined with the accompanying drawings and specific embodiments. Attached Figure Description

[0050] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0051] Figure 1 This is a structural block diagram of a message processing apparatus in one embodiment;

[0052] Figure 2 This is a schematic diagram of the structure of a data descriptor in one embodiment;

[0053] Figure 3 This is a schematic diagram of the structure of a control descriptor in one embodiment;

[0054] Figure 4 This is a flowchart illustrating the refresh process in one embodiment;

[0055] Figure 5 This is a schematic diagram of the process of refreshing the header of a target message in one embodiment;

[0056] Figure 6 This is a flowchart illustrating a message processing method in one embodiment. Detailed Implementation

[0057] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application will be described in detail below with reference to the accompanying drawings. It should be understood that many specific details are set forth in the following description in order to provide a full understanding of this application, but this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0058] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0059] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.

[0060] With the rapid development of cloud computing, big data, and high-speed network technologies, network interface bandwidth has continued to climb to 400G, and even 800G. To avoid the host becoming a bottleneck in processing large-scale network data, network hardware offloading technology has become a standard solution. Among them, TCP Segment Offload (TSO) technology allows the network protocol stack to submit very large data packets (such as 256KB) to the network card driver. The hardware automatically completes packet slicing based on the maximum transmission unit of the network path, which greatly improves network throughput and reduces CPU utilization.

[0061] Most network interface cards (NICs) currently supporting TSO can only handle Layer 2 IP tunnel packets. Furthermore, this processing method has the following shortcomings:

[0062] (1) Potential reassembly conflict risk: If each fragment ID is consistent, the packet may be re-fragmented by the router at the IP layer. The secondary fragmentation will copy the original fragment IP-ID. When the peer router performs IP layer reassembly, the reassembly may fail due to the same ID.

[0063] (2) Insufficient flexibility: It cannot support certain specific needs or the requirement of the protocol to keep the ID unchanged, and lacks programmability.

[0064] (3) Incompatible with IPSEC protocol. For data that needs to be transmitted in encrypted form, it is mostly achieved through driver slicing; even if the hardware supports the coexistence of IPSEC and TSO, it is generally limited to non-tunnel packets.

[0065] In view of this, embodiments of this application provide a packet processing apparatus that implements programmable control of IP fragmentation identifiers in a hardware TSO. This packet processing apparatus can resolve compatibility issues between the hardware TSO and security protocols (such as IPSec) without sacrificing performance, and eliminate potential reassembly errors caused by improper IP-ID processing, thereby improving the flexibility of packet processing. Ultimately, it achieves a high-performance, highly reliable hardware offloading solution that is compatible with the existing security ecosystem.

[0066] The message processing apparatus provided in this application embodiment can be applied to a network interface chip. A network interface chip refers to a communication device that incorporates the aforementioned message processing apparatus as a component and is dedicated to receiving, processing, and forwarding data packets in a network. Examples include, but are not limited to, Ethernet switches, routers, switching chips, smart NICs, and forwarding engines in data processor units (DPUs). In this application embodiment, the application of the message processing apparatus to the network interface chip as a network interface card device is used as an example for explanation.

[0067] In one embodiment, such as Figure 1 As shown, the message processing device includes a slicing module, an information acquisition module, a rule determination module, and a refresh module.

[0068] The slicing module is used to read slicing indication information from the target descriptor corresponding to the target message, and to slice the target message to obtain multiple target slice messages when the slicing indication information indicates that slicing processing should be performed.

[0069] For example, the target message can be a TCP message, or it can be another type of message. A complete example is not provided here.

[0070] Each message has a corresponding descriptor, which includes at least one of a data descriptor and a control descriptor. The descriptor records various processing information of the message. When the network interface chip processes a target message, it can first read the target descriptor corresponding to the target message.

[0071] In this embodiment, the target descriptor includes slice indication information, which indicates whether to slice the target packet. For example, when the slice indication information is a first value, it is determined that the target packet needs to be sliced; when the slice indication information is a second value, it is determined that the target packet does not need to be sliced. For instance, if the first value is 1 and the second value is a non-1 value, then when the slice indication information (TSO indication information) is 1, the slicing module determines that the target packet needs to be sliced.

[0072] The slicing module reads the target packet from the storage space according to the storage address of the target packet recorded in the target descriptor. Then, when it is determined that the target packet needs to be sliced, the TSO technology is used to slice the target packet to obtain multiple target slice packets.

[0073] The target message consists of a header and message data. In the slicing process, the message data is sliced ​​to obtain multiple slice message data, and the header is copied to each slice message data, thus obtaining multiple target slice messages.

[0074] The information acquisition module is used to read type indication information, message header location information, and processing indication information from the target descriptor.

[0075] Since the slice message data in the target slice message differs from the original message data in the target message, it is necessary to refresh the message header in the target slice message so that the refreshed message header can accurately describe the corresponding slice message data.

[0076] In this embodiment, type indication information, header location information, and processing indication information can be read from the target descriptor to update the header in each target slice message.

[0077] The type indication information is used to indicate whether the packet is an IPSec packet and the type of each header layer. The target packet can be an IPSec packet or a non-IPSec packet. The header can be multi-layered, including one or more IP headers, and may also include one or more of the following: tunnel header, TCP header, UDP header, AH header, ESP header, etc., depending on the specific packet type. In this embodiment, for non-IPSec packets, a maximum of two IP header layers are supported; for IPSec packets, a maximum of three IP header layers are supported; a tunnel header may exist between the outermost two IP header layers; and a TCP / UDP header (also known as an L4 header) follows the innermost IP header. Furthermore, if it is an IPSec packet, an AH / ESP header may be present, and for special encrypted packets requiring a three-layer IP header, a three-layer IP header is stored. Different types of packets correspond to different headers, and different headers require different information to be updated; therefore, it is necessary to obtain the type indication information.

[0078] The header position information is used to indicate the starting position of each layer of headers. Based on the starting position of each layer of headers, the target header information that needs to be refreshed in that layer of headers can be easily obtained, and thus each layer of headers can be refreshed accordingly.

[0079] The processing instruction information is used to indicate the refresh strategy for the identifiers of each layer of message headers. Different types of message headers may undergo different refresh operations. In this embodiment, the refresh strategy may be to increment the header identifier of the IP layer message header; or, to randomize the header identifier of the IP layer message header; or, to perform randomization followed by incrementing, etc., etc., without exhaustive examples.

[0080] The rule determination module is used to determine the refresh rules based on the type indication information.

[0081] Different types of messages correspond to different message headers, and the information that needs to be refreshed also differs depending on the type of message header. The specific refresh method and the information to be refreshed are defined by refresh rules. Network interface chips pre-deploy refresh rules for various message headers; therefore, refresh rules that can be used to refresh the message headers at each layer of the target message can be determined based on the type indication information.

[0082] The refresh module is used to refresh the header of each target slice message according to the refresh rules, based on the header position information and processing instruction information.

[0083] When refreshing based on refresh rules, the location of the information to be refreshed is determined according to the message header location information, and the message headers at each layer are refreshed according to the refresh strategy indicated by the processing instruction information.

[0084] In this embodiment, in addition to supporting the processing of non-IPSec packets and standard IPSEC packets, it also supports the processing of tunnel packets such as IPSEC tunnel traversal and IPSEC OVER GRE, reducing the limitations of driver-sent packets and allowing flexible control over the IPSEC packet header refresh processing method. Furthermore, it improves the compatibility of IPSEC with TSO features.

[0085] The aforementioned message processing device performs precise refresh processing on different types of messages and different types of message headers based on type indication information, message header location information, and processing indication information, thereby improving the flexibility of message slice processing. It can process both IPSec and non-IPSec messages, resolving the compatibility issues between hardware TSO and IPSec security protocols, and achieving a high-performance, highly reliable hardware offloading solution that is compatible with the existing security ecosystem.

[0086] The following provides illustrative examples of type indication information, message header location information, and processing indication information.

[0087] In one embodiment, the type indication information includes at least one of the following:

[0088] 1. IP Header Indication Information: Used to indicate the type of each layer of IP header. For example, IP header indication information includes EIPT, IIPT, and IPSEC_IIPT. When there are three layers of IP headers, EIPT, IIPT, and IPSEC_IIPT indicate the types of the outermost, middle, and innermost IP headers, respectively. Optionally, when there are two layers of IP headers, EIPT and IIPT indicate the types of the outermost and innermost IP headers, respectively. This is only an example and not a specific limitation. For example, different encoding values ​​of the IP header indication information correspond to different header types. For example, an encoding value of 0 indicates a non-IP header; an encoding value of 1 indicates an IPv6 header; and an encoding value of 2 indicates an IPv4 header. For example, if the EIPT encoding value is 2, the outer IP header indicated by EIPT is an IPv4 header.

[0089] 2. Tunnel Header Indication Information L4TUNT: This indicates the type of tunnel header. Different encoded values ​​of the tunnel header indication information correspond to different tunnel header types. For example, L4TUNT = 0 indicates no tunnel header; L4TUNT = 1 indicates a UDP tunnel header; and L4TUNT = 2 indicates a non-UDP tunnel header. A non-UDP tunnel header, for example, is a GRE tunnel header.

[0090] 3. Transport Header Indicator (L4T): This indicates the type of transport layer header. Different L4T values ​​indicate different transport header types. For example, L4T = 0 indicates no transport header; L4T = 1 indicates a TCP header; and L4T = 2 indicates a UDP header.

[0091] 4. Message indication information IPSec_EN; used to indicate whether the target message is an IPSec message or a non-IPSec message. Optionally, different encoding values ​​of the message indication information correspond to different message types.

[0092] In addition, when the target packet type is an IPSec packet type, the type indication information also includes:

[0093] 5. Security Protocol Header Indication Information: This indicates the type of the security protocol header. The security protocol header may be an AH header or an ESP header. The security protocol header precedes the innermost IP header; therefore, it can be understood that for encrypted packets requiring Layer 3 IP encryption, the aforementioned IPSEC_IIPT is added to indicate the type of the IP header following the AH / ESP header.

[0094] In one embodiment, the header location information includes at least one of the following:

[0095] 1. First Length Indicator (MAC LEN): This indicates the length from the start of the destination MAC address to the start of the first-layer IP header. The destination MAC address can be the MAC address of the receiving device. Optionally, the first length indicator is recorded in the data descriptor.

[0096] 2. Second Length Indicator (IPLEN): This indicates the length of the innermost IP header. Specifically, it can indicate the length of the inner IP header, including IPv4 optional headers or IPv6 extension headers. Optionally, the second length indicator is recorded in the data descriptor.

[0097] 3. Third Length Indicator (EIPLEN): This indicates the length of the outermost IP header. Specifically, it can indicate the length of the outer IP header, including IPv4 optional headers or IPv6 extension headers. Optionally, the third length indicator is recorded in the control descriptor.

[0098] 4. Fourth Length Indicator (L4LUNLEN): This indicates the length of the header between the innermost and outermost IP headers. It can also indicate the length of the tunnel header. Optionally, the fourth length indicator is recorded in the control descriptor.

[0099] 5. Fifth Length Indicator (L4LEN): Used to indicate the length of the transport layer header. Optionally, the fifth length indicator is recorded in the data descriptor.

[0100] In addition, when the target packet type is an IPSec packet, the packet header location information also includes:

[0101] 6. The sixth length indicator, IPSEC_OFFSET, indicates the start position of the security protocol header. Based on this, information such as the initial vector of the security protocol header can be obtained.

[0102] 7. Seventh Length Indication: Used to indicate the length of the security protocol packet header. This can be understood as follows: when the target packet is an IPSec packet and needs to be sliced ​​(i.e., a scenario where IPSec and TSO coexist), the starting position of the AH / ESP packet header is obtained based on IPSEC_OFFSET. The sum of IPSEC_OFFSET and the length of the AH / ESP packet header is then the starting position of the innermost IP packet header indicated by IPSEC_IIPT, facilitating information refresh of the innermost IP packet header indicated by IPSEC_IIPT.

[0103] For example, such as Figure 2 A schematic diagram of the data descriptor structure is shown, such as... Figure 3 A schematic diagram of the control descriptor structure is shown, which illustrates the domain segment where some of the instruction information is located.

[0104] In summary, by using this length information, the starting position of the corresponding message header at each layer can be found, thus facilitating the acquisition of key information corresponding to each message header for refresh processing.

[0105] In one embodiment, the processing instruction information includes at least one of the following:

[0106] 1. Increment Indication Information: Used to indicate whether to perform an increment operation on the header identifier of each layer of IP packet headers during the refresh process. Each layer of IP packet header corresponds to one increment indication information. Each increment indication information indicates whether the header identifier of the corresponding IP packet header should be incremented during the refresh process. In an optional embodiment of this application, the increment operation is selected for IPv4 packet headers. For example, taking a three-layer IP packet header as an example, it is determined whether the corresponding IP packet header is an IPv4 packet header based on EIPT, IIPT, and IPSEC_IIPT respectively. Furthermore, EIPV4_ID_INC_EN, IIPV4_ID_INC_EN, and IPSEC_IPV4_ID_INC_EN are the increment indication information corresponding to the outermost, middle, and innermost IP packet headers, respectively. Based on these increment indication information, for the IPv4 packet header, it is determined whether to increment its corresponding header identifier ID.

[0107] 2. Randomization Indication Information: This indicates whether to perform randomization on the header identifiers of each layer of packet headers during the refresh process. For example, taking a three-layer IP packet header, EIPV4_ID_RNAD_EN, IIPV4_ID_RAND_EN, and IPSEC_IPV4_ID_RAND_EN are the randomization indication information corresponding to the outermost, middle, and innermost IP packet headers, respectively. For IPv4 packet headers, these randomization indication information determine whether to randomize the corresponding header identifier ID.

[0108] In this way, by setting increment and randomization indication information, the IPv4 packet header ID can be flexibly incremented or randomized as needed. Furthermore, the network interface chip automatically extracts the IPv4 packet header ID, and the incrementing of each ID reduces the probability of router fragmentation causing reassembly failure at the receiving end, thus reducing the risk of conflicts during the reassembly of target slice packets.

[0109] In one embodiment, such as Figure 4 A flowchart illustrating the refresh process using a refresh module is shown. The refresh module performs the following steps:

[0110] Step 401: Determine the update position of the target header information corresponding to each layer of headers based on the header position information.

[0111] In optional embodiments of this application, the target message header information includes at least one of the following:

[0112] The total length of the IP packet header. For example, the total length of the IPv4 packet header.

[0113] The header identifier of an IP packet. For example, the IPv4 ID.

[0114] The checksum of the IP packet header. For example, the checksum of the IPv4 packet header.

[0115] The sequence number in the transmitted message header. For example, the sequence number in the TCP message header.

[0116] It is understandable that information that needs to be refreshed in other types of message headers can also be used as target message header information, although this is not fully exemplified here. For instance, both AH and ESP message headers have a Sequence Number (SN). The AH message header consists of a Security Parameter Index (SPI), a Sequence Number, and an Initialization Vector (IV); the ESP message header consists of a Security Parameter Index (SPI), a Sequence Number, authentication data, etc. The target message header information may also include the Sequence Number (SN) to refresh the sequence number.

[0117] Step 402: Determine the update strategy for performing the header identifier update operation on the IP packet header based on the processing instruction information.

[0118] As mentioned above, update strategies can be incremental operations or randomized operations, etc.

[0119] Step 403: According to the refresh rules, and with reference to each update location and update strategy, refresh the target header information and header identifier of each layer of the packet header.

[0120] In this embodiment of the application, the refresh module is specifically used to: for each layer of IP packet header, when the increment indication information indicates that the header identifier of the IP packet header is incremented during the refresh process, determine the update strategy as to update the identifier value of the header identifier of the IP packet header corresponding to each target slice packet by incrementing it sequentially.

[0121] In this embodiment of the application, the refresh module is specifically used to: for each IP packet header, when the randomization indication information indicates that the header identifier of the IP packet header is to be randomized, determine the update strategy as updating the header identifier of the IP packet header corresponding to each target slice packet to a randomized identifier value.

[0122] In this way, using this message processing device, based on type indication information, programmable control of the IPv4 header identifiers of up to two layers of IP headers can be achieved for non-IPSec messages and TSO coexisting scenarios. Furthermore, it supports programmable control of the IPv4 header identifiers of up to three layers of common IPSec messages and TSO coexisting, greatly improving the flexibility of IPSec, TSO, and IPv4 header identifier control.

[0123] Furthermore, the packet processing device can automatically extract the packet header, and the incremental processing of each header identifier reduces the probability of receiver reassembly failure due to router fragmentation. Alternatively, the IPv4 header identifier can remain unchanged. Overall, this improves the flexibility for adapting to specific protocols. Optionally, it can support the generation of custom IPv4 ID algorithms to meet differentiated needs. In addition, it is possible to choose not to restrict the IP packet header to a standard packet header, reducing the restrictions on the IP packet header following the AH / ESP packet header.

[0124] In an optional embodiment of this application, the message processing device reads and refreshes the message headers of each layer in an order from the outside in. This ensures the accuracy of the message header refresh.

[0125] For ease of understanding, please refer to Figure 5 This illustrates the process of refreshing the header of a target packet. It shows that for a target packet with a Layer 3 IP header, the headers of each layer are extracted sequentially, and after slicing, each layer's header is refreshed sequentially. This is understandable. Figure 5 It only indicates that the ID and SN are refreshed, but other information is refreshed as well, and no complete example is provided.

[0126] Based on the same inventive concept, this application also provides a message processing method for use in the aforementioned message processing apparatus. The solution provided by this method is similar to the solution described in the apparatus described above; therefore, specific limitations in one or more method embodiments provided below can be found in the limitations of the message processing apparatus described above, and will not be repeated here.

[0127] In one embodiment, such as Figure 6 As shown, a message processing method is provided, the method including:

[0128] Step 601: Read the slice indication information from the target descriptor corresponding to the target message, and perform slice processing on the target message to obtain multiple target slice messages when the slice indication information indicates that slice processing is to be performed.

[0129] Step 602: Read the type indication information, message header location information, and processing indication information from the target descriptor.

[0130] The type indication information is used to indicate whether it is an IPSec packet type and the type of each layer of packet headers; the packet header position information is used to indicate the starting position of each layer of packet headers; the processing indication information is used to indicate the refresh policy for the identifiers of each layer of packet headers.

[0131] Step 603: Determine the refresh rules based on the type indication information.

[0132] Step 604: According to the refresh rules, based on the message header location information and processing instruction information, refresh the message header of each target slice message.

[0133] In one embodiment, according to refresh rules, based on packet header location information and processing instruction information, the packet header of each target slice packet is refreshed, including: determining the update position of the target packet header information corresponding to each layer packet header according to the packet header location information; determining the update strategy for performing an identifier update operation on the header identifier of the IP packet header according to the processing instruction information; and refreshing the target packet header information and header identifier of each layer packet header according to refresh rules, referring to each update position and update strategy.

[0134] In one embodiment, the processing indication information includes at least one of the following: increment indication information; used to indicate whether to perform an increment operation on the header identifier of each layer of IP packet header during the refresh process; randomization indication information; used to indicate whether to perform a randomization operation on the header identifier of each layer of packet header during the refresh process.

[0135] In one embodiment, based on processing instruction information, determining an update strategy for updating the header identifier of each layer of packet headers includes: for each layer of IP packet headers, if increment instruction information indicates that an increment operation is performed on the header identifier of the IP packet header during the refresh process, determining the update strategy is to update the header identifier value of the IP packet header corresponding to each target slice packet by sequentially incrementing; for each IP packet header, if randomization instruction information indicates that a randomization operation is performed on the header identifier of the IP packet header, determining the update strategy is to update the header identifier of the IP packet header corresponding to each target slice packet to a randomized identifier value.

[0136] In one embodiment, a network interface chip is provided, which includes a message processing device as in any of the embodiments of the fir tree.

[0137] A network interface chip refers to a communication device that uses the aforementioned message processing device as a component and is dedicated to receiving, processing, and forwarding data packets in a network. Examples include, but are not limited to, Ethernet switches, routers, smart NICs, and forwarding engines in data processor units (DPUs).

[0138] In one embodiment, a computer system is provided that includes a network interface chip as described in any of the above embodiments.

[0139] Optionally, the computer system refers to a system that includes at least one processor, memory, and the aforementioned message processing device, capable of performing computing and data processing tasks. This system can be a standalone device, such as a server integrated with a smart network interface card (NIC), or it can be a system composed of multiple devices interconnected via a network, such as a data center containing switches, servers, and storage devices. The message processing device of this application, as a message header processing component in this system, provides the ability to process message headers.

[0140] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0141] Each module in the aforementioned message processing device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in the network interface device in hardware form or independent of it, or they can be integrated into the network interface device in a combination of software and hardware.

[0142] In one embodiment, a computer device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above method embodiments.

[0143] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon that, when executed by a processor, implements the steps in the above method embodiments.

[0144] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above method embodiments.

[0145] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments described above. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0146] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0147] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A message processing apparatus, characterized in that, The message processing device includes: The slicing module is used to read slicing indication information from the target descriptor corresponding to the target packet, and to slice the target packet to obtain multiple target slice packets when the slicing indication information indicates that slicing processing is to be performed. The information acquisition module is used to read type indication information, packet header position information, and processing indication information from the target descriptor; the type indication information is used to indicate whether it is an IPSec packet type and the type of each layer of packet header; the packet header position information is used to indicate the starting position of each layer of packet header; the processing indication information is used to indicate the refresh strategy for the identifiers of each layer of packet header. The rule determination module is used to determine the refresh rule based on the type indication information; The refresh module is used to refresh the header of each target slice packet according to the refresh rules, based on the header position information and the processing instruction information.

2. The message processing apparatus according to claim 1, characterized in that, The refresh module is specifically used for: Based on the message header position information, determine the update position of the target message header information corresponding to each layer of message header; Based on the processing instruction information, determine the update strategy for performing the header identifier update operation on the IP packet header; According to the refresh rules, and with reference to the update positions and update strategies, the target header information and header identifier of each layer of the packet header are refreshed.

3. The message processing apparatus according to claim 2, characterized in that, The processing instruction information includes at least one of the following: Increment indicator information; used to indicate whether to perform an increment operation on the header identifier of each layer of IP packet header during the refresh process; Randomization indication information; used to indicate whether to perform randomization operation on the header identifiers of each layer of message headers during the refresh process.

4. The message processing apparatus according to claim 3, characterized in that, The refresh module is specifically used for: For each layer of IP packet header, when the increment indication information indicates that the header identifier of the IP packet header is incremented during the refresh process, the update strategy is determined to be to update the header identifier value of the IP packet header corresponding to each target slice packet by incrementing it sequentially. For each IP packet header, if the randomization indication information indicates that the header identifier of the IP packet header is to be randomized, the update strategy is determined to be to update the header identifier of the IP packet header corresponding to each target slice packet to a randomized identifier value.

5. The message processing apparatus according to any one of claims 1 to 4, characterized in that, The type indication information includes at least one of the following: IP header indication information; used to indicate the type of IP header at each layer; Tunnel header indication information; used to indicate the type of tunnel header; Transmit message header indication information; Used to indicate the type of transport layer message header; Message instruction information; Used to indicate whether the target packet is an IPSec packet or a non-IPSec packet; Furthermore, when the type of the target packet is an IPSec packet, the type indication information further includes: Security protocol message header information; Used to indicate the type of security protocol message header.

6. The message processing apparatus according to any one of claims 1 to 4, characterized in that, The message header location information includes at least one of the following: First length indication information; used to indicate the length from the start of the destination MAC address to the start of the first-level IP header; The second length indicator information; used to indicate the length of the innermost IP header; Third length indication information; used to indicate the length of the outermost IP header; The fourth length indication information; used to indicate the length of the header between the innermost IP header and the outermost IP header; Fifth length indication information; Used to indicate the length of the transport layer message header; Furthermore, when the target packet is of type IPSec, the packet header location information further includes: The sixth length indicator; used to indicate the start position of the security protocol message header; The seventh length indication information; used to indicate the length of the security protocol message header.

7. The message processing apparatus according to any one of claims 2 to 4, characterized in that, The target message header information includes at least one of the following: Total length of the IP packet header; Header identifiers in the IP packet header; IP header checksum; The sequence number of the transmitted message header.

8. A message processing method, characterized in that, include: Read the slice indication information from the target descriptor corresponding to the target message, and perform slice processing on the target message to obtain multiple target slice messages when the slice indication information indicates that slice processing is to be performed; Read type indication information, message header location information, and processing indication information from the target descriptor; The type indication information is used to indicate whether it is an IPSec packet type and the type of each layer of packet header; the packet header position information is used to indicate the starting position of each layer of packet header; the processing indication information is used to indicate the refresh strategy for the identifiers of each layer of packet header. Based on the type indication information, determine the refresh rules; According to the refresh rules, the headers of each target slice packet are refreshed based on the header position information and the processing instruction information.

9. A network interface chip, characterized in that, The network interface chip includes the message processing device as described in any one of claims 1 to 7.

10. A computer system, characterized in that, The computer system includes the network interface chip as described in claim 9.

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