Miniature LED display chip and coarsening method thereof

Abstract

The invention discloses a micro LED display chip and a coarsening method thereof, and the method comprises the steps: providing a micro LED structure which comprises a light-emitting table surface, and the surface of the light-emitting table surface is provided with a light-emitting surface; forming a sacrificial layer on the light emitting surface; performing first roughening treatment on the surface of the sacrificial layer to form a first roughened structure; and performing second roughening treatment on the surface of the sacrificial layer with the first roughening structure, removing the sacrificial layer and forming a second roughening structure on the light emitting surface. According to the invention, the probability of photon escape can be increased, and the luminous efficiency is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and more particularly to a micro LED display chip and its roughening method. Background Technology

[0002] With the gradual development of display technology, micro LED (Light Emitting Diode) display chips, as tiny (e.g., less than 50µm) light-emitting semiconductor devices, have advantages such as low power consumption, long lifespan, high brightness, and high contrast, and have gradually become a trend in new display technologies. The light-emitting mesa, as an important structure in micro LED display chips, receives particular attention for its luminous effect.

[0003] However, due to the physical phenomenon that visible light is prone to total internal reflection at the interface between an optically denser medium and an optically less dense medium, and the large difference in refractive index between the light-emitting surfaces of the emitting platform, light is difficult to escape directly from the surface after total internal reflection. Even if it escapes after multiple reflections, there is still a problem of excessive light loss, which seriously reduces the light extraction efficiency.

[0004] There is an urgent need for a method to roughen micro LED display chips, which can adjust the light path by roughening the light-emitting surface, and even change the propagation direction of the original total internal reflection light, thereby effectively increasing the probability of photon escape and improving the light emission efficiency. Summary of the Invention

[0005] The technical problem solved by this invention is to provide a micro LED display chip and a method for roughening it, which can increase the probability of photon emission and improve light extraction efficiency.

[0006] To address the aforementioned technical problems, embodiments of the present invention provide a roughening method for a micro LED display chip. The method includes: providing a micro LED structure, the micro LED structure including a light-emitting mesa, the surface of the light-emitting mesa having a light-emitting surface; forming a sacrificial layer on the light-emitting surface; performing a first roughening treatment on the surface of the sacrificial layer to form a first roughened structure; and performing a second roughening treatment on the surface of the sacrificial layer having the first roughened structure to remove the sacrificial layer and form a second roughened structure on the light-emitting surface.

[0007] Optionally, before performing a first roughening treatment on the surface of the sacrificial layer, the method further includes heating the sacrificial layer to cure it.

[0008] Optionally, the heating temperature is between 80°C and 200°C.

[0009] Optionally, the method for forming the light-emitting mesa includes: providing a substrate, forming a first confinement layer, a quantum well layer, and a second confinement layer on a first surface of the substrate; etching the second confinement layer and the quantum well layer, as well as a portion of the thickness of the first confinement layer, from the first surface of the substrate to obtain the light-emitting mesa; removing the substrate from a second surface of the substrate and exposing the second surface of the first confinement layer; wherein the second surface of the substrate is opposite to the first surface of the substrate; wherein the sacrificial layer is formed on the second surface of the first confinement layer.

[0010] Optionally, before removing the substrate from its second side, the method further includes: forming a first bonding layer that covers the substrate and the light-emitting mesa from its first side; providing a driver chip having a second bonding layer on its first side; and bonding the first bonding layer and the second bonding layer together.

[0011] Optionally, the method further includes forming a microlens on the second surface of the processed first confinement layer.

[0012] Optionally, the surface of the sacrificial layer is subjected to a first roughening treatment, including: roughening the surface of the sacrificial layer to form a rough surface; and performing a first etching on the sacrificial layer to form the first roughened structure.

[0013] Optionally, during the first etching of the sacrificial layer to form the first roughened structure, the etching is stopped when the bottom of the sacrificial layer exposes the light-emitting surface of a predetermined area.

[0014] Optionally, the sacrificial layer is etched in the first manner to form the first roughened structure. The first etching is performed on the sacrificial layer until a portion of the light-emitting surface is exposed and a portion of the sacrificial layer is retained. The surface roughness of the stacked structure of the remaining sacrificial layer and the remaining light-emitting surface is greater than or equal to a first preset roughness threshold.

[0015] Optionally, the sacrificial layer is a fluorine-containing photoresist layer; the first etching of the sacrificial layer includes: etching the photoresist layer with a reactive gas containing CxFy and oxygen to obtain a solid fluorine-based ionic compound, wherein the formed solid fluorine-based ionic compound is retained on the photoresist layer; etching the remaining photoresist layer with oxygen until a portion of the light-emitting surface is exposed and a portion of the sacrificial layer is retained.

[0016] Optionally, CxFy is CF4; the ratio between the flow rate of CF4 and the flow rate of oxygen is selected from [2, 6].

[0017] Optionally, the flow rate of the CF4 is selected from 60 sccm to 100 sccm; the flow rate of the oxygen is selected from 15 sccm to 25 sccm.

[0018] Optionally, before etching the photoresist layer using a reactive gas containing CxFy and oxygen, the method further includes: heating and baking the photoresist layer until the hardness of the photoresist layer is greater than or equal to a preset hardness.

[0019] Optionally, between etching the photoresist layer and etching the remaining photoresist layer with oxygen, the first etching of the photoresist layer further includes: monitoring the surface roughness of the photoresist layer having a solid fluorine-based ionic compound on its surface; and, in response to the rate of increase of the surface roughness of the photoresist layer changing from greater than a first preset rate threshold to less than or equal to the first preset rate threshold, performing a second etching of the remaining photoresist layer and the light-emitting surface.

[0020] Optionally, between etching the photoresist layer and etching the remaining photoresist layer with oxygen, the first etching of the photoresist layer further includes: in response to the etching time of the first etching of the photoresist layer being greater than or equal to a preset time, performing a second etching of the remaining photoresist layer and the light-emitting surface.

[0021] Optionally, oxygen is used to etch the remaining photoresist layer, including: adjusting the etching selectivity ratio of the photoresist layer and the first confinement layer so that the adjusted etching selectivity ratio conforms to a preset etching selectivity ratio range; and using the adjusted etching selectivity ratio to etch the remaining photoresist layer.

[0022] Optionally, the preset etching selectivity range is selected from 2:1 to 1:2.

[0023] Optionally, the adjusted etching selectivity ratio is greater than 1:1.

[0024] Optionally, the ratio of the area of ​​the retained portion of the photoresist layer to the area of ​​the photoresist layer before the first etching is selected from 30% to 70%.

[0025] Optionally, a second roughening process is performed on the surface of the sacrificial layer having the first roughening structure, including: using the remaining sacrificial layer as a mask, performing a second etching on the light-emitting surface, so that after removing the sacrificial layer, the surface roughness of the light-emitting surface is greater than or equal to a second preset roughness threshold.

[0026] To solve the above-mentioned technical problems, embodiments of the present invention provide a micro LED display chip, comprising: a light-emitting mesa, the light-emitting mesa including a light-emitting surface, the light-emitting surface having a roughened structure, the roughened structure being obtained by the roughening method of the light-emitting surface of the micro LED display chip according to any one of claims 1-16.

[0027] Optionally, the roughened structure is a nanoscale microstructure; wherein the width of the roughened structure is 20-1000 nm, and / or the height of the roughened structure is 20-1000 nm.

[0028] Optionally, the morphology of the coarsened structure is selected from one or more of the following: spherical, hemispherical, conical, pointed conical, cylindrical, and rectangular.

[0029] To address the aforementioned technical problems, embodiments of the present invention provide a micro LED structure, comprising: a light-emitting mesa having a light-emitting surface; and a sacrificial layer located on the light-emitting surface, the surface of which has a first roughened structure.

[0030] Optionally, the sacrificial layer exposes a portion of the light-emitting surface.

[0031] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0032] In this embodiment of the invention, by forming a sacrificial layer on the light-emitting surface, performing a first roughening treatment on the surface of the sacrificial layer, and performing a second roughening treatment on the surface of the sacrificial layer having the first roughening structure, a light-emitting surface with a large surface roughness can be obtained based on the sacrificial layer with a large surface roughness. This roughening treatment of the light-emitting surface helps to adjust the optical path and even change the propagation direction of the original total internal reflection light, effectively increasing the probability of photon escape and improving the light-emitting efficiency.

[0033] Furthermore, by forming a sacrificial layer on the light-emitting surface and then performing a first etching on the sacrificial layer until a portion of the light-emitting surface is exposed and a portion of the sacrificial layer is retained, the surface roughness of the remaining sacrificial layer and the stacked structure of the light-emitting surface is greater than or equal to a first preset roughness threshold. This results in a sacrificial layer with a relatively large surface roughness, which serves as the basis for subsequent etching processes. Then, a second etching is performed on the remaining sacrificial layer and the remaining light-emitting surface to remove the sacrificial layer, ensuring that the surface roughness of the light-emitting surface is greater than or equal to the second preset roughness threshold. This allows for the acquisition of a light-emitting surface with a relatively large surface roughness based on the sacrificial layer, achieving roughening of the light-emitting surface. This facilitates the adjustment of the optical path and can even change the propagation direction of the original total internal reflection light, effectively increasing the probability of photon escape and improving light extraction efficiency. Furthermore, since the etching of the sacrificial layer is a dry process, it offers better morphology control and process stability compared to wet roughening. Also, the process of etching the sacrificial layer is better in terms of cost control, and it has lower cost and lower process complexity compared to roughening using nanocrystals and nanoparticles as masks.

[0034] Furthermore, the sacrificial layer is a photoresist layer. A reactive gas containing CxFy and oxygen is used to etch the photoresist layer to obtain a solid fluorine-based ionic compound. This solid fluorine-based ionic compound remains on the photoresist layer, preventing further etching and effectively forming an uneven etched surface with a certain degree of roughness. Therefore, after etching the remaining photoresist layer with oxygen, a photoresist layer with a relatively large surface roughness can be obtained as the basis for subsequent etching processes.

[0035] Furthermore, before etching the photoresist layer using a reactive gas containing CxFy and oxygen, the method further includes: heating and baking the photoresist layer until the hardness of the photoresist layer is greater than or equal to a preset hardness. By adopting the above scheme, a hardening treatment can be performed on the photoresist layer before roughening treatment, which is beneficial to improving the controllability of the roughening morphology.

[0036] Furthermore, the surface roughness of the photoresist layer with a solid fluorine-based ionic compound on its surface is monitored. In response to the rate of increase in the surface roughness of the photoresist layer changing from greater than a first preset rate threshold to less than or equal to the first preset rate threshold, a second etching is performed on the remaining sacrificial layer and the light-emitting surface. Using this approach, based on the characteristic that the degree of roughening slows down after the surface roughness of the photoresist increases to a certain extent, the appropriate time to switch to the next stage can be determined, achieving a better balance between increasing the roughening particle size and improving production efficiency. In addition, by monitoring the surface roughness of the photoresist layer to determine the end time of the first etching, a more accurate judgment can be made based on specific circumstances, further improving the controllability of the roughening process.

[0037] Furthermore, in response to the etching time of the first etching of the sacrificial layer being greater than or equal to a preset time, a second etching is performed on the remaining sacrificial layer and the light-emitting surface. By adopting the above scheme, based on the characteristic that the roughening degree of the photoresist surface increases slowly after reaching a certain level, the appropriate time to switch to the next stage can be determined, achieving a better balance between increasing the roughening particle size and improving production efficiency. In addition, determining the end time of the first etching by ensuring that the etching time of the first etching is greater than or equal to the preset time allows for the establishment of a unified stopping standard, improving feasibility for large-scale mass production.

[0038] Furthermore, during the etching of the remaining photoresist layer using oxygen, the etching selectivity ratio between the photoresist layer and the light-emitting surface is adjusted to ensure that the adjusted etching selectivity ratio conforms to a preset etching selectivity ratio range; the remaining photoresist layer is then etched using the adjusted etching selectivity ratio. By employing the above method, the roughening degree after the first etching can be maintained while adjusting the etching selectivity ratio appropriately.

[0039] Furthermore, the ratio of the area of ​​the retained portion of the photoresist layer to the area of ​​the photoresist layer before the first etching is selected from 30% to 70%. By monitoring the area of ​​the photoresist, better control over the process conditions in the intermediate state can be achieved.

[0040] Furthermore, by forming microlenses, the roughened light-emitting surface can serve as a refractive layer at the interface of the light-emitting platform, thereby better changing the propagation direction of total internal reflection light, increasing the probability of photon escape, and improving light extraction efficiency. Attached Figure Description

[0041] Figure 1 This is a schematic diagram of a total internal reflection optical path at the interface between optical material layers in the prior art;

[0042] Figure 2 This is a flowchart of a method for roughening a micro LED display chip according to an embodiment of the present invention;

[0043] Figures 3 to 10 This is a schematic diagram of the device cross-sectional structure corresponding to each step in a roughening method for a micro LED display chip according to an embodiment of the present invention;

[0044] Explanation of reference numerals in the attached figures:

[0045] Substrate 100, buffer layer 101, epitaxial layer 102, light-emitting mesa 103, first confinement layer 1031, quantum well layer 1032, second confinement layer 1033, transparent conductive layer 104, passivation layer 105, first photoresist layer 161, first bonding layer 106, first conductive pillar 107, photoresist layer 108, driver chip 200, conductive connection structure 201, second bonding layer 206, second conductive pillar 207, N-type electrode 301, P-type electrode 302, microlens 303. Detailed Implementation

[0046] As mentioned earlier, in the prior art, due to the large difference in refractive index of the light-emitting surface of the light-emitting platform, it is difficult for light to escape directly from the surface after total internal reflection. Even if it escapes after multiple reflections, there is still a problem of excessive light loss, which seriously reduces the light extraction efficiency.

[0047] Research has revealed that in existing technologies, the light-emitting surface of the emitting platform is often a smooth interface, which makes it prone to total internal reflection.

[0048] Reference Figure 1 , Figure 1 This is a schematic diagram of a total internal reflection optical path between optical material layers in the prior art.

[0049] like Figure 1 As shown, taking gallium nitride (GaN) as the material of the light-emitting surface of the light-emitting platform, the refractive index of the material surface medium, also known as the material refractive index n0, can be 2.3, while the refractive index n1 of air is approximately 1.0.

[0050] Because visible light readily undergoes total internal reflection at the interface between an optically denser medium and an optically less dense medium, and because the emitting surface of a light-emitting platform is often a smooth interface, total internal reflection is even more likely to occur. Further research has revealed that roughening the emitting surface can facilitate adjustments to the optical path and even alter the propagation direction of the originally totally internalized light rays, effectively increasing the probability of photon escape and improving the light extraction efficiency.

[0051] In one research direction on roughening treatment, a wet roughening method can be adopted, such as using potassium hydroxide (KOH) or sulfuric acid (H2SO4) to clean the surface to be treated, so as to achieve the effect of roughening the surface to be treated.

[0052] Further research revealed that the roughened particles obtained by the above-mentioned wet roughening process are large in size, making it impossible to effectively control the morphological depth and particle width after roughening. Moreover, the roughening process is unstable, which can easily lead to deformation and distortion of the pattern after roughening, making it difficult to meet the micro-size requirements of advanced processes.

[0053] In another research direction of roughening, structures such as nanocrystals and nanoparticles can be used as masks to form patterns on the chip.

[0054] Further research revealed that the aforementioned roughening treatment method is very costly, has a complex process, and involves cumbersome post-processing, resulting in low convenience.

[0055] In this embodiment of the invention, by forming a sacrificial layer on the light-emitting surface, performing a first roughening treatment on the surface of the sacrificial layer, and performing a second roughening treatment on the surface of the sacrificial layer having the first roughening structure, a light-emitting surface with a large surface roughness can be obtained based on the sacrificial layer with a large surface roughness. This roughening treatment of the light-emitting surface helps to adjust the optical path and even change the propagation direction of the original total internal reflection light, effectively increasing the probability of photon escape and improving the light-emitting efficiency.

[0056] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0057] Reference Figure 2 , Figure 2 This is a flowchart of a method for roughening a micro LED display chip according to an embodiment of the present invention. The method for roughening the micro LED display chip may include:

[0058] Step S21: Provide a micro-LED structure, the micro-LED structure including a light-emitting mesa, the surface of the light-emitting mesa having a light-emitting surface;

[0059] Step S22: Form a sacrificial layer on the light-emitting surface;

[0060] Step S23: Perform a first roughening treatment on the surface of the sacrificial layer to form a first roughened structure;

[0061] Step S24: Perform a second roughening treatment on the surface of the sacrificial layer having the first roughening structure, remove the sacrificial layer, and form a second roughening structure on the light-emitting surface.

[0062] The steps described above are explained below with reference to the accompanying drawings.

[0063] Figures 3 to 10 This is a schematic diagram of the device cross-sectional structure corresponding to each step in a roughening method for a micro LED display chip according to an embodiment of the present invention. Figures 3 to 7In the specific embodiment shown, the method for forming the light-emitting mesa may include: providing a substrate, forming a first confinement layer, a quantum well layer, and a second confinement layer on a first surface of the substrate; etching the second confinement layer and the quantum well layer, as well as a portion of the thickness of the first confinement layer, from the first surface of the substrate to obtain the light-emitting mesa; removing the substrate from a second surface of the substrate and exposing the second surface of the first confinement layer, wherein the second surface of the substrate is opposite to the first surface of the substrate; wherein the sacrificial layer is formed on the second surface of the first confinement layer.

[0064] It should be noted that, in the embodiments of the present invention, other suitable methods can also be used to form the light-emitting mesa, such as forming a second confinement layer, a quantum well layer and a first confinement layer from bottom to top on the first surface of the substrate to obtain the light-emitting mesa, rather than the flip-chip etching method for obtaining the light-emitting mesa described above.

[0065] It should be noted that the light-emitting surface in the embodiments of the present invention is not limited to the first confining layer, but can also be the light-emitting surface of a light-emitting platform formed in other suitable ways. In the embodiments shown below and in the accompanying drawings, the second surface of the first confining layer is used as an example for light-emitting surface, but the present invention is not limited thereto.

[0066] Reference Figure 3 A substrate 100 is provided, and a first confinement layer 1031, a quantum well layer 1032, and a second confinement layer 1033 are formed on a first surface of the substrate 100. The second confinement layer 1033 and the quantum well layer 1032, as well as a portion of the thickness of the first confinement layer 1031, are etched from the first surface of the substrate 100 to obtain a light-emitting mesa 103.

[0067] Specifically, a substrate 100 may be provided, on which a buffer layer 101 is formed, and on which an epitaxial layer 102 is formed as a material layer.

[0068] In some embodiments, the substrate 100 may include, for example, a sapphire substrate, the composition of which may include aluminum oxide (Al2O3).

[0069] In other embodiments, substrate 100 may comprise a substrate of other suitable materials, such as a semiconductor substrate, for example a silicon substrate. The semiconductor substrate may also comprise germanium, silicon germanide, silicon carbide, gallium arsenide, or indium gallium. The semiconductor substrate may also be a silicon-on-insulator substrate or a germanium-on-insulator substrate, or a substrate with an epitaxy layer (Epi layer) grown on it.

[0070] In some embodiments, the epitaxial layer 102 may include one or more of the following: a first confinement layer 1031, a quantum well layer 1032, and a second confinement layer 1033.

[0071] The first confinement layer 1031 can be an N-type III-V compound layer, and correspondingly, the second confinement layer can be a P-type III-V compound layer.

[0072] The quantum well layer 1032 can be a material layer suitable for forming a quantum well structure, such as a III-V compound layer.

[0073] It should be noted that the III-V compound layer is used to represent a material layer formed by compounds of group III elements and group V elements, wherein group III elements may include, for example, B, Al, Ga and In, and group V elements may include, for example, N, P, As and Sb.

[0074] In this embodiment of the invention, a III-V compound layer can be selected according to specific needs. The specific III-V compounds used in the first confinement layer 1031, the quantum well layer 1032, and the second confinement layer 1033 may or may not be the same.

[0075] In one specific embodiment, the III-V compound layer may be selected from GaN, GaAs, or InP.

[0076] It should be noted that the epitaxial layer 102 may also include other suitable layers, such as sacrificial layers, etc. The specific structure of the epitaxial layer 102 is not limited in the embodiments of this application.

[0077] In some embodiments, a transparent conductive layer 104 (see reference) may also be formed on the material layer of the epitaxial layer 102. Figure 4 The material layer is etched, and then the transparent conductive layer 104 is etched together when the second confinement layer 1033 is etched.

[0078] The transparent conductive layer 104 may be made of indium tin oxide (In2O5Sn), which can improve conductivity and light emission, as well as reduce ohmic effects.

[0079] It should be noted that the material of the transparent conductive layer 104 may also include other suitable materials, such as fluorine-doped tin oxide (FTO) or zinc oxide (ZnO).

[0080] It should be particularly noted that, in some embodiments, after etching the first confinement layer 1031, the quantum well layer 1032, and the second confinement layer 1033 to obtain the light-emitting mesa 103, a transparent conductive layer 104 can be formed on the top surface of the light-emitting mesa 103. Therefore, to more clearly illustrate the process of forming the light-emitting mesa 103, in Figure 3 The transparent conductive layer 104 is not shown in the diagram; however, this does not constitute a limitation on the specific steps and processes for forming the transparent conductive layer 104.

[0081] exist Figure 3 In the illustrated embodiment, a patterned first photoresist layer 161 may also be formed, which covers each of the light-emitting mesa in the light-emitting mesa region and exposes the area between adjacent light-emitting mesa.

[0082] Then, by etching the second confinement layer 1033, the quantum well layer 1032, and the first confinement layer 1031 using the first photoresist layer 161, the second confinement layer 1033 and the quantum well layer 1032, excluding the light-emitting mesa, can be removed, and a portion of the thickness of the first confinement layer 1031 can be removed, so as to retain the second confinement layer 1033, the quantum well layer 1032, and the first confinement layer 1031 of the light-emitting mesa.

[0083] Reference Figure 4 The first photoresist layer 161 is removed to form a passivation layer 105. As mentioned above, a transparent conductive layer 104 may also be formed.

[0084] The passivation layer 105 may be located on the sidewall surface of each light-emitting mesa 103 and the surface of the substrate 100, and expose the top surface of the light-emitting mesa 103.

[0085] In some embodiments, a passivation layer 105 may also be formed covering the substrate 100 and exposing the top surface of the light-emitting mesa 103. In other words, the passivation layer 105 may cover the sidewall surface of the light-emitting mesa 103.

[0086] The material of the passivation layer 105 may include one or more of the following stacks: silicon oxide layer, aluminum oxide layer, silicon nitride layer, and polyimide layer.

[0087] Reference Figure 5 A first bonding layer 106 is formed, which covers the substrate 100 and the light-emitting mesa 103 from the first side of the substrate 100.

[0088] Specifically, a first bonding layer 106 can be formed on the substrate 100, a through hole can be formed in the first bonding layer 106, and a first conductive pillar 107 can be formed in the through hole.

[0089] Specifically, a material layer of the first bonding layer 106 can be formed first, and then the first bonding layer 106 can be etched to form a through hole. The through hole of the first bonding layer 106 exposes the light reflection layer 111 on the top surface of the light-emitting mesa 103 (in the case of forming a protective layer 105, the light reflection layer 111 can be exposed through the protective layer 105), as well as the P-type electrode region.

[0090] In some embodiments, the substrate 100 may have one or more of the following regions: an N-type electrode region for forming an N-type electrode, a P-type electrode region for forming a P-type electrode, and a display region for forming the light-emitting mesa 103. It is understood that the substrate 100 may also have other suitable regions.

[0091] The first conductive pillar 107 may be located on the light-reflecting layer 111 on the top surface of the light-emitting platform 103, and in the P-type electrode region of the substrate 100.

[0092] In one specific embodiment, the material of the first conductive post 107 may include one or more of the following: copper, tungsten, aluminum, silver, platinum, and gold.

[0093] It is understandable that the depth of the first conductive post 107 on the top surface of the light-emitting platform 103 and its depth in the P-type electrode region can be the same.

[0094] Reference Figure 6 A driver chip 200 is provided, wherein the first side of the driver chip 200 has a second bonding layer 206.

[0095] Specifically, a driver chip 200 can be formed, a second bonding layer 206 can be formed on the driver chip 200, and a second conductive pillar 207 can be formed in the second bonding layer 206.

[0096] The positions of the second conductive post 207 and the first conductive post 107 are in one-to-one correspondence.

[0097] The driving chip 200 can be, for example, a thin film transistor (TFT) board or an integrated circuit (IC) board.

[0098] The driver chip 200 may have a conductive connection structure 201, for example, it may include a conductive interconnect layer with wires and conductive plugs.

[0099] In one specific embodiment, the material of the second bonding layer 206 may include one or more of the following: silicon oxide, aluminum oxide, and silicon nitride.

[0100] The material of the second conductive post 207 may include one or more of the following: copper, tungsten, aluminum, silver, platinum, and gold.

[0101] Reference Figure 7 The first bonding layer 106 and the second bonding layer 206 are bonded together from the substrate 100 (reference). Figure 5 On the second side of the first confinement layer 1031, the substrate 100 and the buffer layer 101 are removed, exposing the second side of the first confinement layer 1031. Then, a sacrificial layer is formed on the second side of the first confinement layer 1031.

[0102] The second surface of the substrate 100 is opposite to the first surface of the substrate 100.

[0103] Specifically, the driver chip 200 and the substrate 100 can be flip-chip bonded together so that the first conductive post 107 and the second conductive post 207 are electrically connected in a one-to-one correspondence.

[0104] An appropriate bonding process can be used to bond the first bonding layer 106 and the second bonding layer 206 to achieve a flip-chip bonding connection between the driver chip 200 and the substrate 100.

[0105] In some embodiments, the sacrificial layer may be a fluorine-containing photoresist (PR) layer 108.

[0106] Fluorine-containing photoresists, also known as fluorine-ion-containing photoresists, refer to photoresists in which fluorine elements and their compounds are added. On one hand, fluorine-containing photoresists can increase the physical and chemical stability of the photoresist, thereby improving the process control capabilities of semiconductor chip manufacturing. On the other hand, fluorine-ion compounds, such as fluorinated alkyl sulfonamides, difluoromethylpyridine, and trifluoromethylpyridine derivatives, are solid and remain on the photoresist layer, thus preventing further etching of the photoresist.

[0107] It should be noted that, in some other embodiments, the sacrificial layer may also be other suitable material layers, such as suitable materials that can be used to form solid fluorine-based ionic compounds from reactive gases containing CxFy and oxygen.

[0108] It should be noted that, in the following description in conjunction with the accompanying drawings, the photoresist layer 108 is used for ease of description.

[0109] Furthermore, before performing the first roughening treatment on the surface of the sacrificial layer, the method may further include: heating the sacrificial layer to solidify it.

[0110] Furthermore, the heating temperature can be between 80°C and 200°C. For example, it can be selected from 120°C to 160°C, such as 140°C.

[0111] In this embodiment of the invention, by heating the sacrificial layer to solidify it, a hardening treatment can be performed on the sacrificial layer before roughening treatment, which is beneficial to improving the controllability of the roughening morphology.

[0112] Furthermore, the step of performing a first roughening treatment on the surface of the sacrificial layer may include: performing a roughening pretreatment on the surface of the sacrificial layer to form a rough surface; and performing a first etching on the sacrificial layer to form the first roughened structure.

[0113] In practice, the surface of the sacrificial layer can be roughened and pretreated by methods such as plasma bombardment.

[0114] Furthermore, during the first etching of the sacrificial layer to form the first roughened structure, the etching is stopped when the bottom of the sacrificial layer exposes the light-emitting surface of a predetermined area.

[0115] In this embodiment of the invention, by setting the etching to stop when the bottom of the sacrificial layer exposes a predetermined area of ​​the light-emitting surface, the effectiveness and reliability of the etching termination position can be effectively guaranteed. Figure 8 In the specific embodiment shown, the step of performing a first etching on the sacrificial layer to form the first roughened structure may include: performing a first etching on the sacrificial layer until a portion of the sacrificial layer is retained, while exposing a portion of the first confinement layer and a portion of the sacrificial layer is retained, wherein the surface roughness of the stacked structure of the remaining sacrificial layer and the light-emitting surface (such as the remaining first confinement layer) is greater than or equal to a first preset roughness threshold.

[0116] It should be noted that, in the embodiments of the present invention, other appropriate methods may also be used to perform the first roughening treatment on the surface of the sacrificial layer, such as plasma bombardment, and are not limited to the first etching method described above.

[0117] Reference Figure 8 The photoresist layer 108 is first etched to obtain a roughened photoresist layer 108.

[0118] Specifically, the first etching step of the photoresist layer 108 may include: etching the photoresist layer 108 with a reactive gas containing CxFy and oxygen to obtain a solid fluorine-based ionic compound, wherein the formed solid fluorine-based ionic compound is retained on the photoresist layer 108; etching the remaining photoresist layer 108 with oxygen until a portion of the first confinement layer 1031 is exposed and a portion of the photoresist layer 108 is retained.

[0119] In this embodiment of the invention, by using a photoresist layer 108, a solid fluorine-based ionic compound is retained on the photoresist layer 108, which can block further etching of the photoresist and effectively form an uneven etched surface with a certain surface roughness. Therefore, after etching the remaining photoresist layer 108 with oxygen, a photoresist layer 108 with a relatively large surface roughness can be obtained as the basis for subsequent etching processes.

[0120] The surface roughness may include one or more of the following: average surface roughness Ra, and root mean square surface roughness Rq.

[0121] More specifically, the surface roughness threshold can be represented by a single parameter, or by a weighted average of multiple parameters (such as a weighted average or a weighted sum).

[0122] In this embodiment of the invention, by selecting appropriate parameters to represent surface roughness, the condition of the second surface of the first confinement layer 1031 can be accurately determined, which helps to determine appropriate process targets to improve the performance of the formed semiconductor structure.

[0123] In some embodiments, CxFy is CF4; the ratio between the flow rate of CF4 and the flow rate of oxygen is selected from [2, 6].

[0124] It should be noted that the flow rate of CF4 should not be too small, otherwise the etching degree of the first etching will be too small and it will be difficult to meet the etching requirements; the flow rate of CF4 should not be too large, otherwise it will reduce the proportion of oxygen used for the first etching and affect the uniformity of etching.

[0125] In one specific embodiment, the flow rate of the CF4 is selected from 60 sccm to 100 sccm; for example, from 70 sccm to 90 sccm, such as 80 sccm.

[0126] The oxygen flow rate is selected from 15 sccm to 25 sccm; for example, from 18 sccm to 22 sccm, for example, 20 sccm.

[0127] It should be noted that in specific implementation, CxFy can also use other appropriate materials, such as combinations of one or more of the following: CF3, CF2, or CF4 combined with one or more of CF3 and CF2.

[0128] In some embodiments, before etching the photoresist layer 108 using a reactive gas containing CxFy and oxygen, the method may further include: heating and baking the photoresist layer until the hardness of the photoresist layer is greater than or equal to a preset hardness.

[0129] In practice, the baking temperature can be selected from 80℃ to 200℃, for example from 120℃ to 160℃, for example 140℃.

[0130] In one specific embodiment, the preset hardness can be a Mohs hardness of 1.

[0131] Moh's hardness is a standard for expressing the hardness of an object.

[0132] In this embodiment of the invention, before etching the photoresist layer using a reaction gas containing CxFy and oxygen, the photoresist layer 108 is heated and baked until its hardness is greater than or equal to a preset hardness. This allows for hardening treatment of the photoresist layer 108 before roughening treatment, which is beneficial for improving the controllability of the roughening morphology.

[0133] Furthermore, the end time of the first etching can be determined by appropriate methods.

[0134] In some embodiments, the step of first etching the photoresist layer 108 between etching the photoresist layer 108 and etching the remaining photoresist layer 108 with oxygen may further include: monitoring the surface roughness of the photoresist layer 108 having a solid fluorine-based ionic compound on its surface; and, in response to the rate of increase of the surface roughness of the photoresist layer 108 changing from greater than a first preset rate threshold to less than or equal to the first preset rate threshold, performing a second etching on the remaining photoresist layer 108 and the remaining first confinement layer 1031.

[0135] In practice, an atomic force microscope (AFM) can be used to monitor surface roughness.

[0136] Specifically, AFM is an analytical instrument used to study the surface structure of solid materials, including insulators. It investigates the surface structure and properties of matter by detecting extremely weak interatomic forces between the sample surface and a micro-force-sensitive element. A pair of extremely sensitive microcantilever arms are fixed at one end, while a tiny needle tip at the other end approaches the sample. The interaction causes deformation or changes in motion of the microcantilever. By scanning the sample and detecting these changes using sensors, information on the force distribution can be obtained, thus providing surface morphology and roughness information at nanometer-level resolution.

[0137] In this embodiment of the invention, the surface roughness of the photoresist layer 108, which has a solid fluorine-based ionic compound on its surface, is monitored. In response to the rate of increase in the surface roughness of the photoresist layer 108 changing from greater than a first preset rate threshold to less than or equal to the first preset rate threshold, a second etching is performed on the remaining photoresist layer 108 and the remaining first confinement layer 1031. Using this approach, based on the characteristic that the degree of roughening slows down after the surface roughness of the photoresist increases to a certain extent, it is possible to determine when to switch to the next stage, achieving a better balance between increasing the roughening particle size and improving production efficiency. Furthermore, by monitoring the surface roughness of the photoresist layer 108 to determine the end time of the first etching, a more accurate judgment can be made according to specific circumstances, further improving the controllability of the roughening process.

[0138] In other embodiments, the step of first etching the photoresist layer 108 between etching the photoresist layer 108 and etching the remaining photoresist layer 108 with oxygen may further include: second etching the remaining photoresist layer 108 and the remaining first confinement layer 1031 in response to the etching duration of the first etching of the photoresist layer 108 being greater than or equal to a preset duration.

[0139] In this embodiment of the invention, in response to the etching time of the first etching of the photoresist layer 108 being greater than or equal to a preset time, a second etching is performed on the remaining photoresist layer 108 and the remaining first confinement layer 1031. By adopting the above scheme, based on the characteristic that the roughness of the photoresist surface increases to a certain extent and then changes slowly, the appropriate time to switch to the next stage can be determined, achieving a better balance between increasing the roughness of the particles and improving production efficiency. Furthermore, by determining the end time of the first etching by the etching time being greater than or equal to the preset time, a unified stopping standard can be set, improving the feasibility for large-scale mass production.

[0140] Furthermore, the step of etching the remaining photoresist layer 108 with oxygen may include: adjusting the etching selectivity ratio of the photoresist layer 108 and the first confinement layer 1031 so that the adjusted etching selectivity ratio conforms to a preset etching selectivity ratio range; and using the adjusted etching selectivity ratio to etch the remaining photoresist layer 108.

[0141] In some embodiments, the preset etching selectivity range may be selected from 2:1 to 1:2.

[0142] Specifically, the etching rate of the photoresist layer 108 can be less than or equal to twice the etching rate of the first confinement layer 1031, or the etching rate of the first confinement layer 1031 can be less than or equal to twice the etching rate of the photoresist layer 108, or the etching rate can be somewhere in between.

[0143] In practice, by setting the etching selectivity range from 2:1 to 1:2, the difference between the etching rate of the photoresist layer 108 and the etching rate of the first confinement layer 1031 can be effectively controlled, avoiding etching one of them too quickly, which would damage the roughened surface obtained after the first etching.

[0144] In some embodiments, the adjusted etching selectivity ratio is greater than 1:1.

[0145] In a specific implementation, the etching rate of the photoresist layer 108 can be greater than the etching rate of the first confinement layer 1031, so as to obtain an adjusted etching selectivity greater than 1:1. This allows for a greater reduction in the photoresist layer 108 during the etching process, maintaining a roughened surface while providing a better foundation for the subsequent second etching.

[0146] In this embodiment of the invention, during the etching of the remaining photoresist layer 108 using oxygen, the etching selectivity ratio of the photoresist layer 108 and the first confinement layer 1031 is adjusted so that the adjusted etching selectivity ratio conforms to a preset etching selectivity ratio range; the remaining photoresist layer 108 is then etched using the adjusted etching selectivity ratio. By employing this method, the roughening degree after the first etching can be maintained while adjusting the appropriate etching selectivity ratio, providing a better foundation for the subsequent second etching.

[0147] In some embodiments, the ratio of the area of ​​the retained portion of the photoresist layer 108 to the area of ​​the photoresist layer before the first etching is selected from 30% to 70%.

[0148] It should be noted that the photoresist layer before the first etching can be regarded as the initially formed photoresist layer, that is, the photoresist layer formed on the second surface of the substrate.

[0149] Specifically, this ratio can be selected from 30% to 70%, for example from 40% to 60%, or for example from 50%.

[0150] In this embodiment of the invention, the ratio of the area of ​​the retained portion of the photoresist layer to the area of ​​the second surface of the substrate is selected from 30% to 70%. By monitoring the area of ​​the photoresist, better control of the process in the intermediate state can be achieved.

[0151] exist Figure 9 In the specific embodiment shown, the step of performing a second roughening treatment on the surface of the sacrificial layer having the first roughening structure may include: using the remaining sacrificial layer as a mask, performing a second etching on the remaining first confining layer, so that after removing the sacrificial layer, the surface roughness of the first confining layer is greater than or equal to a second preset roughness threshold.

[0152] It should be noted that, in the embodiments of the present invention, other appropriate methods can also be used to perform a second roughening treatment on the surface of the sacrificial layer, such as plasma bombardment, and are not limited to the second etching method described above.

[0153] Reference Figure 9 Using the remaining photoresist layer 108 as a mask, the remaining first confinement layer 1031 is etched a second time to make the surface roughness of the first confinement layer 1031 greater than or equal to a second preset roughness threshold after the photoresist layer 108 is removed.

[0154] In some embodiments, the photoresist layer 108 and the first confinement layer 1031 can be etched together by adjusting the etching selectivity ratio of the photoresist layer 108 and the first confinement layer 1031.

[0155] In one specific embodiment, it can be adopted with Figure 8 The illustrated step of etching the remaining photoresist layer with oxygen, using a consistent etching selectivity, etches the photoresist layer 108 and the first confinement layer 1031 to maintain [the desired effect]. Figure 8 The degree of surface roughness obtained.

[0156] It should be noted that a value can also be selected from the preset etching selectivity range disclosed above as the etching selectivity in the second etching.

[0157] In other embodiments, the photoresist layer 108 can be used as a mask to mainly etch the first confinement layer 1031, so as to increase the surface roughness under the masking effect of the photoresist layer 108.

[0158] In this embodiment of the invention, a sacrificial layer is formed on the light-emitting surface (such as the first confinement layer 1031), and then the sacrificial layer (i.e. Figures 7 to 8 The photoresist layer 108 shown is first etched until a portion of the first confinement layer 1031 is exposed while a portion of the sacrificial layer is retained. The surface roughness of the stacked structure of the remaining sacrificial layer and the remaining first confinement layer 1031 is greater than or equal to a first preset roughness threshold, thus obtaining a sacrificial layer with a large surface roughness as the basis for subsequent etching processes. Then, the remaining sacrificial layer and the remaining first confinement layer 1031 are second etched to remove the sacrificial layer, making the surface roughness of the first confinement layer 1031 greater than or equal to the second preset roughness threshold. This allows for the obtaining of a first confinement layer 1031 with a large surface roughness based on the sacrificial layer, achieving roughening of the light-emitting surface. This helps adjust the optical path and even change the propagation direction of the original total internal reflection light, effectively increasing the probability of photon escape and improving light extraction efficiency. Furthermore, since the etching of the sacrificial layer is a dry process, it offers better morphology control and process stability compared to wet roughening. Also, the process of etching the sacrificial layer is better in terms of cost control, and it has lower cost and lower process complexity compared to roughening using nanocrystals and nanoparticles as masks.

[0159] Furthermore, the coarsened structure is a nanoscale microstructure; wherein the width of the coarsened structure is 20-1000 nm, and / or the height of the coarsened structure is 20-1000 nm.

[0160] Specifically, due to the formation of the roughened structure, the surface roughness of the first confining layer 1031 is relatively large. By setting the width of the roughened structure to 20-1000 nm and / or the height of the roughened structure to 20-1000 nm, the surface roughness obtained by the roughened structure can be made more standardized and controllable.

[0161] Furthermore, the morphology of the coarsened structure is selected from one or more of the following: spherical, hemispherical, conical, pointed conical, cylindrical, and rectangular.

[0162] It should be noted that the morphology of the coarsened structure does not have to be a standard morphology, but can be between two morphologies, such as being between a sphere and a hemisphere and presenting an ellipsoid.

[0163] Reference Figure 10 An N-type electrode 301 is formed, a P-type electrode 302 is formed that is electrically connected to the first conductive post 107, and a microlens 303 is formed on the second surface of the processed first confinement layer 1031.

[0164] Specifically, the materials for the N-type electrode 301 and the P-type electrode 302 can be conventional electrode materials, such as conductive materials, for example, appropriate metallic materials, such as copper, tungsten, aluminum, platinum, silver, gold, and various conductive compound materials.

[0165] The N-type electrode 301 can surround the light-emitting platform 103, and the P-type electrode 302 can be located in the edge region.

[0166] It should be noted that the planar layout (i.e., the positional relationship shown in the top view) of the N-type electrode 301, P-type electrode 302 and microlens 303 is not limited in the embodiments of the present invention.

[0167] The material of the microlens 303 can be a conventional lens material, such as a material with a transmittance greater than a preset transmittance threshold.

[0168] In this embodiment of the invention, a microlens 303 is formed on the second surface of the processed first confinement layer 1031, which enables the second surface of the roughened first confinement layer 1031 to serve as a refractive layer at the light-emitting platform interface, thereby better changing the propagation direction of total internal reflection light, increasing the probability of photon emission, and improving light emission efficiency.

[0169] In this embodiment of the invention, a micro LED display chip is also disclosed, with reference to... Figure 10 It may include: a light-emitting platform, the light-emitting platform including a light-emitting surface, the light-emitting surface having a roughened structure, the roughened structure being obtained by the above-described roughening method for the light-emitting surface of a micro LED display chip.

[0170] Furthermore, the coarsened structure is a nanoscale microstructure; wherein the width of the coarsened structure is 20-1000 nm, and / or the height of the coarsened structure is 20-1000 nm.

[0171] As mentioned above, by setting the width and / or height of the roughening structure, the surface roughness obtained by the roughening structure can be made more standardized and controllable.

[0172] Furthermore, the morphology of the coarsened structure is selected from one or more of the following: spherical, hemispherical, conical, pointed conical, cylindrical, and rectangular.

[0173] It should be noted that the morphology of the coarsened structure does not have to be a standard morphology, but can be between two morphologies, such as being between a sphere and a hemisphere and presenting an ellipsoid.

[0174] In this embodiment of the invention, a micro LED structure is also disclosed, with reference to... Figure 8 It includes: a light-emitting platform, wherein the light-emitting platform has a light-emitting surface (e.g., Figure 8The first limiting layer 1031 shown); the sacrificial layer (such as...) Figure 8 The photoresist layer 108 shown is located on the light-emitting surface, and the surface of the sacrificial layer has a first roughened structure.

[0175] Furthermore, the sacrificial layer may expose a portion of the light-emitting surface.

[0176] In practice, by forming a sacrificial layer with a first roughened structure on the surface, this sacrificial layer with a large surface roughness can be used as the basis for subsequent etching processes, which helps to improve light extraction efficiency.

[0177] For more information on the principle, implementation, and beneficial effects of this micro LED display chip, please refer to the previous description of the roughening method for micro LED display chips; it will not be repeated here.

[0178] It should be understood that the term "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone. Additionally, the character " / " in this document indicates that the preceding and following related objects are in an "or" relationship. As used herein, unless explicitly stated otherwise, the term "or" covers all possible combinations unless impractical. For example, if a component is declared to include A or B, then unless explicitly stated otherwise or impractical, the component can include A, or B, or A and B. As a second example, if a component is declared to include A, B, or C, then unless explicitly stated otherwise or impractical, the component can include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.

[0179] In the embodiments of this application, "multiple" refers to two or more.

[0180] Relational terms appearing in the embodiments of this application, such as "first," "second," etc., are used only to distinguish an entity or operation from another entity or operation, without requiring or implying any actual relationship or order between these entities or operations. Furthermore, the words "comprising," "having," and "including," as well as other similar forms, are intended to be equivalent in meaning and are open-ended; one or more items following any of these words do not imply an exhaustive list of such items or that they are limited to only the listed items.

[0181] It should be noted that the sequence number of each step in this embodiment does not represent a limitation on the execution order of each step.

[0182] In the foregoing specification, numerous specific details have been described with reference to embodiments, which may vary depending on the implementation. Certain modifications and alterations may be made to the described embodiments. Other embodiments will be apparent to those skilled in the art in light of the specification and practice disclosed herein. The specification and examples are intended to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims. The sequence of steps shown in the accompanying drawings is also intended for illustrative purposes only and is not intended to limit one to any particular sequence of steps. Therefore, those skilled in the art will understand that these steps may be performed in different orders while achieving the same method.

[0183] Exemplary embodiments have been disclosed in the accompanying drawings and description. However, many variations and modifications can be made to these embodiments. Therefore, although specific terminology has been used, it is used in a general and descriptive sense only and not for limiting purposes.

[0184] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for roughening the light-emitting surface of a micro LED display chip, characterized in that, The method includes: providing a micro-LED structure, the micro-LED structure including a light-emitting platform, the surface of the light-emitting platform having a light-emitting surface; A sacrificial layer is formed on the light-emitting surface; The surface of the sacrificial layer is subjected to a first roughening treatment to form a first roughened structure; The surface of the sacrificial layer having the first roughened structure is subjected to a second roughening treatment to remove the sacrificial layer and form a second roughening structure on the light-emitting surface.

2. The method for roughening the light-emitting surface of a micro LED display chip according to claim 1, characterized in that, Before performing a first roughening treatment on the surface of the sacrificial layer, the method further includes: The sacrificial layer is heated to solidify it.

3. The method for roughening the light-emitting surface of a micro LED display chip according to claim 2, characterized in that, The heating temperature is between 80℃ and 200℃.

4. The method for roughening the light-emitting surface of a micro LED display chip according to claim 1, characterized in that, Its features are, The method for forming the light-emitting platform includes: A substrate is provided, and a first confinement layer, a quantum well layer, and a second confinement layer are formed on a first surface of the substrate; From the first side of the substrate, the second confinement layer and the quantum well layer are etched, as well as a portion of the thickness of the first confinement layer is etched, to obtain a light-emitting mesa; The substrate is removed from its second side, exposing the second side of the first confining layer, wherein the second side of the substrate is opposite to the first side of the substrate; The sacrificial layer is formed on the second surface of the first confinement layer.

5. The method for roughening the light-emitting surface of a micro LED display chip according to claim 4, characterized in that, Before removing the substrate from its second side, the method further includes: A first bonding layer is formed, which covers the substrate and the light-emitting platform from a first surface of the substrate; A driver chip is provided, wherein a first side of the driver chip has a second bonding layer; The first bonding layer and the second bonding layer are bonded together.

6. The method for roughening the light-emitting surface of a micro LED display chip according to claim 4, characterized in that, The method further includes: A microlens is formed on the second surface of the processed first confinement layer.

7. The method for roughening the light-emitting surface of a micro LED display chip according to claim 1, characterized in that, The surface of the sacrificial layer undergoes a first roughening treatment, including: The surface of the sacrificial layer is roughened pretreatment to form a rough surface. The sacrificial layer is first etched to form the first roughened structure.

8. The method for roughening the light-emitting surface of a micro LED display chip according to claim 7, characterized in that, During the first etching of the sacrificial layer to form the first roughened structure, the etching is stopped when the bottom of the sacrificial layer exposes the light-emitting surface of a predetermined area.

9. The method for roughening the light-emitting surface of a micro LED display chip according to claim 7, characterized in that, The sacrificial layer is first etched to form the first roughened structure, including: The sacrificial layer is etched for the first time until a portion of the light-emitting surface is exposed and a portion of the sacrificial layer is retained, wherein the surface roughness of the stacked structure of the remaining sacrificial layer and the light-emitting surface is greater than or equal to a first preset roughness threshold.

10. The method for roughening the light-emitting surface of a micro LED display chip according to claim 9, characterized in that, The sacrificial layer is a fluorine-containing photoresist layer; The first etching of the sacrificial layer includes: The photoresist layer is etched using a reaction gas containing CxFy and oxygen to obtain a solid fluorine-based ionic compound, wherein the formed solid fluorine-based ionic compound is retained on the photoresist layer. The remaining photoresist layer is etched with oxygen until a portion of the light-emitting surface is exposed and a portion of the sacrificial layer is retained.

11. The method for roughening the light-emitting surface of a micro LED display chip according to claim 10, characterized in that, The CxFy is CF4; The ratio between the flow rate of CF4 and the flow rate of oxygen is selected from [2, 6].

12. The method for roughening the light-emitting surface of a micro LED display chip according to claim 11, characterized in that, The flow rate of the CF4 is selected from 60 sccm to 100 sccm; The oxygen flow rate is selected from 15 sccm to 25 sccm.

13. The method for roughening the light-emitting surface of a micro LED display chip according to claim 10, characterized in that, Before etching the photoresist layer using a reactive gas containing CxFy and oxygen, the method further includes: The photoresist layer is heated and baked until its hardness is greater than or equal to a preset hardness.

14. The method for roughening the light-emitting surface of a micro LED display chip according to claim 10, characterized in that, Between etching the photoresist layer and etching the remaining photoresist layer with oxygen, the first etching of the photoresist layer further includes: The surface roughness of the photoresist layer having a solid fluorine-based ionic compound on its surface is monitored; in response to the rate of increase of the surface roughness of the photoresist layer changing from greater than a first preset rate threshold to less than or equal to the first preset rate threshold, a second etching is performed on the remaining photoresist layer and the light-emitting surface.

15. The method for roughening the light-emitting surface of a micro LED display chip according to claim 10, characterized in that, Between etching the photoresist layer and etching the remaining photoresist layer with oxygen, the first etching of the photoresist layer further includes: In response to the etching time of the first etching of the photoresist layer being greater than or equal to a preset time, the remaining photoresist layer and the light-emitting surface are subjected to a second etching.

16. The method for roughening the light-emitting surface of a micro LED display chip according to claim 10, characterized in that, The remaining photoresist layer is etched using oxygen, including: The etching selectivity ratio of the photoresist layer and the light-emitting surface is adjusted so that the adjusted etching selectivity ratio conforms to a preset etching selectivity ratio range. The remaining photoresist layer is etched using the adjusted etching selectivity.

17. The method for roughening the light-emitting surface of a micro LED display chip according to claim 16, characterized in that, The preset etching selectivity range is selected from 2:1 to 1:

2.

18. The method for roughening the light-emitting surface of a micro LED display chip according to claim 16, characterized in that, The adjusted etching selectivity ratio is greater than 1:

1.

19. The method for roughening the light-emitting surface of a micro LED display chip according to claim 10, characterized in that, The ratio of the area of ​​the retained portion of the photoresist layer to the area of ​​the photoresist layer before the first etching is selected from 30% to 70%.

20. The method for roughening the light-emitting surface of a micro LED display chip according to claim 1, characterized in that, A second roughening treatment is performed on the surface of the sacrificial layer having the first roughened structure, including: Using the remaining sacrificial layer as a mask, a second etching is performed on the light-emitting surface to ensure that the surface roughness of the light-emitting surface is greater than or equal to a second preset roughness threshold after the sacrificial layer is removed.

21. A miniature LED display chip, characterized in that, include: A light-emitting platform, the light-emitting platform including a light-emitting surface, the light-emitting surface having a roughened structure, the roughened structure being obtained by the roughening method of the light-emitting surface of the micro LED display chip according to any one of claims 1-20.

22. The micro LED display chip according to claim 21, characterized in that, The coarsened structure is a nanoscale microstructure; Wherein, the width of the roughened structure is 20-1000 nm, and / or, the height of the roughened structure is 20-1000 nm.

23. The micro LED display chip according to claim 21, characterized in that, The morphology of the coarsened structure is selected from one or more of the following: spherical, hemispherical, conical, pointed conical, cylindrical, and rectangular.

24. A micro LED structure, characterized in that, include: A light-emitting platform, wherein the light-emitting platform has a light-emitting surface; A sacrificial layer is located on the light-emitting surface, and the surface of the sacrificial layer has a first roughened structure.

25. The micro LED structure according to claim 24, characterized in that, The sacrificial layer exposes a portion of the light-emitting surface.

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