UPQC series side adaptive virtual impedance fault current limiting method and device
By dynamically adjusting the output impedance of the UPQC series-side inverter using an adaptive virtual impedance method, the overcurrent problem of traditional UPQC during grid faults is solved, achieving effective current limiting and load voltage support during faults, thereby improving equipment reliability and power system safety.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-30
- Publication Date
- 2026-03-27
AI Technical Summary
Traditional UPQC struggles to balance low losses during normal operation, rapid and effective current limiting during faults, and prevention of converter overcurrent saturation during grid faults. Fixed virtual impedance values cannot adapt to different fault conditions, leading to equipment damage or insufficient current limiting.
An adaptive virtual impedance method is adopted to collect grid voltage and inverter output current in real time, dynamically adjust the equivalent output impedance of the series-side inverter, determine the target load voltage based on the fault depth and current limiting target, and achieve the desired compensation voltage through closed-loop control to avoid inverter overcurrent and limit fault current.
It effectively limits fault current, protects equipment safety, provides load voltage support, improves the reliability and safety of the power system, and avoids equipment damage and overcurrent risks.
Smart Images

Figure CN121749255A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the fields of power electronics technology and power quality control technology, specifically to a method and device for UPQC series-side adaptive virtual impedance fault current limiting. Background Technology
[0002] With the increasing prevalence of sensitive loads in modern industry and power grids, the economic losses caused by power quality problems such as voltage sags and short-term interruptions are becoming increasingly serious. Unified Power Quality Conditioners (UPQCs), which combine series and parallel compensation functions, are an effective means of addressing these problems. When addressing voltage sags and interruptions, traditional UPQCs or similar multi-functional devices typically operate their series-side converters in voltage compensation mode, injecting compensation voltage into the load to maintain load-side voltage stability.
[0003] However, when severe faults such as short circuits to ground or phase-to-phase short circuits occur on the grid side, the grid voltage drops significantly, and a huge short-circuit current flows through the fault point. In this situation, if the UPQC series converter attempts to fully compensate for the grid voltage drop to maintain the load voltage, its output current will increase sharply, easily exceeding the safe current limit of the converter's power devices, i.e., "saturation," causing overcurrent damage to the equipment. Simultaneously, it cannot effectively limit the current flowing to the fault point, potentially affecting the correct operation of upstream protection equipment.
[0004] While existing technologies include methods that introduce a fixed virtual impedance on the UPQC series side to limit fault current, the fixed virtual impedance value is difficult to simultaneously achieve low loss during normal operation, rapid and effective current limiting during faults, and prevention of converter oversaturation. During a fault, conditions such as fault depth and system impedance vary, and a fixed virtual impedance value may either be insufficient to limit the current, leading to converter saturation, or excessively current-limiting, resulting in insufficient voltage support at the load end. Therefore, an adaptive virtual impedance control method is needed that can automatically adjust according to the real-time fault status and ensure that the converter operating point is always within the safe zone (anti-saturation constraint). Summary of the Invention
[0005] The purpose of this invention is to provide a method and device for adaptive virtual impedance fault current limiting on the series side of a UPQC, which can dynamically adjust the equivalent output impedance of the inverter on the series side when a serious fault occurs in the power grid, and provide voltage support for critical loads as much as possible while effectively limiting the fault current on the power grid side and protecting the safety of the UPQC itself (avoiding overcurrent saturation).
[0006] To achieve the above objectives, in a first aspect, the present invention provides a UPQC series-side adaptive virtual impedance fault current limiting method, applied to a UPQC topology, wherein the UPQC topology includes a series-side inverter, and the UPQC is a unified power quality conditioner; the method includes: Real-time acquisition of grid voltage, series-side inverter output current, and load voltage; When the grid voltage amplitude is less than the severe fault threshold for multiple consecutive control cycles, the grid enters the fault current limiting mode and determines the target load voltage based on the fault depth and current limiting target. In fault current limiting mode, calculate the current margin of the current control cycle, and determine the virtual impedance required for the current control cycle based on the relationship between the current margin of the current control cycle and the safety margin threshold. The desired compensation voltage of the series-side inverter is determined based on the virtual impedance, target load voltage, grid voltage, and output current of the series-side inverter. The drive signal is determined based on the desired compensation voltage and the load voltage, and the series-side inverter is controlled to output the desired compensation voltage through the drive signal.
[0007] According to the UPQC series-side adaptive virtual impedance fault current limiting method provided by the present invention, the target load voltage is: , Where K is the load voltage support coefficient, U s This is the grid voltage. According to the UPQC series-side adaptive virtual impedance fault current limiting method provided by the present invention, the current margin is: , in, I max This is the maximum safe current for the series-side inverter. I inv This is the output current of the series-side inverter. According to the UPQC series-side adaptive virtual impedance fault current limiting method provided by the present invention, the required virtual impedance for the current control cycle is determined based on the relationship between the current margin and the safety margin threshold of the current control cycle, including: when hour, I margin As a safety margin threshold, the virtual impedance is determined based on the fault depth. The deeper the fault and the smaller the grid voltage amplitude, the larger the virtual impedance. According to the UPQC series-side adaptive virtual impedance fault current limiting method provided by the present invention, the required virtual impedance for the current control cycle is determined based on the relationship between the current margin and the safety margin threshold of the current control cycle, including: when At this time, the output current of the inverter on the series side is reduced, and the virtual impedance is increased. According to the UPQC series-side adaptive virtual impedance fault current limiting method provided by the present invention, the desired compensation voltage is: , in, Z v This is a virtual impedance.
[0008] According to the present invention, a UPQC series-side adaptive virtual impedance fault current limiting method determines a drive signal based on the desired compensation voltage and the load voltage, and controls the series-side inverter to output the desired compensation voltage through the drive signal, including: The desired compensation voltage is used as the voltage reference value of the outer loop of the series-side inverter voltage and compared with the load voltage. The error obtained after comparison is output by the voltage PI regulator as the current reference value of the inner loop of the series-side inverter current and compared with the output current of the series-side inverter. The error obtained after comparison is generated by the current PR or PI regulator to generate a modulation wave. The modulation wave is then used by the SVPWM module to generate drive pulses to control the series-side inverter to output the desired compensation voltage. According to the UPQC series-side adaptive virtual impedance fault current limiting method provided by the present invention, after the steps of determining the drive signal based on the desired compensation voltage and the load voltage, and controlling the series-side inverter to output the desired compensation voltage through the drive signal, the method further includes: When the grid voltage amplitude exceeds the preset threshold and the duration exceeds the preset time, the virtual impedance is gradually reduced until the virtual impedance drops to zero, and the grid exits the fault current limiting mode. According to the present invention, an adaptive virtual impedance fault current limiting method for UPQC series side is provided, which gradually reduces the virtual impedance, including: The virtual impedance is gradually reduced to zero over multiple control cycles by decreasing by a preset percentage in each control cycle.
[0009] In a second aspect, the present invention provides a UPQC series-side adaptive virtual impedance fault current limiting device for implementing the UPQC series-side adaptive virtual impedance fault current limiting method of the first aspect, the device comprising: The data acquisition unit is used to acquire grid voltage, series-side inverter output current, and load voltage in real time. The switching unit is used to enable the power grid to enter the fault current limiting mode when the power grid voltage amplitude is less than the severe fault threshold for multiple consecutive control cycles, and to determine the target load voltage based on the fault depth and the current limiting target. The impedance calculation unit is used to calculate the current margin of the current control cycle in fault current limiting mode, and determine the virtual impedance required for the current control cycle based on the relationship between the current margin of the current control cycle and the safety margin threshold. The correction compensation unit is used to determine the desired compensation voltage of the series-side inverter based on the virtual impedance, target load voltage, grid voltage, and series-side inverter output current. The closed-loop output unit is used to determine the drive signal based on the desired compensation voltage and the load voltage, and to control the series-side inverter to output the desired compensation voltage through the drive signal.
[0010] This invention has at least the following beneficial effects: This invention provides a fault current limiting method and device for UPQC series-side adaptive virtual impedance considering anti-saturation constraints. When the grid voltage amplitude is detected to be less than the severe fault threshold (i.e., a severe grid fault), the grid enters a fault current limiting mode. An adaptive virtual impedance is dynamically calculated by real-time monitoring of the grid voltage and the output current of the series-side inverter. This adaptive process prioritizes preventing overcurrent saturation of the series-side inverter, ensuring the equipment's safety. The calculated virtual impedance is integrated into the desired compensation voltage, enabling the UPQC series side to exhibit controllable dynamic impedance characteristics during faults. This effectively limits the grid-side short-circuit current while providing optimized voltage support for critical loads. This invention solves the problems of traditional UPQC being prone to overcurrent damage during severe grid faults, having poor fixed impedance current limiting effect, and lacking adaptability. It significantly improves the reliability of medium-voltage power quality management equipment and the operational safety of the power system. Attached Figure Description
[0011] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0012] In the attached diagram: Figure 1 This is a schematic diagram of the circuit structure of the UPQC topology of this invention; Figure 2 This is a block diagram illustrating the control principle of the adaptive virtual impedance fault current limiting method of the present invention. Figure 3 This is a logic flowchart of the adaptive virtual impedance calculation of the present invention; Figure 4 This is a comparison of simulation waveforms of the traditional fixed impedance current limiting scheme and the adaptive current limiting scheme of this invention under the same fault. Detailed Implementation
[0013] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.
[0014] The following detailed description of some embodiments of the present invention will be provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.
[0015] This invention provides a fault current limiting method for UPQC series-side adaptive virtual impedance considering anti-saturation constraints, applied to UPQC topologies. By introducing an adaptive virtual impedance considering anti-saturation constraints into the series-side converter of the UPQC topology, a fast, effective, and safe fault current limiting method can be achieved when severe faults such as short circuits occur on the grid side.
[0016] like Figure 1 As shown, this UPQC topology includes a series transformer and a series-side inverter ( Figure 1 (middle left inverter), parallel transformer, parallel side inverter ( Figure 1 The inverter on the right side of the series transformer is connected to the grid and the energy storage is connected to the grid. The primary side of the series transformer is connected in series in the line and the secondary side is connected to the series-side inverter. The parallel-side inverter is connected to the grid side through the parallel transformer. Both the series-side inverter and the parallel-side inverter are connected to the energy storage.
[0017] It should be noted that this UPQC topology, as a multi-functional energy storage-type medium-voltage power quality management device, also includes supporting circuit breakers QF1, QF2, QF3, and QF5, bypass modules (such as static transfer switches (STS)), and bypass contactor KM1. The series-side inverter is mainly used to compensate for grid voltage, while the parallel-side inverter is mainly used to compensate for load current and provide backup energy storage. The parallel transformer is a step-down transformer.
[0018] like Figure 2 As shown, the UPQC series-side adaptive virtual impedance fault current limiting method provided in this embodiment of the invention includes the following steps: Step 1: Real-time acquisition of grid voltage U s Series-side inverter output current I inv and load voltage U L ; Specifically, the method of this invention is applied to a typical multi-functional energy storage-type medium-voltage power quality management device. The power grid is connected through circuit breaker QF1, and the initialization parameters are set as follows: a severe fault threshold is set.U fault = 0.5 pu, maximum safe current for series-side inverters I max =1.5 I N ( I N (Rated current), safety margin threshold I margin =0.1 I max .
[0019] Step 2, Fault Detection and Operating Mode Switching. When the grid voltage amplitude | U s All are below the critical fault threshold. U fault When this occurs, the power grid enters fault current limiting mode and determines the target load voltage based on the fault depth and current limiting target. U Lref ; Specifically, in each control cycle, the grid voltage amplitude is calculated. U s A first-order low-pass filter can be used to eliminate sampling noise. When the grid voltage amplitude over 10 consecutive control cycles (i.e., 1 ms) | U s All are below the critical fault threshold. U fault When the fault flag is set, the power grid immediately switches from "normal operation / normal voltage compensation mode" to "fault current limiting mode". In fault current limiting mode, the target load voltage... U Lref Instead of maintaining the rated value, it is regenerated based on the fault depth and current limiting target. One implementation method is as follows: Where K represents the load voltage support coefficient, which is a coefficient less than 1 (take K=0.85). This means that the target load voltage will decrease as the grid voltage drops, but will remain at a level higher than the grid residual voltage.
[0020] Step 3: Adaptive virtual impedance calculation based on anti-saturation constraints. In fault current limiting mode, calculate the current margin of the current control cycle, and determine the virtual impedance required for the current control cycle based on the relationship between the current margin of the current control cycle and the safety margin threshold. Specifically, in fault current limiting mode, each control cycle executes as follows: Figure 3 The algorithm shown calculates the virtual impedance required for the current control cycle. ,in R v For virtual resistance, Xv This is a virtual reactance. Based on the grid voltage amplitude during the current control cycle | U s |Amplitude of output current of series-side inverter| I inv | Calculate the current margin Virtual impedance Z v Adaptive to real-time fault conditions, its adaptive design principle is: (1) During the safe zone, i.e. The equipment has sufficient safety margin and virtual impedance. Z v It is mainly determined by the depth of the fault; the deeper the fault (the greater the grid voltage amplitude), the higher the risk of damage. U s |The smaller the value), the larger the virtual impedance; (2) In the saturation danger zone, that is The device current is approaching the safe limit, and the anti-saturation constraint takes effect immediately. At this point, the algorithm enters a strong current limiting priority mode, and the virtual impedance... Z v The current margin ΔI will increase sharply, thus reducing the output current of the series-side inverter. I inv In other words, the primary control objective has shifted from "optimizing current limiting" to "forcibly reducing the output current of the series-side inverter". I inv "To escape the saturation zone".
[0021] Step 4: Generate voltage command and correct compensation voltage. Determine the desired compensation voltage for the series-side inverter based on virtual impedance, target load voltage, grid voltage, and series-side inverter output current; Specifically, the adaptively calculated virtual impedance Z v The control loop is integrated into the series-side inverter. The desired compensation voltage for the series-side inverter is... It consists of two parts: one part is used to support the load voltage (based on the adjusted voltage). U Lref The first part is the net voltage difference that the current control cycle wants to compensate for; the second part is equal to the voltage drop across the virtual impedance, which is an additional controllable voltage drop added to achieve fault current limiting and anti-saturation protection. When the algorithm is affected by the output current of the series-side inverter... I inv Excessive size increases virtual impedance Z v At this time, it is equivalent to adding the output current of the inverter on the series side to the voltage compensation command. I invVoltage components in the same direction. For a series-side inverter, a larger output voltage requires more energy from its DC-side capacitor, which creates a "back electromotive force" effect internally. This is essentially equivalent to increasing the equivalent impedance at the output of the series-side inverter, thus affecting the output current of the series-side inverter. I inv This creates strong negative feedback inhibition, "clamping" it at the safety limit. I max Within. This is "by increasing the virtual impedance". Z v To reduce the output current of the series-side inverter I inv The underlying mechanism of "".
[0022] Step 5: Closed-loop control and output. The drive signal is determined based on the desired compensation voltage, and the series-side inverter is controlled to output the desired compensation voltage using the drive signal. Specifically, the desired compensation voltage U bref As a voltage reference value for the outer loop of the series-side inverter voltage, it is related to the load voltage. U L The error is compared with the current reference value of the inner loop of the inverter on the series side output by the voltage PI regulator. I invref Then, compared with the actual output current of the series-side inverter. I inv The error is compared and modulated by a current PR (or PI) regulator. Finally, the modulated wave is generated into a drive pulse by the SVPWM (Space Vector Pulse Width Modulation) module, which controls the series-side inverter to output the desired compensation voltage.
[0023] Step 6, Mode Recovery. When the grid voltage amplitude exceeds the preset threshold and the duration exceeds the preset time, the virtual impedance is gradually reduced until it drops to zero, and the grid exits the fault current limiting mode.
[0024] Specifically, when the grid voltage amplitude is continuously detected | U s If 0.9pu exceeds 20ms, the power grid is considered to have recovered. At this point, the virtual impedance is reduced by 5% per control cycle. Z v The load voltage reference value is gradually reduced to 0 over 20 cycles. Simultaneously, the load voltage support factor K is gradually increased from 0.85 to 1.0, making the load voltage reference value... U Lref Smooth transition back to rated value. Virtual impedance to be tested. Z vAfter the value is returned to zero, the fault flag is cleared, and the power grid fully returns to normal operation / normal voltage compensation mode. By smoothly reducing the virtual impedance to zero, the power grid seamlessly switches back to normal operation / normal voltage compensation mode.
[0025] To verify the beneficial effects of the method of the present invention, such as Figure 4 The figure shows a comparison of simulation waveforms between the traditional fixed impedance current limiting scheme and the adaptive virtual impedance current limiting scheme of this invention under the same fault condition. This comparison illustrates the response of the traditional fixed virtual impedance current limiting scheme (red dashed line) and the adaptive virtual impedance current limiting scheme of this invention (blue solid line) when a three-phase short-circuit fault occurs in the power grid at t=0.2s (voltage drops to 0.3 pu). s The grid current is represented. A comparison was made from three key dimensions: grid current limiting, device self-protection, and load voltage support. This verified the comprehensive superiority of the method of this invention, demonstrating its superiority over traditional fixed impedance current limiting schemes in all three dimensions.
[0026] Based on the same inventive concept, another embodiment of the present invention provides a UPQC series-side adaptive virtual impedance fault current limiting device for implementing the UPQC series-side adaptive virtual impedance fault current limiting method of the aforementioned embodiment. The device includes: The data acquisition unit is used to acquire grid voltage, series-side inverter output current, and load voltage in real time. The switching unit is used to enable the power grid to enter the fault current limiting mode when the power grid voltage amplitude is less than the severe fault threshold for multiple consecutive control cycles, and to determine the target load voltage based on the fault depth and the current limiting target. The impedance calculation unit is used to calculate the current margin of the current control cycle in fault current limiting mode, and determine the virtual impedance required for the current control cycle based on the relationship between the current margin of the current control cycle and the safety margin threshold. The correction compensation unit is used to determine the desired compensation voltage of the series-side inverter based on the virtual impedance, target load voltage, grid voltage, and series-side inverter output current. The closed-loop output unit is used to determine the drive signal based on the desired compensation voltage and the load voltage, and to control the series-side inverter to output the desired compensation voltage through the drive signal.
[0027] In some embodiments, the device further includes a recovery unit, used to gradually reduce the virtual impedance when the grid voltage amplitude is greater than a preset threshold and the duration is greater than a preset time, until the virtual impedance drops to zero and the grid exits the fault current limiting mode.
[0028] Specifically, the UPQC series-side adaptive virtual impedance fault current limiting device of the present invention is integrated into a multifunctional energy storage medium-voltage power quality management device.
[0029] In summary, compared with the prior art, the present invention has the following advantages: 1. By incorporating the maximum safe current of the series-side inverter as the core constraint into the adaptive virtual impedance calculation, the risk of the series-side inverter being saturated and damaged due to overcurrent during a fault is fundamentally avoided, greatly improving the reliability and survivability of the equipment.
[0030] 2. The virtual impedance can be dynamically adjusted based on the fault depth and the real-time output current of the series-side inverter, rather than being a fixed value. This allows it to handle faults of varying degrees, achieve optimal current limiting, and respond quickly in the early stages of a fault, suppressing the rate of increase of the fault current.
[0031] 3. It can effectively limit the short-circuit current on the grid side, which helps upstream circuit breakers or protection devices to identify and isolate faults more accurately and easily, avoiding protection failure or fault expansion that may be caused by UPQC forcibly supporting voltage.
[0032] 4. While ensuring its own safety and effective current limiting, it still provides the load with the highest possible voltage support (rather than completely shutting it off) through the adjusted target load voltage, so as to buy time for the smooth shutdown of critical loads or the switching of backup power.
[0033] 5. After the fault is cleared, the virtual impedance can be adaptively reduced, achieving a seamless and smooth switch from fault current limiting mode to normal operation mode, avoiding secondary impact on the load.
[0034] Other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the embodiments disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein. It should be understood that the invention is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.
Claims
1. A method for adaptive virtual impedance fault current limiting on the series side of a UPQC system, characterized in that, The method is applied to a UPQC topology, which includes a series-side inverter and the UPQC is a unified power quality conditioner; the method includes: Real-time acquisition of grid voltage, series-side inverter output current, and load voltage; When the grid voltage amplitude is less than the severe fault threshold for multiple consecutive control cycles, the grid enters the fault current limiting mode and determines the target load voltage based on the fault depth and current limiting target. In fault current limiting mode, calculate the current margin of the current control cycle, and determine the virtual impedance required for the current control cycle based on the relationship between the current margin of the current control cycle and the safety margin threshold. The desired compensation voltage of the series-side inverter is determined based on the virtual impedance, target load voltage, grid voltage, and series-side inverter output current. The drive signal is determined based on the desired compensation voltage and the load voltage, and the series-side inverter is controlled to output the desired compensation voltage through the drive signal.
2. The UPQC series-side adaptive virtual impedance fault current limiting method according to claim 1, characterized in that, The target load voltage is: , Where K is the load voltage support coefficient, U s This is the grid voltage.
3. The UPQC series-side adaptive virtual impedance fault current limiting method according to claim 2, characterized in that, The current margin is: , in, I max This is the maximum safe current for the series-side inverter. I inv This is the output current of the series-side inverter.
4. The UPQC series-side adaptive virtual impedance fault current limiting method according to claim 3, characterized in that, Based on the relationship between the current margin and the safety margin threshold of the current control cycle, determine the virtual impedance required for the current control cycle, including: when hour, I margin As a safety margin threshold, the virtual impedance is determined based on the fault depth. The deeper the fault and the smaller the grid voltage amplitude, the larger the virtual impedance.
5. The UPQC series-side adaptive virtual impedance fault current limiting method according to claim 3, characterized in that, Based on the relationship between the current margin and the safety margin threshold of the current control cycle, determine the virtual impedance required for the current control cycle, including: when At this time, the output current of the inverter on the series side is reduced, and the virtual impedance is increased.
6. The UPQC series-side adaptive virtual impedance fault current limiting method according to claim 3, characterized in that, The desired compensation voltage is: , in, Z v This is a virtual impedance.
7. The UPQC series-side adaptive virtual impedance fault current limiting method according to claim 6, characterized in that, Based on the desired compensation voltage and the load voltage, a drive signal is determined, and the series-side inverter is controlled to output the desired compensation voltage via the drive signal, including: The desired compensation voltage is used as the voltage reference value of the outer loop of the series-side inverter voltage and compared with the load voltage. The error obtained after comparison is output by the voltage PI regulator as the current reference value of the inner loop of the series-side inverter current and compared with the output current of the series-side inverter. The error obtained after comparison is generated by the current PR or PI regulator to generate a modulation wave. The modulation wave is generated into a drive pulse by the SVPWM module to control the series-side inverter to output the desired compensation voltage.
8. The UPQC series-side adaptive virtual impedance fault current limiting method according to claim 7, characterized in that, After determining the drive signal based on the desired compensation voltage and the load voltage, and controlling the series-side inverter to output the desired compensation voltage via the drive signal, the method further includes: When the grid voltage amplitude exceeds a preset threshold and the duration exceeds a preset time, the virtual impedance is gradually reduced until the virtual impedance drops to zero, and the grid exits the fault current limiting mode.
9. The UPQC series-side adaptive virtual impedance fault current limiting method according to claim 8, characterized in that, Gradually reducing the virtual impedance includes: The virtual impedance is gradually reduced to zero over multiple control cycles by decreasing by a preset percentage in each control cycle.
10. A UPQC series-side adaptive virtual impedance fault current limiting device, characterized in that, For implementing the UPQC series-side adaptive virtual impedance fault current limiting method as described in any one of claims 1-9, the apparatus comprises: The data acquisition unit is used to acquire grid voltage, series-side inverter output current, and load voltage in real time. The switching unit is used to enable the power grid to enter the fault current limiting mode when the power grid voltage amplitude is less than the severe fault threshold for multiple consecutive control cycles, and to determine the target load voltage based on the fault depth and the current limiting target. The impedance calculation unit is used to calculate the current margin of the current control cycle in fault current limiting mode, and determine the virtual impedance required for the current control cycle based on the relationship between the current margin of the current control cycle and the safety margin threshold. The correction compensation unit is used to determine the desired compensation voltage of the series-side inverter based on the virtual impedance, target load voltage, grid voltage, and series-side inverter output current. A closed-loop output unit is used to determine a drive signal based on the desired compensation voltage and the load voltage, and to control the series-side inverter to output the desired compensation voltage through the drive signal.