Method for arbitration between pulses in neurostimulation device

Abstract

Methods and devices for controlling arbitration in an implantable medical device capable of issuing therapeutic stimuli for a plurality of therapeutic procedures. The system defines treatment procedures at a plurality of levels, including a pulse procedure, an aggregation instruction, and a treatment procedure. The postponing settings and / or arbitration settings are available at several levels defined by the treatment procedure, allowing for increased flexibility and control.

Description

Cross-references to related applications

[0001] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 532,620, filed August 14, 2023, entitled “METHOD FOR ARBITRATION BETWEENPULSES IN A NEUROSTIMULATION DEVICE”, the disclosure of which is incorporated herein by reference. Background Technology

[0002] Arbitration logic and / or instructions are used in implantable medical devices to determine the execution order of multiple treatment procedures. For example, U.S. Patent Application Publication No. 2013 / 0184794 describes an output circuitry system used in neuromodulation devices such as spinal cord stimulation (SCS) or deep brain stimulation (DBS) devices. This device can be programmed to issue multiple treatment procedures to different or overlapping sets of treatment electrodes. When multiple treatment procedures are scheduled to issue treatment outputs using overlapping electrodes and / or output circuitry systems, timing control is used to ensure that opposing instructions do not arrive at the same output definition circuit simultaneously. For example, without arbitration, a single output digital-to-analog converter (DAC) might be commanded to issue a positive one milliamp current while simultaneously being commanded to issue a negative two milliamp current, causing problems with these two conflicting treatment procedures. Previous systems have used arbitration in a manner that is sometimes insufficiently granular to allow for precise control over treatment procedures. With the expectation of more complex treatment procedures in current and future systems, new and / or alternative arbitration schemes are anticipated. Summary of the Invention

[0003] The inventors have recognized, among other things, the need for new and / or alternative arbitration schemes. In an illustrative example, a system for treatment definition is used, wherein the treatment phase is defined at a granular level by pulse commands, which are combined as aggregate commands that pair pulse commands with electrode guidance commands, and these aggregate commands are further combined by treatment configuration. Methods and apparatus for implementing arbitration and / or pulse delay timing at the pulse command level are disclosed. Methods and apparatus for implementing arbitration and / or pulse delay timing at the aggregate command level are also disclosed. Finally, methods and apparatus for implementing arbitration and / or pulse delay timing at the treatment configuration level are also disclosed.

[0004] A first illustrative and non-limiting example takes the form of an implantable medical device comprising: a housing including a power supply, a controller, and a stimulation circuitry system; and wires having a plurality of electrodes coupled to the housing such that the stimulation circuitry system can deliver a stimulation pulse pattern to a patient via the electrodes; wherein the controller includes: a memory including a boot memory, a aggregation memory, a pulse memory, and a configuration memory; a plurality of pulse definition circuits, each pulse definition circuit including boot logic, aggregation logic, and pulse logic; wherein the boot memory contains a set of boot instructions for a plurality of boot programs, each boot program determining which electrodes receive a portion of the total stimulation output. The boot logic is configured to implement a selected boot instruction set; wherein the pulse memory contains pulse programs, each pulse program having one or more pulse instructions defining pulse components, each pulse component having a pulse type and one or more defining characteristics for that pulse type; wherein the aggregation memory contains aggregation instructions, each aggregation instruction defining one or more aggregated outputs, each aggregated output pairing the selected boot instruction set with the selected pulse program and defining the number of repetitions for the selected pulse program to execute using the selected boot instruction set; wherein the configuration memory contains multiple treatment configuration instruction sets, each treatment configuration instruction set having a defined total stimulation output. The controller is configured to output amplitude, arbitration mode, and deferred setting, and to identify one or more aggregate instructions to be executed for each treatment configuration; further wherein the arbitration mode defined in the configuration memory for each treatment configuration instruction set determines whether the treatment configuration instruction set will wait for the completion of a portion of another treatment configuration instruction set before initiation, and the deferred setting determines whether the treatment configuration instruction set can be interrupted by another treatment configuration instruction set; and wherein the controller is configured to execute multiple treatment configurations to generate output pulses using the stimulation circuitry system by: initiating the execution of a first treatment configuration instruction set; and, while executing the first treatment configuration instruction set, receiving a signal for executing a second treatment configuration instruction set. The request is to: determine whether the arbitration mode for the second treatment configuration instruction set allows the second treatment configuration instruction set to wait for the completion of a portion of another treatment configuration instruction set; and if not, to initiate the execution of the second treatment configuration instruction set while the first treatment configuration instruction set is being executed; otherwise: determine whether the suspend setting for the first treatment configuration instruction set allows the second treatment configuration instruction set to interrupt the first treatment configuration instruction set; and if so, to complete the ongoing execution of at least a portion of the first treatment configuration instruction set and then begin the execution of the second treatment configuration instruction set; or if not, to complete the execution of the first treatment configuration instruction set before allowing the second treatment configuration instruction set to begin.

[0005] Alternatively or concurrently, if the slack setting for the first treatment configuration instruction set allows interruption of the first treatment configuration instruction set by the second treatment configuration instruction set, then while the second treatment configuration instruction set is being executed, the controller is configured to: determine whether the slack setting for the second treatment configuration instruction set allows interruption of the second treatment configuration instruction set, and if so, interrupt the second treatment configuration instruction set after completing a portion of its execution to execute a portion of the first treatment configuration instruction set.

[0006] Alternatively or alternatively, if the slack setting of the first treatment configuration instruction set and the second treatment configuration instruction set allows interruption of each of the first treatment configuration instruction set and the second treatment configuration instruction set, the controller is configured to alternate between executing a portion of the first treatment configuration instruction set and executing a portion of the second treatment configuration instruction set until all aggregated instructions of one of the first treatment configuration instruction set and the second treatment configuration instruction set are completed.

[0007] Alternatively or concurrently, each aggregation instruction includes an aggregation deferral setting, and the controller is configured to use the aggregation deferral setting of the aggregation instruction to determine a portion of the first treatment configuration instruction set to be executed before switching to executing a portion of the second treatment configuration instruction set.

[0008] Alternatively or alternatively, each pulse component includes a pulse component deferred setting, and the controller is configured to use the pulse component deferred setting of the pulse component to determine a portion of the first treatment configuration instruction set to be executed before switching to executing a portion of the second treatment configuration instruction set.

[0009] Another illustrative and non-limiting example takes the form of an implantable medical device comprising: a housing including a power supply, a controller, and a stimulation circuitry system; and wires having a plurality of electrodes coupled to the housing such that the stimulation circuitry system can deliver a stimulation pulse pattern to a patient via the electrodes; wherein the controller includes: a memory including a boot memory, an aggregation memory, a pulse memory, and a configuration memory; a plurality of pulse definition circuits, each pulse definition circuit including boot logic, aggregation logic, and pulse logic; wherein the boot memory includes a set of boot instructions for a plurality of boot programs, each boot program determining which electrodes receive a portion of the total stimulation output amplitude, and the boot logic being configured to implement a selected set of boot instructions; wherein the pulse memory includes pulse programs, each pulse program having one or more pulse instructions defining pulse components, each pulse component having a pulse type and one or more defining characteristics for that pulse type; wherein the aggregation memory includes aggregation instructions for a plurality of aggregated outputs, each aggregated output pairing a selected set of boot instructions with a selected pulse program and defining a number of repetitions, each aggregation instruction including an aggregation pause setting, and so on. In one step, wherein the aggregation delay setting for each aggregation instruction determines whether the aggregation instruction can be interrupted by another treatment configuration; and wherein the configuration memory defines a plurality of treatment configuration instruction sets, each treatment configuration instruction set having a defined total stimulation output amplitude, and identifies the aggregation instruction set to be executed for each treatment configuration instruction set; wherein the controller is configured to execute the plurality of treatment configuration instruction sets to generate output pulses using a stimulation circuitry system according to instructions from the treatment configuration instruction sets by: initiating the execution of a first treatment configuration instruction set; determining, while executing the first treatment configuration instruction set, that a second treatment configuration instruction set will be executed; (x) determining whether the aggregation delay setting for the ongoing aggregation instruction being executed allows interruption of the ongoing aggregation instruction by the second treatment configuration instruction set, and: if allowed, completing the pulse program of the ongoing aggregation instruction of the first treatment configuration instruction set, and then starting the execution of at least one first aggregation instruction of the second treatment configuration instruction set; or if not allowed, completing the execution of the ongoing aggregation instruction of the first treatment configuration instruction set, and then starting the execution of at least one first aggregation instruction of the second treatment configuration instruction set to be executed.

[0010] Alternatively or alternatively, each pulse component includes a pulse component deferred setting, and the controller is configured to use the pulse component deferred setting of the pulse component to determine that a portion of the first treatment configuration instruction set will be executed before switching to executing a portion of the second treatment configuration instruction set.

[0011] Another illustrative and non-limiting example takes the form of an implantable medical device comprising: a housing including a power supply, a controller, and a stimulation circuitry system; and wires having a plurality of electrodes coupled to the housing such that the stimulation circuitry system can deliver a stimulation pulse pattern to a patient via the electrodes; wherein the controller includes: a memory including a boot memory, an aggregation memory, a pulse memory, and a configuration memory; a plurality of pulse definition circuits, each pulse definition circuit including boot logic, aggregation logic, and pulse logic; wherein the boot memory includes a set of boot instructions for a plurality of boot programs, each boot program determining which electrodes receive a portion of the total stimulation output amplitude, and the boot logic being configured to implement the selected set of boot instructions; wherein the pulse memory includes pulse programs, each pulse program having one or more pulse instructions defining pulse components, each pulse component having a pulse type and one or more defining characteristics for that pulse type, each pulse instruction including a pulse delay setting; wherein the aggregation memory includes a set of aggregation instructions for a plurality of aggregated outputs, each aggregated output... The selected set of guiding instructions is paired with the selected pulse program, and the number of repetitions is defined; wherein, the configuration memory defines multiple treatment configurations, each treatment configuration having a defined total stimulation output amplitude, and identifies the aggregated set of instructions to be executed for each treatment configuration; further wherein, the pulse delay setting of each pulse instruction determines whether the pulse instruction allows concurrent execution of another treatment configuration during the execution of the pulse instruction; and wherein, the controller is configured to execute multiple treatment configurations to generate output pulses using a stimulation circuitry system according to instructions from the treatment configurations by: initiating the execution of a first treatment configuration; receiving a request to start a second treatment configuration while executing the first treatment configuration; in response to the request to start the second treatment configuration, checking the pulse delay setting for the next pulse instruction to be executed in the pulse program, and: if the pulse delay setting of the next pulse instruction allows concurrent treatment by another treatment configuration, then the second treatment configuration begins when the execution of the next pulse instruction begins; or otherwise, waiting at least until the execution of the next pulse instruction is completed before starting the execution of the second treatment configuration.

[0012] Alternatively or concurrently, in response to a request to begin a second treatment configuration, the controller is configured to prevent the initiation of the second treatment configuration until either: a subsequent pulse instruction has a pausing setting that allows concurrent treatment by another treatment configuration; or the controller completes execution of at least the pulse program that was being executed when the request to begin the second treatment configuration was received.

[0013] Alternatively or concurrently, in response to a request to begin a second treatment configuration, the controller is configured to prevent the initiation of the second treatment configuration until either: a subsequent pulse instruction has a deferral setting that allows concurrent treatment by another treatment configuration; or the controller completes execution of at least the aggregate instruction set that was being executed when the request to begin the second treatment configuration was received.

[0014] Alternatively or concurrently, in response to a request to begin a second treatment configuration, the controller is configured to prevent the initiation of the second treatment configuration until either a subsequent pulse instruction has a deferral setting that allows concurrent treatment by another treatment configuration, or the controller completes execution of the first treatment configuration.

[0015] Alternatively, the stimulation circuitry may include multiple digital-to-analog converter circuits, each including a selectable current mirror, and the total output amplitude is defined by the total output current, such that the implantable medical device is configured to deliver current-controlled neural stimulation.

[0016] Alternatively, the pulse definition circuit is coupled to a plurality of digital-to-analog converter (DAC) circuits and configured to instruct a selected DAC circuit among the plurality of DAC circuits to use the total output current and to divide the total output current using a selected set of boot instructions.

[0017] Alternatively, the stimulation circuitry may include multiple switches configured to control which electrodes receive current from multiple digital-to-analog converter circuits, and pulse definition circuitry coupled to the multiple switches and configured to control the multiple switches using a selected set of guiding instructions.

[0018] Further examples may include an implantable deep brain stimulation system or spinal cord stimulation system, comprising: an implantable medical device according to any one of the foregoing examples, and a clinician programmer adapted to communicate with the implantable medical device and to program each of an arbitration mode and a deferred setting stored in the implantable medical device; wherein: for the implantable deep brain stimulation system, the lead is adapted to be placed in the patient's brain; and for the spinal cord stimulation system, the lead is adapted to be placed in the patient's spine.

[0019] Another illustrative and non-limiting example takes the form of an implantable medical device comprising: a housing containing a power supply, a controller, and a stimulation circuitry system; and wires having a plurality of electrodes coupled to the housing such that the stimulation circuitry system can deliver a stimulation pulse pattern to a patient via the electrodes; wherein the controller includes: a memory including a boot memory, a aggregation memory, a pulse memory, and a configuration memory; a plurality of pulse definition circuits, each pulse definition circuit including boot logic, aggregation logic, and pulse logic; wherein the boot memory contains a set of boot instructions for a plurality of boot programs, each boot program determining which electrodes receive a portion of the total stimulation output. The boot logic is configured to implement a selected boot instruction set; wherein the pulse memory contains pulse programs, each pulse program having one or more pulse instructions defining pulse components, each pulse component having a pulse type and one or more defining characteristics for that pulse type; wherein the aggregation memory contains aggregation instructions, each aggregation instruction defining one or more aggregated outputs, each aggregated output pairing the selected boot instruction set with the selected pulse program and defining the number of repetitions for the selected pulse program to execute using the selected boot instruction set; wherein the configuration memory contains multiple treatment configuration instruction sets, each treatment configuration instruction set having a defined total stimulation output. The controller is configured to output amplitude, arbitration mode, and deferred setting, and to identify one or more aggregate instructions to be executed for each treatment configuration; further wherein the arbitration mode defined in the configuration memory for each treatment configuration instruction set determines whether the treatment configuration instruction set will wait for the completion of a portion of another treatment configuration instruction set before initiation, and the deferred setting determines whether the treatment configuration instruction set can be interrupted by another treatment configuration instruction set; and wherein the controller is configured to execute multiple treatment configurations to generate output pulses using the stimulation circuitry system by: initiating the execution of a first treatment configuration instruction set; and, while executing the first treatment configuration instruction set, receiving a signal for executing a second treatment configuration instruction set. The request is to: determine whether the arbitration mode for the second treatment configuration instruction set allows the second treatment configuration instruction set to wait for the completion of a portion of another treatment configuration instruction set; and if not, to initiate the execution of the second treatment configuration instruction set while the first treatment configuration instruction set is being executed; otherwise: determine whether the suspend setting for the first treatment configuration instruction set allows the second treatment configuration instruction set to interrupt the first treatment configuration instruction set; and if so, to complete the ongoing execution of at least a portion of the first treatment configuration instruction set and then begin the execution of the second treatment configuration instruction set; or if not, to complete the execution of the first treatment configuration instruction set before allowing the second treatment configuration instruction set to begin.

[0020] Alternatively or concurrently, if the slack setting for the first treatment configuration instruction set allows interruption of the first treatment configuration instruction set by the second treatment configuration instruction set, then while the second treatment configuration instruction set is being executed, the controller is configured to: determine whether the slack setting for the second treatment configuration instruction set allows interruption of the second treatment configuration instruction set, and if so, interrupt the second treatment configuration instruction set after completing a portion of its execution to execute a portion of the first treatment configuration instruction set.

[0021] Alternatively or alternatively, if the slack setting of the first treatment configuration instruction set and the second treatment configuration instruction set allows interruption of each of the first treatment configuration instruction set and the second treatment configuration instruction set, the controller is configured to alternate between executing a portion of the first treatment configuration instruction set and executing a portion of the second treatment configuration instruction set until all aggregated instructions of one of the first treatment configuration instruction set and the second treatment configuration instruction set are completed.

[0022] Alternatively or concurrently, each aggregation instruction includes an aggregation deferral setting, and the controller is configured to use the aggregation deferral setting of the aggregation instruction to determine a portion of the first treatment configuration instruction set to be executed before switching to executing a portion of the second treatment configuration instruction set.

[0023] Alternatively or alternatively, each pulse component includes a pulse component deferred setting, and the controller is configured to use the pulse component deferred setting of the pulse component to determine a portion of the first treatment configuration instruction set to be executed before switching to executing a portion of the second treatment configuration instruction set.

[0024] Alternatively, the stimulation circuitry may include multiple digital-to-analog converter circuits, each including a selectable current mirror, and the total output amplitude is defined by the total output current, such that the implantable medical device is configured to deliver current-controlled neural stimulation.

[0025] Alternatively, the pulse definition circuit is coupled to a plurality of digital-to-analog converter (DAC) circuits and configured to instruct a selected DAC circuit among the plurality of DAC circuits to use the total output current and to divide the total output current using a selected set of boot instructions.

[0026] Alternatively, the stimulation circuitry may include multiple switches configured to control which electrodes receive current from multiple digital-to-analog converter circuits, and pulse definition circuitry coupled to the multiple switches and configured to control the multiple switches using a selected set of guiding instructions.

[0027] Alternatively or alternatively, the implantable medical device is an implantable deep brain stimulation system comprising: an implantable medical device and a clinician programmer adapted to communicate with the implantable medical device and to program each of an arbitration mode and a deferred setting stored in the implantable medical device; wherein the wires are adapted to be placed in the patient's brain.

[0028] Alternatively or alternatively, the implantable medical device is a spinal cord stimulation system comprising: the implantable medical device and a clinician programmer adapted to communicate with the implantable medical device and to program each of an arbitration mode and a deferred setting stored in the implantable medical device; wherein the wires are adapted to be placed in the patient's spine.

[0029] Another illustrative and non-limiting example takes the form of an implantable medical device comprising: a housing including a power supply, a controller, and a stimulation circuitry system; and wires having a plurality of electrodes coupled to the housing such that the stimulation circuitry system can deliver a stimulation pulse pattern to a patient via the electrodes; wherein the controller includes: a memory including a boot memory, an aggregation memory, a pulse memory, and a configuration memory; a plurality of pulse definition circuits, each pulse definition circuit including boot logic, aggregation logic, and pulse logic; wherein the boot memory includes a set of boot instructions for a plurality of boot programs, each boot program determining which electrodes receive a portion of the total stimulation output amplitude, and the boot logic being configured to implement a selected set of boot instructions; wherein the pulse memory includes pulse programs, each pulse program having one or more pulse instructions defining pulse components, each pulse component having a pulse type and one or more defining characteristics for that pulse type; wherein the aggregation memory includes aggregation instructions for a plurality of aggregated outputs, each aggregated output pairing a selected set of boot instructions with a selected pulse program and defining a number of repetitions, each aggregation instruction including an aggregation pause setting, and so on. In one step, wherein the aggregation delay setting for each aggregation instruction determines whether the aggregation instruction can be interrupted by another treatment configuration; and wherein the configuration memory defines a plurality of treatment configuration instruction sets, each treatment configuration instruction set having a defined total stimulation output amplitude, and identifies the aggregation instruction set to be executed for each treatment configuration instruction set; wherein the controller is configured to execute the plurality of treatment configuration instruction sets to generate output pulses using a stimulation circuitry system according to instructions from the treatment configuration instruction sets by: initiating the execution of a first treatment configuration instruction set; determining, while executing the first treatment configuration instruction set, that a second treatment configuration instruction set will be executed; (x) determining whether the aggregation delay setting for the ongoing aggregation instruction being executed allows interruption of the ongoing aggregation instruction by the second treatment configuration instruction set, and: if allowed, completing the pulse program of the ongoing aggregation instruction of the first treatment configuration instruction set, and then starting the execution of at least one first aggregation instruction of the second treatment configuration instruction set; or if not allowed, completing the execution of the ongoing aggregation instruction of the first treatment configuration instruction set, and then starting the execution of at least one first aggregation instruction of the second treatment configuration instruction set to be executed.

[0030] Alternatively or alternatively, each pulse component includes a pulse component deferred setting, and the controller is configured to use the pulse component deferred setting of the pulse component to determine that a portion of the first treatment configuration instruction set will be executed before switching to executing a portion of the second treatment configuration instruction set.

[0031] Another illustrative and non-limiting example takes the form of an implantable medical device comprising: a housing including a power supply, a controller, and a stimulation circuitry system; and wires having a plurality of electrodes coupled to the housing such that the stimulation circuitry system can deliver a stimulation pulse pattern to a patient via the electrodes; wherein the controller includes: a memory including a boot memory, an aggregation memory, a pulse memory, and a configuration memory; a plurality of pulse definition circuits, each pulse definition circuit including boot logic, aggregation logic, and pulse logic; wherein the boot memory includes a set of boot instructions for a plurality of boot programs, each boot program determining which electrodes receive a portion of the total stimulation output amplitude, and the boot logic being configured to implement the selected set of boot instructions; wherein the pulse memory includes pulse programs, each pulse program having one or more pulse instructions defining pulse components, each pulse component having a pulse type and one or more defining characteristics for that pulse type, each pulse instruction including a pulse delay setting; wherein the aggregation memory includes a set of aggregation instructions for a plurality of aggregated outputs, each aggregated output... The selected set of guiding instructions is paired with the selected pulse program, and the number of repetitions is defined; wherein, the configuration memory defines multiple treatment configurations, each treatment configuration having a defined total stimulation output amplitude, and identifies the aggregated set of instructions to be executed for each treatment configuration; further wherein, the pulse delay setting of each pulse instruction determines whether the pulse instruction allows concurrent execution of another treatment configuration during the execution of the pulse instruction; and wherein, the controller is configured to execute multiple treatment configurations to generate output pulses using a stimulation circuitry system according to instructions from the treatment configurations by: initiating the execution of a first treatment configuration; receiving a request to start a second treatment configuration while executing the first treatment configuration; in response to the request to start the second treatment configuration, checking the pulse delay setting for the next pulse instruction to be executed in the pulse program, and: if the pulse delay setting of the next pulse instruction allows concurrent treatment by another treatment configuration, then the second treatment configuration begins when the execution of the next pulse instruction begins; or otherwise, waiting at least until the execution of the next pulse instruction is completed before starting the execution of the second treatment configuration.

[0032] Alternatively or concurrently, in response to a request to begin a second treatment configuration, the controller is configured to prevent the initiation of the second treatment configuration until either: a subsequent pulse instruction has a pausing setting that allows concurrent treatment by another treatment configuration; or the controller completes execution of at least the pulse program that was being executed when the request to begin the second treatment configuration was received.

[0033] Alternatively or concurrently, in response to a request to begin a second treatment configuration, the controller is configured to prevent the initiation of the second treatment configuration until either: a subsequent pulse instruction has a deferral setting that allows concurrent treatment by another treatment configuration; or the controller completes execution of at least the aggregate instruction set that was being executed when the request to begin the second treatment configuration was received.

[0034] Alternatively or concurrently, in response to a request to begin a second treatment configuration, the controller is configured to prevent the initiation of the second treatment configuration until either a subsequent pulse instruction has a deferral setting that allows concurrent treatment by another treatment configuration, or the controller completes execution of the first treatment configuration.

[0035] Alternatively, the stimulation circuitry may include multiple digital-to-analog converter circuits, each including a selectable current mirror, and the total output amplitude is defined by the total output current, such that the implantable medical device is configured to deliver current-controlled neural stimulation.

[0036] Alternatively, the pulse definition circuit is coupled to a plurality of digital-to-analog converter (DAC) circuits and configured to instruct a selected DAC circuit among the plurality of DAC circuits to use the total output current and to divide the total output current using a selected set of boot instructions.

[0037] Alternatively, the stimulation circuitry may include multiple switches configured to control which electrodes receive current from multiple digital-to-analog converter circuits, and pulse definition circuitry coupled to the multiple switches and configured to control the multiple switches using a selected set of guiding instructions.

[0038] In some examples, the implantable medical device may be part of an implantable deep brain stimulation system, comprising: the implantable medical device and a clinician programmer adapted to communicate with the implantable medical device and to program each of an arbitration mode and a deferred setting stored in the implantable medical device; wherein the wires are adapted to be placed in the patient's brain.

[0039] In some examples, the implantable medical device may be part of a spinal cord stimulation system, comprising: the implantable medical device and a clinician programmer adapted to communicate with the implantable medical device and to program each of an arbitration mode and a deferred setting stored in the implantable medical device; wherein the wires are adapted to be placed in the patient’s spine.

[0040] This overview is intended to provide an introduction to the subject matter of this patent application. It is not intended to provide an exclusive or exhaustive interpretation. Detailed descriptions are included to provide further information about this patent application. Attached Figure Description

[0041] In the accompanying drawings, which are not necessarily drawn to scale, the same reference numerals may describe similar parts in different views. The same reference numerals with different letter suffixes may indicate different instances of similar parts. The drawings generally illustrate the various embodiments discussed in this document by way of example rather than limitation.

[0042] Figure 1 An illustrative stimulus system is shown;

[0043] Figure 2 Additional details of the pulse generator are shown;

[0044] Figure 3 An illustrative prior art arbitration scheme is shown;

[0045] Figure 4 The components or functional blocks of the stimulation control circuit are shown;

[0046] Figure 5 The bootloader is shown;

[0047] Figure 6 Various pulse phase types and illustrative pulse procedures are shown;

[0048] Figure 7 An illustrative aggregation instruction is shown;

[0049] Figure 8 An illustrative treatment configuration with arbitration is shown;

[0050] Figure 9 An illustrative example of arbitration logic is shown;

[0051] Figure 10 An example of defining arbitration at the pulse phase level is shown;

[0052] Figure 11 An example of arbitration control at the pulse procedure level is shown;

[0053] Figure 12 An example of including arbitration control at the aggregation instruction level is shown; and

[0054] Figures 13A to 13D Several examples of arbitration control at the treatment configuration level and aggregation command level are shown. Detailed Implementation

[0055] Figure 1An illustrative stimulation system is shown. An implantable pulse generator (IPG) 10 is operatively linked to a lead 20 having electrodes 22. The lead 20 can be placed at any suitable location, such as sites used in other treatments such as deep brain stimulation (DBS), spinal cord stimulation (SCS), and / or application to any of the vagus nerve, occipital nerve, sacral nerve, digestive / excretory tract, etc.

[0056] For DBS, the IPG 10 can be positioned, for example, in the upper chest of a patient, where the lead 20 (possibly including lead extensions) extends subcutaneously to the patient's head, where a drill hole is prepared to pass through the skull, and then the lead is inserted into the brain near target structures such as the thalamus, subthalamic nucleus, globus pallidus, or other structures. Leads used in DBS may include combinations of segmented electrodes and loop electrodes 22 (if desired), as disclosed in U.S. Patent Nos. 8,483,237 and 8,321,025, the disclosure of which is incorporated herein by reference.

[0057] For SCS, IPG can be located in the hip region (unrestricted), where guides extend, for example, toward the thoracic spine, such that one or more guides 20 are located therein; although Figure 1 A cylindrical conductor 20 with a series of annular electrodes 22 is shown, but for the SCS, a paddle-shaped conductor with side-by-side positioned electrode rows can be used instead. In the SCS, the conductor will be extended near the spine, as disclosed in various ways in U.S. Patent Nos. 6,895,280, 6,181,969, 6,516,227, 6,609,029, 6,609,032, 6,741,892, 7,949,395, 7,244,150, 7,672,734, 7,761,165, 7,974,706, 8,175,710, 8,224,450, and 8,364,278, the disclosure of which is incorporated herein by reference.

[0058] Placement will be intended to bring electrode 22 close to target tissue, such as a neural target. IPG 10 may include a communication circuitry system using, but not limited to, inductive, conductive, optical, Bluetooth, Medradio, or other communication modes, frequencies, and standards to communicate with one or more of the clinician programmer (CP) 12 and the patient remote controller (RC) 14 when implanted. As is known in the art, CP 12 may be used by or under the guidance of a physician to select various treatment parameters. CP 12 may be used to set various arbitration parameters and controls discussed below. RC 14 may be used by the patient, typically to turn treatment on and / or off, to query IPG 10 to determine device status, and sometimes to adjust treatment settings (such as by changing the amplitude of stimulation) or to provide patient feedback (such as by answering a patient questionnaire).

[0059] A charger is shown at 16 and can be used to provide power to the IPG 10 to recharge its battery. Power can be transferred, for example, but not limited to, via inductive coupling between the charger 16 and the IPG 10. The invention is not limited to rechargeable IPG 10 and can also be used with non-rechargeable or "primary cell" IPG 10s, in which case the charger 16 can be omitted. An external test system (ETS) 18 is shown. The ETS 18 can be programmed similarly to the IPG 10, using, for example, CP 12, and controlled using RC 14, if desired. As is known in the art, the ETS 18 can be used to test the efficacy of treatment procedures on a patient after the lead 20 has been implanted and before the permanent IPG 10 has been implanted. The circuitry and methods discussed below can be used in both the ETS 18 and the IPG 10.

[0060] Multiple electrodes 22 can be used to deliver targeted therapy in various ways. For example, in the case of current-controlled therapy, the total amount of current to be delivered via the electrodes can be divided or partitioned between the electrodes to generate an activation volume for therapy and / or define the center point of stimulation using known methods. This can be referred to as current steering. For current steering, the system can have multiple independent current-controlled outputs, sometimes referred to as multiple independent current controls. Voltage-controlled therapy can instead use multiple independent voltage outputs to deliver the therapy, which also allows for a degree of control over the site of treatment being targeted by selective use of the electrodes. While much of the following discussion is in the context of current-controlled stimulation, the concept of arbitration, as discussed herein, can be applied to both current-controlled and voltage-controlled therapy.

[0061] Figure 2Additional details of the pulse generator are shown. The IPG 10 may include separate circuitry, sometimes referred to as an operating circuitry system, including a microcontroller 30 (which may also be implemented as part of a microprocessor, if desired), which controls the operation of the IPG at a higher level. The IPG may include a power source 32, typically a battery (rechargeable or primary, if desired), although some systems may be adapted to operate without a battery by receiving power inductively or via other links (such as radio frequency) and using the received power to deliver treatment without long-term storage.

[0062] A frame for the stimulation circuitry system 34 is also provided, and the frame may include the following regarding... Figure 4 The components and / or functional blocks discussed. At a high level, the stimulation circuitry system 34 may include multiple current sources and sinks (for current-controlled systems; in voltage-controlled systems, multiple voltage sources may be used instead), as well as control circuitry including, for example, one or more analog ASICs, and a switch array that implements boot instructions and / or electrode selection. U.S. Patent 10,716,932 provides illustrative details of both current and planned future embodiments of the stimulation circuitry system 34 and is incorporated herein by reference. IPG 10 will also accommodate multiple blocks of memory, which may take any suitable form, including, for example, but not limited to, RAM, ROM, and / or flash memory.

[0063] IPG 10 may include a conductive housing, which may be used as a return electrode or an unrelated electrode as desired during treatment delivery. Header 38 provides a feedthrough circuitry system that allows IPG 10 to couple to wire 20. Figure 1 ), having a separate electrical connection to each of the electrodes 22. As desired, wire 20 ( Figure 1 It may also include any other components (e.g., sensors and optics), and the head 38 will similarly include electrical connections for such other components. The head 38 and housing provide a hermetically sealed environment for the operating circuit systems 30, 32, 34 and associated memory, all of which can be coupled via various interconnects (wires and / or buses omitted in the figures).

[0064] In some examples of the prior art, multiple programs can be programmed for treatment delivery by the IPG 10. Each program can operate according to a schedule and individual program parameters. The program scheduler can determine whether and when a stored treatment program is requested to be executed, and this can be encoded in stored instructions executed by the microcontroller 30 and / or the stimulation circuitry system 34. When two programs simultaneously request stimulation output, the system can use arbitration to determine which program will output stimulation first.

[0065] Figure 3 An illustrative prior art arbitration scheme is shown. Here, Program 1 provides a biphasic square wave output as shown at 80 and includes a post-stimulation silence (or stillness) period at 82. The prior art arbitration logic enforces a postponement until the silence period at 82 is complete. In the example shown, Program 2 requests the use of the output circuitry to emit a therapeutic pulse, as shown at 84. However, this request is denied because Program 1 is still using the output circuitry system. The arbitration logic enforces a postponement or delay, as shown at 86, and does not allow Program 2 to emit a therapeutic pulse until a later time after the postponement for the silence period 82 expires, as shown at 88. This arbitration logic prevents Program 2 from operating as intended, but defends the output circuitry system against competing commands. As newer circuitry systems and more complex treatment modes / procedures are being investigated, more flexible systems are expected.

[0066] Figure 4 Components or functional blocks of the stimulation control circuitry are shown. The controller 130 includes a memory 100 and multiple pulse definition circuits (PDCs) 110, 120, 122, and 124. Four PDCs 110, 120, 122, and 124 are shown, although any suitable number may be provided. PDC 110 is shown in detail; the other PDCs 120, 122, and 124 may be similar or identical.

[0067] PDC 110 includes boot logic 112, aggregation logic 114, and pulse logic 116, each of which interacts with portions of memory 100. Pulse logic 116 is configured to determine the characteristics of each phase of the pulse to be delivered by the system and references blocks in pulse memory 106 storing selected parameters for a particular pulse phase. Boot logic 112 is configured to determine electrode utilization for the pulse to be delivered by the system and references blocks in boot memory 102 storing selected parameters for a particular boot mode. Aggregation logic 114 is configured to obtain a pairing of pulses with electrode utilizations and references aggregation memory 104 storing selected parameters and definitions for a particular combination. As a result, aggregation logic instructions will operate to instruct pulse logic 116 which portions of pulse memory 106 to access for defining output pulses, while also instructing boot logic 112 which portions of boot memory to use for obtaining electrode utilization instructions. Aggregation logic 114 also determines the sequence and repetition of the output pulses to be used. PDC 110 will determine from configuration memory 108 which aggregation instructions will be used by aggregation logic 114.

[0068] In operation, at specific times, PDC 110 is activated and receives commands for executing a portion of the instructions stored in configuration memory 108, where the relevant address of configuration memory 108 to be executed is identified. The commands received by the PDC may originate from a scheduler, as mentioned above, which may be part of a microcontroller and / or a separate part of the stimulation circuitry system. The address of configuration memory 108 determines which portions of aggregation memory will be executed, while also carrying additional information. Aggregation logic retrieves the identified portions of aggregation memory in the order specified in the configuration memory and uses the retrieved aggregation instructions to instruct boot logic and pulse logic to obtain instructions for booting and pulse from the identified locations in boot memory and pulse memory. The invention illustrates in several examples how arbitration instructions can be incorporated as part of the pulse memory, aggregation memory, and configuration memory, as further detailed below.

[0069] PDC 110 sends control signals to electrode combiner 150, which in turn provides control signals to DAC circuitry 160 and switch matrix 170. DAC circuitry 160 includes multiple current mirrors, referred to as "branches," the number of which determines the resolution of the output signal. Any number of current mirrors can be used. As an illustrative example, the DAC circuitry can be configured with 100 branches, each providing 1% of the total output current, thereby providing 1% resolution relative to the maximum current. Electrode combiner 150 determines how the branches of DAC circuitry 160 will be combined for each active electrode of the device and then instructs switch matrix 170 which switches will be opened or closed to allow combined branches to be output to the electrodes of the device and / or which electrodes 180 will be grounded or open during stimulation output.

[0070] Figure 4 The functional blocks shown can be implemented in a variety of ways. For example, the PDC can take the form of an application-specific integrated circuit (ASIC). For example, there can be a single ASIC that includes all PDC blocks, or there can be a separate ASIC for each PDC. One or more ASICs can include mixed-mode integrated circuits that carry and process both analog and digital signals. Further hardware illustrations and explanations can be found in U.S. Patent 10,716,932, the disclosure of which is incorporated herein by reference.

[0071] Figure 5 The bootloader is shown. The memory can hold any desired number of bootloaders, such as 8, 16, 32, 64, etc., which are shown as bootloaders SP1 to SP2. x As shown in the figure, each initiator has (at least) a memory block for each of the stimulation delivery electrodes in the system. In the illustration, the memory block for the nth electrode includes a polarity definition P. n and current distribution definition CA nThe polarity definition determines whether the stimulus delivery electrode is anode or cathode, and can be a single bit in memory, if desired. If the polarity is defined as anode, cathode, ground, or high impedance (which could mean the electrode is usable for sensing or is in an open circuit), the polarity definition can instead use two bits. Additional bits can be used as desired. Current allocation can use any number of bits of memory; if 1% or higher resolution is desired, 7 or 8 bits can be used for the current allocation per electrode; fewer bits achieve lower resolution. Some examples use selectable resolution, and the bootstrap can store the current allocation for the highest resolution, where the system simply ignores one or more bits to provide lower resolution. Regardless of the details, this illustration shows how each bootstrap can be stored in memory.

[0072] Figure 6 Several pulse phase types and illustrative pulse procedures are shown. The pulse phases in this illustration have four types: stimulus, active recovery, delay, and active delay. A stimulus phase means that current is being sourced and infused by the circuit system, using an amplitude defined by the pulse phase and having a duration or pulse width defined by the pulse phase, and using a polarity defined by the currently used bootstrap (note that aggregation logic defines the pairing of the pulse procedure and the bootstrap). An active recovery phase similarly means that current is being sourced and infused by the circuit system within a duration / pulse width, but in this case, the polarity used for each electrode is opposite to the polarity defined by the currently used bootstrap. A delay phase means that no current is actively sourced or infused by the circuit system during the delay period, and a recovery bit is provided that determines whether the system's electrodes are open or grounded, where grounding the electrodes allows passive recovery. During the delay phase, the stimulus circuit system can be de-energized; an active delay phase is also defined, during which no current is actively sourced or infused, but the stimulus circuit system remains energized using a specified amplitude during the period defined by the active delay. Active delayed phases can be used to prepare for subsequent stimulus phases.

[0073] like Figure 6 As shown in the lower part, the pulse program defines the pulse phases PP1, PP2, ..., PP. n The sequence. Any number of pulse phases can be included in a single pulse program, and any number of pulse programs can be stored in the pulse program memory. An enhancement described further below is the option to include a pause (H / O) setting in each pulse phase, as shown in the figure.

[0074] In some examples, once a pulse program starts, each phase of the pulse program is executed sequentially without any interruption or pause to allow the execution of another pulse program or a pulse phase from another program. This means that once a pulse program starts, it will not stop even if another pulse program or a pulse phase from another program is started on a different PDC. Alternatively or additionally, a pause setting (H / O) can be associated with each individual pulse program as a whole, as shown, thus allowing the pulse program to pause in the middle if another pulse program starts executing and requests a pause.

[0075] Figure 7 Illustrative aggregate instructions are shown. Each aggregate instruction (shown as AG1, AG2, ..., AGN) identifies the bootstrap program (SP_1, SP_2, ..., SP_n) and the pulse program (PP_1, PP_2, ..., PP_n), as well as the number of repetitions of the pulse program to be executed with that aggregate instruction. As illustrated, each aggregate instruction may include a delay setting (H / O), which will be further explained below.

[0076] In some examples, when a given aggregation instruction completes, the PDC executing that aggregation instruction can be paused to allow another PDC (which initiates arbitration and requests a holdoff) to execute a pulse procedure, aggregation instruction, or treatment configuration. That is, a series of aggregation instructions can be interrupted once an aggregation instruction completes and before subsequent aggregation instructions begin. However, in some examples, a block holdoff (BHO) may optionally be included, allowing the first aggregation instruction to be linked to subsequent aggregation instructions for holdoff purposes, as will be explained further below.

[0077] Figure 8 An illustrative treatment configuration with arbitration and linking data is shown. Each treatment configuration defines a total amplitude setting (Amp_1, Amp_2, ..., Amp_n) and the aggregation instructions to be executed in the treatment configuration. In the example shown, start and end aggregation instructions are identified; in other examples, aggregation instructions may be identified individually depending on how the aggregation instruction memory block is organized. In some examples, the arbitration mode may be set at the treatment configuration level.

[0078] review Figures 6 to 8 In such Figure 6 At the pulse phase level or pulse program level shown, and / or as Figure 7 At the aggregation instruction level shown, and / or as... Figure 8The treatment configuration levels shown may include arbitration settings, deferrals, or mode definitions. In some examples, deferrals are set at lower levels (pulse phase, pulse program, and aggregation instructions), and arbitration is enabled by the treatment configuration. In other examples, deferrals and / or arbitration may be omitted at one or more levels. Therefore, Figures 6 to 8 The illustrations may omit deferral or arbitration depending on the specific implementation. Alternatively, arbitration may be globally enabled or disabled, if desired. The following examples illustrate how any of these levels can be used to set arbitration rules for the device.

[0079] In these examples, arbitration being enabled means that a given treatment configuration will operate according to the deferral and arbitration rules applicable to other treatment configurations that also have arbitration enabled. If arbitration is disabled for a treatment configuration, that treatment configuration will operate regardless of any other treatment configurations being used when a non-arbitration treatment configuration is invoked or while a non-arbitration treatment configuration is being executed. Deferral means that while a given pulse, pulse procedure, or aggregation instruction is being executed, it prevents another pulse, pulse procedure, or aggregation instruction from starting execution on another PDC. Several examples are given below.

[0080] Figure 9 An illustrative example of arbitration logic is shown, which is also useful for explaining the concepts of pulse procedures and aggregation instructions. A first output is generated by the device, where arbitration is set to Arb. = 1 at the treatment configuration. The setting of arbitration enabled for the first output means that this output operates in consideration of other outputs in other PDCs. As shown at 212, a second output is requested, and the waveform shown at 214 is: what the second output will do if arbitration for the second output is disabled, or if no other PDC is active when the second output is requested. However, as shown at 212, the second output has arbitration enabled. Requests for the first and second outputs can each originate from the overall scheduler in the device, which determines whether and when each treatment procedure is requested.

[0081] It should be noted that the first output can utilize Figure 3The architecture can be defined in several ways. For example, the first output can be defined as a sequence of three phases 200 (stimulation), 202 (active recovery), and 204 (delay or active delay), which is stored as a single pulse program 206, and the single pulse program 206 is invoked by an aggregation instruction with two repetitions. Alternatively, the first output can be defined as a sequence of nine phases (where the first three phases are the phases located at 200, 202, and 204, and the remaining six phases are obvious from the diagram), which is stored as a single pulse program, which is executed once by the aggregation instruction without repetition. In another alternative, the three aggregation instructions can each direct the execution of the same pulse program without repetition. In yet another alternative, each pulse phase can be a single phase of the pulse program, and the nine aggregation instructions can be executed serially according to the treatment configuration. In another alternative, three treatment configuration procedures can be executed. The first treatment configuration calls a single aggregation instruction that requires a pulse procedure including pulse phases 200, 202, and 204. The second and third treatment configurations are identical to the first treatment configuration. As can be seen, utilizing… Figure 3 The flexible programming approach allows for many different ways to define the same healing pulse pattern. This flexibility means, for example, that the same pulse can be output to different guides (i.e., if three aggregate instructions are used), or pulses can be grouped together to ensure continuous execution (which may be beneficial for burst healing patterns), or, if desired, pulses can be separated from each other by arbitration and deferred as will be shown below.

[0082] There are several additional alternatives for defining the first output, and the above explanation is not exhaustive. The various examples below further detail the different ways to apply arbitration and deferred actions at the levels of pulse phase, pulse procedure, aggregation instructions, and treatment configuration.

[0083] In some examples, when the first output is being executed with Arb. = 1, if 206, 208, and 210 are each part of a single pulse program, the entire sequence of 206, 208, and 210 will be executed without interruption. For such pulse programs, if pausing is enabled, other PDCs executing with a treatment configuration having Arb. = 1 will have to wait until sequences 206, 208, and 210 complete. In the accompanying figure, as shown at 220, another treatment configuration generates a second request to issue a treatment output. Due to the arbitration setting and pausing of the first output, as shown at 222, the second request is subject to pausing until the third iteration at 210 is completed.

[0084] If the first output is generated based on a single aggregation instruction, where each of 206, 208, and 210 is a separate iteration of a repeated single impulse procedure, with pause set to 1 in that aggregation instruction, the result will be the same as when only a single impulse procedure exists. The first output can instead be generated using three aggregation instructions, allowing for different boot configurations for each of output blocks 206, 208, and 210; the impulse procedure for each aggregation instruction can be the same or different if desired. Block pauses can be used to chain aggregation instructions and ensure that the outputs occur in the desired sequential order without interruption. However, omitting block pauses for the three aggregation instructions will allow interruption by a second request at time 226, and subsequent execution of the aggregation instructions for output blocks 208 and 210 will be subject to any arbitration and pause settings of the second request.

[0085] On the other hand, if the first output is an aggregation instruction, and each of 206, 208, and 210 is a separate iteration of a single impulse program, and there is no deferred execution in that aggregation instruction, then the second request will instead be satisfied starting from time 226. That is, once the first iteration of the aggregation program's execution of the impulse program is completed, the deferred execution enforced by impulse program 206 will end, and the second request can be satisfied. Therefore, it can be seen that control can be managed based on multiple rules operating at multiple levels.

[0086] Figure 10 An example of defining a pause at the pulse phase level is shown. A pulse program with three phases is shown at 250: stimulation phase 252, delay phase 254, and active recovery phase 256. Active recovery phase 256 has a pause set to zero, while the other two phases 252 and 254 have pauses set to 1, meaning neither can be interrupted by a second treatment configuration requesting treatment or by the program. In this illustration, as shown at 260, pulse program 250 has started execution but has not yet completed when a request is received from another treatment configuration (as indicated at 262). Since the arbitration mode for the second output is set to 1, the internal pause setting for the first output is considered next. Here, the aggregation instruction has pause = 0 (not shown), and therefore the pulse program pauses control. The pauses for stimulation pulse 260 and the subsequent delay period are shown at 252 and 254, both set to 1. This means that request 262 is not immediately satisfied and must wait. As indicated at 256, the pausing setting for active recovery pulse 268 is set to zero, thus allowing request 262, and in this example, the pulse at 266 is initiated simultaneously with the execution of recovery pulse 268.

[0087] In some examples, the aggregation instruction is configured to execute the entire pulse program 250 once it begins. This would mean that, as shown, each recovery pulse 268 of the first output and the second output are executed simultaneously. In an alternative example, the aggregation instruction can instead be configured to allow the pulse program to be interrupted if the pulse phase with delay = 0 is preserved when the second output with delay = 1 begins execution; if this is the case, the active recovery 268 will be delayed, as indicated at 272, and executed later, as shown at 276. If pulse program splitting is to be allowed by the aggregation instruction, the aggregation instruction can have three delay settings:

[0088] Aggregation instruction deferred = 0 — Once started, the full pulse program will be executed; this deferred period is defined by the pulse program.

[0089] Aggregation command postponed = 1 — Execute the full pulse procedure and repeat, and postpone any treatments on other PDCs until the aggregation command is completed;

[0090] Aggregation instruction pause = 2 — Start the pulse routine; this pause is defined by the pulse routine; and if another PDC requests a pause, the pulse routine is allowed to be interrupted.

[0091] The splitting of the pulse program is optional.

[0092] Some examples include additional rules when configuring pulse program 250. If the pause setting for a pulse instruction is set to zero / off, all subsequent pulse instructions in the pulse program will also be automatically set to zero. Otherwise, the opposite instruction may appear in the pulse program, where the ongoing pulse in the pulse program at 250 will request a pause, while the second output has already begun execution.

[0093] Figure 11 An example of pausing at the aggregation command level is shown. A pulse program 280 with three phases is shown: a stimulus phase, a delay phase, and an active recovery phase. H / O settings are also shown. Figure 10 The same applies in the previous case, where the stimulation phase and delayed phase have a pause = 1, and the active recovery phase has a pause = 0. However, in this case, the aggregation instruction 282 determines each of the initiation procedure, pulse procedure, repetition, and pause settings. As shown at 284, the aggregation instruction 282 has a pause = 1. As a result, the entire execution of the aggregation instruction 282 is subject to the pause of any other treatment configuration until the aggregation instruction is completed, regardless of the pause setting in each phase of the pulse procedure.

[0094] exist Figure 11In the lower diagram, aggregation instruction 282 initiates the execution of pulse program 280 using pulse 290. While pulse 290 is in progress, request 292 comes from another treatment configuration to initiate the pulse program / phase. Because aggregation instruction postponement = 1, the entire aggregation instruction, including the entire pulse program, is completed before request 292 can be satisfied. As a result, request 292 is postponed, as indicated at 294, and then satisfied, as shown at 296.

[0095] Figure 11 The aggregation instruction 280 in the code is not repeated. Figure 12 An example of applying a pause to repetition at the aggregation instruction is shown. Figure 12 In the middle, the pulse program PP is shown at 300. y It has four phases (stimulus, delay, active recovery, and delay), each with a pause setting. The aggregation instruction AG1 is shown at 302, which has a bootstrap program SP_1 and a pointer to PP. y The pulse program's pointer, single repetition, and delay = 1. Setting delay = 1 means that during the execution of AG1, no other pulse program can interrupt the completion of the aggregation instruction.

[0096] Figure 11 The lower diagram illustrates how AG1 will be executed. As shown at 310, the first execution begins, preceding the repetition at 312, with a positive pulse, delay, active recovery, and further delay. During the first execution of AG1 310, a request is received to begin another pulse procedure or treatment configuration, as indicated at 320. Because AG1 has arbitration mode = 1, request 320 is rejected until AG1 completes, including the first iteration of pulse procedure 300 shown at 310 and the repetition or second iteration shown at 312. This delay 322 then allows the requested pulse procedure execution to occur after AG1 completes, as shown at 324. It should be noted that in this example, the delay setting of the pulse phase is not relevant due to the delay enforced at the aggregation instruction level.

[0097] A "burst" is a series of pulses delivered at the repetition rate of the first pulse, followed by a relatively long pause before the next series of pulses occurs. In the field of neuromodulation, there is considerable interest in burst therapy. Structurally, Figure 12 The content shown can be very useful in ensuring that sudden stimuli (if implemented as repetitive aggregate instructions) can be executed as a whole without interruption.

[0098] In further explanation, the deferral settings for aggregation instructions can include more than two values. For example:

[0099] Aggregation instruction deferred = 0 — Once started, the full pulse program will be executed; this deferred period is defined by the pulse program.

[0100] Aggregate instruction postponed = 1 — Execute the complete pulse procedure and repeat, and postpone any other arbitration requests until the aggregate instruction is completed;

[0101] Aggregation instruction pause = 2 — Start the pulse routine; this pause is defined by the pulse routine; and if another PDC requests a pause, the pulse routine can be interrupted;

[0102] Aggregation instruction pause = 3 — Once started, the full pulse program is executed; interruptions between repetitions are allowed.

[0103] Other methods may be used as desired. Figures 13A to 13D The diagram shows a higher-level arbitration setting at the treatment configuration level.

[0104] Figure 13A A treatment configuration 350 is shown configured to execute three aggregate instructions 352, wherein the first aggregate instruction has one repetition of a first pulse program (the bootstrap instruction is not shown, but will also be part of each aggregate instruction). The second aggregate instruction has no repetition, and the third aggregate instruction requires two repetitions. During the execution of the first aggregate instruction, while the repetition of the pulse program is in progress, a request 356 is received to initiate the execution of a second treatment configuration 360. However, because the postponement for the first treatment configuration 350 is 1, the second treatment configuration 360 is subject to a postponement 358 until the first treatment configuration 350 has completed execution.

[0105] Figure 13A Can be with Figure 13B Make a favorable comparison. Figure 13BIn this case, treatment configuration 370 has a delay = 0, meaning the treatment configuration can be interrupted before completion. While the first aggregation instruction 372 is being executed, and during the repetition of pulse program 374, a request to execute the second treatment configuration is received at 376. The ongoing pulse program at 374 then completes (e.g., by default rules that pulse programs must be allowed to complete, or because the delay = 1 for the remaining phase of the first aggregation instruction 372 or the ongoing pulse program 374, or because the ongoing pulse program 374 is executing its last phase when the request is received at 376). Because the first treatment configuration 370 has a delay = 0, interruption is allowed, and the second treatment configuration 380 begins. The second treatment configuration is shown as having arbitration = 1, meaning it will wait until execution is allowed by arbitration logic, and a delay = 1, thus preventing interruption once started. As a result, the complete second treatment configuration 380, including each aggregation instruction 382 and each pulse program 384, is executed before returning to the first treatment configuration to complete the remaining aggregation instructions 386 and their pulse programs.

[0106] It should also be noted that when control is transferred to the second treatment configuration for execution, the next aggregation instruction in the first treatment configuration becomes the source of request 390 for interrupting the second treatment configuration. Figure 13C Another example is shown where both treatment configurations have Pause = 0. Although not indicated in the figure, Figure 13C Each aggregation instruction in the process has a deferred value of 1. The first treatment configuration 400 begins execution and receives a request at 404 to begin execution of the second treatment configuration. This request 404 is not immediately satisfied but waits for the completion of the first aggregation instruction of the first treatment configuration 400. The second treatment configuration 402 then interrupts execution of the first treatment configuration 400. Due to this interruption, the first treatment configuration issues a request at 406 to execute its next aggregation instruction, but this is rejected until the first aggregation instruction of the second treatment configuration 402 completes, because, as shown, aggregation instruction AG4 has a deferred value of 1, as previously described.

[0107] Because the second treatment configuration has a pause = 0, after completing the first aggregation instruction of the second treatment configuration 402, the system switches back to executing the next aggregation instruction of the first treatment configuration 400. When the second treatment configuration 402 is interrupted, another request is generated at 408 to continue the next aggregation instruction of the second treatment configuration 402. This request is not satisfied until the second aggregation instruction of the first treatment configuration 400 is completed. Therefore, the system switches back and forth between the two treatment configurations. For clarity, it should be noted that each of treatment configurations 400 and 402 will be executed on a different PDC.

[0108] If desired, the treatment configuration can be divided into multiple parts by allowing switching back and forth without completing the aggregation command, such as Figure 13D As shown. In Figure 13D In the example, each aggregation instruction has a pause = 0, except for AG3 of the first treatment configuration 420 (which is shown with a pause = 1). As a result, the aggregation instruction AG4 of the second treatment configuration executes one pulse program iteration at a time and waits for the repeated pulse program PP4 until control returns from the first treatment configuration 420. Therefore, as shown, control shifts back and forth as indicated by the multiple arrows 424, 426, 428, and 430 in the middle of the table. However, when control shifts as shown at 432, the AG3 setting of arbitration = 1 causes each of these pulse programs to be executed before the system switches back to executing the remainder of the second treatment configuration at 434. If Figure 13D The pulse phase of various pulse programs is set to delay = 0, so the execution of aggregation instructions and pulse programs can overlap, thereby further compressing the treatment time.

[0109] Each of these non-limiting examples can exist independently or can be combined with one or more other examples in various permutations or combinations. The above detailed description includes reference to the accompanying drawings, which form part of the detailed description. The drawings illustrate specific embodiments by way of illustration. These embodiments are also referred to herein as “examples.” Such examples may include elements other than those shown or described. However, the inventors also contemplate examples in which only those elements shown or described are provided. Furthermore, the inventors contemplate examples of any combination or permutation using those elements (or one or more aspects thereof) shown or described, whether relative to a particular example (or one or more aspects thereof) or relative to other examples (or one or more aspects thereof) shown or described herein.

[0110] In the event of any inconsistency in usage between this document and any other document incorporated by reference, the usage in this document shall prevail. In this document, the terms “a” or “an” are used (as is common in patent documents) to include one or more, independent of any other instances or usages of “at least one” or “one or more.” Furthermore, in the claims, the terms “first,” “second,” and “third,” etc., are used merely as labels and are not intended to impose a quantity requirement on their objects.

[0111] The method examples described herein may be implemented, at least in part, by a machine or computer. Some examples may include computer-readable or machine-readable media encoded with instructions operable to configure an electronic device to perform the methods described in the examples above. Implementations of such methods may include code, such as microcode, assembly language code, high-level language code, or similar code. This code may include computer-readable instructions for performing various methods. This code may form part of a computer program product. Furthermore, in the examples, the code may be tangibly stored on one or more volatile, non-transient, or non-volatile tangible computer-readable media, such as during execution or at other times. Examples of such tangible computer-readable media may include, but are not limited to, hard disks, removable disks or optical discs, magnetic tape cassettes, memory cards or memory sticks, random access memory (RAM), read-only memory (ROM), and the like.

[0112] The above description is intended to be illustrative and not restrictive. For example, the examples (or one or more aspects thereof) described above may be used in combination with each other. Other embodiments may be used by those skilled in the art upon review of the above description. The abstract is provided to comply with 37 CFR §1.72(b) to allow the reader to quickly ascertain the nature of the technical disclosure. The abstract is provided for the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

[0113] Furthermore, in the detailed description above, various features may be combined to streamline the disclosure. This should not be construed as making any unclaimed disclosed feature essential to any claim. Rather, the subject matter of innovation may lie in fewer than all features of a particular disclosed embodiment. Therefore, the following claims are thus incorporated into the detailed description as examples or embodiments, wherein each claim stands alone as a separate embodiment, and it is contemplated that such embodiments may be combined with each other in various combinations or arrangements. The scope of protection should be determined with reference to the appended claims and the full scope of their equivalents.

Claims

1. An implantable medical device, the implantable medical device comprising: The housing (10) includes a power supply (32), a controller (30, 130), and a stimulation circuit system (34, 150). as well as A wire (20) having a plurality of electrodes (22) coupled to the housing, such that the stimulation circuitry system can deliver a stimulation pulse pattern to the patient via the electrodes; wherein the controller includes: The memory (100) includes a boot memory (102), a aggregation memory (104), a pulse memory (106), and a configuration memory (108). Multiple pulse definition circuits (110, 120, 122, 124), each pulse definition circuit including boot logic (112), aggregation logic (114) and pulse logic (116). The boot memory contains a set of boot instructions for multiple boot programs, each boot program determining which electrodes among the electrodes receive a portion of the total stimulation output, and the boot logic is configured to implement the selected set of boot instructions. The pulse memory contains pulse programs, each pulse program having one or more pulse instructions defining pulse components, and each pulse component having a pulse type and one or more defining characteristics for the pulse type. The aggregation memory contains aggregation instructions, each aggregation instruction defining one or more aggregated outputs, each aggregated output pairing a selected boot instruction set with a selected pulse program, and defining the number of repetitions for the selected pulse program to execute using the selected boot instruction set; The configuration memory contains multiple treatment configuration instruction sets, each of which has a defined total stimulation output amplitude, arbitration mode, pause setting, and identifies one or more aggregate instructions to be executed for each treatment configuration. Furthermore, the arbitration mode defined in the configuration memory for each treatment configuration instruction set determines whether the treatment configuration instruction set will wait for a portion of another treatment configuration instruction set to complete before startup, and the deferral setting determines whether the treatment configuration instruction set can be interrupted by another treatment configuration instruction set; and The controller is configured to execute the plurality of treatment configurations to generate output pulses using the stimulation circuitry system in the following manner: Initiate the execution of the first treatment configuration instruction set; While executing the first treatment configuration instruction set, a request is received for executing the second treatment configuration instruction set; Determine whether the arbitration mode for the second treatment configuration instruction set allows the second treatment configuration instruction set to wait for the completion of a portion of another treatment configuration instruction set. If not, then while the first treatment configuration instruction set is being executed, initiate the execution of the second treatment configuration instruction set; otherwise: Determine whether the postponement setting for the first treatment configuration instruction set allows interruption of the first treatment configuration instruction set by the second treatment configuration instruction set, and: If permitted, complete the ongoing execution of at least a portion of the first treatment configuration instruction set, and then begin the execution of the second treatment configuration instruction set; or If not allowed, the execution of the first treatment configuration instruction set shall be completed before the second treatment configuration instruction set is allowed to begin.

2. The implantable medical device according to claim 1, wherein, If the slack setting for the first treatment configuration instruction set allows interruption of the first treatment configuration instruction set by the second treatment configuration instruction set, then while the second treatment configuration instruction set is being executed, the controller is configured to: determine whether the slack setting for the second treatment configuration instruction set allows interruption of the second treatment configuration instruction set, and if so, interrupt the second treatment configuration instruction set after completing a portion of its execution to execute a portion of the first treatment configuration instruction set.

3. The implantable medical device according to claim 1, wherein, If the slack setting of the first treatment configuration instruction set and the second treatment configuration instruction set allows interruption of each of the first treatment configuration instruction set and the second treatment configuration instruction set, then the controller is configured to alternate between executing a portion of the first treatment configuration instruction set and executing a portion of the second treatment configuration instruction set until all aggregated instructions of one of the first treatment configuration instruction set and the second treatment configuration instruction set are completed.

4. The implantable medical device according to any one of claims 1 to 3, wherein: Each aggregation instruction includes an aggregation delay setting, and the controller is configured to: use the aggregation delay setting of the aggregation instruction to determine a portion of the first treatment configuration instruction set to be executed before switching to executing a portion of the second treatment configuration instruction set.

5. The implantable medical device according to any one of claims 1 to 4, wherein: Each pulse component includes a pulse component deferred setting, and the controller is configured to: use the pulse component deferred setting of the pulse component to determine a portion of the first treatment configuration instruction set to be executed before switching to executing a portion of the second treatment configuration instruction set.

6. An implantable medical device, said implantable medical device comprising: The housing (10) includes a power supply (32), a controller (30, 130), and a stimulation circuit system (34, 150). as well as A wire (20) having a plurality of electrodes (22) coupled to the housing, such that the stimulation circuitry system can deliver a stimulation pulse pattern to the patient via the electrodes; wherein the controller includes: The memory (100) includes a boot memory (102), a aggregation memory (104), a pulse memory (106), and a configuration memory (108). Multiple pulse definition circuits (110, 120, 122, 124), each pulse definition circuit including boot logic (112), aggregation logic (114) and pulse logic (116). The boot memory contains a set of boot instructions for multiple boot programs, each boot program determining which electrodes among the electrodes receive a portion of the total stimulus output amplitude, and the boot logic is configured to implement the selected set of boot instructions. The pulse memory contains pulse programs, each pulse program having one or more pulse instructions defining pulse components, and each pulse component having a pulse type and one or more defining characteristics for the pulse type. The aggregation memory contains aggregation instructions for multiple aggregated outputs, each aggregated output pairing a selected set of boot instructions with a selected pulse program and defining a number of repetitions. Each aggregation instruction includes an aggregation delay setting, further wherein the aggregation delay setting for each aggregation instruction determines whether the aggregation instruction can be interrupted by another treatment configuration; and The configuration memory defines multiple treatment configuration instruction sets, each with a defined total stimulation output amplitude, and identifies the aggregate instruction set to be executed for each treatment configuration instruction set. The controller is configured to execute the plurality of treatment configuration instruction sets to generate output pulses using the stimulation circuitry system according to instructions from the treatment configuration instruction sets: Initiate the execution of the first treatment configuration instruction set; When executing the first treatment configuration instruction set, it is determined that the second treatment configuration instruction set will be executed; (x) Determine whether the aggregation pause setting for the ongoing aggregation instruction being executed allows interruption of the ongoing aggregation instruction by the second treatment configuration instruction set, and: If permitted, the execution of the pulse program of the ongoing aggregate instruction set of the first treatment configuration instruction set is completed, and then the execution of at least one first aggregate instruction of the second treatment configuration instruction set begins; or If not allowed, the execution of the ongoing aggregate instruction set of the first treatment configuration instruction set is completed, and then the execution of at least one first aggregate instruction of the second treatment configuration to be executed is initiated.

7. The implantable device according to claim 6, wherein: Each pulse component includes a pulse component deferred setting, and the controller is configured to: use the pulse component deferred setting of the pulse component to determine a portion of the first treatment configuration instruction set to be executed before switching to executing a portion of the second treatment configuration instruction set.

8. An implantable medical device, said implantable medical device comprising: The housing (10) includes a power supply (32), a controller (30, 130), and a stimulation circuit system (34, 150). as well as A wire (20) having a plurality of electrodes (22) coupled to the housing, such that the stimulation circuitry system can deliver a stimulation pulse pattern to the patient via the electrodes; wherein the controller includes: The memory (100) includes a boot memory (102), a aggregation memory (104), a pulse memory (106), and a configuration memory (108). Multiple pulse definition circuits (110, 120, 122, 124), each pulse definition circuit including boot logic (112), aggregation logic (114) and pulse logic (116). The boot memory contains a set of boot instructions for multiple boot programs, each boot program determining which electrodes among the electrodes receive a portion of the total stimulus output amplitude, and the boot logic is configured to implement the selected set of boot instructions. The pulse memory contains pulse programs, each pulse program having one or more pulse instructions defining pulse components, each pulse component having a pulse type and one or more defining characteristics for the pulse type, and each pulse instruction including a pulse delay setting. The aggregation memory contains an aggregation instruction set for multiple aggregated outputs, each aggregated output pairing a selected boot instruction set with a selected pulse program and defining the number of repetitions; The configuration memory defines multiple treatment configurations, each with a defined total stimulation output amplitude, and identifies the aggregate instruction set to be executed for each treatment configuration. Furthermore, the pulse delay setting for each pulse instruction determines whether the pulse instruction allows concurrent execution of another treatment configuration during the execution of the pulse instruction; and The controller is configured to execute the plurality of treatment configurations to generate output pulses using the stimulation circuitry system according to instructions from the treatment configurations in the following manner: Initiate the execution of the first treatment configuration; While executing the first treatment configuration, a request to start the second treatment configuration is received; In response to a request to begin the second treatment configuration, the pulse delay setting for the next pulse instruction to be executed in the pulse program is checked, and: If the pulse delay setting of the next pulse instruction allows concurrent treatment by another treatment configuration, then the second treatment configuration begins when the execution of the next pulse instruction begins; or Otherwise, wait at least until the execution of the next pulse instruction is completed before starting the execution of the second treatment configuration.

9. The implantable medical device according to claim 8, wherein, In response to a request to begin the second treatment configuration, the controller is configured to prevent the initiation of the second treatment configuration until any of the following occurs: Subsequent pulse commands have a delay setting that allows concurrent treatment by another treatment configuration; or The controller completes the execution of at least the pulse program that is being executed when a request is received to begin the second treatment configuration.

10. The implantable medical device according to claim 8, wherein, In response to a request to begin the second treatment configuration, the controller is configured to prevent the initiation of the second treatment configuration until any of the following occurs: Subsequent pulse commands have a delay setting that allows concurrent treatment by another treatment configuration; or The controller completes the execution of at least the aggregated instruction set that is being executed when a request is received to begin the second treatment configuration.

11. The implantable medical device according to claim 8, wherein, In response to a request to begin the second treatment configuration, the controller is configured to prevent the initiation of the second treatment configuration until any of the following occurs: Subsequent pulse commands have a delay setting that allows concurrent treatment by another treatment configuration; or The controller executes the first treatment configuration.

12. The implantable medical device according to any one of claims 1 to 11, wherein, The stimulation circuitry includes multiple digital-to-analog converter circuits, each including a selectable current mirror, and the total output amplitude is defined by the total output current, such that the implantable medical device is configured to deliver current-controlled neurostimulation.

13. The implantable medical device according to claim 12, wherein, The pulse definition circuit is coupled to the plurality of digital-to-analog converter circuits and is configured to instruct a selected digital-to-analog converter circuit among the plurality of digital-to-analog converter circuits to use the total output current and to divide the total output current using a selected set of boot instructions.

14. The implantable medical device according to any one of claims 12 to 13, wherein, The stimulation circuitry includes multiple switches configured to control which electrodes receive current from the multiple digital-to-analog converter circuits, and a pulse definition circuit is coupled to the multiple switches and configured to control the multiple switches using a selected set of guiding instructions.

15. An implantable deep brain stimulation system or spinal cord stimulation system, comprising: The implantable medical device according to any one of claims 1 to 14, and the clinician programmer, the clinician programmer being adapted to communicate with the implantable medical device and to program each of an arbitration mode and a deferred setting stored in the implantable medical device; wherein: For implantable deep brain stimulation systems, the leads are suitable for placement in the patient's brain; and For spinal cord stimulation systems, the leads are designed to be placed in the patient's spine.

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