Packet capture data acquisition method and computing device

Abstract

The embodiment of the invention provides a packet capture data acquisition method and computing equipment, and in the method, peripheral component interconnect express (PCIE) equipment is connected with an equipment manager through an improved integrated circuit bus I3C interface. And the PCIE device obtains the packet capture data and sends the packet capture data to the device manager through the I3C interface, so that the device manager determines a link analysis result according to the packet capture data. Through the above mode, the development cost is reduced, the acquisition efficiency of the packet capture data is improved, and the link analysis efficiency is further improved.

Description

Technical Field

[0001] This application relates to the field of computing device technology, and in particular to a method for acquiring packet capture data and a computing device. Background Technology

[0002] In related technologies, some Peripheral Component Interconnect Express (PCIe) devices have packet capture capabilities. Parsing tools on the operating system within the central processing unit can acquire packet capture data sent by the PCIe device, analyze the captured data, and obtain link analysis results.

[0003] However, in related technologies, different parsing tools need to be developed for different operating systems, which leads to high development costs for the methods in these technologies. Summary of the Invention

[0004] This application provides a method and computing device for acquiring packet capture data, which reduces development costs, thereby improving the efficiency of acquiring packet capture data and thus improving the efficiency of link analysis.

[0005] In a first aspect, embodiments of this application provide a method for acquiring packet capture data, applied to a PCIe device (PCIe Component Interconnect), wherein the PCIe device is connected to a device manager via an improved integrated circuit bus (I3C) interface; the method includes:

[0006] Obtain packet capture data;

[0007] Packet capture data is sent to the device manager via the I3C interface, so that the device manager can determine the link analysis results based on the packet capture data.

[0008] In this scheme, PCIe devices can connect to the Device Manager via the I3C interface. The PCIe devices can acquire packet capture data and send it to the Device Manager via the I3C interface, allowing the Device Manager to determine the link analysis results based on the packet capture data. This out-of-band (PCIe device to Device Manager) packet capture data acquisition method avoids reliance on the central processing unit's operating system, thus avoiding the need to develop different parsing tools for different operating systems, reducing development costs, improving the efficiency of packet capture data acquisition, and consequently improving the efficiency of link analysis based on packet capture data.

[0009] In one implementation, the PCIe device includes at least one port; packet capture data is sent to the device manager via the I3C interface, including:

[0010] The device receives write operation commands sent by the device manager via the I3C interface; the write operation command includes port information of the target port; the target port belongs to at least one port.

[0011] Receive read operation commands sent by the device manager via the I3C interface;

[0012] In response to the read operation command, the system determines the packet capture data based on the port information of the target port and sends the packet capture data to the device manager via the I3C interface.

[0013] In this scheme, the PCIe device can receive write operation commands sent by the Device Manager through the I3C interface. These write operation commands include port information for the target port, which must be at least one port. The PCIe device can also receive read operation commands from the Device Manager through the I3C interface. In response to a read operation command, the PCIe device can determine the packet capture data based on the target port information and send the captured data to the Device Manager through the I3C interface. In other words, the Device Manager can proactively acquire the packet capture data obtained by the PCIe device through the I3C interface using a write-then-read approach. This out-of-band (PCIe device and Device Manager) packet capture data acquisition method avoids reliance on the central processing unit's operating system, thus avoiding the need to develop different parsing tools for different operating systems, reducing development costs, improving the efficiency of packet capture data acquisition, and consequently improving the efficiency of link analysis based on packet capture data.

[0014] In one implementation, before receiving the write operation command sent by the device manager via the I3C interface, the method further includes:

[0015] The packet capture data acquisition command sent by the device manager is received via the I3C interface; the packet capture data acquisition command includes a target command word; the target command word indicates that the packet capture data acquisition command is used to acquire packet capture data;

[0016] In response to the packet capture data acquisition command, a first response message is sent to the device manager via the I3C interface; among them, the write operation command is sent by the device manager via the I3C interface in response to the first response message.

[0017] In this scheme, the PCIe device can receive packet capture data acquisition commands sent by the Device Manager via the I3C interface. These commands include a target command word, indicating that the packet capture data acquisition command is used to acquire packet data. In response to the packet capture data acquisition command, the PCIe device can send a first response message to the Device Manager via the I3C interface; the write operation command is sent by the Device Manager in response to the first response message via the I3C interface. This method of the Device Manager requesting the PCIe device to report packet capture data avoids reliance on the central processing unit's operating system, thus avoiding the need to develop different parsing tools for different operating systems, reducing development costs, improving the efficiency of packet capture data acquisition, and consequently improving the efficiency of link analysis based on packet capture data.

[0018] In one implementation, packet capture data is determined based on the target port's port information and sent to the device manager via the I3C interface, including:

[0019] Determine whether there is packet capture data in at least one packet capture data stored in the PCIe device that matches the port information of the target port;

[0020] If packet capture data matching the port information of the target port exists, send the packet capture data matching the port information of the target port to the device manager via the I3C interface; or,

[0021] If no packet capture data matches the port information of the target port, an indication message is sent to the device manager via the I3C interface; the indication message indicates that no packet capture data matches the port information of the target port.

[0022] In this scheme, if packet capture data matching the target port's port information exists, the PCIe device can send the captured data to the device manager via the I3C interface. Conversely, if no packet capture data matching the target port's port information exists, the PCIe device can send an indication message to the device manager via the I3C interface, indicating that no packet capture data matching the target port's port information is found. This allows the device manager to promptly monitor whether the PCIe device has acquired packet capture data, improving the device manager's management capabilities over PCIe devices and consequently enhancing the operational efficiency of the computing device (the computing device containing the PCIe device).

[0023] In one implementation, the port information of the target port includes the port number and port type of the target port.

[0024] In this scheme, the target port information can include the target port number and the target port type. This method allows PCIe devices to accurately determine the packet capture data of the target port required by the Device Manager, thereby improving the accuracy of the link analysis results obtained by the Device Manager and ultimately enhancing the operational efficiency and maintainability of PCIe devices.

[0025] In one implementation, packet capture data is sent to the device manager via the I3C interface, including:

[0026] Send an interrupt request to the device manager via the I3C interface;

[0027] The device receives a second response message from the device manager via the I3C interface; the second response message is sent by the device manager in response to the interrupt request via the I3C interface.

[0028] In response to the second response information, interrupt data is sent to the device manager via the I3C interface; the interrupt data includes packet capture data.

[0029] In this scheme, the PCIe device can acquire packet capture data. The PCIe device can send an interrupt request to the Device Manager via the I3C interface. In response to the interrupt request, the Device Manager can send a second response message to the PCIe device via the I3C interface. The PCIe device can then respond to the second response message and send interrupt data to the Device Manager via the I3C interface. This interrupt data includes packet capture data. Through this method, the slave device (PCIe device) on the I3C network can proactively send packet capture data to the master device (Device Manager) on the I3C network using the interrupt mechanism in the I3C protocol. This enables the PCIe device to acquire and send packet capture data to the Device Manager in real time, improving the efficiency of the Device Manager in acquiring packet capture data.

[0030] In one implementation, the interrupt data includes required data bytes; the required data bytes include an interrupt group number and an interrupt number; the interrupt group number and the interrupt number indicate the interrupt operation corresponding to the interrupt data, which is the interrupt operation for transmitting packet capture data.

[0031] This solution uses interrupt data, including required data bytes, and these required data bytes contain the interrupt group number and interrupt number. This indicates that the interrupt operation is for transmitting captured packet data, allowing the device manager to recognize the captured data. By using the interrupt group number and interrupt number reserved in the I3C protocol specification to extend functionality and implement the method of indicating captured packet data, the cost is low and the implementation difficulty is relatively simple.

[0032] Secondly, embodiments of this application provide a method for acquiring packet capture data, applied to a device manager, which is connected to a PCIe device via an improved integrated circuit bus I3C interface; the method includes:

[0033] Receive packet capture data sent by PCIe devices via the I3C interface;

[0034] Based on the packet capture data, determine the link analysis results.

[0035] In this scheme, PCIe devices can connect to the Device Manager via the I3C interface. The PCIe devices can then send packet capture data to the Device Manager via the I3C interface. The Device Manager determines the link analysis results based on the packet capture data. This out-of-band (PCIe device to Device Manager) packet capture data acquisition method avoids reliance on the central processing unit's operating system, thus avoiding the need to develop different parsing tools for different operating systems, reducing development costs, improving the efficiency of packet capture data acquisition, and consequently improving the efficiency of link analysis based on packet capture data.

[0036] In one implementation, the PCIe device includes at least one port; packet capture data sent by the PCIe device is received via the I3C interface, including:

[0037] Send a write operation command to the PCIe device via the I3C interface; the write operation command includes port information of the target port; the target port belongs to at least one port;

[0038] Send read operation commands to the PCIe device via the I3C interface;

[0039] The system receives packet capture data sent by PCIe devices via the I3C interface. The packet capture data is determined by the PCIe device in response to a read operation command, based on the port information of the target port. The packet capture data is sent by the PCIe device through the I3C interface.

[0040] In this scheme, the Device Manager can send write operation commands to the PCIe device via the I3C interface. The write operation command includes port information of the target port, which must belong to at least one port. The Device Manager can also send read operation commands to the PCIe device via the I3C interface. Furthermore, the Device Manager can receive packet capture data sent by the PCIe device via the I3C interface. This packet capture data is determined by the PCIe device in response to the read operation command, based on the port information of the target port. The packet capture data is sent by the PCIe device via the I3C interface. In other words, the Device Manager can proactively obtain packet capture data from the PCIe device via the I3C interface using a write-then-read approach. This out-of-band (PCIe device and Device Manager) packet capture data acquisition method avoids reliance on the central processing unit's operating system, thus avoiding the need to develop different parsing tools for different operating systems, reducing development costs, improving the efficiency of packet capture data acquisition, and consequently improving the efficiency of link analysis based on packet capture data.

[0041] In one implementation, a write operation command is sent to the PCIe device via the I3C interface, including:

[0042] A packet capture data acquisition command is sent to the PCIe device via the I3C interface; the packet capture data acquisition command includes a target command word; the target command word indicates that the packet capture data acquisition command is used to acquire packet capture data;

[0043] The system receives the first response information sent by the PCIe device via the I3C interface. The first response information is sent by the PCIe device via the I3C interface in response to the packet capture data acquisition command.

[0044] In response to the first response message, a write operation command is sent to the PCIe device via the I3C interface.

[0045] In this scheme, the Device Manager can send packet capture data acquisition commands to the PCIe device via the I3C interface. These commands include a target command word, indicating that the packet capture data acquisition command is used to acquire packet data. The Device Manager can also receive a first response message from the PCIe device via the I3C interface, sent in response to the packet capture data acquisition command. In response to the first response message, the Device Manager can send a write operation command to the PCIe device via the I3C interface. This method of requesting the PCIe device to report packet capture data by the Device Manager avoids reliance on the central processing unit's operating system, thus avoiding the need to develop different parsing tools for different operating systems, reducing development costs, improving the efficiency of packet capture data acquisition, and consequently improving the efficiency of link analysis based on packet capture data.

[0046] In one implementation, the port information of the target port includes the port number and port type of the target port.

[0047] In this scheme, the target port information can include the target port number and the target port type. This method allows PCIe devices to accurately determine the packet capture data of the target port required by the Device Manager, thereby improving the accuracy of the link analysis results obtained by the Device Manager and ultimately enhancing the operational efficiency and maintainability of PCIe devices.

[0048] In one implementation, packet capture data sent by a PCIe device is received via the I3C interface, including:

[0049] Receive interrupt requests sent by PCIe devices via the I3C interface;

[0050] In response to the interrupt request, a second response message is sent to the PCIe device via the I3C interface;

[0051] The interrupt data is received from the PCIe device via the I3C interface. The interrupt data is sent by the PCIe device in response to the second response information and includes packet capture data.

[0052] In this scheme, the PCIe device can acquire packet capture data. The PCIe device can send an interrupt request to the Device Manager via the I3C interface. In response to the interrupt request, the Device Manager can send a second response message to the PCIe device via the I3C interface. The PCIe device can then respond to the second response message and send interrupt data to the Device Manager via the I3C interface. This interrupt data includes packet capture data. Through this method, the slave device (PCIe device) on the I3C network can proactively send packet capture data to the master device (Device Manager) on the I3C network using the interrupt mechanism in the I3C protocol. This enables the PCIe device to acquire and send packet capture data to the Device Manager in real time, improving the efficiency of the Device Manager in acquiring packet capture data.

[0053] In one implementation, the interrupt data includes required data bytes; the required data bytes include an interrupt group number and an interrupt number; the interrupt group number and the interrupt number indicate the interrupt operation corresponding to the interrupt data, which is the interrupt operation for transmitting packet capture data.

[0054] This solution uses interrupt data, including required data bytes, and these required data bytes contain the interrupt group number and interrupt number. This indicates that the interrupt operation is for transmitting captured data, allowing the device manager to recognize the captured data. By using the interrupt group number and interrupt number reserved in the I3C protocol specification to extend functionality and implement the method of indicating captured data, the cost is low and the implementation difficulty is relatively simple.

[0055] Thirdly, embodiments of this application provide a device for acquiring packet capture data, including:

[0056] The acquisition module is used to acquire packet capture data;

[0057] The transceiver module is used to send packet capture data to the device manager via the I3C interface, so that the device manager can determine the link analysis results based on the packet capture data.

[0058] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0059] In one implementation, the PCIe device includes at least one port; a transceiver module, specifically used for:

[0060] The device receives write operation commands sent by the device manager via the I3C interface; the write operation command includes port information of the target port; the target port belongs to at least one port.

[0061] Receive read operation commands sent by the device manager via the I3C interface;

[0062] In response to the read operation command, the system determines the packet capture data based on the port information of the target port and sends the packet capture data to the device manager via the I3C interface.

[0063] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0064] In one implementation, the transceiver module is also used for:

[0065] The packet capture data acquisition command sent by the device manager is received via the I3C interface; the packet capture data acquisition command includes a target command word; the target command word indicates that the packet capture data acquisition command is used to acquire packet capture data;

[0066] In response to the packet capture data acquisition command, a first response message is sent to the device manager via the I3C interface; among them, the write operation command is sent by the device manager via the I3C interface in response to the first response message.

[0067] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0068] In one implementation, the transceiver module is specifically used for:

[0069] Determine whether there is packet capture data in at least one packet capture data stored in the PCIe device that matches the port information of the target port;

[0070] If packet capture data matching the port information of the target port exists, send the packet capture data matching the port information of the target port to the device manager via the I3C interface; or,

[0071] If no packet capture data matches the port information of the target port, an indication message is sent to the device manager via the I3C interface; the indication message indicates that no packet capture data matches the port information of the target port.

[0072] In one implementation, the port information of the target port includes the port number and port type of the target port.

[0073] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0074] In one implementation, the transceiver module is specifically used for:

[0075] Send an interrupt request to the device manager via the I3C interface;

[0076] The device receives a second response message from the device manager via the I3C interface; the second response message is sent by the device manager in response to the interrupt request via the I3C interface.

[0077] In response to the second response information, interrupt data is sent to the device manager via the I3C interface; the interrupt data includes packet capture data.

[0078] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0079] In one implementation, the interrupt data includes required data bytes; the required data bytes include an interrupt group number and an interrupt number; the interrupt group number and the interrupt number indicate the interrupt operation corresponding to the interrupt data, which is the interrupt operation for transmitting packet capture data.

[0080] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0081] Fourthly, embodiments of this application provide a device for acquiring packet capture data, comprising:

[0082] The transceiver module is used to receive packet capture data sent by PCIe devices via the I3C interface;

[0083] The processing module is used to determine the link analysis results based on the packet capture data.

[0084] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0085] In one implementation, the PCIe device includes at least one port; a transceiver module, specifically used for:

[0086] Send a write operation command to the PCIe device via the I3C interface; the write operation command includes port information of the target port; the target port belongs to at least one port;

[0087] Send read operation commands to the PCIe device via the I3C interface;

[0088] The system receives packet capture data sent by PCIe devices via the I3C interface. The packet capture data is determined by the PCIe device in response to a read operation command, based on the port information of the target port. The packet capture data is sent by the PCIe device through the I3C interface.

[0089] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0090] In one implementation, the transceiver module is specifically used for:

[0091] A packet capture data acquisition command is sent to the PCIe device via the I3C interface; the packet capture data acquisition command includes a target command word; the target command word indicates that the packet capture data acquisition command is used to acquire packet capture data;

[0092] The system receives the first response information sent by the PCIe device via the I3C interface. The first response information is sent by the PCIe device via the I3C interface in response to the packet capture data acquisition command.

[0093] In response to the first response message, a write operation command is sent to the PCIe device via the I3C interface.

[0094] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0095] In one implementation, the port information of the target port includes the port number and port type of the target port.

[0096] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0097] In one implementation, the transceiver module is specifically used for:

[0098] Receive interrupt requests sent by PCIe devices via the I3C interface;

[0099] In response to the interrupt request, a second response message is sent to the PCIe device via the I3C interface;

[0100] The interrupt data is received from the PCIe device via the I3C interface. The interrupt data is sent by the PCIe device in response to the second response information and includes packet capture data.

[0101] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0102] In one implementation, the interrupt data includes required data bytes; the required data bytes include an interrupt group number and an interrupt number; the interrupt group number and the interrupt number indicate the interrupt operation corresponding to the interrupt data, which is the interrupt operation for transmitting packet capture data.

[0103] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0104] Fifthly, embodiments of this application provide a computing device, including:

[0105] Quickly interconnect PCIe devices with peripheral components, and manage the Device Manager;

[0106] PCIe devices connect to Device Manager via the improved integrated circuit bus I3C interface;

[0107] The PCIe device is used to perform the method of the first aspect;

[0108] The Device Manager is used to execute the second method.

[0109] The computing device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be repeated here.

[0110] In a sixth aspect, embodiments of this application provide a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, are used to implement the method of the first aspect or the second aspect.

[0111] When the computer-executable instructions in the computer-readable storage medium provided in this application are executed by a processor, the technical solutions shown in the above method embodiments can be implemented. The implementation principle and beneficial effects are similar, and will not be repeated here.

[0112] In a seventh aspect, embodiments of this application provide a computer program product, including a computer program, which, when executed by a processor, is used to implement the method of the first aspect or the second aspect.

[0113] When the computer program in the computer program product provided in this application is executed by a processor, it can implement the technical solution shown in the above method embodiments. The implementation principle and beneficial effects are similar, and will not be repeated here. Attached Figure Description

[0114] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0115] Figure 1 A schematic diagram of the structure of a computing device provided in this application;

[0116] Figure 2a A flowchart illustrating a method for acquiring packet capture data according to an embodiment of this application;

[0117] Figure 2b A schematic diagram illustrating a data packet format provided in an embodiment of this application;

[0118] Figure 2c A schematic diagram of a data area provided in an embodiment of this application;

[0119] Figure 2d A schematic diagram of another data area provided in an embodiment of this application;

[0120] Figure 2e A schematic diagram of packet capture data provided in an embodiment of this application;

[0121] Figure 3a A flowchart illustrating a second embodiment of a method for acquiring packet capture data provided in this application;

[0122] Figure 3b A command timing diagram for a write-then-read approach provided in an embodiment of this application;

[0123] Figure 3c This application provides a schematic diagram illustrating how packet capture data can be obtained through a write-then-read method in an embodiment of the present application.

[0124] Figure 3d This is a schematic diagram illustrating another method of obtaining packet capture data by writing first and then reading, provided in an embodiment of this application.

[0125] Figure 4a A flowchart illustrating a method for acquiring packet capture data according to an embodiment of this application, specifically embodiment three.

[0126] Figure 4b A command timing diagram for an interrupt operation is provided in an embodiment of this application;

[0127] Figure 4c A schematic diagram illustrating a required data byte for an embodiment of this application;

[0128] Figure 4d An actual timing diagram of an interrupt operation provided in an embodiment of this application;

[0129] Figure 5 This is a schematic diagram of the structure of a packet capture data acquisition device provided in an embodiment of this application;

[0130] Figure 6 A schematic diagram of another packet capture data acquisition device provided in an embodiment of this application. Detailed Implementation

[0131] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments made by those skilled in the art under the guidance of these embodiments are within the scope of protection of this application.

[0132] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0133] Definitions:

[0134] Firmware: Firmware is code that runs on peripheral component interconnect express (PCIe) devices to implement the functions of PCIe devices. For example, the firmware of a network card is used to implement the network card's network connection, packet transmission and reception, protocol offloading, etc.

[0135] Inter-Integrated Circuit (I2C) bus: A two-wire synchronous serial bus with a master-slave communication mechanism. It uses a clock line (Serial Clock, SCL) and a data line (Serial Data, SDA) for communication, supports multiple nodes connected to the same bus, and distinguishes nodes by their physical addresses.

[0136] Improved Inter-Integrated Circuit (I3C): An improved version of I2C, with the same physical form as the I2C bus, it uses clock and data lines for communication and is backward compatible with I2C. Compared to I2C, I3C offers a significantly higher data rate, supports dynamic address allocation to allow multiple nodes with the same physical address to share the bus, and supports interrupt mechanisms to allow slave nodes to actively send data to the master node.

[0137] PCIe Link Training: Link training is the process defined in the PCIe protocol for negotiating link rate, link width, link sequence, and link polarity to determine the operating mode of the PCIe ports on both sides of the link.

[0138] PCIe Link Equalization: Link equalization is the process by which devices on both sides of a link, as defined in the PCIe protocol, adjust the electrical parameters of the link to meet communication requirements. The link parameters are mainly preset values ​​related to Signal Integrity (SI), including swing, preshoot, and de-emphasis.

[0139] Network link auto-negotiation: Auto-negotiation is a method and mechanism defined in network communication protocols (such as Ethernet, Fibre Channel (FC), and InfiniBand (IB)) for devices on both sides of a link to communicate and confirm operating parameters. Operating parameters mainly refer to link speed, full-duplex mode, flow control mechanisms (such as pause), and forward error correction (FEC) mode.

[0140] Network link training: Training is the process by which devices on both sides of a link, as defined in network communication protocols (such as Ethernet, FC, and IB), adjust the electrical parameters of the link to meet communication requirements. The link parameters mainly include SI-related parameters such as swing, pre-emphasis, de-emphasis, and equalization.

[0141] This application provides a method for acquiring packet capture data. A PCIe device can connect to a device manager via an I3C interface. The PCIe device can acquire packet capture data and send it to the device manager via the I3C interface, so that the device manager can determine the link analysis results based on the packet capture data.

[0142] By using the out-of-band (PCIe devices and Device Manager) packet capture method described above, reliance on the central processing unit's operating system is avoided, thus eliminating the need to develop different parsing tools for different operating systems. This reduces development costs, improves the efficiency of packet capture data acquisition, and consequently enhances the efficiency of link analysis based on packet capture data.

[0143] The following section provides a detailed explanation of the method for obtaining packet capture data in this application.

[0144] For example, Figure 1 This is a schematic diagram of the structure of a computing device provided in this application. Figure 1 As shown, computing device 10 may include device manager 101 and PCIe device 102.

[0145] Device Manager 101 can connect to PCIe devices via the I3C interface.

[0146] It should be noted that Device Manager 101 is the I3C master node, i.e., the controller node, and PCIe device 102 is the I3C slave node, i.e., the device node. Device Manager 101 uses a clock line (Serial Clock, SCL) and a data line (Serial Data, SDA) to communicate with the PCIe device.

[0147] It should also be noted that the physical channels of both the I3C and I2C interfaces are clock lines and data lines, meaning that the I3C and I2C interfaces share the same physical channels.

[0148] The components involved in the embodiments of this application will now be described in detail.

[0149] The device manager (also known as a device management module or device management unit) performs component management and asset management functions within the computing device, such as power-on / off control, fan speed control, and electronic tag management. It should be noted that different companies use different names for the device manager in their computing devices 10. For example, some companies call it a baseboard management controller (BMC), some call it Integrated Lights-Out (iLO), and others call it an integrated Dell remote access controller (iDRAC). Regardless of whether it's called BMC, iLO, or iDRAC, it can be understood as the device manager in this embodiment of the application.

[0150] PCIe devices: Devices in computing systems that support the PCIe interface can be called PCIe devices. PCIe devices can include network cards, graphics cards, sound cards, video capture cards, and solid-state drives, among others.

[0151] Additionally, it should be noted that a parsing tool can run on Device Manager 101, and firmware can run on the PCIe device. The firmware running on the PCIe device can capture packet data, while the parsing tool running on Device Manager 101 can analyze the captured packet data to obtain link analysis results.

[0152] It should be noted that the embodiments in this application do not... Figure 1 The actual form of the various components included is not limited, nor is the actual form of the components included defined. Figure 1 The interaction methods between components are limited, and can be set according to actual needs in the application of the solution.

[0153] The technical solution of this application will now be described in detail through specific embodiments. It should be noted that the following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0154] Figure 2a This is a flowchart illustrating a method for acquiring packet capture data according to an embodiment of this application. Figure 2a As shown, the method includes the following steps:

[0155] S201: PCIe device captures packet data.

[0156] In this embodiment, the PCIe device may include at least one port.

[0157] Each port of a PCIe device can capture the raw bitstream flowing through that port to obtain packet capture data.

[0158] In other words, a PCIe device can capture at least one packet.

[0159] The following section explains the data format of the captured packet data.

[0160] In one implementation:

[0161] Packet capture data can exist in the form of data packets. That is, packet capture data can be sent in the form of data packets. Each data packet includes at least one piece of packet capture data.

[0162] Figure 2b This is a schematic diagram of a data packet format provided in an embodiment of this application.

[0163] like Figure 2b As shown, the data packet containing the captured data can include a header area and a data area.

[0164] The header area includes the port type, length, and checksum.

[0165] It should be noted that the port type can be a PCIe port type, a network protocol port type, a Serial Advanced Technology Attachment (SATA) port type, or other types. This application embodiment does not limit this.

[0166] Length can be measured in words, referring to the length of the data area. It's important to note that one word is equivalent to two bytes, or 16 bits. One byte is 8 bits.

[0167] A checksum is a checksum of a data range. It should be noted that the algorithm for calculating the checksum can be a zero-sum check or other algorithms, and this application does not limit this.

[0168] The Trace Data area can include at least one packet capture data.

[0169] In one implementation, the captured data may include: the original bitstream (encode) and the corresponding data content of the original bitstream. The data content of the original bitstream may include the capture time (time), port number (port_ID), and bitstream direction (direction). The bitstream direction can be either receive (RX) or transmit (TX). For example, Figure 2c This is a schematic diagram of a data area provided in an embodiment of this application. It should be noted that... Figure 2c The format of the data area shown (table format) is only an example, and the embodiments of this application do not limit the format of the data area.

[0170] It should be noted that the original bitstream can be the bitstream (sequence group) of the PCIe port during the link training phase, the bitstream (sequence group) of the PCIe port during the link balancing phase, the bitstream of the network protocol port during the auto-negotiation phase, the bitstream of the network port during the training phase, the idle bitstream, or other bitstreams. This application embodiment does not limit this.

[0171] In one implementation, the captured data may include: the original bitstream and the corresponding data content of the original bitstream. The data content corresponding to the original bitstream may include the capture time, port number, bitstream direction, and the result data after protocol parsing (also referred to as protocol parsing result data) (description). For example, Figure 2d This is a schematic diagram of another data area provided in an embodiment of this application. It should be noted that... Figure 2d The format of the data area shown (table format) is only an example, and the embodiments of this application do not limit the format of the data area.

[0172] It should be noted that the result data after protocol parsing can be obtained by the PCIe device through protocol parsing processing of the original bitstream.

[0173] It should also be noted that after obtaining the raw bitstream, the PCIe device can save and process it. The PCIe device can then perform protocol parsing on the saved raw bitstream to obtain the parsed result data.

[0174] In one implementation:

[0175] Packet capture data does not necessarily exist in the form of data packets. That is, packet capture data does not necessarily need to be sent as data packets. In one implementation, packet capture data may include: the original bitstream and the corresponding data content of the original bitstream. The data content corresponding to the original bitstream may include the packet capture time, port number, port type, and bitstream direction corresponding to the original bitstream. For example, Figure 2e This is a schematic diagram of packet capture data provided in an embodiment of this application.

[0176] S202: PCIe devices send packet capture data to Device Manager via the I3C interface.

[0177] In this embodiment, the PCIe device can connect to the Device Manager via the I3C interface.

[0178] PCIe devices can send packet capture data to Device Manager via the I3C interface.

[0179] The following section describes the process of a PCIe device sending packet capture data to Device Manager via the I3C interface.

[0180] In one implementation:

[0181] PCIe devices include at least one port.

[0182] PCIe devices can receive write operation commands sent by Device Manager via the I3C interface. These write operation commands include port information for the target port. It should be noted that the target port must be at least one port.

[0183] PCIe devices can receive read operation commands sent by Device Manager through the I3C interface.

[0184] PCIe devices can respond to read operation commands, determine packet capture data based on the target port information, and send the packet capture data to the device manager via the I3C interface.

[0185] In one implementation:

[0186] PCIe devices can send interrupt requests to Device Manager via the I3C interface.

[0187] PCIe devices can receive a second response message from the Device Manager via the I3C interface. This second response message is sent by the Device Manager in response to an interrupt request via the I3C interface.

[0188] PCIe devices can respond to the second response information by sending interrupt data to the Device Manager via the I3C interface. This interrupt data includes packet capture data.

[0189] S203: The device manager determines the link analysis results based on the packet capture data.

[0190] In this embodiment, the device manager can determine the link analysis results based on the packet capture data after obtaining it.

[0191] In one implementation:

[0192] Device Manager can include parsing tools.

[0193] The device manager can run parsing tools to determine link analysis results based on packet capture data. In one implementation, the link analysis results can be used to determine whether a link is faulty. In another implementation, the link analysis results can be used to determine the cause of the link failure.

[0194] The beneficial effects of this embodiment are as follows: In this embodiment, the PCIe device can connect to the Device Manager via the I3C interface. The PCIe device can acquire packet capture data and send it to the Device Manager via the I3C interface, allowing the Device Manager to determine the link analysis results based on the packet capture data. This out-of-band (PCIe device and Device Manager) packet capture data acquisition method avoids reliance on the central processing unit's operating system, thus avoiding the need to develop different parsing tools for different operating systems, reducing development costs, improving the efficiency of packet capture data acquisition, and consequently improving the efficiency of link analysis based on packet capture data.

[0195] Figure 3a This is a flowchart illustrating a second embodiment of a method for acquiring packet capture data provided in this application. Figure 3a As shown, the method includes the following steps:

[0196] S301: PCIe device acquires packet capture data.

[0197] In this embodiment, the PCIe device can acquire packet capture data (at least one packet capture data).

[0198] PCIe devices can store and process captured packet data.

[0199] In one implementation, the content of the captured data may include: data content corresponding to at least one original bitstream. The data content corresponding to the original bitstream includes the capture time, port number, and bitstream direction.

[0200] In one implementation, the content of the captured packet data may include: data content corresponding to at least one original bitstream. This original bitstream data content includes the packet capture time, port number, bitstream direction, and the result data after protocol parsing.

[0201] S302: PCIe devices receive packet capture data acquisition commands sent by Device Manager through the I3C interface.

[0202] First, the command timing for write-then-read operations will be explained.

[0203] Figure 3b This is a command timing diagram for a write-then-read operation provided in an embodiment of this application.

[0204] S: Start bit, indicating that the command sequence is started.

[0205] I3C Reserved Address: I3C broadcast address information (also known as I3C reserved address information). For example, the I3C broadcast address information can be 7'h7E.

[0206] R / W: Read / Write bit, 1 indicates a read operation and 0 indicates a write operation.

[0207] A: Acknowledge bit, 0 indicates ACK (Acknowledge), 1 indicates NACK (NegativeAcknowledge).

[0208] I3C Directed CCC: I3C Directed CCC represents the common command codes (CCC) for I3C direct communication (point-to-point). The I3C protocol specification defines some reserved command codes, with values ​​ranging from 0xE0 to 0xFE, for use as vendor extensions. In this embodiment, the I3C protocol specification is extended, using reserved command codes from the I3C common command codes as target command codes to define the operation of acquiring packet capture data from the PCIe device. The target command code can be any value within the range of 0xE0-0xFE. For example, the target command code could be 0xE5.

[0209] Par: Parity bit, parity check bit.

[0210] Sr: Repeated Start, indicating a restart of the command sequence. In an I3C command sequence (from Start to Stop), it is divided into multiple stages, and Sr is used at the beginning of each stage to indicate a restart.

[0211] Target Address: Represents the address information of the PCIe device.

[0212] Data1-DataN: The data content (payload) to be transmitted, in bytes.

[0213] P: Stop bit, indicating the end of the command sequence.

[0214] In this embodiment, the device manager can send a packet capture data acquisition command to the PCIe device through the I3C interface.

[0215] Correspondingly, PCIe devices can receive packet capture data acquisition commands sent by Device Manager through the I3C interface.

[0216] The following section explains the process by which Device Manager sends packet capture commands to PCIe devices via the I3C interface.

[0217] In one implementation:

[0218] When the I3C bus is idle, the Device Manager can send a start signal (S) to a PCIe device. The start signal indicates that the Device Manager can initiate communication with the PCIe device.

[0219] The Device Manager can send broadcast commands via the I3C interface. These broadcast commands can include I3C broadcast address information (also known as I3C Reserved Address information) and a write operation flag (0). For example, Figure 3c This application provides a schematic diagram illustrating how packet capture data is obtained through a write-then-read method in an embodiment of the present application. Figure 3d This is a schematic diagram illustrating another method of obtaining packet capture data by writing first and then reading, provided as an embodiment of this application. For example... Figure 3c and Figure 3d As shown, the I3C broadcast address information can be 7'h7E.

[0220] PCIe devices can respond to broadcast commands by sending a third response message (0) to the Device Manager via the I3C interface.

[0221] The Device Manager can respond to third-party response information by sending packet capture data acquisition commands to PCIe devices via the I3C interface.

[0222] The packet capture data acquisition command includes the target command word (such as 0xE5). Additionally, the packet capture data acquisition command may also include a write operation flag (0).

[0223] It should be noted that the target command word indicates that the packet capture data acquisition command is used to acquire packet capture data.

[0224] S303: In response to the packet capture data acquisition command, the PCIe device sends the first response information to the Device Manager through the I3C interface.

[0225] In this embodiment, the PCIe device can respond to the packet capture data acquisition command by sending a first response message (0) to the device manager through the I3C interface.

[0226] S304: PCIe devices receive write operation commands sent by the Device Manager through the I3C interface.

[0227] In this embodiment, the device manager can respond to the first response information by sending a write operation command to the PCIe device via the I3C interface. Correspondingly, the PCIe device can receive the write operation command sent by the device manager via the I3C interface.

[0228] The write operation command includes port information of the target port; the target port belongs to at least one port.

[0229] The port information for the target port can include the port number and port type. For example... Figure 3c and Figure 3d As shown, the write operation command includes the target port number (exemplarily, port number 0x02) and the target port type (exemplarily, port type 0x0). It should be noted that, exemplary, port type 0x0 indicates that the target port type is a PCIe port type.

[0230] S305: PCIe devices receive read operation commands sent by the Device Manager through the I3C interface.

[0231] In this embodiment, after sending a write operation command, the device manager can send a read operation command to the PCIe device via the I3C interface. Understandably, the device manager indicates a restart and sends the read operation command by sending a repeat start bit (Sr).

[0232] Accordingly, the PCIe device receives read operation commands sent by the Device Manager through the I3C interface. These read operation commands include a read operation identifier (1). Additionally, the read operation commands may also include the PCIe device's address information (TargetAddress).

[0233] S306: In response to a read operation command, the PCIe device determines the packet capture data based on the port information of the target port and sends the packet capture data to the device manager through the I3C interface.

[0234] In this embodiment, the PCIe device can respond to a read operation command, determine the packet capture data based on the port information of the target port, and send the packet capture data to the device manager through the I3C interface.

[0235] The following section describes the process by which a PCIe device determines the packet capture data based on the port information of the target port and sends the packet capture data to the Device Manager via the I3C interface.

[0236] In one implementation:

[0237] A PCIe device can determine whether at least one packet capture data stored in the PCIe device contains packet capture data that matches the port information of the target port. In one implementation, when the port information includes a port number and a port type, the PCIe device can determine whether at least one packet capture data stored in the PCIe device contains packet capture data that matches both the port number and port type of the target port.

[0238] A PCIe device can send packet capture data matching the port information of the target port to the Device Manager via the I3C interface, provided that packet capture data exists. The port information corresponding to this packet capture data must match the port information of the target port. For example, such as... Figure 3c As shown, a PCIe device can send packet capture data (at least one packet capture data) (Data1-DataN) that matches the port information of the target port to the Device Manager through the I3C interface.

[0239] or,

[0240] A PCIe device can send an indication message to Device Manager via the I3C interface if no packet capture data matching the port information of the target port is found. This indication message indicates that no packet capture data (at least one packet capture data) matching the port information of the target port is found. Figure 3d As shown, for example, the indication information can be 0x0 to indicate that there is no packet capture data that matches the port information of the target port.

[0241] S307: The Device Manager determines the link analysis results based on the packet capture data.

[0242] In this embodiment, the device manager can determine the link analysis results based on the packet capture data.

[0243] The beneficial effects of this embodiment are as follows: In this embodiment, the PCIe device can acquire packet capture data. The PCIe device can receive a packet capture data acquisition command sent by the device manager through the I3C interface; wherein, the packet capture data acquisition command includes a target command word; the target command word indicates that the packet capture data acquisition command is used to acquire packet capture data. In response to the packet capture data acquisition command, the PCIe device can send a first response message to the device manager through the I3C interface. In response to the first response message, the device manager can send a write operation command to the PCIe device through the I3C interface. The write operation command includes port information of the target port; the target port belongs to at least one port. The PCIe device can receive a read operation command sent by the device manager through the I3C interface. In response to the read operation command, the PCIe device can determine the packet capture data based on the port information of the target port, and send the packet capture data to the device manager through the I3C interface. In other words, the Device Manager can proactively acquire packet capture data from PCIe devices via the I3C interface using a write-then-read approach. This out-of-band (PCIe device and Device Manager) packet capture data acquisition method avoids dependence on the central processing unit's operating system, thereby avoiding the need to develop different parsing tools for different operating systems, reducing development costs, improving the efficiency of packet capture data acquisition, and ultimately improving the efficiency of link analysis based on packet capture data.

[0244] Figure 4a This is a flowchart illustrating a method for acquiring packet capture data according to an embodiment of this application, specifically embodiment three. Figure 4a As shown, the method includes the following steps:

[0245] S401: PCIe device captures packet data.

[0246] In this embodiment, the PCIe device can acquire packet capture data. It is understood that the PCIe device can acquire at least one packet capture data.

[0247] In one implementation, the captured data may include the original bitstream and the corresponding data content. The data content corresponding to the original bitstream may include the capture time, port number, port type, and bitstream direction.

[0248] S302: PCIe devices send interrupt requests to the Device Manager via the I3C interface.

[0249] First, the command timing for interrupt operations will be explained.

[0250] Figure 4b This is a command timing diagram for an interrupt operation provided in an embodiment of this application.

[0251] S: Start bit, indicating that the command sequence is started.

[0252] Target Address: The I3C physical address of the PCIe device, 7 bits.

[0253] R / W: Read / Write bit, 1 indicates a read operation, 0 indicates a write operation. Here it is R, indicating a read operation.

[0254] A: Acknowledgment bit, 0 indicates ACK (Acknowledge); 1 indicates NACK (NegativeAcknowledge).

[0255] Target MDB: Required data bytes (Target MDB), which may include the interrupt group number and interrupt number. It should be noted that the interrupt group number and interrupt number indicate that the interrupt operation was an interrupt operation that transmitted captured packet data. Figure 4c This is a schematic diagram illustrating a required data byte provided for an embodiment of this application. For example... Figure 4c As shown, the required data byte (Target MDB) may include an interrupt group number and an interrupt identifier. In one implementation, for example, the interrupt group number can be 3 bits and the interrupt identifier can be 5 bits. It should be noted that the I3C specification defines some reserved interrupt group numbers, with a value of 3'b000, and reserved interrupt identifiers, with values ​​of 5'h00-5'h1F (i.e., 5'b00000-5'b11111), for vendor reserve. In this embodiment, the I3C specification can be extended to use the I3C reserved interrupt group numbers and interrupt identifiers to define interrupt operations for PCIe device transmission of packet capture data. For example, in this embodiment, the interrupt group number can be 3'b000, and the interrupt identifier can be any value within the range of 5'h00-5'h1F. For instance, the interrupt identifier could be 5'h11.

[0256] T: Transition bit, used in read operations. T = 1 indicates that there is more data to follow, and T = 0 indicates that there is no more data to follow and reading can stop.

[0257] Target IBI Data1-Target IBI DataN: Interrupt data, which is the data that the PCIe device sends to the Device Manager during an interrupt operation.

[0258] P: Stop bit, indicates the end of the command sequence and the termination of communication.

[0259] In this embodiment, the PCIe device can send an interrupt request to the device manager after receiving packet capture data (at least one packet capture data). The interrupt request may include the PCIe device's target address and read operation identifier (R). For example, Figure 4d This is an actual timing diagram of an interrupt operation provided in an embodiment of this application. For example... Figure 4d As shown, a read / write bit of 1 indicates that the interrupt request includes a read operation identifier.

[0260] S403: In response to the interrupt request, the Device Manager sends a second response message to the PCIe device via the I3C interface.

[0261] In this embodiment, in response to an interrupt request, the device manager can send a second response message (response confirmation) to the PCIe device via the I3C interface.

[0262] For example, such as Figure 4d As shown, the second response information (Acknowledge, A) can be 0. It should be noted that 0 represents acknowledgment (ACK).

[0263] S404: In response to the second response message, the PCIe device sends interrupt data to the device manager via the I3C interface.

[0264] In this embodiment, the PCIe device, in response to the second response information, can send interrupt data to the device manager via the I3C interface.

[0265] The interrupted data includes packet capture data. In one implementation, the packet capture data may include: the original bitstream and the corresponding data content. The data content corresponding to the original bitstream may include the packet capture time, port number, port type, and bitstream direction. It should be noted that the port number and port type refer to the port information of the port to which the packet capture data belongs.

[0266] Understandably, for each captured packet, if the captured packet is not the last captured packet, the corresponding conversion bit is 1; if the captured packet is the last captured packet, the corresponding conversion bit is 0. For example, as... Figure 3d As shown, the conversion bit corresponding to Target IBI Data1 is 1, and the conversion bit corresponding to Target IBIDataN is 0.

[0267] It should be noted that when a PCIe device includes multiple ports, the interrupt data may include packet capture data from one port or packet capture data from multiple ports. This application embodiment does not limit this.

[0268] S405: The device manager determines the link analysis results based on the packet capture data.

[0269] In this embodiment, the device manager can determine the link analysis results based on the packet capture data.

[0270] Additionally, it should be noted that after receiving the captured packet data, the Device Manager can send an end signal (P) to the PCIe device to indicate the end of the current communication process.

[0271] The beneficial effects of this embodiment are as follows: In this embodiment, the PCIe device can acquire packet capture data. The PCIe device can send an interrupt request to the Device Manager through the I3C interface. In response to the interrupt request, the Device Manager can send a second response message to the PCIe device through the I3C interface. In response to the second response message, the PCIe device can send interrupt data to the Device Manager through the I3C interface. The interrupt data includes packet capture data. Through this method, the slave device (PCIe device) on the I3C can utilize the interrupt mechanism in the I3C protocol to actively send packet capture data to the master device (Device Manager) on the I3C, enabling the PCIe device to acquire packet capture data in real time and send it to the Device Manager in real time, thus improving the efficiency of the Device Manager in acquiring packet capture data.

[0272] The following are embodiments of the apparatus described in this application, which can be used to execute the embodiments of the method described in this application. For details not disclosed in the apparatus embodiments of this application, please refer to the embodiments of the method described in this application.

[0273] Figure 5 This is a schematic diagram of a packet capture data acquisition device provided in an embodiment of this application. Figure 5 As shown, the packet capture data acquisition device 50 includes an acquisition module 51 and a transceiver module 52. Among them,

[0274] Module 51 is used to acquire packet capture data;

[0275] The transceiver module 52 is used to send packet capture data to the device manager via the I3C interface, so that the device manager can determine the link analysis results based on the packet capture data.

[0276] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0277] In one implementation, the PCIe device includes at least one port; the transceiver module 52 is specifically used for:

[0278] The device receives write operation commands sent by the device manager via the I3C interface; the write operation command includes port information of the target port; the target port belongs to at least one port.

[0279] Receive read operation commands sent by the device manager via the I3C interface;

[0280] In response to the read operation command, the system determines the packet capture data based on the port information of the target port and sends the packet capture data to the device manager via the I3C interface.

[0281] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0282] In one implementation, the transceiver module 52 is further used for:

[0283] The packet capture data acquisition command sent by the device manager is received via the I3C interface; the packet capture data acquisition command includes a target command word; the target command word indicates that the packet capture data acquisition command is used to acquire packet capture data;

[0284] In response to the packet capture data acquisition command, a first response message is sent to the device manager via the I3C interface; among them, the write operation command is sent by the device manager via the I3C interface in response to the first response message.

[0285] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0286] In one implementation, the transceiver module 52 is specifically used for:

[0287] Determine whether there is packet capture data in at least one packet capture data stored in the PCIe device that matches the port information of the target port;

[0288] If packet capture data matching the port information of the target port exists, send the packet capture data matching the port information of the target port to the device manager via the I3C interface; or,

[0289] If no packet capture data matches the port information of the target port, an indication message is sent to the device manager via the I3C interface; the indication message indicates that no packet capture data matches the port information of the target port.

[0290] In one implementation, the port information of the target port includes the port number and port type of the target port.

[0291] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0292] In one implementation, the transceiver module 52 is specifically used for:

[0293] Send an interrupt request to the device manager via the I3C interface;

[0294] The device receives a second response message from the device manager via the I3C interface; the second response message is sent by the device manager in response to the interrupt request via the I3C interface.

[0295] In response to the second response information, interrupt data is sent to the device manager via the I3C interface; the interrupt data includes packet capture data.

[0296] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0297] In one implementation, the interrupt data includes required data bytes; the required data bytes include an interrupt group number and an interrupt number; the interrupt group number and the interrupt number indicate the interrupt operation corresponding to the interrupt data, which is the interrupt operation for transmitting packet capture data.

[0298] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0299] Figure 6 This is a schematic diagram of another packet capture data acquisition device provided in an embodiment of this application. Figure 6 As shown, the packet capture data acquisition device 60 includes a transceiver module 61 and a processing module 62. Among them,

[0300] The transceiver module 61 is used to receive packet capture data sent by the PCIe device through the I3C interface;

[0301] Processing module 62 is used to determine the link analysis results based on packet capture data.

[0302] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0303] In one implementation, the PCIe device includes at least one port; the transceiver module 61 is specifically used for:

[0304] Send a write operation command to the PCIe device via the I3C interface; the write operation command includes port information of the target port; the target port belongs to at least one port;

[0305] Send read operation commands to the PCIe device via the I3C interface;

[0306] The system receives packet capture data sent by PCIe devices via the I3C interface. The packet capture data is determined by the PCIe device in response to a read operation command, based on the port information of the target port. The packet capture data is sent by the PCIe device through the I3C interface.

[0307] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0308] In one implementation, the transceiver module 61 is specifically used for:

[0309] A packet capture data acquisition command is sent to the PCIe device via the I3C interface; the packet capture data acquisition command includes a target command word; the target command word indicates that the packet capture data acquisition command is used to acquire packet capture data;

[0310] The system receives the first response information sent by the PCIe device via the I3C interface. The first response information is sent by the PCIe device via the I3C interface in response to the packet capture data acquisition command.

[0311] In response to the first response message, a write operation command is sent to the PCIe device via the I3C interface.

[0312] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0313] In one implementation, the port information of the target port includes the port number and port type of the target port.

[0314] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0315] In one implementation, the transceiver module 61 is specifically used for:

[0316] Receive interrupt requests sent by PCIe devices via the I3C interface;

[0317] In response to the interrupt request, a second response message is sent to the PCIe device via the I3C interface;

[0318] The interrupt data is received from the PCIe device via the I3C interface. The interrupt data is sent by the PCIe device in response to the second response information and includes packet capture data.

[0319] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0320] In one implementation, the interrupt data includes required data bytes; the required data bytes include an interrupt group number and an interrupt number; the interrupt group number and the interrupt number indicate the interrupt operation corresponding to the interrupt data, which is the interrupt operation for transmitting packet capture data.

[0321] The packet capture data acquisition device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be described again here.

[0322] This application provides a computing device, including:

[0323] Quickly interconnect PCIe devices with peripheral components, and manage the Device Manager;

[0324] PCIe devices connect to Device Manager via the improved integrated circuit bus I3C interface;

[0325] The PCIe device is used to execute the technical solution in the aforementioned method embodiment, where the executing entity is the PCIe device.

[0326] The device manager is used to execute the technical solution in the aforementioned method embodiments, where the execution subject is the device manager.

[0327] The computing device provided in this application embodiment can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be repeated here.

[0328] This application also provides a computer-readable storage medium storing computer-executable instructions. When executed by a processor, these instructions are used to implement the technical solutions in any of the aforementioned method embodiments, where the execution subject is a PCIe device or a device manager.

[0329] This application provides a computer program product, including a computer program, which, when executed by a processor, is used to implement the technical solution in the aforementioned method embodiment where the execution subject is a PCIe device or a device manager.

[0330] Those skilled in the art will understand that all or part of the steps of the above-described method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments; and the aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.

[0331] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A method of obtaining packet data, characterized by, The application is applied to a PCIE device of a peripheral component interconnect express, the PCIE device is connected with a device manager through an improved integrated circuit bus I3C interface; the method comprises: Obtaining packet capture data; Through the I3C interface, the packet capture data is sent to the device manager, so that the device manager determines a link analysis result according to the packet capture data.

2. The method of claim 1, wherein, The PCIE device comprises at least one port; the packet capture data is sent to the device manager through the I3C interface, which comprises: Through the I3C interface, a write operation command sent by the device manager is received; wherein the write operation command comprises port information of a target port; the target port belongs to the at least one port; Through the I3C interface, a read operation command sent by the device manager is received; In response to the read operation command, the packet capture data is determined according to the port information of the target port, and the packet capture data is sent to the device manager through the I3C interface.

3. The method of claim 2, wherein, Before the write operation command sent by the device manager through the I3C interface is received, the method further comprises: Through the I3C interface, a packet capture data acquisition command sent by the device manager is received; wherein the packet capture data acquisition command comprises a target command word; the target command word indicates that the packet capture data acquisition command is used to acquire the packet capture data; In response to the packet capture data acquisition command, first response information is sent to the device manager through the I3C interface; wherein the write operation command is sent by the device manager through the I3C interface in response to the first response information.

4. The method according to claim 2 or 3, characterized in that, The packet capture data is determined according to the port information of the target port, and the packet capture data is sent to the device manager through the I3C interface, which comprises: It is determined whether there is packet capture data matching the port information of the target port in at least one packet capture data stored by the PCIE device; In the case that there is packet capture data matching the port information of the target port, the packet capture data matching the port information of the target port is sent to the device manager through the I3C interface; or, In the case that there is no packet capture data matching the port information of the target port, indication information is sent to the device manager through the I3C interface; the indication information indicates that there is no packet capture data matching the port information of the target port.

5. The method according to any one of claims 2-4, characterized in that, The port information of the target port comprises a port number of the target port and a port type of the target port.

6. The method of claim 1, wherein, The packet capture data is sent to the device manager through the I3C interface, which comprises: An interrupt request is sent to the device manager through the I3C interface; Second response information sent by the device manager is received through the I3C interface; the second response information is sent by the device manager through the I3C interface in response to the interrupt request; In response to the second response information, interrupt data is sent to the device manager through the I3C interface; wherein the interrupt data comprises the packet capture data.

7. The method of claim 6, wherein, The interrupt data includes mandatory data bytes; the mandatory data bytes include an interrupt group number and an interrupt number; the interrupt group number and the interrupt number indicate that an interrupt operation corresponding to the interrupt data is an interrupt operation for transmitting the packet capture data.

8. A method of obtaining packet data, characterized by The method is applied to a device manager, and the device manager is connected with a peripheral component interconnect express (PCIE) device through an improved inter-integrated circuit (I3C) interface; the method comprises: receiving, through the I3C interface, packet capture data transmitted by the PCIE device; determining a link analysis result according to the packet capture data.

9. The method of claim 8, wherein, The PCIE device comprises at least one port; the receiving, through the I3C interface, of the packet capture data transmitted by the PCIE device comprises: sending, through the I3C interface, a write operation command to the PCIE device; the write operation command comprises port information of a target port; the target port belongs to the at least one port; sending, through the I3C interface, a read operation command to the PCIE device; receiving, through the I3C interface, the packet capture data transmitted by the PCIE device; wherein the packet capture data is determined by the PCIE device according to the port information of the target port in response to the read operation command; and the packet capture data is transmitted by the PCIE device through the I3C interface.

10. The method of claim 9, wherein, The sending, through the I3C interface, of the write operation command to the PCIE device comprises: sending, through the I3C interface, a packet capture data acquisition command to the PCIE device; the packet capture data acquisition command comprises a target command word; the target command word indicates that the packet capture data acquisition command is used to acquire the packet capture data; receiving, through the I3C interface, first response information transmitted by the PCIE device in response to the packet capture data acquisition command; sending, through the I3C interface, the write operation command to the PCIE device in response to the first response information.

11. The method according to claim 9 or 10, characterized in that, The port information of the target port comprises a port number of the target port and a port type of the target port.

12. The method of claim 8, wherein, The receiving, through the I3C interface, of the packet capture data transmitted by the PCIE device comprises: receiving, through the I3C interface, an interrupt request transmitted by the PCIE device; sending, through the I3C interface, second response information to the PCIE device in response to the interrupt request; receiving, through the I3C interface, interrupt data transmitted by the PCIE device; wherein the interrupt data is transmitted by the PCIE device in response to the second response information, and the interrupt data comprises the packet capture data.

13. The method of claim 12, wherein, The interrupt data includes mandatory data bytes; the mandatory data bytes include an interrupt group number and an interrupt number; the interrupt group number and the interrupt number indicate that an interrupt operation corresponding to the interrupt data is an interrupt operation for transmitting the packet capture data.

14. A computing device, comprising: The method comprises: a peripheral component interconnect express (PCIE) device and a device manager; the PCIE device is connected with the device manager through an improved inter-integrated circuit (I3C) interface; The PCIE device is configured to perform the method of any one of claims 1-7. The device manager is configured to perform the method of any one of claims 8-13.

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