Cache request processing method and device, equipment and medium

By classifying cache requests into dedicated queues and employing a dual conflict detection mechanism in multi-core processors, the problem of low cache request processing efficiency is solved, achieving efficient cache access and consistency management, and improving the performance of multi-level caching systems.

CN121785802AActive Publication Date: 2026-04-03SOPHGO TECH LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-03-02
Publication Date
2026-04-03

AI Technical Summary

Technical Problem

In multi-core processors, the low efficiency of cached request processing leads to increased access latency and decreased concurrency performance. Existing technologies cannot effectively manage cached requests, resulting in false conflicts and disordered request recovery order.

Method used

By classifying cached requests into dedicated queues according to their type attribute information, and employing a dual conflict detection mechanism of group index and physical address, conflict identifiers are generated to control the pause and resumption of requests, thereby optimizing request queuing management and scheduling.

Benefits of technology

It improves the accuracy and speed of cache request processing, reduces false conflicts, lowers access latency, and enhances the performance and parallel processing capabilities of multi-level caching systems.

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Abstract

The invention relates to the technical field of computers, and discloses a cache request processing method and device, equipment and a medium, and the method comprises the steps: obtaining a to-be-processed target cache request, and classifying the target cache request into a special queue; performing internal arbitration on the target cache request, and performing group index comparison on the target cache request winning the internal arbitration and the processed cache request to obtain a first conflict detection result; if the first conflict detection result is that no conflict is found, allowing the target cache request to access, and performing physical address information comparison on the accessed target cache request and target cache requests of other special queues to obtain a second conflict detection result; and if the second conflict detection result is that the conflict is found, controlling the target cache requests of other special queues to suspend participating in the internal arbitration according to the conflict identifier until the target cache requests are processed. According to the method, the processing delay of the cache request can be reduced on the premise of ensuring the cache consistency, so that the overall access efficiency is improved.
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Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a method, apparatus, device, and medium for processing cache requests. Background Technology

[0002] In multi-core processors, the caching system serves as a data transfer and access scheduling mechanism between cores. The processing efficiency of cached requests directly impacts overall access latency and concurrency performance. As processor size increases, the number of requests entering the cache controller also increases. Without a fine-grained management mechanism, this can easily lead to request queuing congestion and increased access conflicts.

[0003] Existing caching methods typically manage requests using a single queue or simple serialization, directly blocking requests with identical group indices and preventing them from accessing the system. While this approach avoids some conflicts, it often introduces false conflicts. For example, when a request occupies the queue due to a long processing time, subsequent requests that only have the same group index but are not actually conflicting will also be forced to wait, significantly increasing access latency. Furthermore, many systems only perform a group index comparison before a request enters the pipeline, without further checking the complete physical address, making it difficult to accurately identify genuine conflicts and resulting in insufficient detection granularity. In addition, the scheduling mechanisms after conflicts are relatively crude. Conflicting requests usually need to wait for preceding requests to finish before re-arbitration, lacking clear conflict identification and pause / recovery mechanisms, leading to disordered request recovery order and impacting the efficiency of multi-queue collaborative processing. Summary of the Invention

[0004] This invention provides a method, apparatus, device, and medium for processing cache requests, in order to solve the technical problem in related technologies that it is impossible to simultaneously guarantee cache consistency and reduce the processing latency of cache requests, thereby resulting in low access efficiency.

[0005] Firstly, a method for processing cached requests is provided, the method comprising: Obtain the target cache requests to be processed, and classify the target cache requests into the corresponding dedicated queues according to the type attribute information; The target cache requests in the dedicated queue are sequentially internally arbitrated, and the target cache request that wins the internal arbitration is compared with the processed cache request by group index to perform the first conflict detection and obtain the first conflict detection result; If the first conflict detection result is no conflict found, the target cache request is allowed to access it, and the physical address information of the target cache request that has completed the access is compared with the target cache requests of other dedicated queues to perform the second conflict detection and obtain the second conflict detection result. If the second conflict detection result indicates a conflict has been found, a conflict identifier is generated, and the target cache requests in the other dedicated queues are suspended from participating in the internal arbitration based on the conflict identifier until the target cache requests are processed.

[0006] Secondly, a cache request processing apparatus is provided, comprising: The acquisition module is used to acquire target cache requests to be processed and classify the target cache requests into corresponding dedicated queues according to type attribute information. The first conflict detection module is used to perform internal arbitration on the target cache requests in the dedicated queue in sequence, and compare the target cache request that wins the internal arbitration with the processed cache request by group index to perform the first conflict detection and obtain the first conflict detection result. The second conflict detection module is used to allow the target cache request to access the cache if the first conflict detection result is that no conflict is found, and to compare the physical address information of the target cache request that has completed the access with the target cache requests in other dedicated queues to perform the second conflict detection and obtain the second conflict detection result. The processing module is configured to generate a conflict identifier if the second conflict detection result indicates a conflict has been found, and control the target cache requests of the other dedicated queues to suspend participation in the internal arbitration based on the conflict identifier until the target cache requests are processed.

[0007] Thirdly, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the above-described cache request processing method.

[0008] Fourthly, a computer-readable storage medium is provided, which stores a computer program that, when executed by a processor, implements the steps of the above-described cache request processing method.

[0009] The above-mentioned method, apparatus, computer device, and storage medium for processing cache requests include the following steps: obtaining a target cache request to be processed and classifying the target cache request into a corresponding dedicated queue according to type attribute information; sequentially performing internal arbitration on the target cache requests in the dedicated queues, and comparing the target cache request that wins the internal arbitration with the processed cache request using a group index to perform a first conflict detection and obtain a first conflict detection result; if the first conflict detection result indicates no conflict is found, then the target cache request is allowed to access the cache, and the accessed target cache request is compared with the target cache requests in other dedicated queues using physical address information to perform a second conflict detection and obtain a second conflict detection result; if the second conflict detection result indicates a conflict is found, then a conflict identifier is generated, and the target cache requests in other dedicated queues are controlled to suspend participation in the internal arbitration until the target cache request is processed. In this invention, by classifying target cache requests into different dedicated queues according to type attribute information, the queuing management of requests is optimized, avoiding congestion problems caused by a single queue. Furthermore, the dual conflict detection mechanism of group index and physical address effectively reduces the occurrence of false conflicts and improves the accuracy and speed of request processing. Through internal arbitration and a sophisticated conflict identification mechanism, this invention can precisely control the pause and resumption of other queue requests after a conflict is detected, avoiding the disordered queuing and scheduling chaos caused by conflicts in related technologies. Especially in high-concurrency request environments, it can minimize latency caused by conflicts and improve cache access throughput. Therefore, this invention not only optimizes the cache request processing flow and improves the performance of multi-level caching systems, ensuring cache consistency, but also effectively reduces cache access latency and enhances the ability of multi-queue parallel processing, demonstrating promising application prospects. Attached Figure Description

[0010] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1 This is a schematic diagram of an application environment for a method of processing cache requests according to an embodiment of the present invention; Figure 2 This is a flowchart illustrating a method for processing cache requests according to an embodiment of the present invention; Figure 3 yes Figure 2 A schematic diagram of a specific implementation method for step S20; Figure 4 This is a schematic diagram of a cache request processing device according to an embodiment of the present invention; Figure 5 This is a schematic diagram of the structure of a computer device according to an embodiment of the present invention; Figure 6 This is another structural schematic diagram of a computer device according to one embodiment of the present invention. Detailed Implementation

[0012] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0013] The cache request processing method provided in this embodiment of the invention can be applied to, for example, Figure 1In this application environment, the client communicates with the server via a network. The server can obtain target cache requests to be processed from the client and classify them into corresponding dedicated queues according to their type attribute information. Internal arbitration is then performed on the target cache requests in each dedicated queue, and the target cache request that wins the internal arbitration is compared with the processed cache requests using a group index to perform a first conflict detection, obtaining a first conflict detection result. If the first conflict detection result indicates no conflict is found, the target cache request is allowed to access the server, and the accessed target cache request is compared with the target cache requests in other dedicated queues using their physical address information to perform a second conflict detection, obtaining a second conflict detection result. If the second conflict detection result indicates a conflict is found, a conflict identifier is generated, and based on the conflict identifier, the target cache requests in other dedicated queues are suspended from participating in the internal arbitration until the target cache request is processed. In this invention, by classifying target cache requests into different dedicated queues according to their type attribute information, request queuing management is optimized, avoiding congestion problems caused by a single queue. Furthermore, the dual conflict detection mechanism of group index and physical address effectively reduces the occurrence of false conflicts, improving the accuracy and speed of request processing. Through internal arbitration and a sophisticated conflict identification mechanism, this invention can precisely control the pause and resumption of other queue requests after a conflict is detected, avoiding the disordered queuing and scheduling chaos caused by conflicts in related technologies. Especially in high-concurrency request environments, it can minimize latency caused by conflicts and improve cache access throughput. Therefore, this invention not only optimizes the cache request processing flow and improves the performance of multi-level caching systems, ensuring cache consistency, but also effectively reduces cache access latency and enhances the ability of multi-queue parallel processing, demonstrating promising application prospects.

[0014] The client can be, but is not limited to, various personal computers, laptops, smartphones, tablets, and portable wearable devices. The server can be implemented using a standalone server or a server cluster consisting of multiple servers. The invention will now be described in detail through specific embodiments.

[0015] Please see Figure 2 As shown, Figure 2 A flowchart illustrating a method for processing cache requests provided in an embodiment of the present invention, the method comprising the following steps: S10: Obtain the target cache request to be processed, and classify the target cache request into the corresponding dedicated queue according to the type attribute information.

[0016] For example, the first step is to obtain the target cache requests to be processed. These target cache requests can be issued by multiple cores within the processor and involve read or write operations on cached data. Each target cache request contains several attributes, including request type information (e.g., read or write request) and memory access characteristic information (e.g., cache hit, cache miss, etc.). Based on these attributes, target cache requests can be effectively categorized. Specifically, the categorization process assigns cache requests of different natures to multiple pre-defined dedicated queues based on each request's type attribute and memory access characteristic information. These queues typically include, but are not limited to: an in-core read request queue, an in-core write request queue, a miss request queue, an in-core sniff request queue, and a write-back request queue. Each dedicated queue is responsible for processing a specific type of request, ensuring that requests can be optimally scheduled according to their specific access characteristics.

[0017] Furthermore, categorized cache requests can enter the corresponding processing flow according to their respective dedicated queues. For example, requests in the kernel read request queue may be prioritized for cache hits or low-latency requests, while requests in the write-back request queue will be appropriately scheduled during cache writes to avoid conflicts between different types of requests affecting the overall cache processing efficiency.

[0018] This classification method reduces interference between different cache request types, improves cache access concurrency, and enhances the overall processing efficiency of the caching system. Especially in multi-core processors, independent processing of different request types can effectively reduce resource contention and optimize cache resource utilization.

[0019] In some embodiments, the type attribute information includes request type information and memory access characteristic information. Classifying the target cache request into a corresponding dedicated queue according to the type attribute information includes: parsing the target cache request to obtain the request type information and the memory access characteristic information; classifying the target cache request into the corresponding dedicated queue according to the request type information and the memory access characteristic information; wherein the dedicated queue includes an in-core read request queue, an in-core write request queue, a missing request queue, an in-core sniffing request queue, and a write-back request queue.

[0020] For example, the type attribute information of a target cache request consists of request type information and memory access characteristic information. Request type information identifies the basic type of the request, such as whether it is a read or write request, while memory access characteristic information describes the specific access nature of the request, such as whether there is a cache hit, a cache miss, or whether a cache write-back is required. This attribute information is obtained by parsing the content of the target cache request. By parsing this information, the processing priority, execution path, and its demand for cache resources can be determined, thus providing a basis for subsequent scheduling.

[0021] Furthermore, based on the parsed request type and memory access characteristic information, target cache requests can be categorized into corresponding dedicated queues. Specifically, according to the nature of different requests, target cache requests can be sent to dedicated queues such as the kernel read request queue, kernel write request queue, missing request queue, kernel sniffing request queue, and write-back request queue. Each dedicated queue is optimized according to its request type and access characteristics, thereby achieving efficient cache scheduling, avoiding interference between different types of requests, and improving the parallelism and throughput of cache processing.

[0022] S20: Perform internal arbitration on the target cache requests in the dedicated queue in sequence, and compare the target cache request that wins the internal arbitration with the processed cache request using a group index to perform the first conflict detection and obtain the first conflict detection result.

[0023] For example, the priority and execution order of each request can be determined by performing internal arbitration on the target cache requests in the dedicated queue sequentially. It should be noted that internal arbitration refers to deciding which request can be processed first within the same queue based on factors such as request priority and access demand. The target cache request that wins the internal arbitration will be compared with the group index of already processed cache requests. That is, by comparing the group index information of the current request with the group index information of previously processed requests, a first conflict detection is performed. If the group index information is found to be the same and a conflict may exist, the first conflict detection result is obtained, determining whether to continue executing the request or proceed with subsequent processing.

[0024] Among them, such as Figure 3 As shown, step S20, which involves sequentially performing internal arbitration on the target cache requests in the dedicated queue and comparing the target cache request that wins the internal arbitration with the processed cache requests using a group index to perform a first conflict detection and obtain a first conflict detection result, includes the following steps: S21: Perform internal arbitration on the target cache requests in the dedicated queue to obtain the target cache request that wins the internal arbitration.

[0025] S22: Determine the first set of indexes corresponding to the target cache request that won the internal arbitration and the second set of indexes corresponding to the processed cache request.

[0026] S23: Compare the first set of indexes with the second set of indexes to perform the first conflict detection and obtain the first conflict detection result.

[0027] For example, all target cache requests in a dedicated queue can first undergo internal arbitration. Internal arbitration is a process that determines the processing order of requests based on preset rules. These rules may include factors such as request priority, cache hit rate, and request type. Using these rules, the highest priority, most urgent, or most suitable request is selected and marked as the target cache request that wins the internal arbitration. In other words, only requests that successfully pass internal arbitration will proceed to the next processing stage.

[0028] Once the target cache request that wins the internal arbitration is identified, it is compared with previously processed cache requests, specifically through group index information. Each cache request has a corresponding index in the queue, typically generated based on access address or access pattern characteristics. The first group index corresponding to the winning cache request is then determined and compared with the second group index of previously processed requests. This comparison determines whether the request has a potential conflict with any processed requests. If their group index information matches, it indicates a potential conflict, for example, both might be attempting to access the same cache line. A first conflict detection result is then generated, deciding whether to allow the request to continue processing. If a conflict is found, the request may need to be rescheduled or blocked until the conflict is resolved.

[0029] Based on the above embodiments, the method further includes: if the first set of indexes matches the second set of indexes, then the first conflict detection result is determined to be a conflict found; if the first set of indexes does not match the second set of indexes, then the first conflict detection result is determined to be a conflict not found.

[0030] For example, if the first set of indexes matches the second set of indexes, it indicates that the target cache request and the processed cache request have the same access range or target cache line, indicating a potential conflict. For instance, the two requests might attempt to access the same cache location or access data blocks belonging to the same memory region, thus causing a conflict. In this case, it can be determined that a conflict has been detected, meaning the first conflict detection result is a conflict detected. One of the requests needs to be paused or rescheduled to avoid the access conflict affecting the correctness and efficiency of the system.

[0031] If the first set of indexes does not match the second set of indexes, it means that the two requests are accessing different cache areas or that the index bits of the requests are different. A comparison reveals that there is no direct conflict between the two requests. Therefore, it is determined that no conflict was found, meaning the first conflict detection result is no conflict, and the target cache request can continue to execute.

[0032] This judgment can accurately identify conflicts between cache requests, ensuring that conflicting requests are detected and handled effectively in a timely manner, thereby improving the efficiency of cache access and system performance.

[0033] S30: If the first conflict detection result is that no conflict was found, the target cache request is allowed to access it, and the physical address information of the target cache request that has been accessed is compared with that of the target cache requests in other dedicated queues to perform the second conflict detection and obtain the second conflict detection result.

[0034] In some embodiments, comparing the physical address information of the completed target cache request with target cache requests in other dedicated queues to perform a second conflict detection and obtain a second conflict detection result includes: obtaining first physical address information corresponding to the completed target cache request; broadcasting the first physical address information to the other dedicated queues and obtaining a reception result from the other dedicated queues; comparing the first physical address information with the second physical address information corresponding to the target cache request in the other dedicated queues based on the reception result to obtain an address conflict comparison result; and determining the second conflict detection result based on the address conflict comparison result.

[0035] For example, the purpose of the second conflict detection is to compare the completed target cache request with target cache requests in other dedicated queues based on physical address information to determine whether a conflict exists. Specifically, the first physical address information corresponding to the completed target cache request can be obtained: First, after the target cache request completes its access, the physical address information of the request can be extracted. The physical address information represents the specific cache location accessed by the request, such as the physical address of a data block in memory. Therefore, the first physical address information can be broadcast to other dedicated queues to obtain their reception results: Next, the physical address information of the completed target cache request can be broadcast to all other dedicated queues. This process allows cache requests in other queues to know the physical address accessed by the current request. Through broadcasting, all queues can process address conflict detection simultaneously, improving overall efficiency.

[0036] Based on the received results, the first physical address information can be compared with the second physical address information corresponding to the target cache requests in other dedicated queues to obtain the address conflict comparison result. Specifically, based on the received broadcast results, the first physical address information in the broadcast can be compared with the second physical address information of the target cache requests in other dedicated queues. If the two physical addresses are the same, it indicates that the two cache requests have a conflict in physical storage. Finally, the second conflict detection result can be determined based on the physical address comparison result. If the physical address information matches, it indicates that there is a cache conflict, and the request is marked as conflicted; if the physical address information does not match, it indicates that there is no conflict, and the request can continue to be executed.

[0037] This approach not only relies on the group index of the request for conflict detection but also uses physical address information to ensure accurate identification of genuine conflicts between requests in different queues. This allows for more efficient management of cached requests, avoids wasting processing time due to false conflicts, and further improves processing performance.

[0038] Based on the above embodiments, determining the second conflict detection result according to the address conflict comparison result includes: if the address conflict comparison result is consistent, then determining the second conflict detection result as a conflict found; if the address conflict comparison result is inconsistent, then determining the second conflict detection result as no conflict found.

[0039] For example, if the address conflict comparison result is consistent, it means that the two target cache requests are accessing the same physical address, resulting in a conflict. In this case, the second conflict detection result is determined to be a conflict found, and appropriate measures are taken to suspend the conflicting request to avoid data errors or resource conflicts. Conversely, if the address conflict comparison result is inconsistent, it means that the two requests are accessing different physical addresses, and no conflict has occurred. Therefore, the second conflict detection result is determined to be a conflict not found, and the request can continue to be processed. In this way, cache request conflicts can be accurately identified and handled, ensuring efficient data access.

[0040] S40: If the second conflict detection result is a conflict found, a conflict identifier is generated, and the target cache request of the other dedicated queue is suspended from participating in the internal arbitration until the target cache request is processed.

[0041] For example, if a conflict is detected in the second conflict detection (i.e., the second conflict detection result is a conflict found), a conflict identifier is generated. This identifier is used to identify the target cache request that caused the conflict and its related information. Based on this conflict identifier, target cache requests in other dedicated queues can be suspended from participating in internal arbitration until the conflicting target cache request has been processed. This approach ensures that conflicting requests do not affect the processing of other requests while they are unresolved, thereby avoiding data access conflicts and resource contention, and guaranteeing the correctness and efficiency of cache access.

[0042] In some embodiments, the step of generating a conflict identifier and controlling the target cache request of the other dedicated queue to suspend participation in the internal arbitration until the target cache request is processed, if the second conflict detection result is a conflict detected, includes: determining the target dedicated queue and its corresponding entry number from the other dedicated queues based on the physical address information to obtain conflict correspondence information; generating a conflict identifier to identify the source of the conflict based on the conflict correspondence information; setting a pause flag in the entry number of the target dedicated queue based on the conflict identifier to control the target cache request of the target dedicated queue to suspend participation in the internal arbitration; and after the target cache request is processed, sending a wake-up instruction to the target dedicated queue based on the conflict identifier to remove the pause flag and restore the target cache request of the target dedicated queue to participate in the internal arbitration.

[0043] For example, when the second conflict detection result confirms a conflict, the source of the conflict can be identified and marked based on the physical address information. First, the target dedicated queue where the conflict occurred and its corresponding entry number can be determined from other dedicated queues. The purpose of this step is to accurately locate which cache requests need to be paused due to the conflict. The obtained conflict information includes the queue position and entry number where the conflict occurred, called conflict correspondence information. Next, a conflict identifier can be generated using the conflict correspondence information. This identifier indicates the specific source of the conflict, ensuring accurate tracking and control of the processing of conflict requests. Based on this conflict identifier, a pause flag can be set in the entry number of the corresponding target dedicated queue, marking the conflicting target cache request as paused to prevent it from continuing to participate in internal arbitration until the conflict is resolved. Finally, after the target cache request is processed, a wake-up instruction can be sent to the corresponding target dedicated queue according to the conflict identifier to remove the pause flag. The wake-up instruction resumes the execution of the conflict request, allowing it to re-participate in internal arbitration and continue the cache processing. This method ensures that conflict requests are processed in a timely manner without affecting the normal execution of other requests, improving the overall efficiency and stability of the caching system.

[0044] As can be seen, the above scheme optimizes request queuing management by classifying target cache requests into different dedicated queues based on type attribute information, thus avoiding congestion problems caused by a single queue. Secondly, the dual conflict detection mechanism using group indexes and physical addresses effectively reduces the occurrence of false conflicts, improving the accuracy and speed of request processing. Through internal arbitration and a fine-grained conflict identification mechanism, this invention can precisely control the pause and resumption of requests in other queues after a conflict is detected, avoiding the disordered queuing and scheduling chaos caused by conflicts in related technologies. Especially in high-concurrency request environments, it can minimize latency caused by conflicts and improve cache access throughput. Therefore, this invention not only optimizes the cache request processing flow and improves the performance of multi-level caching systems, ensuring cache consistency, but also effectively reduces cache access latency and enhances the ability of multi-queue parallel processing, showing promising application prospects.

[0045] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0046] In one embodiment, a cache request processing apparatus is provided, which corresponds one-to-one with the cache request processing methods in the above embodiments. For example... Figure 4 As shown, the cache request processing device includes an acquisition module 101, a first conflict detection module 102, a second conflict detection module 103, and a processing module 104. Detailed descriptions of each functional module are as follows: The acquisition module 101 is used to acquire the target cache request to be processed and classify the target cache request into the corresponding dedicated queue according to the type attribute information; The first conflict detection module 102 is used to perform internal arbitration on the target cache requests in the dedicated queue in sequence, and compare the target cache request that wins the internal arbitration with the processed cache request by group index to perform the first conflict detection and obtain the first conflict detection result. The second conflict detection module 103 is used to allow the target cache request to access if the first conflict detection result is that no conflict is found, and to compare the physical address information of the target cache request that has completed the access with the target cache requests of other dedicated queues to perform the second conflict detection and obtain the second conflict detection result. The processing module 104 is configured to generate a conflict identifier if the second conflict detection result indicates a conflict, and control the target cache requests of the other dedicated queues to suspend participation in the internal arbitration until the target cache requests are processed.

[0047] The acquisition module 101 is used to parse the target cache request to obtain the request type information and the memory access characteristic information; and classify the target cache request into the corresponding dedicated queue according to the request type information and the memory access characteristic information; wherein, the dedicated queue includes an in-core read request queue, an in-core write request queue, a missing request queue, an in-core sniffing request queue, and a write-back request queue.

[0048] The first conflict detection module 102 is used to perform internal arbitration on the target cache request in the dedicated queue to obtain the target cache request that wins the internal arbitration; determine the first set of indexes corresponding to the target cache request that wins the internal arbitration and the second set of indexes corresponding to the processed cache request; compare the first set of indexes and the second set of indexes to perform the first conflict detection and obtain the first conflict detection result.

[0049] The first conflict detection module 102 is used to determine that the first conflict detection result is a conflict found if the first group of indexes matches the second group of indexes; and to determine that the first conflict detection result is no conflict found if the first group of indexes does not match the second group of indexes.

[0050] The second conflict detection module 103 is used to obtain the first physical address information corresponding to the target cache request that has been accessed; broadcast the first physical address information to the other dedicated queues to obtain the reception result of the other dedicated queues; compare the first physical address information with the second physical address information corresponding to the target cache request in the other dedicated queues based on the reception result to obtain the address conflict comparison result; and determine the second conflict detection result based on the address conflict comparison result.

[0051] The second conflict detection module 103 is used to determine that the second conflict detection result is a conflict found if the address conflict comparison result is consistent, and to determine that the second conflict detection result is no conflict found if the address conflict comparison result is inconsistent.

[0052] The processing module 104 is configured to determine the target dedicated queue and its corresponding entry number from the other dedicated queues based on the physical address information, and obtain conflict correspondence information; generate a conflict identifier to identify the source of the conflict based on the conflict correspondence information; set a pause flag in the entry number of the target dedicated queue according to the conflict identifier to control the target cache request of the target dedicated queue to pause participation in the internal arbitration; and after the target cache request is processed, send a wake-up instruction to the target dedicated queue according to the conflict identifier to remove the pause flag and restore the target cache request of the target dedicated queue to participate in the internal arbitration.

[0053] This invention provides a cache request processing apparatus. By classifying target cache requests into different dedicated queues based on type attribute information, it optimizes request queuing management and avoids congestion problems caused by a single queue. Secondly, it employs a dual conflict detection mechanism using group indexes and physical addresses, effectively reducing false conflicts and improving the accuracy and speed of request processing. Through internal arbitration and a fine-grained conflict identification mechanism, this invention can precisely control the pause and resumption of requests in other queues after a conflict is detected, avoiding disordered queuing and scheduling chaos caused by conflicts in related technologies. Especially in high-concurrency request environments, it can minimize latency caused by conflicts and improve cache access throughput. Therefore, this invention not only optimizes the cache request processing flow and improves the performance of multi-level caching systems, ensuring cache consistency, but also effectively reduces cache access latency and enhances the ability of multi-queue parallel processing, showing promising application prospects.

[0054] For specific limitations regarding the cache request processing device, please refer to the limitations of the cache request processing method described above, which will not be repeated here. Each module in the aforementioned cache request processing device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in the computer device in hardware form, or stored in the memory of the computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0055] In one embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 5 As shown. The computer device includes a processor, memory, network interface, and database connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile and / or volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The network interface is used to communicate with external clients via a network connection. When executed by the processor, the computer program implements a cache request processing method, server-side functions, or steps.

[0056] In one embodiment, a computer device is provided, which may be a client, and its internal structure diagram may be as follows: Figure 6As shown, the computer device includes a processor, memory, network interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The network interface is used to communicate with an external server via a network connection. When executed by the processor, the computer program implements client-side functions or steps of a cached request processing method.

[0057] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to perform the following steps: Obtain the target cache requests to be processed, and classify the target cache requests into the corresponding dedicated queues according to the type attribute information; The target cache requests in the dedicated queue are sequentially internally arbitrated, and the target cache request that wins the internal arbitration is compared with the processed cache request by group index to perform the first conflict detection and obtain the first conflict detection result; If the first conflict detection result is no conflict found, the target cache request is allowed to access it, and the physical address information of the target cache request that has completed the access is compared with the target cache requests of other dedicated queues to perform the second conflict detection and obtain the second conflict detection result. If the second conflict detection result indicates a conflict has been found, a conflict identifier is generated, and the target cache requests in the other dedicated queues are suspended from participating in the internal arbitration based on the conflict identifier until the target cache requests are processed.

[0058] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, the computer program performing the following steps when executed by a processor: Obtain the target cache requests to be processed, and classify the target cache requests into the corresponding dedicated queues according to the type attribute information; The target cache requests in the dedicated queue are sequentially internally arbitrated, and the target cache request that wins the internal arbitration is compared with the processed cache request by group index to perform the first conflict detection and obtain the first conflict detection result; If the first conflict detection result is no conflict found, the target cache request is allowed to access it, and the physical address information of the target cache request that has completed the access is compared with the target cache requests of other dedicated queues to perform the second conflict detection and obtain the second conflict detection result. If the second conflict detection result indicates a conflict has been found, a conflict identifier is generated, and the target cache requests in the other dedicated queues are suspended from participating in the internal arbitration based on the conflict identifier until the target cache requests are processed.

[0059] It should be noted that the functions or steps that can be implemented by the computer-readable storage medium or computer device described above can be referred to the relevant descriptions on the server side and client side in the foregoing method embodiments. To avoid repetition, they will not be described one by one here.

[0060] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0061] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is used as an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0062] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A method for processing cached requests, characterized in that, The method includes: Obtain the target cache requests to be processed, and classify the target cache requests into the corresponding dedicated queues according to the type attribute information; The target cache requests in the dedicated queue are sequentially internally arbitrated, and the target cache request that wins the internal arbitration is compared with the processed cache request by group index to perform the first conflict detection and obtain the first conflict detection result; If the first conflict detection result is no conflict found, the target cache request is allowed to access it, and the physical address information of the target cache request that has completed the access is compared with the target cache requests of other dedicated queues to perform the second conflict detection and obtain the second conflict detection result. If the second conflict detection result indicates a conflict has been found, a conflict identifier is generated, and the target cache requests in the other dedicated queues are suspended from participating in the internal arbitration based on the conflict identifier until the target cache requests are processed.

2. The method according to claim 1, characterized in that, The type attribute information includes request type information and memory access characteristic information. The step of classifying the target cache request into the corresponding dedicated queue according to the type attribute information includes: The target cache request is parsed to obtain the request type information and the memory access characteristic information; Based on the request type information and the memory access characteristic information, the target cache request is classified into the corresponding dedicated queue; The dedicated queues include an in-core read request queue, an in-core write request queue, a missing request queue, an in-core sniff request queue, and a write-back request queue.

3. The method according to claim 1, characterized in that, The process of sequentially performing internal arbitration on target cache requests in the dedicated queue, and comparing the target cache request that wins the internal arbitration with the processed cache requests using a group index to perform a first conflict detection and obtain a first conflict detection result includes: The target cache requests in the dedicated queue are internally arbitrated to obtain the target cache request that wins the internal arbitration. Determine the first set of indices corresponding to the target cache request that won the internal arbitration and the second set of indices corresponding to the processed cache request; The first set of indexes is compared with the second set of indexes to perform the first conflict detection and obtain the first conflict detection result.

4. The method according to claim 3, characterized in that, The method further includes: If the first set of indexes matches the second set of indexes, then the first conflict detection result is determined to be a conflict found; If the first set of indexes does not match the second set of indexes, then the first conflict detection result is determined to be no conflict found.

5. The method according to claim 1, characterized in that, The step of comparing the physical address information of the completed target cache request with target cache requests from other dedicated queues to perform a second conflict detection and obtain the second conflict detection result includes: Obtain the first physical address information corresponding to the target cache request that has been accessed; The first physical address information is broadcast to the other dedicated queues, and the reception results of the other dedicated queues are obtained; Based on the received result, the first physical address information is compared with the second physical address information corresponding to the target cache request in the other dedicated queues to obtain the address conflict comparison result; The second conflict detection result is determined based on the address conflict comparison result.

6. The method according to claim 5, characterized in that, Determining the second conflict detection result based on the address conflict comparison result includes: If the address conflict comparison results are consistent, then the second conflict detection result is determined to be a conflict detected; If the address conflict comparison result is inconsistent, then the second conflict detection result is determined to be no conflict found.

7. The method according to claim 1, characterized in that, If the second conflict detection result indicates a conflict, a conflict identifier is generated, and based on the conflict identifier, the target cache requests in other dedicated queues are suspended from participating in the internal arbitration until the target cache requests are processed. This includes: Based on the physical address information, the target dedicated queue and its corresponding entry number that caused the conflict are determined from the other dedicated queues to obtain the conflict correspondence information; A conflict identifier is generated based on the conflict correspondence information to identify the source of the conflict; A pause flag is set in the entry number of the target dedicated queue according to the conflict identifier to control the target cache request of the target dedicated queue to pause participation in the internal arbitration; After the target cache request is processed, a wake-up instruction is sent to the target dedicated queue according to the conflict identifier to remove the pause mark and restore the target cache request of the target dedicated queue to participate in the internal arbitration.

8. A cache request processing apparatus, characterized in that, include: The acquisition module is used to acquire target cache requests to be processed and classify the target cache requests into corresponding dedicated queues according to type attribute information. The first conflict detection module is used to perform internal arbitration on the target cache requests in the dedicated queue in sequence, and compare the target cache request that wins the internal arbitration with the processed cache request by group index to perform the first conflict detection and obtain the first conflict detection result. The second conflict detection module is used to allow the target cache request to access the cache if the first conflict detection result is that no conflict is found, and to compare the physical address information of the target cache request that has completed the access with the target cache requests in other dedicated queues to perform the second conflict detection and obtain the second conflict detection result. The processing module is configured to generate a conflict identifier if the second conflict detection result indicates a conflict has been found, and control the target cache requests of the other dedicated queues to suspend participation in the internal arbitration based on the conflict identifier until the target cache requests are processed.

9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the cache request processing method as described in any one of claims 1 to 7.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the cache request processing method as described in any one of claims 1 to 7.

Citation Information

Patent Citations

  • Method for processing request conflict by cache digital circuit

    CN112965668A

  • Arbitration-based storage access system, processor and computing equipment

    CN117891758A

  • Request method and device for cache resources, equipment and medium

    CN120295766A

  • Caching method and system for access unit of superscalar processor

    CN120780659A

  • Access method, device and equipment and computer readable storage medium

    CN120950278A