Laser radar receiving circuit based on global approximation histogram digital-to-time converter

Abstract

The invention discloses a laser radar receiving circuit based on a global approximation histogram digital-to-time converter, which comprises a plurality of receiving pixel topologies, and each receiving pixel topology comprises an SPAD receiving front end, a global approximation histogram digital-to-time converter and a data storage read-out module. The SPAD receiving front end is used for receiving the photon pulse and generating a photon event generation signal; the global approximation histogram digital time converter is used for carrying out flight time voltage value approximation and digital time conversion to obtain a flight time digital code value and a reference time digital code value; and the data storage and reading module is used for controlling storage and reading of the flight time digital code value and the reference time digital code value. The single photon avalanche diode laser radar is ensured to have a high frame rate, the pixel area is further reduced, the power consumption is reduced, and the single photon avalanche diode laser radar can be applied to the technical field of integrated circuits.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, and in particular to a laser radar receiving circuit based on a global approximation histogram digital time converter. BACKGROUND

[0002] There is a contradictory relationship between long-distance detection, noise filtering performance and area power consumption of a single photon avalanche diode (SPAD) laser radar (LiDAR) receiving front-end pixel, which limits the application of a large pixel array of a SPAD-LiDAR, and causes it to be unable to achieve higher spatial resolution accuracy. An existing successive approximation histogramming time-to-digital converter (SA-hTDC) scheme combines histogram processing technology and a digital time converter to solve the problem of excessive area overhead of a traditional on-chip histogram, and can realize an arrayed pixel histogram. However, this type of scheme needs to use a bisection method or a quartering method for successive approximation direct time of flight (dTOF) coarse quantization, and combines indirect time of flight (iTOF) fine quantization to achieve sufficient measurement accuracy, and has the following defects: 1) Low frame rate. In the dTOF coarse quantization process, the acquisition of each bit of data needs to be gradually approximated by integrating for a sufficient time (emitting a sufficient number of laser pulses) to ensure the accuracy of the judgment; in the iTOF fine quantization process, a sufficient number of photon events also need to be measured to obtain accurate phase information, which leads to a decrease in the detection frame rate.

[0003] 2) System complexity is improved. The receiving end must include iTOF quantization to ensure measurement accuracy, but iTOF needs to move the phase multiple times for signal photon event integration, and then output to an off-chip host computer to calculate the specific offset of the reflected laser signal.

[0004] 3) Higher requirements are put forward for the laser pulse width of the transmitting end. Since the least significant bit (LSB) of the coarse quantization cannot be reduced, the laser emission frequency of the iTOF must cover the entire LSB. If the transmitting end wants to ensure the same peak power, the emission frequency will be reduced.

[0005] The above problems need to be solved. SUMMARY

[0006] The present application aims to at least partially solve one of the problems in the prior art.

[0007] Therefore, one objective of this invention is to provide a lidar receiving circuit based on a global approximation histogram digital time converter, which ensures that the single-photon avalanche diode lidar has a high frame rate while further reducing the pixel area and power consumption.

[0008] To achieve the above-mentioned technical objectives, the technical solutions adopted in the embodiments of the present invention include: This invention provides a lidar receiving circuit based on a global approximation histogram digital-time converter. The lidar receiving circuit includes multiple receiving pixel topologies, each of which includes a SPAD receiving front-end, a global approximation histogram digital-time converter, and a data storage and readout module, wherein: The SPAD receiving front end is used to receive photon pulses and generate photon event occurrence signals; The global approximation histogram digital-time converter is used to perform time-of-flight voltage value approximation and digital-time conversion based on the photon event occurrence signal to obtain the time-of-flight digital code value and the reference time digital code value. The data storage and readout module is used to control the storage and readout of the flight time digital code value and the reference time digital code value.

[0009] Furthermore, in one embodiment of the present invention, the global approximation histogram digital-to-time converter includes a ramp generation module, a time-to-analog converter, a voltage index module, an approximation switch control module, a difference sampling comparison module, and a source follower. The output terminal of the SPAD receiving front end is connected to the control input terminal of the time-to-analog converter. The output terminal of the ramp generation module is connected to the voltage input terminal of the time-to-analog converter. The voltage output terminals of the time-to-analog converter and the voltage index module are both connected to the input terminal of the source follower. The output terminal of the source follower is connected to the input terminal of the difference sampling comparison module. The input terminals of the approximation switch control module and the data storage readout module are both connected to the output terminal of the difference sampling comparison module. The output terminal of the approximation switch control module is connected to the input terminal of the voltage index module.

[0010] Furthermore, in one embodiment of the present invention, the global approximation histogram digital-time converter approximates the time-of-flight voltage value through the following steps: The time-to-analog converter triggers a built-in capacitor to discharge a constant current until the reference time window ends, based on the photon event occurrence signal, to generate a target voltage signal and transmit the target voltage signal to the source follower. generating an index voltage signal by the voltage index module and transmitting the index voltage signal to the source follower; transmitting the target voltage signal and the index voltage signal to the difference sampling comparison module by the source follower; comparing the target voltage signal and the index voltage signal by the difference sampling comparison module and transmitting the comparison result to the approximation switch control module; generating a corresponding index voltage control signal according to the comparison result by the approximation switch control module and transmitting the index voltage control signal to the voltage index module, the index voltage control signal being used to control the index voltage signal to approximate the target voltage signal.

[0011] Further, in an embodiment of the present application, the global approximation histogram digital time converter performs digital time conversion to obtain the time of flight digital code value by the following steps: sampling the index voltage signal after the time of flight voltage value approximation and the reference voltage signal to the lower plate and the upper plate of the comparison capacitor of the difference sampling comparison module respectively; generating a ramp voltage signal by the ramp generation module and transmitting the ramp voltage signal to the time analog converter, so that the target voltage signal output by the time analog converter starts to discharge in a ramp step; when the dynamic comparator of the difference sampling comparison module flips, determining the time of flight digital code value according to the global count value of the discharge duration corresponding to the final index voltage.

[0012] Further, in an embodiment of the present application, the global approximation histogram digital time converter performs digital time conversion to obtain the reference time digital code value by the following steps: controlling the target voltage signal output by the time analog converter to discharge at a constant current for a reference time width, obtaining a lowest discharge voltage signal; sampling the lowest discharge voltage signal and the reference voltage signal to the lower plate and the upper plate of the comparison capacitor of the difference sampling comparison module respectively; generating a ramp voltage signal by the ramp generation module and transmitting the ramp voltage signal to the time analog converter, so that the target voltage signal output by the time analog converter starts to discharge in a ramp step; when the dynamic comparator of the difference sampling comparison module flips, determining the reference time digital code value according to the global count value of the discharge duration.

[0013] Further, in an embodiment of the present application, the time-of-flight digital code value and the reference time digital code value are used to calculate a pulse time-of-flight, the pulse time-of-flight being calculated by the following formula: TOF = T REF * (CNT TOF / CNT REF ) wherein TOF represents the pulse time-of-flight, T REF represents the reference time width, CNT TOF represents the time-of-flight digital code value, CNT REF represents the reference time digital code value.

[0014] Further, in an embodiment of the present application, the laser radar receiving circuit further comprises an input control bus and an output data bus, the receiving pixel topology forms a receiving pixel array, the input control bus is used to provide a global control signal for the receiving pixel array, and the output data bus is used to output a time-of-flight data array corresponding to the receiving pixel array.

[0015] Further, in an embodiment of the present application, the laser radar receiving circuit further comprises a phase-locked loop, a global state machine, a bias generation module and a global counter, the phase-locked loop is used to provide a global clock and generate a reference time width of a specific length, and the global state machine, the bias generation module and the global counter are used to control signal detection and time quantization of the receiving pixel array.

[0016] Further, in an embodiment of the present application, the laser radar receiving circuit further comprises a readout control module, the readout control module is used to control readout of the time-of-flight data array.

[0017] The advantages and beneficial effects of the present application will be partially given in the following description, partially will become obvious from the following description, or will be understood through the practice of the present application: The embodiment of the present application provides a laser radar receiving circuit based on a global approximation histogram digital time converter, comprising a plurality of receiving pixel topologies, each of the receiving pixel topologies comprising a SPAD receiving front end, a global approximation histogram digital time converter and a data storage readout module, the global approximation histogram digital time converter is used for time-of-flight voltage value approximation and digital time conversion, without quantizing direct time-of-flight and indirect time-of-flight, ensuring that the single-photon avalanche diode laser radar has a high frame rate, while further reducing the pixel area and reducing the power consumption. BRIEF DESCRIPTION OF DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following introduces the drawings needed to be used in the embodiments of the present application. It should be understood that the drawings introduced in the following are only for facilitating the clear description of the technical solutions in the embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without paying creative labor.

[0019] Figure 1 A structure schematic diagram of a laser radar receiving circuit based on a global approximation histogram digital time converter provided by the embodiment of the present application is provided. Figure 2 A structure schematic diagram of a receiving pixel topology provided by the embodiment of the present application is provided. Figure 3 A timing control schematic diagram of a time-of-flight voltage value approximation phase provided by the embodiment of the present application is provided. Figure 4 A working flow schematic diagram of the global approximation histogram digital time converter in the time-of-flight voltage value approximation phase provided by the embodiment of the present application is provided. Figure 5 Another working flow schematic diagram of the global approximation histogram digital time converter in the time-of-flight voltage value approximation phase provided by the embodiment of the present application is provided. Figure 6 A timing control schematic diagram of a digital time conversion phase provided by the embodiment of the present application is provided. Figure 7 A working flow schematic diagram of the global approximation histogram digital time converter in the digital time conversion phase provided by the embodiment of the present application is provided. Figure 8 Another working flow schematic diagram of the global approximation histogram digital time converter in the digital time conversion phase provided by the embodiment of the present application is provided. DETAILED DESCRIPTION

[0020] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the drawings, wherein the same or similar notations represent the same or similar elements or elements with the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary and are only used to explain the present application, and cannot be understood as a limitation of the present application.

[0021] In the description of the present application, the meaning of multiple is two or more than two, if there is a description of the first, the second is only used for distinguishing the technical features for the purpose, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of indicated technical features or implicitly indicating the sequence of indicated technical features. In addition, unless otherwise defined, all technical and scientific terms used in this paper have the same meaning as understood by those skilled in the art.

[0022] The existing single-photon avalanche diode laser radar receiving front-end pixel has the following problems: 1) The high-precision histogram time-to-digital converter (hTDC) using the traditional storage peak searching method needs a large storage area. If the chip manufacturing process node is not reduced or the three-dimensional stacking process is used, due to the large pixel area, it cannot be applied to the flash type single-photon avalanche diode laser radar (SPAD-LiDAR) with a large array.

[0023] 2) The pixel built-in histogram time-to-digital converter (hTDC) relies on a high-frequency digital clock, which is contrary to the original intention of realizing high precision and low power consumption, limiting the application of high-precision time-to-digital converter (hTDC) in low-power scenarios.

[0024] 3) The successive approximation type high-precision time-to-digital converter (SA-hTDC) method needs to combine direct time-of-flight (dTOF) and indirect time-of-flight (iTOF) quantization to ensure low power consumption and high quantization precision, but this requires a larger laser emission pulse width, thereby limiting the system frame rate.

[0025] The present application aims to overcome the defects of the existing histogram time-to-digital converter (hTDC) and proposes a pixel built-in global approximation histogram digital time converter (Global Approximation hTDC, GA-hTDC) architecture and a laser radar receiving circuit containing it, which ensures that the single-photon avalanche diode laser radar (SPAD-LiDAR) has a high frame rate while further reducing the pixel area and reducing power consumption.

[0026] With reference to Figure 1 and 2 , the present application embodiment provides a laser radar receiving circuit based on a global approximation histogram digital time converter, which includes a plurality of receiving pixel topologies, each receiving pixel topology including a SPAD receiving front-end, a global approximation histogram digital time converter, and a data storage and readout module, wherein: The SPAD receiving front-end is used to receive photon pulses and generate a photon event occurrence signal; The global approximation histogram digital time converter is used to perform time-of-flight voltage value approximation and digital time conversion based on the photon event occurrence signal to obtain a time-of-flight digital code value and a reference time digital code value; The data storage and readout module is used to control the storage and readout of the time-of-flight digital code value and the reference time digital code value.

[0027] The application provides a new SPAD-LiDAR receiving system with a built-in global approximation histogram digital time converter (GA-hTDC), wherein a time-to-analog converter (TAC) is used in combination with a single slope analog-to-digital converter (SS-ADC) to realize the time digital converter (TDC).

[0028] The TDC provided by the application adopts a structure of a TAC combined with an ADC, and does not need a high-speed clock. The quantification of the time of flight of each pixel of the array only needs a reference time window T REF provided globally as a whole detection range. Once a photon pulse is detected in the pixel in the range of T REF , the capacitor of the TAC starts constant current discharge until the end of the time window. The width of T REF is ensured to be accurate through a phase-locked loop circuit. Therefore, the minimum resolution LSB of the time of the pixel depends on the number of steps of the slope voltage generating circuit.

[0029] In view of the mismatch phenomenon of the TAC, the discharge amplitudes of different pixels are different in the reference time window T REF . The application quantizes the full range of T REF through the SS-ADC, and each pixel can adaptively find the total digital code value CNT REF corresponding to the discharge voltage amplitude of the full range of T REF . Moreover, the SS-ADCs of all the pixels can share a global counter for quantization of the code value corresponding to the voltage, which greatly saves the area of the whole receiving system.

[0030] The embodiment of the application uses the global approximation histogram digital time converter to perform time-of-flight voltage value approximation and digital time conversion, does not need to quantize the direct time of flight and the indirect time of flight, ensures that the single photon avalanche diode laser radar has a high frame rate, further reduces the pixel area and reduces the power consumption.

[0031] Reference Figure 1 and 2, further as an optional implementation, the global histogram approximation digital time converter comprises a slope generation module, a time analog converter, a voltage indexing module, an approximation switch control module, a difference sampling comparison module and a source follower, the output end of the SPAD receiving front end is connected with the control input end of the time analog converter, the output end of the slope generation module is connected with the voltage input end of the time analog converter, the voltage output end of the time analog converter and the voltage output end of the voltage indexing module are both connected with the input end of the source follower, the output end of the source follower is connected with the input end of the difference sampling comparison module, the input end of the approximation switch control module and the input end of the data storage readout module are both connected with the output end of the difference sampling comparison module, and the output end of the approximation switch control module is connected with the input end of the voltage indexing module.

[0032] Figure 2 Presented is a SPAD-LiDAR receiving pixel topology structure of a pixel-built-in global histogram approximation digital time converter (GA-hTDC) proposed by the present application, which covers a SPAD receiving front end, a slope generation module, a time analog converter (TAC), a voltage indexing module, an approximation switch control module, a difference sampling comparison module, a source follower and a data storage readout module.

[0033] The receiving pixel topology pixel contains two stages when carrying out a frame of detection work. Among them, stage one (S MODE low) is a target detection and target flight time voltage value approximation stage; stage two (S MODE high) is a digital time conversion stage, which quantizes the last two analog voltage data of the frame into digital code values and reads them out to the outside of the chip. Specifically, stage one contains several laser emission operations, the purpose of which is to repeatedly detect the same target and carry out histogram processing, which occupies most of the time of a frame of detection. The histogram technology proposed by the present application is different from the traditional storage peak searching method, which uses a voltage indexing method to globally approximate the voltage value corresponding to the direct flight time, and realizes the histogram processing effect of direct approximation through repeated detection. After stage one ends, the index voltage V INDEX has been approximated from an initial intermediate potential V M to a final stable target value, and stage two uses the difference sampling comparison module to convert the voltage into a flight time digital code value CNT TOF . In summary, through the cooperation of the two stages, the pixel circuit completes the conversion from time to voltage, and then from voltage to digital code, and finally outputs to the outside of the chip for further data processing.

[0034] In view of the non-uniformity between pixels, the time value corresponding to the minimum resolution (LSB) of the digital code value deviates. To cope with this deviation, the time analog converter (TAC) of each pixel in the full time window TREF range, and then accurately determine the time value corresponding to each LSB. The application allows time-multiplexing difference sampling comparison module to only need to make subtle adjustments in timing, so as to obtain CNT TOF After that, control TAC in the full reference time window T REF discharge, the corresponding reference time digital code value CNT REF is quantized. Finally, after a frame of detection, the size of the time of flight TOF of each pixel is the product of the time window width and the ratio of the flight time digital code value to the reference digital code value, that is, TOF = T REF * (CNT TOF / CNT REF ).

[0035] The specific principles of each part are as follows: SPAD receiving front end: during a frame of detection, the function of the SPAD receiving front end can be summarized as quenching and resetting. Before the laser emitted by the transmitting end, the pixel is reset by the RSTN VS signal to prevent the SPAD from being incompletely quenched, at which time the voltage difference between the two ends of the SPAD is the bias V HV . When the selection control port S MODE is low, the SPAD receives the photon signal to generate an avalanche within a reference time window T REF , the anode voltage of the SPAD rises rapidly, the switch signal SW TOF is pulled high, the SPAD receiving front end outputs a photon event, and this continues until T REF ends. When the S MODE port is high, T REF is directly transmitted to SW TOF , at which time it is used to quantify the reference time digital code value.

[0036] Global approximation histogram digital time converter: this module is composed of a time analog converter (TAC), a slope generation module, a voltage indexing module, an approximation switch control module, a difference sampling comparison module, and a source follower. In the first stage of a frame of detection, set S MODE to low, and the overall circuit is in a global approximation mode based on time of flight voltage sampling. Initially, the capacitor C INDEX of the voltage indexing module is reset to the middle voltage value V M by the RST signal. The RSTN VS signal is also used for the reset of the capacitor C SAMP . When a photon event occurs, SW TOF triggers the constant current source I D,N and the capacitor C SAMPThe switch is closed, and the capacitor C on the TAC is charged SAMP The constant current discharge is started until the reference time window T REF is ended. Then, the difference sampling comparison module compares the target voltage signal V SAMP with the index voltage signal V INDEX in the voltage index module. According to the comparison result, the approximation switch control module charges or discharges the capacitor C INDEX in the voltage index module by one voltage step, so that the voltage V INDEX is approximated to the target value, achieving the function of histogram processing. In order to save the power consumption of the overall pixel, the application adopts a dynamic comparator, which only compares when the comparison control clock signal CLK CMP is high, and there is no static power consumption. Since the kickback noise of the dynamic comparator will affect the voltage V INDEX containing histogram information, a buffer is needed between the capacitor plate and the dynamic comparator for isolation. The application directly uses a simple source follower to connect V SAMP and V INDEX to the input end V IN of the two source followers, and the output end V OUT is connected to the input of the interpolation sampler, that is, V INDEX,SF and V SAMP,SF , achieving the purpose of isolation and driving. In order to ensure that the common-mode input voltage of the dynamic comparator is always a fixed value, the pixel of the application adopts a difference sampling comparison technology. In this way, the dynamic comparator will trigger the comparator to flip when the positive input voltage V CMP is exactly lower than the reference voltage value V REF of the global input at the moment, ensuring that the flip time is within the preset clock CLK CMP high range, and ensuring the reliability of the comparison. In addition, the difference sampling comparison technology introduced in the application can also ensure the time division multiplexing of the dynamic comparator. In the second phase of one frame of detection, S MODE is set to high, and the overall pixel is in the acquisition mode of the time-of-flight digital code value CNT TOF and the reference time digital code value CNT REF . The slope generation module in the pixel and the difference sampler cooperate with the global counter to form a single slope analog-to-digital converter (SS-ADC), which can quantize CNT TOF and CNT REF twice in succession, avoiding the use of two dynamic comparators, thereby achieving the purpose of reducing the area of the pixel circuit.

[0037] Data storage and readout module: after one frame of detection is completed, the pixel converts the final index voltage value V INDEX,FINAL into a ten-bit time-of-flight digital code CNTTOF and the full reference time range discharge amplitude V H -V L converted into a reference time decimal code CNT REF In the second phase of a pixel frame detection, set S MODE signal is high, at the time of the comparator flip, CMP Q signal and S MODE signal through a combination of logic circuits, the output code value G_CNT<9:0> of the global counter is latched into 10 D flip-flops. Finally, the code value Q<9:0> is read out by using the read enable signal EN RO CNT TOF and CNT REF can be controlled by EN RO to read out data in time for the next imaging processing.

[0038] Referring to Figures 3 to 5 , further as an optional embodiment, the global approximation histogram digital time converter approximates the time-of-flight voltage value by the following steps: triggering the built-in capacitor to discharge constant current until the end of the reference time window to generate a target voltage signal and transmitting the target voltage signal to the source follower through the time analog-to-digital converter; generating an index voltage signal and transmitting the index voltage signal to the source follower through the voltage index module; transmitting the target voltage signal and the index voltage signal to the difference sampling comparison module through the source follower; comparing the target voltage signal and the index voltage signal through the difference sampling comparison module, and transmitting the comparison result to the approximation switch control module; generating a corresponding index voltage control signal according to the comparison result through the approximation switch control module, and transmitting the index voltage control signal to the voltage index module, the index voltage control signal being used to control the approximation of the index voltage signal to the target voltage signal.

[0039] Specifically, Figure 3 a global control timing of the time-of-flight voltage value approximation phase in a frame detection is shown, in which FIRE is the laser emission signal of the emission end, and after a certain delay offset correction, the target reception can be started. Figure 4 and Figure 5 respectively show the working flowchart of the voltage drop and rise of a step in the process of the index voltage signal continuously approximating the target voltage signal of the global approximation histogram digital time converter of the present application in the time-of-flight voltage value approximation phase of a frame detection. In a frame detection, the emission end repeatedly emits several laser pulses, and if the SPAD of the pixel is in the reference time range TREF Upon receiving the photon signal, the capacitor C SAMP will start a constant current discharge until T REF the high level ends. In Figure 4 the case of the Mth laser shot, the photon event trigger time is T SAMP <m>< / m> , corresponding to the voltage V SAMP <m>V INDEX <m-1>Small, so to let the index voltage V INDEX <m-1>Direct access to the sampled voltage V SAMP <m>The approximation switch control module generates two continuous high level narrow pulses EN CMP and EN RAMP1 by comparing the falling edge of clock signal CLK RAMP2 , and selects the signal to be transmitted to switch EN DN1 and EN DN2 according to the output result of the comparator, so that the charge of capacitor C INDEX is shared with capacitor C D,N , i.e. V INDEX <m-1>discharging a voltage step V RAMP,N , obtaining an index voltage V INDEX <m>. By bias voltage V BISAN The discharge charge can be effectively ensured to be fixed, so as to ensure that the step voltage offset is small. Conversely, in Figure 5 , the photon event trigger time is T SAMP <n>< / n> , the voltage V INDEX <n-1>A voltage step V RAMP,P , the approximation switch control module selects to transmit the signal to the switches EN UP1 and EN UP2 , so that the capacitor C INDEX shares the charge with the capacitor C D,P to approach the target voltage. The bias voltage V BISAP can effectively ensure the fixed charging charge, thereby ensuring a small step voltage offset. In order to ensure the accuracy of the histogram, the falling and falling step voltages, i.e. V RAMP,N and V RAMP,P , should be set as equal as possible.

[0040] Referring to Figure 6 and 7 , as a further optional embodiment, the global approximation histogram digital time converter performs digital time conversion to obtain a time-of-flight digital code value by the following steps: The index voltage signal after the time-of-flight voltage value approximation and the reference voltage signal are respectively sampled to the lower plate and the upper plate of the comparison capacitor of the difference sampling comparison module; The slope voltage signal is generated by the slope generation module and transmitted to the time analog converter, so that the target voltage signal output by the time analog converter starts to be discharged in a slope step; When the dynamic comparator of the difference sampling comparison module flips, the time-of-flight digital code value is determined according to the global count value of the final index voltage corresponding to the discharge duration.

[0041] Referring to Figure 6 and 8 , as a further optional embodiment, the global approximation histogram digital time converter performs digital time conversion to obtain a reference time digital code value by the following steps: The target voltage signal output by the time analog converter is controlled to be discharged at a constant current for a reference time width, to obtain a lowest discharge voltage signal; The lowest discharge voltage signal and the reference voltage signal are respectively sampled to the lower plate and the upper plate of the comparison capacitor of the difference sampling comparison module; The slope voltage signal is generated by the slope generation module and transmitted to the time analog converter, so that the target voltage signal output by the time analog converter starts to be discharged in a slope step; When the dynamic comparator of the difference sampling comparison module flips, the reference time digital code value is determined according to the global count value of the discharge duration.

[0042] Specifically, Figure 6 the global control timing of the digital time conversion stage in a frame of detection is shown, Figure 7 and Figure 8 The invention demonstrates the time-of-flight digital code value (CNT) of the global approximation histogram digital-time converter during the digital-time conversion phase of a single frame detection. TOF and reference time digital code value CNT REF The specific conversion process. Figure 7 In the process, the pixel is controlled by the switching SP1 and SP3 pulse signals, resulting in the final index voltage V. INDEX,FINAL buffered signal V FINAL，SF and reference voltage V REF Capacitor C was sampled respectively DS The lower and upper plates, at this time C DS The voltage difference between the upper and lower plates is V REF -V FIANL，SF Then, the switch signal SP2 rises to a high level, and non-overlapping high-level narrow pulse signals EN are continuously input. RAMP1 and EN RAMP2 , making V SAMP From the highest discharge voltage V H Continuous ramp-step discharge. When the dynamic comparator flips, V SAMP Just discharged to V INDEX,FINAL After passing through the source follower, V CMP The corresponding slope discharge voltage difference is V H,SF -V FINAL,SF At this point, the count value corresponding to the global counter is stored, which is the Time-of-Flight (CNT) digital code value. TOF Similarly, Figure 8 In the middle, the pixel first sets the voltage V SAMP Constant current discharge with a reference time width T REF The lowest discharge voltage signal V was then obtained. L At this time, V REF and V L After interpolation sampling to C DS Upper and lower plates, V SAMP From V H Continuous ramp-step discharge, V flips when the comparator flips. SAMP The corresponding discharge amplitude is V H -V L After passing through the source follower, V CMP The corresponding slope discharge voltage difference is V H,SF -V L,SF At this time, the global counter count value corresponds to the reference time digital code value CNT. REF To ensure the linearity of the ramp voltage, the ramp voltage generation module can be clamped using an amplifier, and the charge discharged each time is a fixed value, thereby achieving high precision performance of the histogram digital-time converter.

[0043] Further as an optional implementation, the time-of-flight digital code value and the reference time digital code value are used to calculate a pulse time-of-flight, the pulse time-of-flight is calculated by the following formula: TOF=T REF *(CNT TOF / CNT REF ) Wherein, TOF represents the pulse time-of-flight, T REF represents the reference time width, CNT TOF represents the time-of-flight digital code value, CNT REF represents the reference time digital code value.

[0044] Referring to Figure 1 , further as an optional implementation, the laser radar receiving circuit further comprises an input control bus and an output data bus, the receiving pixel topology forms a receiving pixel array, the input control bus is used to provide a global control signal for the receiving pixel array, and the output data bus is used to output a time-of-flight data array corresponding to the receiving pixel array.

[0045] Specifically, in the embodiment of the application, all modules of the SPAD-LiDAR receiving end are integrated on a silicon wafer by means of integrated circuit technology, the topology of each receiving pixel in the receiving pixel array is consistent with the foregoing, and covers a SPAD receiving front end, a slope generation module, a time analog converter (TAC), a voltage index module, an approximation switch control module, a difference sampling comparison module, a source follower, and a data storage and readout module. Among them, the slope generation module, the difference sampling comparison module and the global counter of the pixel can constitute a single slope analog-to-digital converter (SS-ADC) to improve the accuracy of pixel time quantization.

[0046] Referring to Figure 1 , further as an optional implementation, the laser radar receiving circuit further comprises a phase-locked loop, a global state machine, a bias generation module and a global counter, the phase-locked loop is used to provide a global clock and generate a reference time width of a specific length, and the global state machine, the bias generation module and the global counter are used to control signal detection and time quantization of the receiving pixel array.

[0047] Specifically, in addition to the pixel array, in order to ensure the normal operation of the SPAD-LiDAR receiving end, a global phase-locked loop circuit is adopted in the embodiment of the application to provide a stable global clock and generate a reference time T REF for quantization; a global state machine, a counter and a bias generation module are adopted to control detection and quantization of the pixel array.

[0048] Referring to Figure 1 As a further optional implementation, the laser radar receiving circuit further comprises a readout control module, which is configured to control readout of the time-of-flight data array.

[0049] Specifically, the readout control module is adopted to read out data of the pixel array to outside of the chip for next imaging processing.

[0050] In some optional embodiments, the global histogram approximation digital time converter of the present embodiment can be applied not only to full solid-state flash imaging, but also to single-point, multi-point ranging or scanning imaging, mainly based on the global histogram approximation technique. The direct histogram approximation processing technique proposed in the present application is not limited to the voltage domain implementation method proposed above, but can also be implemented in the digital domain. The key point is to compare the current histogram index value with the measurement value, and then to approach the measurement value by the single least significant bit (LSB) value of the index value. The timing control of the pixel circuit can also be generated internally or directly input from outside, which essentially controls the behavior of the pixel. As for the quantization of the reference time digital code value CNT REF , it can be quantized repeatedly in each frame quantization stage (stage two), or it can be quantized once at power-on, and then only the time-of-flight code value CNT TOF needs to be quantized in each frame quantization stage.

[0051] The structure and workflow of the present embodiment are described above, and it can be understood that the global histogram approximation digital time converter is used to approach the time-of-flight voltage value and perform digital time conversion, without quantizing the direct time-of-flight and indirect time-of-flight, which ensures a high frame rate of the single-photon avalanche diode laser radar, further reduces the pixel area and lowers the power consumption.

[0052] Compared with the prior art, the present embodiment has the following advantages: 1) The global histogram approximation digital time converter pixel architecture proposed in the present application discards the traditional histogram concept of quantization, storage and peak searching. In the multiple detection processes of a frame, a time analog converter (TAC) is used to convert time information into voltage information, and then the voltage on another capacitor is used as a pointer to directly approach the target theoretical voltage. This method does not require any other storage unit, significantly reducing the area and power consumption of the pixel. 2) The histogram concept proposed in the present application does not need to quantize the time information after each laser emission and receiving the echo signal, but stores it on the capacitor, in the form of voltage. After approaching the target voltage value through multiple detections, only the final result needs to be quantized, and then the current frame data is directly read out of the chip. Therefore, in the quantization process of a frame, the pixel only needs to carry out a quantization operation by means of a single slope analog-to-digital converter (SS-ADC) to convert the voltage difference into a time digital code value, thereby effectively improving the detection frame rate. 3) The pixel architecture proposed in the present application does not need a high-speed clock inside. If the reference time T REF The width is more accurate, and the time resolution of the pixel depends on the number of steps of the slope voltage generation circuit. Generally, the number of steps generated by the slope voltage circuit (analog counter) can exceed 512, which ensures the overall quantization sub-nanosecond time resolution accuracy, while significantly saving power consumption.

[0053] 4) The present application uses a combination of time analog converter (TAC) and single slope analog-to-digital converter (SS-ADC) to construct a digital time converter (TDC), which can eliminate the non-uniformity between pixels and achieve the expected time resolution. Although there are mismatches between different pixels TAC, there are differences in the discharge values within the reference time width, but the total code value corresponding to the discharge voltage of the reference time width of the pixel can be determined by the SS-ADC. At the same time, the SS-ADC of all pixels can share a global counter, thereby saving area and power consumption. 5) The present application discards the quantization scheme combining direct time of flight (dTOF) and indirect time of flight (iTOF), which effectively reduces the complexity of the system architecture. In view of the higher requirement of iTOF method on laser pulse width, the present application method can significantly improve the laser emission frequency under the condition of maintaining the same average power. At the same time, the pixel control signal of the present application can be generated by a global state machine and transmitted to the pixel unit through clock wiring, which maximizes the simplification of the pixel internal circuit structure, thereby optimizing the pixel size.

[0054] In the above description of the present specification, the description of the terms "one embodiment", "another embodiment", or "some embodiments" or the like means that the specific features, structures, materials or characteristics described in connection with the embodiments or examples are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the described specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0055] While the embodiments of the application have been shown and described, it is to be understood that the embodiments described are merely exemplary and are not to be construed as limiting the scope of the application. The scope of the application is defined by the appended claims and their equivalents.

[0056] The above is the specific description of the preferred embodiment of the application, but the application is not limited to the above-mentioned embodiments, and those skilled in the art can make various equivalent modifications or replacements without departing from the spirit of the application, and these equivalent modifications or replacements are all included in the scope defined by the claims of the application. < / m> < / m> < / m>

Claims

1. A lidar receive circuit based on a globally approximated histogram digital time converter, characterized by, The laser radar receiving circuit comprises a plurality of receiving pixel topologies, each of which comprises a SPAD receiving front end, a global approximation histogram digital time converter and a data storage readout module, wherein: The SPAD receiving front end is used for receiving photon pulses and generating a photon event signal; The global approximation histogram digital time converter is used for time-of-flight voltage value approximation and digital time conversion based on the photon event signal to obtain a time-of-flight digital code value and a reference time digital code value; The data storage readout module is used for controlling storage and readout of the time-of-flight digital code value and the reference time digital code value.

2. A lidar receiver circuit based on a globally approximated histogram digital time converter according to claim 1, characterized in that: The global approximation histogram digital time converter comprises a slope generation module, a time analog converter, a voltage index module, an approximation switch control module, a difference sampling comparison module and a source follower, an output end of the SPAD receiving front end is connected with a control input end of the time analog converter, an output end of the slope generation module is connected with a voltage input end of the time analog converter, a voltage output end of the time analog converter and a voltage output end of the voltage index module are both connected with an input end of the source follower, an output end of the source follower is connected with an input end of the difference sampling comparison module, an input end of the approximation switch control module and an input end of the data storage readout module are both connected with an output end of the difference sampling comparison module, and an output end of the approximation switch control module is connected with an input end of the voltage index module.

3. A lidar receiver circuit based on a globally approximated histogram digital time converter according to claim 2, characterized in that, The global approximation histogram digital time converter performs time-of-flight voltage value approximation through the following steps: The time analog converter triggers a built-in capacitor to discharge at a constant current according to the photon event signal until a reference time window ends, so as to generate a target voltage signal and transmit the target voltage signal to the source follower; The voltage index module generates an index voltage signal and transmits the index voltage signal to the source follower; The source follower transmits the target voltage signal and the index voltage signal to the difference sampling comparison module; The difference sampling comparison module compares the target voltage signal and the index voltage signal and transmits a comparison result to the approximation switch control module; The approximation switch control module generates a corresponding index voltage control signal according to the comparison result and transmits the index voltage control signal to the voltage index module, and the index voltage control signal is used for controlling the index voltage signal to approximate the target voltage signal.

4. A lidar receiver circuit based on a globally approximated histogram digital time converter according to claim 3, characterized in that, The global approximation histogram digital time converter performs digital time conversion to obtain the time-of-flight digital code value through the following steps: The index voltage signal and a reference voltage signal after time-of-flight voltage value approximation are respectively sampled to a lower plate and an upper plate of a comparison capacitor of the difference sampling comparison module; The slope generation module generates a slope voltage signal and transmits the slope voltage signal to the time-to-analog converter, so that the target voltage signal output by the time-to-analog converter starts to be discharged in a ramp step from a highest discharge voltage; When the dynamic comparator of the difference sampling comparison module flips, the global count value of the discharge time length corresponding to the final index voltage is used to determine the time-of-flight digital code value.

5. A lidar receiver circuit based on globally approximated histogram digital time converter according to claim 3, characterized in that, The global approximation histogram digital time converter performs digital time conversion to obtain the reference time digital code value by the following steps: The time-to-analog converter outputs the target voltage signal to be discharged at a constant current for a reference time width, to obtain a lowest discharge voltage signal; The lowest discharge voltage signal and a reference voltage signal are respectively sampled to the lower plate and the upper plate of the comparison capacitor of the difference sampling comparison module; The slope generation module generates a slope voltage signal and transmits the slope voltage signal to the time-to-analog converter, so that the target voltage signal output by the time-to-analog converter starts to be discharged in a ramp step from a highest discharge voltage; When the dynamic comparator of the difference sampling comparison module flips, the global count value of the discharge time length corresponding to the final index voltage is used to determine the reference time digital code value.

6. A lidar receiver circuit based on globally approximated histogram digital time converter according to claim 1, characterized in that, The time-of-flight digital code value and the reference time digital code value are used to calculate a pulse time-of-flight, which is calculated by the following formula: TOF=T REF *(CNT TOF / CNT REF ) where TOF represents a pulse time of flight, T REF represents a reference time width, CNT TOF represents a time of flight digital code value, CNT REF represents a reference time digital code value.

7. A lidar receiver circuit based on globally approximated histogram digital time converter according to claim 1, characterized in that: The laser radar receiving circuit further comprises an input control bus and an output data bus, the receiving pixel topology forms a receiving pixel array, the input control bus is used to provide a global control signal for the receiving pixel array, and the output data bus is used to output a time-of-flight data array corresponding to the receiving pixel array.

8. A lidar receiver circuit based on a globally approximated histogram digital time converter according to claim 7, characterized in that: The laser radar receiving circuit further comprises a phase-locked loop, a global state machine, a bias generation module, and a global counter, the phase-locked loop is used to provide a global clock and generate a reference time width of a specific time length, and the global state machine, the bias generation module, and the global counter are used to control signal detection and time quantization of the receiving pixel array.

9. A lidar receiver circuit based on a globally approximated histogram digital time converter according to claim 7, characterized in that: The laser radar receiving circuit further comprises a readout control module, the readout control module is used to control readout of the time-of-flight data array.

Images