Method and system for multilevel shifter

Abstract

The invention relates to a method and a system for a multi-level converter. Methods and systems are provided for balancing junction temperatures between at least two power switches of a multilevel converter. A junction temperature of each of the at least two power switches is received. A difference in junction temperature between the at least two power switches is determined. An operating time ratio at which the multilevel converter operates using a first of a plurality of pulse width modulation (PWM) modes is defined based on a closed loop control to reduce a difference in the junction temperatures of the at least two power switches. Finally, a control signal is generated to operate the multilevel converter according to the operating time ratio using the first PWM mode.

Description

[0001] This patent application claims the benefit of and priority to U.S. Non-Provisional Patent Application No. 18 / 912,189, filed October 10, 2024. TECHNICAL FIELD

[0002] The present application relates to methods and systems for controlling temperature in a multi-level converter, and in particular, but not exclusively, to methods and systems for controlling modulation of power switches in a multi-level converter to achieve thermal balancing of the power switches. BACKGROUND

[0003] Power converter devices output different voltage levels, e.g., generating a higher voltage waveform from a lower voltage waveform, and vice versa. If observing the relative neutral point voltage, multi-level converters in particular output waveforms with more than two voltage levels at different times.

[0004] Recently, active neutral point clamped (ANPC) inverters are a type of power converter with a multi-level topology, and they have become a popular solution for reducing harmonics in power transmission and motor drive applications. For example, in the field of renewable energy systems, ANPC inverters are commonly used because the modulation techniques that can be implemented with the ANPC inverters have flexibility and increased reliability compared to other multi-level inverter topologies.

[0005] However, the ANPC topology for implementing a three-phase inverter has the disadvantage of uneven distribution of semiconductor junction temperatures. This can result in unequal utilization of power switches, which reduces the efficiency and operational lifetime of the inverter compared to competing topologies.

[0006] To address this problem, various pulse width modulation (PWM) techniques have been proposed for three-level ANPC inverters. However, losses remain difficult to control, particularly thermal losses.

[0007] Accordingly, it is desirable to provide an improved solution for reducing thermal losses in a multi-level converter device. SUMMARY

[0008] The systems and methods of the present disclosure provide a way to balance, and thus reduce, overall thermal losses in a multi-level converter. The present disclosure not only improves the efficiency of the multi-level converter, but also extends its operational lifetime by mitigating thermal stress on individual power switches.

[0009] In one aspect of this disclosure, a method is provided for balancing the junction temperature between at least two power switches of a multilevel converter, the method comprising: receiving a junction temperature of each of the at least two power switches; determining a difference in the junction temperatures between the at least two power switches; defining an operating time ratio for the multilevel converter to operate using a first PWM mode among a plurality of pulse width modulation (PWM) modes based on closed-loop control to reduce the difference in the junction temperatures of the at least two power switches; and generating a control signal to operate the multilevel converter according to the first PWM mode and the operating time ratio.

[0010] These multiple PWM modes allow for improved thermal management of the multilevel converter, enabling the system to adapt to varying operating conditions. The method disclosed herein distributes thermal load more evenly across the power switches, thereby preventing any single power switch from overheating and potentially failing.

[0011] Preferably, the PWM modes are different from each other, and the PWM modes include the switching patterns of the power switch. For example, the switching pulse pattern of the power switch in a first PWM mode is different from the switching pulse pattern of the power switch in other PWM modes of the multilevel converter. Therefore, when the multilevel converter is switched from one PWM mode to another, the heat loss distribution of the power switch will change.

[0012] The operating time ratio can be expressed as a percentage of the total cycle time across all PWM modes. That is, the sum of the ratios equals 100%. It should be understood that the operating time ratio for a PWM mode can be defined as 0.0 or 0%.

[0013] Once the operating time ratio for the first PWM mode has been defined, the operating time ratio for other PWM modes can preferably be determined in one of the following ways.

[0014] The operating time ratio in the first PWM mode can determine the operating time ratio in other PWM modes. For example, additional control signals can be generated to operate the multilevel converter using the remaining modes of multiple PWM modes for the remaining time. In an instance where two PWM modes exist and the operating time ratio in the first PWM mode is 0.6% or 60%, the operating time ratio in the second PWM mode is 0.4% or 40%.

[0015] Alternatively, the operating time ratio for at least one other PWM mode can be defined based on closed-loop control to reduce the difference in junction temperatures between at least two power switches. A control signal can then be generated to operate the multilevel converter using each of the operating time ratios for the at least one other PWM mode. In an instance where three PWM modes exist, and the operating time ratio for the first PWM mode is 0.6% or 60%, the operating time ratio for the second PWM mode can be defined as 0.3% or 30%, and the operating time ratio for the third PWM mode can be defined as 0.1% or 10%, each is based on closed-loop control to reduce the difference in junction temperatures between at least two power switches.

[0016] In some preferred embodiments, an operating time ratio can be defined for each PWM mode. In this case, the number of power switches used for temperature balancing is the same as the number of ratios to be defined, which is the same as the number of PWM modes used, which is the number of closed-loop controls minus 1. Thus, in an instance where three PWM modes exist, two closed-loop controls are used to determine the operating time ratios for the first and second PWM modes as 0.6 or 60% and 0.3 or 30%, respectively, and the operating time ratio for the third PWM mode can be defined as 0.1 or 10% to reduce the difference in junction temperatures among at least three power switches.

[0017] Alternatively, a combination of the two methods described above for determining the operating time ratios for other PWM modes can be used (i.e., the first method uses the remaining time for the remaining modes of multiple PWM modes, and the second method defines the operating time ratio for at least one other PWM mode besides the first PWM mode). In an instance where there are four PWM modes and the operating time ratio for the first PWM mode is 0.6 or 60%, the operating time ratio for the second PWM mode can be defined as 0.3 or 30%, and the operating time ratios for the third and fourth PWM modes can be used to operate the multilevel converter in the remaining time, for example, by equally splitting the operating time ratios for the third and fourth PWM modes, i.e., each as 0.1 or 10%. Once the operating time ratios are defined, the total operating period for all PWM modes can be determined. The operating time for a specific PWM mode is defined by the product of the ratio and the total period. The operating time for a specific PWM mode can be defined as the switching period.

[0018] Preferably, the method further includes dynamically adjusting the operating time ratio based on real-time junction temperature information from at least two power switches.

[0019] A predefined switching period can be applied to operate multiple PWM modes. The predefined switching period is equal to the total operating period for all PWM modes. Preferably, the predefined switching period defines the minimum switching frequency used to switch between multiple PWM modes.

[0020] By understanding the predefined switching period, the predefined switching frequency can also be determined. For example, if the predefined switching period is 0.1 seconds, the predefined switching frequency is 10 Hz. In another instance, if the predefined switching period is 1 millisecond, the predefined switching frequency is 1 kHz.

[0021] Preferably, linear control is used to implement closed-loop control. Examples of closed-loop linear control include proportional-integral (P) controllers, proportional-integral (PI) controllers, or proportional-integral-derivative (PID) controllers. In linear control, PI control is preferred because it provides better results than P control, and PID control can be difficult to stabilize. In nonlinear control, machine learning can be used to define the operating time ratio for one or more PWM modes.

[0022] Preferably, reducing the difference in junction temperature between at least two power switches includes minimizing the difference in junction temperature between at least two power switches.

[0023] The at least two power switches of the multilevel converter can be selected because they have different heat losses or different heat loss distributions. In a specific PWM mode, such as the first PWM mode, different heat losses may exist between the two power switches. Different heat loss distributions can indicate that the power switches have different switching patterns across different PWM modes.

[0024] For example, the first PWM mode may require two power switches S2 and S3 to be switched on / off less frequently than other power switches S1, S4, S5, and S6 in the first PWM mode (and therefore the effect is that S2 and S3 heat up less than S1, S4, S5, and S6, because more switching on / off leads to more heat dissipation). Therefore, by determining the difference in junction temperature between one of S2 and S3 and one of S1, S4, S5, and S6, the effect of the junction temperature balance according to the method of this disclosure can be greater.

[0025] Based on the above examples, it can be understood that the heat loss distribution or switching patterns of S2, S3, S1, and S4 are different in another PWM mode compared to the first PWM mode; while the heat loss distribution or switching patterns of S5 and S6 are similar in each PWM mode. In this case, by determining the difference in junction temperature between one of S2 and S3 and one of S1 and S4, the effect of the junction temperature balance according to the method of this disclosure can be greater.

[0026] This disclosure also covers the junction temperature for balancing more than two power switches. For example, if more than two power switches are being balanced, a power switch with the least dissimilar heat loss or the least dissimilar heat loss distribution can be selected.

[0027] Receiving the junction temperatures of two or more power switches may include modeling the junction temperatures of at least two power switches based on a lookup table.

[0028] Alternatively, receiving the junction temperature of two or more power switches can include real-time calculations. For example, if it is known that the temperature rise is proportional to the power loss (Ploss=I*V), then the voltage and current can be calculated in real time and other necessary parameters can be estimated.

[0029] Alternatively, receiving the junction temperature of two or more power switches may include measuring the junction temperature by direct die temperature measurement for each of the two or more power switches.

[0030] Preferably, measuring the junction temperature by direct die temperature measurement for each of two or more power switches includes measuring the junction temperature using a highly integrated SiC cascode power switch or similar device.

[0031] The operating time ratio of one or more PWM modes can be selected for one phase of the multilevel converter. Preferably, the operating time ratio of one or more PWM modes can be selected for each phase of the multilevel converter, for example, for each of three phases. Thus, each phase applies a different operating time ratio of the PWM mode based on the specific heat loss of the switch in each phase. This is likely preferred to obtain very accurate junction temperature balance for each phase.

[0032] Alternatively, PWM modes can be selected for all three phases of the multilevel converter. In other words, for simplicity, the same ratio can be applied to each phase.

[0033] In a preferred embodiment, a method for balancing the heat dissipation of a power switch in a three-level / multi-level active neutral-point clamped inverter is provided, the method comprising: inputting a measured junction temperature from a power switch (e.g., a smart switch) to a proportional-integral (PI) controller (linear / stabilized controller) for temperature balancing; the PI controller using a temperature balancing algorithm to balance the measured junction temperature for all operating conditions, wherein the PI controller operates in two modes for controlling a predetermined switching frequency of PWM mode change via a switching pulse generator, wherein the minimum switching frequency of the power switch is known and controllable.

[0034] In another aspect of this disclosure, a system is provided for balancing the junction temperature between at least two power switches of a multilevel converter. The system includes: a closed-loop controller configured to: receive the junction temperature of each of the at least two power switches; determine the difference in junction temperatures between the at least two power switches; define an operating time ratio based on the closed-loop control for the multilevel converter to operate using a first PWM mode among multiple pulse width modulation (PWM) modes to reduce the difference in junction temperatures between the at least two power switches; and generate a control signal to operate the multilevel converter according to the operating time ratio using the first PWM mode.

[0035] Preferably, the closed-loop controller may include a linear closed-loop controller. However, alternatively, the closed-loop controller may include a nonlinear closed-loop controller.

[0036] The system may further include a multilevel converter. The multilevel converter may have three levels. Alternatively, the multilevel converter may have any number of levels higher than three, preferably an odd number, such as five, seven, or nine levels.

[0037] A multilevel converter can have three phases. Alternatively, a multilevel converter can have a single phase.

[0038] A multilevel converter can be an inverter. A multilevel inverter can have an active zero-state switch. A multilevel inverter is preferably an active neutral-point clamped ANPC inverter.

[0039] A multilevel converter may include three pairs of power switches in a half-bridge arm, and at least two power switches belong to different pairs of the three power switches.

[0040] However, it should be understood that the methods and systems of this disclosure can also be applied to other multilevel converters with alternative topologies having different phases and different numbers of levels. For example, the methods and systems of this disclosure can also be applied to single-phase full-bridge inverters, five-level ANPC inverters, and five-level cascaded H-bridge (CHB) inverters.

[0041] Definitions

[0042] A power converter is an electronic device that converts voltage from one form to another. It includes devices that convert AC to DC (e.g., rectifiers), DC to AC (e.g., inverters), DC to DC (e.g., buck converters), and AC to AC (e.g., dimmer switches).

[0043] A "multilevel converter" is a power converter device that outputs more than one voltage level.

[0044] An inverter is a power converter used for DC-to-AC conversion. For example, in the renewable energy sector, inverters can be used to convert DC power from solar panels into AC power that can be fed into the grid and used by household appliances.

[0045] Power switches may suffer from heat losses, including turn-on losses, conduction losses, and turn-off losses.

[0046] Pulse Width Modulation (PWM) is a technique used to control the average output power of an electrical signal by defining the duty cycle and switching frequency of each power switch in a power switch. PWM mode defines the switching pattern for the power switches.

[0047] Proportional control, integral control, and derivative control, as well as combinations of these control methods, are examples of linear, closed-loop, feedback control techniques. Proportional control provides a linear relationship between the system error and the system output. Integral control provides a correlation between the integral of the system error and the system output. Derivative control provides a correlation between the derivative of the system error and the system output. Attached Figure Description

[0048] Various aspects of this disclosure are described by way of example only with reference to the following figures, in which:

[0049] Figure 1 An active neutral point clamped inverter system is shown;

[0050] Figure 2 It shows Figure 1 The system output;

[0051] Figure 3 An active neutral point clamping inverter system according to this disclosure is shown;

[0052] Figure 4 The heat loss of the power switch according to this disclosure is shown;

[0053] Figure 5 An active neutral point clamping inverter system including a controller according to the present disclosure is shown;

[0054] Figure 6 The effect of PWM switching on the switching pulse according to this disclosure is shown;

[0055] Figure 7 The following is shown in accordance with this disclosure: Figure 6 The positive half-cycle;

[0056] Figure 8 The following is shown in accordance with this disclosure: Figure 6 The negative half-cycle;

[0057] Figure 9The junction temperature equilibrium according to this disclosure is illustrated;

[0058] Figure 10 This describes an example method step according to one aspect of this disclosure;

[0059] Figure 11 A single-phase full-bridge inverter system according to this disclosure is shown;

[0060] Figure 12 A comparison of unequal heat losses of power switches according to this disclosure is shown;

[0061] Figure 13 The junction temperature equilibrium according to this disclosure is illustrated;

[0062] Figure 14 A five-level ANPC inverter system according to this disclosure is shown;

[0063] Figure 15 It shows Figure 14 The system's relative neutral point output voltage;

[0064] Figure 16 A controller for a five-level ANPC inverter system according to the present disclosure is shown;

[0065] Figure 17 A five-level cascaded H-bridge (CHB) inverter system according to this disclosure is shown; and

[0066] Figure 18 A controller for a five-level cascaded H-bridge (CHB) inverter system according to this disclosure is shown. Detailed Implementation

[0067] Simple techniques for reducing heat loss in power converters using singular PWM strategies have been proposed. However, a drawback of these methods is that they introduce unbalanced losses in the switches for all operating conditions; a single PWM solution alone cannot achieve an equivalent power loss distribution, which is necessary to make equal use of all switches. For example, a particular PWM technique may only achieve balancing of a pair of switches in one half-bridge arm of the power converter topology.

[0068] More sophisticated control techniques, such as adaptive control, have also been proposed. For example, it has been suggested that one should choose between two PWM techniques once the thermal characteristics of the power converter reach a certain threshold with a hysteretic response. However, these methods suffer from high processor utilization and coarse, nonlinear outputs.

[0069] As described in the background section, it is desirable to provide an improved solution for reducing heat loss in multilevel converter devices.

[0070] The inventors have recognized that one way to balance the temperature of the power switches in a multilevel converter, and thus reduce overall heat loss, is to use a closed-loop controller to determine which PWM mode to use based on the temperature of at least two of the power switches. Essentially, the actuation technique in this control system selects a PWM technique from at least two PWM modes such that the temperature difference between the two power switches can be minimized. Furthermore, the inventors have recognized that closed-loop feedback control can be used to reduce temperature imbalance between the two power switches. In contrast to previous methods and systems where the controller provides a signal to directly control the power switches by changing the PWM technique, the closed-loop controller of this disclosure provides a signal to select among various PWM modes for operating the power switches.

[0071] One significant benefit of this disclosure is that it effectively balances the power losses between the power switches, and therefore balances the temperature distribution among them. This results in an overall reduction in heat loss, an increase in the available output power of the multilevel converter, and increased reliability.

[0072] Figure 1 A three-phase, three-level "active neutral point clamp (ANPC)" inverter 100 is shown. The ANPC inverter operates in three phases (phases A, B, and C, each 120 degrees out of phase) using three half-bridge arms (arm A 101, arm B 102, and arm C 103). For simplicity, Figure 1 The operation of phase A is concentrated in arm A 101.

[0073] Arm A has six power switches (three pairs of power switches in the half-bridge arm) and two capacitors, thereby generating three voltage level outputs by switching, turning on and off the power switches in a specific sequence. Figure 1 The power switch shown is an IGBT, but in other instances they can be other types of power switches, such as FETs. Preferably, the power switch can be a SiC cascode FET.

[0074] The three voltage levels are positive (+Vdc / 2), neutral (0), and negative (-Vdc / 2). When switches S1 and S2 are closed and conducting, the output voltage is equal to +Vdc / 2. When switches S2 and S5 are closed and conducting, or when switches S3 and S6 are closed and conducting, or when switches S2, S3, S5, and S6 are closed and conducting, the output voltage is zero (the neutral point at the center of the DC link). When switches S3 and S4 are closed and conducting, the output voltage is equal to -Vdc / 2.

[0075]

[0076] Table 1

[0077] Compared to a Neutral Point Clamped (NPC) inverter, the ANPC inverter replaces two diodes with power switches S5 and S6, which clamp the neutral point and allow for better control of the voltage balance across the two capacitors, resulting in better control of the output voltage level and reduced stress on the power switches.

[0078] The advantages of ANPC inverters over NPC inverters include reducing harmonics in the output waveform, improving inverter efficiency, and improving voltage balance through the use of active clamping.

[0079] Due to reduced harmonics, increased efficiency, and improved voltage balance, ANPC inverters are popular for applications requiring a stable sinusoidal AC output, such as renewable energy systems and industrial motor drives.

[0080] exist Figure 2 The image shows how an ANPC inverter can generate a stepped waveform that approximates a sine wave by controlling the switching states. Pulse width modulation (PWM) technology can be used to control the switching sequence of the power switches, thereby ensuring that the output waveform is as close to a sine wave as possible. Figure 2 The relative neutral point voltage generated by one arm of the inverter is shown.

[0081] Figure 3 The phases of an active neutral-point clamped inverter system according to this disclosure are shown. In particular, Figure 3 The diagram shows one phase arm of the converter, its input voltage source, and its output load.

[0082] Figure 4 This illustrates the operation of the power switch using two different PWM modes. Figure 3 The heat loss of the phase power switches in the ANPC inverter system.

[0083] As an example, Figure 3 The system ratings can be shown in Table 2 below:

[0084]

[0085] Table 2

[0086] However, it should be understood that other values ​​of the parameters in Table 2 may also be applied to this disclosure.

[0087] exist Figure 3In the half-arm shown, the following switch pairs have the same or similar power losses and junction temperatures: S1 and S4, S2 and S3, and S5 and S6. The junction temperature of the power switches can be determined by modeling the temperature using information from a lookup table. Alternatively, the junction temperature of the power switches can be determined by measuring the junction temperature directly at the die. An example of implementing direct die temperature measurement is by using a highly integrated SiC cascode power switch.

[0088] exist Figure 3 The example uses the junction temperatures of switches S1 and S2. The temperatures of switches S1 and S2 are T and T, respectively. S1 and T S2 Using a closed-loop controller, the temperature T can be found. S1 and T S2 The difference between them. In some instances, T S1 and T S2 It can be fed to a microcontroller (not shown in the figure), which can determine T. S1 With T S2 The difference between them is calculated and the difference is output for use in defining the operating time ratio of a multilevel converter operating in a first PWM mode among multiple pulse width modulation PWM modes based on closed-loop control, in order to reduce the difference in junction temperatures of at least two power switches.

[0089] Closed-loop controllers can include linear controllers, such as PI controllers. In this example, there are two PWM modes under which the multilevel converter operates: PWM1 and PWM2. The linear PI controller can define the operating time ratio of the multilevel converter operating using the first pulse width modulation mode PWM1 and the operating time ratio of the multilevel converter operating using the second pulse width modulation mode PWM2 to reduce the junction temperature To. S1 and T S2 difference.

[0090] Figure 5 It shows Figure 3 The ANPC inverter 100 has three phases and further includes a closed-loop controller 104, which includes a PI controller 105. Figure 5 As shown, the difference between TS1 and TS2 is input into the PI controller 105.

[0091] Table 3 provides example parameters for the PI controller 105 to select which algorithm to use, PWM1 or PWM2.

[0092]

[0093] Table 3

[0094] The predefined switching frequency is derived from a predefined switching period, which is the total operating period for all PWM modes. In this case, the predefined switching period is 0.1 milliseconds.

[0095] exist Figure 5 In this context, the operation time ratio of a multilevel converter operating in the second pulse width modulation (PWM2) mode of the two PWM modes is denoted as d. swap Carrier frequency f swap It is the frequency of PWM mode switching, and can be expressed as f. swap =1 / T swap = 1 / 0.1 milliseconds = 10 kHz.

[0096] f swap According to ratio d swap To determine the operating time of each PWM.

[0097] In this example, the operating time of PWM1 = (1 - d) swap ) / f swap And the operation time of PWM2 = d swap / f swap .

[0098] Based on the output of the PI controller 105, a control signal is generated ( Figure 5 The closed-loop controller 104 manages the operation of the ANPC inverter based on its understanding of the junction temperature of the switches, using different PWM modes to balance the thermal load between switches S1 and S2, thereby achieving improved balance of junction temperature across all power switches.

[0099] Figure 6 The effects of PWM switching according to this disclosure are shown, and the effects of PWM switching on the switching pulses of switches S1, S2, S3, S4, S5 and S6 are also shown.

[0100] The top chart shows either PWM1 or PWM2, the PWM mode selected by the controller over time. Below this chart, six graphs illustrate the operation of switches S1, S2, S3, S4, S5, and S6 over time. The frequency at which the PWM mode changes between PWM1 and PWM2 is equal to f. swap Therefore, apart from power switches that remain off during any half-cycle, the minimum frequency at which any power switch operates is at least f. swap And the maximum frequency of any power switch operation is equal to the switching frequency f. sw .

[0101] Figure 7 It shows Figure 6The positive half-cycle, and Figure 8 Showing more details Figure 6 The negative half-cycle. The switching frequency of all power switches is greater than the switching frequency f. swap And less than or equal to the switching frequency f sw The only exceptions are switch S4, which remains off during the positive half-cycle, and S1, which remains off during the negative half-cycle.

[0102] Figure 9 The junction temperature equilibrium according to this disclosure is illustrated.

[0103] The temperatures of switches S1, S2, and S5 are shown, with S1 and S2 selected for temperature balancing. The temperatures of switches S1 and S2 eventually reach equilibrium over time. The difference between the temperatures of switches S1 and S2 is shown as decreasing or minimizing over time.

[0104] By using closed-loop control, the controller takes the temperatures of S1 and S2 as inputs, and the output multilevel converter operates using the second pulse width modulation (PWM2) mode of the two PWM modes to reduce the difference in junction temperatures between S1 and S2. This ratio is denoted as dswap and is shown as stabilizing at 0.33% or 33%.

[0105] The bottom chart illustrates which of the two PWM modes is active over time. PWM1 is active for 0.67 or 67% of the time, and PWM2 is active for 0.33 or 33% of the time, thus stabilizing at the temperature of S1 and S2.

[0106] Figure 10 This describes an example method step S100 according to one aspect of this disclosure. Typically, at step S110, the junction temperature of each of at least two power switches is received. At step S120, the difference in junction temperatures between the at least two power switches is determined. At step S130, an operating time ratio is defined based on closed-loop control to allow the multilevel converter to operate using a first PWM mode among multiple pulse width modulation (PWM) modes, in order to reduce the difference in junction temperatures between the at least two power switches. Finally, at step S140, a control signal is generated to operate the multilevel converter using the first PWM mode according to the operating time ratio.

[0107] Figure 11 A single-phase full-bridge inverter 110 is shown. The single-phase full-bridge inverter 110 has a single phase using two half-bridge arms (arm 1111 and arm 2112).

[0108] Arm 1 111 has two power switches and Arm 2 112 has two power switches, which can generate up to three voltage level outputs by switching, turning on and off the power switches in a specific sequence.

[0109] The three voltage levels are positive voltage (+Vdc / 2), neutral voltage (0), and negative voltage (-Vdc / 2).

[0110]

[0111] Table 4

[0112] Among the various existing modulation methods for full-bridge inverters, Hybrid Pulse Width Modulation (HPWM) benefits from lower switching stress on one arm of the device, resulting in lower overall losses. However, since one arm operates at a higher frequency than the other arm (which operates at a lower base frequency), unequal loss and temperature distributions can exist. When using Hybrid PWM, the control algorithm of this disclosure can be used to achieve equal temperature distributions.

[0113]

[0114] *1 and 0 indicate that the output terminals of the corresponding arms are connected to the + and - input terminals, respectively.

[0115] Table 5

[0116] Figure 12 The switch of the arm with high-frequency operation is shown to experience high temperatures.

[0117] HPWM1 operates arm 1 at a low frequency, thus reducing the temperature of the switches (S1 and S4) in arm 1. HPWM2 operates arm 2 at a low frequency, thus reducing the temperature of the switches (S2 and S3) in arm 2.

[0118] exist Figure 13 In the study, it was found that the duration ratio of HPWM1 and HPWM2 operations used to balance the temperature between power switches TS1 and TS2 was 0.5.

[0119] Figure 14 A five-level ANPC inverter 140 is shown. The five-level ANPC inverter arm has eight power switches (four pairs of power switches, two of which are identical), two DC link capacitors, and one flying capacitor, producing five voltage levels of output by switching the power switches on and off in a specific sequence. The switching sequence also ensures that the voltage across the flying capacitor Cfc remains at +Vdc / 4.

[0120] The five voltage levels are positive high (+Vdc / 2), positive low (+Vdc / 4), neutral (0), negative low (-Vdc / 4), and negative high (-Vdc / 2). When switches S1, S2, and S3 are closed and conducting, the output voltage is equal to +Vdc / 2. When switches S1, S2, and S3' are closed and conducting, or when switches S1, S2', and S3 are closed and conducting, the output voltage is zero (neutral point at the center of the DC link). When switches S1', S2, and S3' are closed and conducting, or when switches S1', S2, and S3 are closed and conducting, the output voltage is equal to -Vdc / 4. When switches S1', S2' and S3' are closed and conducting, the output voltage is equal to -Vdc / 2.

[0121]

[0122] Table 6

[0123] Figure 15 The relative neutral point voltage generated by one arm of the inverter is shown. Specifically, it demonstrates that the ANPC inverter can generate a stepped waveform that approximates a sine wave by controlling the switching states. Pulse width modulation (PWM) technology can be used to control the switching sequence of the power switches, thereby ensuring that the output waveform is as close to a sine wave as possible.

[0124] Figure 16 Two PI controllers are shown. (Example) Figure 16 As shown, TS1 and TS2 are input to the first PI controller, and TS2 and TS3 are input to the second PI controller.

[0125] For each half-cycle, four different switching combinations and four possible PWM modes can be used, as detailed in the table below.

[0126] Positive half-cycle

[0127]

[0128] Table 7

[0129] negative half-cycle

[0130]

[0131] Table 8

[0132] PWM1a and PWM1b have the same or similar effects on the temperature of the power switch. This provides a degree of freedom of choice, which can be used for other controls, such as voltage balancing control of flying capacitors.

[0133] The switch pairs (S1, S1'), (S2, S2'), and (S3, S3') have the same losses among themselves. Therefore, it is sufficient to consider the temperature of one switch in each pair for control. In this example, consider S1, S2, and S3.

[0134] Based on the outputs of the two PI controllers, control signals are generated to apply the selected PWM mode. Therefore, the controller manages the operation of the ANPC inverter based on an understanding of the switch junction temperatures, using four different PWM modes to balance the thermal load across switches S1, S2, and S3, achieving improved balance of junction temperatures across all power switches.

[0135] Figure 17 A five-level cascaded H-bridge (CHB) inverter 170 with four arms, arm A 171, arm B 172, arm C 173, and arm D 174, is shown. Of the four arms, one can be selected to operate at high frequency (HF), and another at intermediate frequency (MF). The remaining two can operate at low frequency (LF). The power switches on the arm operating at high frequency experience the highest losses and junction temperature, while the power switches on the two arms operating at low frequency experience the lowest losses.

[0136] Table 8 can be used to identify the PWM method that results in the minimum losses in each of the four arms (the LF arm produces the lowest temperature). Table 8 shows the switching conditions and inverter output voltages for the low-frequency, mid-frequency, and high-frequency arms. A switching condition "1" for an arm indicates that the upper switch of the arm is on and conducting, and therefore the arm's output terminal is connected to the positive input terminal. Similarly, a switching condition "0" for an arm indicates that the lower switch in the arm is on and conducting, which connects the arm's output terminal to the negative input terminal.

[0137] Table 8 can be used to define PWM methods that can reduce the temperature of the power switch in any particular arm. For example, consider PWM method PWMA, where arm A operates at the base frequency along with another arm (B, C, or D). Therefore, PWMA will cause a temperature reduction in the power switch of arm A. Similarly, PWMB, PWMC, and PWMD cause temperature reductions in arms B, C, and D, respectively.

[0138]

[0139] *1 and 0 indicate that the output terminals of the corresponding arms are connected to the + and - input terminals, respectively.

[0140] Table 9

[0141] Figure 18 Three PI controllers are shown. (For example...) Figure 18As shown, the difference between TS11 and TS22 is input to the first PI controller, the difference between TS12 and TS22 is input to the second PI controller, and the difference between TS21 and TS22 is input to the third PI controller. The control algorithm of this disclosure can then be used to achieve an equal temperature distribution by alternating between these PWM methods based on temperature information.

[0142] In this example, four PWM methods, PWMA, PWMB, PWMC, and PWMD, are used, each resulting in the lowest losses in the switching of arms A, B, C, and D, respectively. The ratio of each PWM operation is determined by the control algorithm of this disclosure.

[0143] Those skilled in the art will readily understand that various changes or modifications can be made to the foregoing aspects of this disclosure without departing from its scope. For example, two or more features in the above examples can be combined and still fall within the scope of this disclosure.

[0144] Numbered clauses

[0145] As a non-limiting example, some aspects of this disclosure are set forth in the following numbered clauses.

[0146] Clause 1.

[0147] A method for balancing the junction temperature between at least two power switches of a multilevel converter, the method comprising:

[0148] Receive the junction temperature of each of the at least two power switches;

[0149] Determine the difference in junction temperature between the at least two power switches;

[0150] The operating time ratio of the multilevel converter operating in a first PWM mode among multiple pulse width modulation (PWM) modes is defined based on closed-loop control to reduce the difference in junction temperatures of the at least two power switches; and

[0151] A control signal is generated to operate the multilevel converter using the first PWM mode, according to the operating time ratio.

[0152] Clause 2.

[0153] According to the method described in Clause 1, the method further includes:

[0154] A control signal is generated to operate the multilevel converter using the remaining mode of the multiple PWM modes for the remaining time.

[0155] Clause 3.

[0156] According to the method described in Clause 1 or 2, the method further includes:

[0157] The operating time ratio for at least one other PWM mode is defined based on closed-loop control to reduce the difference in junction temperature between the at least two power switches; and

[0158] A control signal is generated to operate the multilevel converter using the operating time ratio for the at least one other PWM mode.

[0159] Clause 4.

[0160] According to any of the preceding numbered clauses, the method further includes:

[0161] The operating time ratio is dynamically adjusted based on the real-time junction temperature information of the at least two power switches.

[0162] Clause 5.

[0163] According to any of the preceding numbered clauses, the method further includes:

[0164] The application uses a predefined switching cycle to operate the various PWM modes.

[0165] Clause 6.

[0166] According to the method described in Clause 5, the predefined switching period is defined by a minimum switching frequency used for switching between the multiple PWM modes.

[0167] Clause 7.

[0168] According to any of the aforementioned numbered clauses, the closed-loop control is implemented using linear control.

[0169] Clause 8.

[0170] According to the method described in Clause 7, the closed-loop linear control is implemented using a proportional-integral (P) controller, a proportional-integral (PI) controller, or a proportional-integral-derivative (PID) controller.

[0171] Clause 9.

[0172] According to any of the preceding numbered clauses, wherein reducing the difference in junction temperature of the at least two power switches includes minimizing the difference in junction temperature of the at least two power switches.

[0173] Clause 10.

[0174] According to any of the preceding numbered clauses, the method further includes:

[0175] Select the at least two power switches of the multilevel converter that have different heat losses and / or different heat loss distributions.

[0176] Clause 11.

[0177] According to the method described in any of the preceding numbered clauses, the junction temperature for receiving the two or more power switches includes:

[0178] The junction temperature of the at least two power switches is modeled based on a lookup table.

[0179] Clause 12.

[0180] According to any one of the provisions 1 to 11, the junction temperature for receiving the two or more power switches includes:

[0181] The junction temperature is measured by direct die temperature measurement for each of the two or more power switches.

[0182] Clause 13.

[0183] According to the method described in Clause 12, measuring the junction temperature by direct die temperature measurement for each of the two or more power switches includes measuring the junction temperature using a highly integrated SiC cascode power switch.

[0184] Clause 14.

[0185] According to any of the preceding numbered clauses of the method, the operating time ratio of one or more of the PWM modes is selected for one phase of the multilevel converter.

[0186] Clause 15.

[0187] The method according to any one of the numbered clauses 1 to 13, wherein the operating time ratio of one or more of the PWM modes is selected for each phase of the multilevel converter.

[0188] Clause 16.

[0189] A system for balancing the junction temperature between at least two power switches in a multilevel converter, the system comprising:

[0190] A closed-loop controller, configured to receive the junction temperature of each of the at least two power switches;

[0191] Determine the difference in junction temperature between the at least two power switches;

[0192] The operating time ratio of the multilevel converter operating in a first PWM mode among multiple pulse width modulation (PWM) modes is defined based on closed-loop control to reduce the difference in junction temperatures of the at least two power switches; and

[0193] A control signal is generated to operate the multilevel converter using the first PWM mode, according to the operating time ratio.

[0194] Clause 17.

[0195] The system described in Clause 16 is wherein the closed-loop controller is a linear closed-loop controller.

[0196] Clause 18.

[0197] The system according to clause 16 or 17 further includes the multilevel converter.

[0198] Clause 19.

[0199] According to the system described in Clause 18, the multilevel converter is an inverter, preferably an active neutral point clamped ANPC inverter.

[0200] Clause No. 20.

[0201] According to the system described in clause 18 or 19, the multilevel converter includes three pairs of power switches in a half-bridge arm, and the at least two power switches belong to different pairs of the three power switches.

Claims

1. A method for balancing the junction temperature between at least two power switches of a multilevel converter, the method comprising: Receive the junction temperature of each of the at least two power switches; Determine the difference in junction temperature between the at least two power switches; The operating time ratio of the multilevel converter operating in the first PWM mode among multiple pulse width modulation PWM modes is defined based on closed-loop control to reduce the difference in junction temperature between the at least two power switches. as well as A control signal is generated to operate the multilevel converter using the first PWM mode, according to the operating time ratio.

2. The method according to claim 1, further comprising: A control signal is generated to operate the multilevel converter using the remaining mode of the multiple PWM modes for the remaining time.

3. The method according to claim 1, wherein the method further comprises: The operating time ratio for at least one other PWM mode is defined based on closed-loop control to reduce the difference in junction temperature between the at least two power switches; as well as A control signal is generated to operate the multilevel converter using the operating time ratio used for at least one other PWM mode.

4. The method according to claim 1, wherein the method further comprises: The operating time ratio is dynamically adjusted based on the real-time junction temperature information of the at least two power switches.

5. The method according to claim 1, wherein the method further comprises: The application uses a predefined switching cycle to operate the various PWM modes.

6. The method of claim 5, wherein the predefined switching period is defined by a minimum switching frequency for switching between the plurality of PWM modes.

7. The method of claim 1, wherein the closed-loop control is implemented using linear control.

8. The method according to claim 7, wherein the closed-loop linear control is implemented using a proportional P controller, a proportional-integral PI controller, or a proportional-integral-derivative PID controller.

9. The method of claim 1, wherein reducing the difference in junction temperature of the at least two power switches comprises minimizing the difference in junction temperature of the at least two power switches.

10. The method according to claim 1, wherein the method further comprises: Select the at least two power switches of the multilevel converter that have different heat losses and / or different heat loss distributions.

11. The method of claim 1, wherein receiving the junction temperature of the two or more power switches comprises: The junction temperature of the at least two power switches is modeled based on a lookup table.

12. The method of claim 1, wherein receiving the junction temperature of the two or more power switches comprises: The junction temperature is measured by direct die temperature measurement for each of the two or more power switches.

13. The method of claim 12, wherein measuring the junction temperature by performing direct die temperature measurement for each of the two or more power switches comprises measuring the junction temperature using a highly integrated SiC cascode power switch.

14. The method of claim 1, wherein the operating time ratio of one or more PWM modes in the PWM modes is selected for one phase of the multilevel converter.

15. The method of claim 1, wherein the operating time ratio of one or more PWM modes in one of the multilevel converters is selected for each multilevel converter.

16. A system for balancing the junction temperature between at least two power switches in a multilevel converter, the system comprising: Closed-loop controller, the closed-loop controller being configured to: Receive the junction temperature of each of the at least two power switches; Determine the difference in junction temperature between the at least two power switches; The operating time ratio of the multilevel converter operating in the first PWM mode among multiple pulse width modulation PWM modes is defined based on closed-loop control to reduce the difference in junction temperature between the at least two power switches. as well as A control signal is generated to operate the multilevel converter using the first PWM mode, according to the operating time ratio.

17. The system of claim 16, wherein the closed-loop controller comprises a linear closed-loop controller.

18. The system of claim 16, further comprising the multilevel converter.

19. The system of claim 18, wherein the multilevel converter is an inverter, preferably an active neutral point clamped ANPC inverter.

20. The system of claim 18, wherein the multilevel converter comprises three pairs of power switches in a half-bridge arm, and the at least two power switches belong to different pairs of the three pairs of power switches.

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