Compact efficient Doherty power amplifier based on phase optimization load modulation network

Abstract

The invention relates to a compact high-efficiency Doherty power amplifier based on a phase optimization load modulation network, which belongs to the technical field of radio frequency power amplifiers and comprises a power divider, a phase compensation network PCN, an LMN with reduced phases, an input matching network IMN, a post matching network PMN, a carrier amplifier PA1 and a peak amplifier PA2. The power divider distributes an input signal to a main path and a peak path, and the main path signal is processed by a first IMN, a PA1 and a load modulation network LMN with phase reduction; the peak path signal is processed by the PCN, the second IMN and the PA2; and the two paths of signals introduce complex impedance at a power combination point to compensate the phase of the LMN, and are finally output after being processed by the PMN.

Description

Technical Field

[0001] This invention belongs to the field of radio frequency power amplifier technology, and relates to a compact and efficient Doherty power amplifier based on a phase-optimized load modulation network. Background Technology

[0002] With the continuous evolution and large-scale deployment of wireless communication systems, energy efficiency has become increasingly prominent, becoming one of the key bottlenecks restricting their sustainable development. As a core energy-consuming component in wireless communication systems, power amplifiers (PAs) must achieve high energy conversion efficiency to reduce the overall energy consumption of the system. In recent years, researchers have proposed various high-efficiency power amplifier architectures, such as Doherty power amplifiers (DPAs), load-modulated balanced amplifiers (LMBAs), and outphasing power amplifiers. Among them, DPAs, due to their better intrinsic performance and relatively simple circuit structure, have been widely adopted as the mainstream technical solution for improving system energy efficiency.

[0003] However, with the gradual development of RF transmitter architecture towards high-density, distributed microcellular structures, traditional power amplifier architectures face numerous challenges in practical deployments due to their large size and high transmission loss. Therefore, miniaturization and lightweighting of power amplifiers (PAs) have become essential requirements for supporting future large-scale array deployments. Simultaneously, continuous advancements in semiconductor manufacturing processes and the rapid development of monolithic microwave integrated circuits (MMICs) provide a solid technological foundation for the compact design of power amplifiers. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a compact and efficient Doherty power amplifier based on a phase-optimized load modulation network.

[0005] To achieve the above objectives, the present invention provides the following technical solution: A compact, high-efficiency Doherty power amplifier based on a phase-optimized load modulation network includes a power divider, a phase compensation network PCN, a phase-reduced LMN, an input matching network IMN, a post-matching network PMN, a carrier amplifier PA1, and a peak amplifier PA2. The power divider distributes the input signal to a main path and a peak path. The main path signal is processed by the first IMN, PA1, and the phase-reduced load modulation network LMN. The peak path signal is processed by the PCN, the second IMN, and PA2. Complex impedances are introduced at the power junction of the two signals to compensate for the phase of the LMN, and finally the signal is processed by the PMN before being output.

[0006] Furthermore, the power divider and the phase compensation network (PCN) are designed jointly.

[0007] Furthermore, the LMN with phase reduction and the peak amplifier PA2 are connected to the PMN via bonding wires.

[0008] Furthermore, an ideal microstrip line TL1 and an ideal transformer TF1 are used to simulate the LMN, and an ideal transformer TF2 is used to simulate the peak path current injection. Based on the impedance variation equation of the transmission line, the impedance Z of the current source end face of the carrier path is obtained. CG With modulation impedance Z T Relationship:

[0009] Where Z0 is the characteristic impedance of an LMN with phase reduction, θ is the phase of an LMN with phase reduction, and the modulation impedance Z T Represented as:

[0010] Where T1 and T2 are the turns ratios of transformers TF1 and TF2, respectively, and the junction impedance Z J =a+j*b, we get:

[0011] Z CG It concerns Z0, θ, T1, T2, and Z. j A function of the real part a and the imaginary part b; by adjusting the values ​​of Z0 and T1, different Z values ​​are simulated. CG The ratio that changes dynamically with different input power levels, i.e., the different impedance change ratios.

[0012] Furthermore, let the impedance ratio of the power amplifier be 2:1, i.e., Z CG In the backoff state, the impedance is 2Ropt, and in the saturation state, it is modulated to Ropt, where Ropt represents the optimal impedance of the transistor current source terminal, a is defined as 1 / 2·Ropt, Z0 is Ropt, T1=1, and T2 is set to 1 in the backoff state and set to Ropt in the saturation state. Then Z CG The regression and saturation states can be represented as follows:

[0013]

[0014] Z CG Both in the regression state and the saturation state, it is affected by b. j The effect of θ, by changing b j This achieves phase compensation for LMN.

[0015] Furthermore, based on gallium nitride HEMT technology and printed circuit board simulation and design, phase-reduced LMN, power divider and phase compensation network PCN are integrated inside the MMIC; the post-matching network is implemented on the printed circuit board; and active devices are configured in the main path and peak path to achieve appropriate power output.

[0016] Furthermore, the junction impedance is 1 / 2Ropt+j*25, and θ is 60° at the center frequency.

[0017] The beneficial effects of this invention are as follows: The compact and efficient Doherty power amplifier based on a phase-optimized load modulation network proposed in this invention has the following advantages: 1) By introducing complex impedance at the junction, the phase of the LMN is reduced, thereby achieving a compact design; 2) The combined design of the power divider and phase compensation network further reduces the circuit size; 3) The theoretical analysis mentioned in this invention is applicable to circuit designs with different impedance change ratios and has universality; 4) The architecture mentioned in this invention and its theoretical analysis can reduce the circuit size while maintaining good load modulation characteristics, namely good back-off and saturation efficiency and output power, etc.

[0018] 5) The architecture mentioned in this invention can be implemented using various processes such as PCB, gallium arsenide, and gallium nitride.

[0019] Other advantages, objectives, and features of the invention will be set forth in part in the description which follows, and in part will be apparent to those skilled in the art from the following examination, or may be learned from practice of the invention. The objectives and other advantages of the invention can be realized and obtained through the following description. Attached Figure Description

[0020] To make the objectives, technical solutions, and advantages of the present invention clearer, the preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, wherein: Figure 1 This is a structural diagram of a compact and efficient Doherty power amplifier based on a phase-optimized load modulation network. Figure 2 This is a core theoretical diagram of a compact, high-efficiency Doherty power amplifier based on a phase-optimized load modulation network. Figure 3 Schematic diagram of the load modulation network and post-matching network implementation; Figure 4 For Z CGThe impedance change trajectories in the regressive and saturated states are shown, where (a) is when bj = 0 Ω and θ changes; and (b) is when θ = 90° and bj changes. Figure 5 Figures (a)-(d) show the impedance variation trajectories of ZCG in the regressive and saturated states with different combinations of bj and θ. Figure 6 This is a schematic diagram of the overall principle of the prepared DPA; Figure 7 The phase characteristics of different modules; Figure 8 The internal layout structure and overall system circuit of a gallium nitride single MMIC; Figure 9 For performance testing, (a) shows the test drain efficiency and gain as a function of output power; (b) shows the test drain efficiency and output power as a function of frequency at the 8dB back-off point and saturation point. Figure 10 For the performance testing of the modulated signal, (a) is the power spectral density at 3.4 GHz with and without a DPD; (b) are the AM-AM and AM-PM curves; Detailed Implementation The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0021] The accompanying drawings are for illustrative purposes only and are schematic diagrams, not actual pictures. They should not be construed as limiting the invention. To better illustrate the embodiments of the invention, some parts in the drawings may be omitted, enlarged, or reduced, and do not represent the actual product dimensions. It is understandable to those skilled in the art that some well-known structures and their descriptions may be omitted in the drawings.

[0022] In the accompanying drawings of the embodiments of the present invention, the same or similar reference numerals correspond to the same or similar components. In the description of the present invention, it should be understood that if terms such as "upper," "lower," "left," "right," "front," and "rear" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, they are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the terms used to describe positional relationships in the drawings are only for illustrative purposes and should not be construed as limiting the present invention. For those skilled in the art, the specific meaning of the above terms can be understood according to the specific circumstances.

[0023] Example 1: This invention provides a compact and efficient Doherty power amplifier based on a phase-optimized load modulation network (LMN). This architecture has two core advantages: first, by introducing a complex impedance at the power junction, the phase of the power divider (LDN) is compensated, thereby reducing the LMN area and achieving a compact design; second, through the joint design of the power divider and phase compensation network (PCN), the internal components are adjusted and reused, achieving power distribution and phase compensation functions without adding new components. This architecture can be implemented using a printed circuit board (PCB) or designed using gallium arsenide (GaAs) or gallium nitride (GaN) processes for MMIC (Multi-Instrument Microsystem).

[0024] Since the load modulation network of a DPA typically needs to provide a 90° phase at the center frequency, it often requires a large circuit area to implement. To reduce the circuit area while maintaining good load modulation performance, this invention proposes a phase-reduced load modulation network scheme. The block diagram of the compact, high-efficiency Doherty power amplifier based on the phase-optimized load modulation network proposed in this invention is shown below. Figure 1 As shown. Figure 1 The locations of the phase-reduced LMN, the jointly designed power divider and phase compensation network PCN, the input matching network (IMN), and the post-matching network PMN are clearly marked. Here, Z0 is the characteristic impedance of the phase-reduced LMN, θ is the phase of the phase-reduced LMN, and Z... J It is the junction impedance, which is a complex impedance. Figure 2 This is the core theoretical diagram of the architecture, used to explain how to reduce the phase of the LMN by introducing a complex impedance at the junction. Figure 3 This is a schematic diagram of the load modulation network and the post-matching network. Figure 2 Ideal microstrip line TL1 and ideal transformer TF1 are used to simulate LMN, and ideal transformer TF2 is used to simulate peak path current injection, i.e., to simulate the backoff and saturation states of DPA. Based on the impedance variation equation of the transmission line, the impedance Z at the current source end face of the carrier path can be obtained. CG With modulation impedance ZT Relationship: (1) Since TF1 and TF2 are both ideal transformers, the modulation impedance ZT can be expressed as: (2) Where T1 and T2 are the turns ratios of transformers TF1 and TF2, respectively. To more clearly illustrate the imaginary part of the junction impedance and the phase θ of LMN, as well as Z... CG The relationship, we define it as Z. J =a+j*b. Therefore, formula (1) can be transformed into: (3) It can be seen that Z CG It concerns Z0, θ, T1, T2, and Z. j A function of the real part *a* and the imaginary part *b*. Different values ​​of *Z* can be simulated by adjusting the values ​​of *Z0* and *T1*. CG The ratio that dynamically changes with different input power levels, i.e., different impedance change ratios, is an important attribute of active load modulated power amplifiers (DPAs). Different impedance change ratios affect the backoff range, output power, linearity, and design complexity of the DPA. To simplify the analysis and clearly understand the compensation effect of the imaginary part of the junction impedance on the LMN phase, the classic Doherty power amplifier impedance change ratio of 2:1, i.e., Z... CG In the back-off state, the impedance is 2Ropt, and in the saturation state, it is modulated to Ropt, where Ropt represents the optimal impedance of the transistor current source terminal. Therefore, according to the load modulation characteristics, a is defined as 1 / 2·Ropt, Z0 is Ropt, and T1=1. Meanwhile, T2 is set to 1 in the back-off state and to [missing value] in the saturation state. Under this setting, Z CG The regression and saturation states can be represented as follows: (4) (5) Based on the above formula, it can be seen that Z CG Both in the regression state and the saturation state, it is affected by b. j And the influence of θ. Therefore, it is reasonable to change b. j This can achieve phase compensation for LMN.

[0025] Figure 4 Figures (a) and (b) show Z under the regression state and the saturation state, respectively. CG As θ changes (when b) j = 0), and Z CG Follow bj The change (when θ = 90°). It can be seen that when b j When θ = 0, decreasing θ will cause Z to... CG_PBO The trajectory deviates: If θ is in positive phase, decreasing θ will cause Z to... CG_PBO The trajectory moves counterclockwise in the upper half-plane of the Smith chart along the direction of decreasing real part; if θ is in negative phase, increasing θ will cause the trajectory to move clockwise in the lower half-plane of the Smith chart along the direction of decreasing real part. However, regardless of how θ changes, Z... CG_SAT The trajectory remains constant and is always equal to Ropt. When θ is fixed at 90°, if b j If the value is positive, increase b. j It will make Z CG_PBO The trajectory gradually spreads in the lower half-plane of the Smith chart towards the direction of increasing real part, while Z... CG_SAT The trajectory then spreads in the direction where the real part decreases; if b j If the value is negative, increase b. j It will make Z CGPBO The trajectory converges in the direction of decreasing real part in the upper half-plane of the Smith chart, while Z... CG_SAT The trajectory gradually converges in the direction of increasing real portion.

[0026] Furthermore, Figure 5 (a)-(d) show different b j Z under θ configuration CG The motion trajectory in the retreat state and the saturation state. The results show that when Z J When a positive imaginary part is introduced, the LMN should be configured with a positive phase, thereby reducing the phase of the LMN while correcting impedance offset and maintaining good load modulation characteristics; when Z J When a negative imaginary part is introduced, the LMN should be in negative phase to achieve the same phase compensation and impedance correction effect. Furthermore, introducing b... j And decreasing θ will cause Z CG_SAT The offset needs to be controlled within an acceptable range. In summary, reasonably introducing an imaginary part into the junction impedance can effectively compensate for the LMN phase, thereby achieving a compact design.

[0027] Example 2: like Figure 6As shown, to verify the feasibility of the aforementioned compact design strategy, this embodiment simulates and designs a DPA operating at 2.95-3.7 GHz based on a Win 0.12 μm GaN HEMT process and a Rogers 4350B printed circuit board. The phase-reduced LMN and compact input network are integrated within the MMIC, while the matching network is implemented on the Rogers 4350B printed circuit board. Simultaneously, 10×125 active devices are configured in both the carrier and peaking branches to achieve appropriate power output. Furthermore, the junction impedance is set to 1 / 2Ropt + j*25, and θ is selected as 60° at the center frequency to perform phase compensation for the LMN, where Ropt can be calculated as 75 ohms.

[0028] Figure 7 The phase characteristics of different modules of the fabricated DPA within the operating bandwidth are demonstrated, with the LMN network meeting design expectations. Phase of input matching refers to the phase difference between the output port of the input network, specifically between the carrier branch and the peaking branch; phase of active device represents the inherent phase difference between the input and output terminals of the active device when operating in Class B and Class C modes, respectively. By combining the phase characteristics of the LMN network, the proposed DPA achieves good phase synchronization at the power combining point.

[0029] Figure 8 The internal layout of the gallium nitride single-MMIC for the fabricated compact DPA and the overall system circuitry are shown. This gallium nitride MMIC measures 1.5 mm × 1.5 mm, exhibiting high integration. The PMN and power filter modules are mounted on a Rogers 4350B PCB, resulting in a total system physical size of 1.63 cm × 1.59 cm, meeting the compact design expectations. To evaluate the performance of the fabricated DPA and verify its practical applications, continuous wave (CW) signals and orthogonal frequency division multiplexing (OFDM) modulated signals with a peak-to-average power ratio (PAPR) of 8 dB and a bandwidth of 80 MHz were used.

[0030] Figure 9Figure (a) shows the relationship between drain efficiency (DE) and gain as a function of output power under continuous wave drive conditions. Measurements show that the designed DPA achieves a saturated drain efficiency of 61.36%–71.17% and a saturated output power of 39.19–39.92 dBm within the operating frequency band. Under 8 dB power back-off (PBO) conditions, the amplifier still maintains a drain efficiency of 46.35%–53.69% while achieving an output power of 31.3–32.0 dBm. Furthermore, the DPA exhibits a small-signal gain range of 8.75 dB to 11.15 dB across the entire frequency band. To more clearly illustrate the trends in key performance indicators, Figure 9 Figure (b) shows the output power and drain efficiency versus frequency under power back-off and saturation conditions. Tests were conducted using an 80 MHz OFDM modulated signal with a PAPR of 8 dB, and the results are summarized in [the table / section]. Figure 10 See Table 1. Within the operating frequency band, the drain efficiency of the designed DPA exceeds 45.8% when the output power is approximately 31 dBm. Without digital predistortion (DPD) linearization, the measured in-band adjacent channel power ratio (ACPR) is better than -24.3 dBc; while after applying DPD based on the generalized memory polynomial (GMP) algorithm, the in-band ACPR is further improved to better than -45.6 dBc. Figure 10 The linearity performance of DPA at 3.4 GHz was also characterized in detail.

[0031] Table 1

[0032] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A compact, high-efficiency Doherty power amplifier based on a phase-optimized load modulation network, characterized in that: It includes a power divider, a phase compensation network PCN, an LMN with phase reduction, an input matching network IMN, a post-matching network PMN, a carrier amplifier PA1, and a peak amplifier PA2; the power divider distributes the input signal to the main path and the peak path, and the main path signal is processed by the first IMN, PA1, and the load modulation network LMN with phase reduction; The peak signal is processed by PCN, the second IMN and PA2; a complex impedance is introduced at the power junction of the two signals to compensate for the phase of LMN, and finally the signal is processed by PMN before being output.

2. The compact, high-efficiency Doherty power amplifier based on a phase-optimized load modulation network according to claim 1, characterized in that: The power divider and phase compensation network (PCN) are designed jointly.

3. The compact, high-efficiency Doherty power amplifier based on a phase-optimized load modulation network according to claim 1, characterized in that: The phase-reduced LMN and peak amplifier PA2 are connected to PMN via bonding wires.

4. The compact, high-efficiency Doherty power amplifier based on a phase-optimized load modulation network according to claim 1, characterized in that: Using an ideal microstrip line TL1 and an ideal transformer TF1 to simulate LMN, and an ideal transformer TF2 to simulate peak path current injection, the impedance Z of the current source end face of the carrier path is obtained according to the impedance variation equation of the transmission line. CG With modulation impedance Z T Relationship: Where Z0 is the characteristic impedance of an LMN with phase reduction, θ is the phase of an LMN with phase reduction, and the modulation impedance Z T Represented as: Where T1 and T2 are the turns ratios of transformers TF1 and TF2, respectively, and the junction impedance Z J =a+j*b, we get: Z CG It concerns Z0, θ, T1, T2, and Z. j A function of the real part a and the imaginary part b; by adjusting the values ​​of Z0 and T1, different Z values ​​are simulated. CG The ratio that changes dynamically with different input power levels, i.e., the different impedance change ratios.

5. The compact, high-efficiency Doherty power amplifier based on a phase-optimized load modulation network according to claim 1, characterized in that: Let the impedance ratio of the power amplifier be 2:1, i.e., Z CG In the backoff state, the impedance is 2Ropt, and in the saturation state, it is modulated to Ropt, where Ropt represents the optimal impedance of the transistor current source terminal, a is defined as 1 / 2·Ropt, Z0 is Ropt, T1=1, and T2 is set to 1 in the backoff state and set to Ropt in the saturation state. Then Z CG The regression and saturation states can be represented as follows: Z CG Both in the regression state and the saturation state, it is affected by b. j The effect of θ, by changing b j This achieves phase compensation for LMN.

6. The compact, high-efficiency Doherty power amplifier based on a phase-optimized load modulation network according to claim 1, characterized in that: Based on gallium nitride HEMT technology and printed circuit board simulation and design, a phase-reduced LMN, power divider, and phase compensation network PCN are integrated inside the MMIC; the post-matching network is implemented on the printed circuit board; and active devices are configured in the main path and peak path to achieve appropriate power output.

7. The compact, high-efficiency Doherty power amplifier based on a phase-optimized load modulation network according to claim 1, characterized in that: The junction impedance is 1 / 2Ropt+j*25, and θ is 60° at the center frequency.

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