A fast disk dropping system based on AMP architecture and its control method
By using a fast disk write system based on the AMP architecture, and by optimizing heterogeneous storage buffers and cross-domain synchronization through power monitoring units and hardware arbitration locking units, the storage conflict and response latency issues under multiple operating systems are resolved, achieving efficient storage media access and sub-second response.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- NANJING ACOINFO TECH CO LTD
- Filing Date
- 2026-03-20
- Publication Date
- 2026-05-26
AI Technical Summary
Existing technologies suffer from storage media access conflicts, cumulative network protocol stack latency, and write amplification due to intermediate layer data abstraction in scenarios with multiple operating systems coexisting. These issues affect storage efficiency and response speed, and cannot meet the sub-second response requirements in emergency scenarios.
A fast disk write system based on AMP architecture is adopted. Through a power monitoring unit, master and slave domains, heterogeneous storage buffer and hardware arbitration locking unit, it realizes cross-domain synchronization and asynchronous access control of storage media. Combined with priority determination module and global scheduling module, access permissions and synchronization mechanism are optimized.
It solves the problem of mutual exclusion of multi-domain resources, eliminates storage device preemption, ensures sub-second collaborative response performance, and improves the access efficiency of storage media and the real-time performance of data storage.
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Figure CN121879692B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the technical field of embedded system storage technology, and specifically to a fast disk-to-disk system based on AMP architecture and its control method. Background Technology
[0002] In existing scenarios where multiple operating systems coexist, a single-domain disaster recovery protection mechanism is typically used when accessing stored data. This mechanism is based on the emergency power supply system of energy storage devices and triggers the data persistence process through physical layer power monitoring. However, this single-domain disaster recovery protection mechanism lacks a mechanism for resolving multi-domain concurrent storage conflicts, which can easily lead to storage media access conflicts.
[0003] Meanwhile, when storing data, a distributed storage coordination protocol is adopted, that is, a cross-domain communication protocol is used to realize the synchronous storage of data across multiple nodes. However, this protocol has the cumulative effect of network protocol stack latency, which cannot meet the sub-second response requirements in emergency scenarios.
[0004] Furthermore, existing data storage technologies employ a layered storage architecture, which is based on a data persistence mechanism at the file system layer. However, this approach suffers from write amplification due to data abstraction at the intermediate layer, affecting storage atomicity and timeliness. Additionally, system-level scheduling and waiting for shared resource locks further impact disk write efficiency.
[0005] Therefore, there is an urgent need to provide a new solution to address the defects and shortcomings of the existing technologies. Summary of the Invention
[0006] To address the shortcomings and deficiencies in existing technologies, this invention provides a fast disk dropping system based on the AMP architecture and its control method.
[0007] The specific solution provided by this invention is as follows:
[0008] A fast disk write system based on AMP architecture, characterized in that: the system includes:
[0009] A power monitoring unit is connected to the master control domain and the slave domain respectively to monitor the power operation status in real time and send corresponding instructions to the master control domain and the slave domain.
[0010] The master control domain and the slave domain are connected at the other end to the heterogeneous storage buffer signal, and the master control domain and the slave domain maintain heterogeneous synchronization.
[0011] A heterogeneous storage buffer, one end of which is signal-connected to the master domain and the slave domain respectively, the master domain and the slave domain are able to perform direct memory access to the heterogeneous storage buffer, and the other end of the heterogeneous storage buffer is signal-connected to the hardware arbitration locking unit.
[0012] The hardware arbitration locking unit is connected to the heterogeneous storage buffer signal and the main control domain signal, and its other end is connected to the storage medium signal. The main control domain can control the access permissions of each domain to the storage medium through the hardware arbitration locking unit according to the corresponding instructions sent by the power monitoring unit.
[0013] As a further preferred embodiment of the present invention
[0014] The master domain and the subordinate domain always maintain cross-domain synchronization;
[0015] When the power monitoring unit sends a power interruption command, it maintains cross-domain synchronization between the master domain and the slave domain, records the interruption request, and delays the processing of the power interruption command.
[0016] When the power monitoring unit sends a power normalization command after the interruption ends, the power interrupt command is executed immediately.
[0017] The heterogeneous storage buffer adopts a distributed cache structure with physical address isolation.
[0018] As a further preferred embodiment of the present invention
[0019] The main control domain includes at least a priority determination module and a global scheduling module; wherein...
[0020] The priority determination module determines the access priority of each domain to the storage medium;
[0021] The global scheduling module controls the access permissions of each domain to the storage medium according to the determined access priority.
[0022] As a further preferred embodiment of the present invention, the priority determination module determines the access priority of each domain to the storage medium based on the access priority value of each domain, and the access priority value of each domain is calculated according to the following formula:
[0023] Y = aX1 + bX2 + cX3 + dX4 + eX5;
[0024] In the formula,
[0025] Y represents the access priority value of each domain to the storage medium;
[0026] X1 represents the device performance score for each domain;
[0027] X2 represents the current network latency rate for each domain;
[0028] X3 represents the current load rate of each domain;
[0029] X4 represents the historical stability score for each domain;
[0030] X5 scores the user selection strategy for each domain;
[0031] a, b, c, d, and e are the weight coefficients corresponding to X1, X2, X3, X4, and X5, respectively, and satisfy a > 0, d > 0, e > 0; b < 0, c < 0;
[0032] The higher the access priority value of each domain to the storage medium, the higher the access priority of each domain to the storage medium.
[0033] The smaller the access priority value of each domain to the storage medium, the lower the access priority of each domain to the storage medium.
[0034] As a further preferred embodiment of the present invention
[0035] When the global scheduling module controls the access permissions of each domain to the storage medium according to the determined access priority, it includes:
[0036] 1) Determine the priority arbitration threshold;
[0037] 2) Compare the determined access priorities of each domain to the storage medium with the priority arbitration threshold;
[0038] 3) Based on the comparison results, the domains with priority higher than the priority arbitration threshold are classified as the first domain, and the domains with priority lower than the priority arbitration threshold are classified as the second domain. The first and second domains are then stored separately.
[0039] 4) When the power monitoring unit sends a power normal command, the hardware arbitration lockout unit maintains access permissions for all domains to the storage medium.
[0040] When the power monitoring unit sends a power interrupt command, the hardware arbitration locking unit opens the access permission of the first domain and closes the access permission of the second domain.
[0041] As a further preferred embodiment of the present invention, the priority arbitration threshold can be adjusted as needed according to priority influencing factors; the priority influencing factors include at least historical parameters of each domain, current parameters of each domain, and user feedback parameters.
[0042] As a further preferred embodiment of the present invention, the dependent domain includes at least a submission request module and a scheduling trigger module; wherein...
[0043] The submission request module initiates an access request from the subordinate domain to the storage medium to the master domain;
[0044] The scheduling triggering module triggers the access scheduling of each domain to the corresponding storage medium according to the determined access permissions.
[0045] As a further preferred embodiment of the present invention, the master domain and the slave domain maintain cross-domain synchronization by using a memory-mapped data dumping method.
[0046] As a further preferred embodiment of the present invention, when the power monitoring unit detects a power interruption, it sends an interrupt command to both the master control domain and the slave domain; after receiving the interrupt command, the master control domain and the slave domain perform the following operations respectively:
[0047] The main control domain performs a rapid disk write operation;
[0048] The subordinate domain accesses the storage medium according to its current access permissions and maintains cross-domain synchronization with the master domain through a memory-mapped data dumping method.
[0049] Furthermore, the present invention also provides a control method for a fast disk-feeding system based on AMP architecture, characterized by comprising the following steps:
[0050] S100: Determine the access priority of each domain to the storage medium;
[0051] S200: The subordinate domain initiates a storage media access request to the master domain;
[0052] S300: The master domain determines the access permissions of each domain to the storage medium;
[0053] S400: When the power monitoring unit sends a power-normal command, maintain access permissions for all domains to the storage medium.
[0054] S500: When the power monitoring unit sends a power interruption command, it enables access to the first domain and disables access to the second domain.
[0055] S600: The master domain and slave domain maintain cross-domain synchronization through memory-mapped data dumping.
[0056] Compared with existing technologies, the technical effects that this invention can achieve include:
[0057] 1) This invention provides a fast disk persistence system and its control method based on AMP architecture. By setting up a hardware arbitration locking unit, the master control domain can control the access permissions of each domain to the storage medium according to the corresponding instructions sent by the power monitoring unit, thereby solving the problem of mutual exclusion of multi-domain resources. By adopting the master control domain arbitration mechanism, exclusive non-contention access control of the storage medium is realized, eliminating the problem of multi-domain concurrent conflicts and solving the problem of storage device preemption when multiple operating systems are simultaneously persisted to disk under the AMP architecture.
[0058] 2) This invention provides a fast disk write system and its control method based on AMP architecture. By setting up a heterogeneous storage buffer with a distributed cache structure that uses physical address isolation, a cross-domain direct write channel and interrupt-driven coordination mechanism based on hardware signal triggering are constructed. Based on the event-driven architecture of direct memory access and hardware interrupt, sub-second collaborative response performance can be achieved, thereby ensuring the real-time performance of data access.
[0059] 3) This invention provides a fast disk persistence system and its control method based on AMP architecture. By setting a priority determination module, the access priority of each domain to the storage medium is determined according to the access priority value of each domain. The access priority value of each domain to the storage medium is determined according to the device performance score, current network latency rate, current load rate, historical stability score and user selection strategy score of each domain. While realizing priority sorting, it meets the different access needs of each domain to the storage medium, and can further improve the access efficiency of each domain to the storage medium.
[0060] 4) This invention provides a fast disk write system and its control method based on AMP architecture. The priority arbitration threshold is determined by the historical parameters of each domain (historical usage stability, number of errors, etc.), the current parameters of each domain (current load rate, network latency rate, etc.), and user feedback parameters (user impression score and experience, etc.). The priority arbitration threshold can be adjusted as needed according to the historical parameters, current parameters, and user feedback parameters of each domain, thereby further improving the disk write efficiency of the master domain and the data storage efficiency of the slave domain during power interruption. Attached Figure Description
[0061] Figure 1 The diagram shown is a logical structure diagram of the disk dropping system provided by the present invention.
[0062] Figure 2 The diagram shows the steps of the control method provided by the present invention. Detailed Implementation
[0063] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0064] In the description of this invention, it should be noted that the terms "upper," "lower," "inner," "outer," "front end," "rear end," "both ends," "one end," and "the other end," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0065] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installed," "equipped with," "connected," etc., should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.
[0066] [First Embodiment]
[0067] AMP (Asymmetric multiprocessing) architecture, also known as asymmetric multiprocessing or unbalanced multiprocessing architecture, is characterized by multiple processors being allocated to execute specific tasks.
[0068] like Figure 1 As shown, the first embodiment of the present invention provides a fast disk write system based on AMP architecture, the system comprising:
[0069] The power monitoring unit is connected to both the master control domain and the slave domain to monitor the power supply's operating status in real time and send corresponding commands to both domains. For example, it can be configured such that when the power monitoring unit detects that the power supply is operating normally, it sends a power normal command to both domains; and when the power monitoring unit detects an emergency power interruption, it sends a power interruption command to both domains.
[0070] The master domain and slave domain are connected to the heterogeneous storage buffer at the other end, and the master domain and slave domain maintain heterogeneous synchronization.
[0071] In this embodiment, the main control domain includes at least a priority determination module and a global scheduling module; wherein,
[0072] The priority determination module determines the access priority of each domain to the storage medium. Specifically, in this embodiment, the priority determination module determines the access priority of each domain to the storage medium based on the access priority value of each domain. The access priority value of each domain is calculated according to the following formula:
[0073] Y = aX1 + bX2 + cX3 + dX4 + eX5;
[0074] In the formula,
[0075] Y represents the access priority value of each domain to the storage medium;
[0076] X1 represents the device performance score for each domain;
[0077] X2 represents the current network latency rate for each domain;
[0078] X3 represents the current load rate of each domain;
[0079] X4 represents the historical stability score for each domain;
[0080] X5 scores the user selection strategy for each domain;
[0081] a, b, c, d, and e are the weight coefficients corresponding to X1, X2, X3, X4, and X5, respectively. Since the device performance score, historical stability score, and user selection strategy score of each domain have a positive impact on the access priority value, while the current network latency rate and current load rate of each domain have a negative impact on the access priority value, it is necessary to satisfy a > 0, d > 0, e > 0; b < 0, c < 0.
[0082] The higher the access priority value of each domain to the storage medium, the higher the access priority of each domain to the storage medium.
[0083] The smaller the access priority value of each domain to the storage medium, the lower the access priority of each domain to the storage medium.
[0084] By setting a priority determination module, the access priority of each domain to the storage medium is determined based on the access priority value of each domain. Furthermore, the access priority value of each domain to the storage medium is determined based on the device performance score, current network latency rate, current load rate, historical stability score, and user selection strategy score of each domain. While realizing priority sorting, it meets the different access needs of each domain to the storage medium and can further improve the access efficiency of each domain to the storage medium.
[0085] In this embodiment, the global scheduling module controls the access permissions of each domain to the storage medium based on a determined access priority. In this embodiment, when the global scheduling module controls the access permissions of each domain to the storage medium based on the determined access priority, it includes:
[0086] 1) Determine the priority arbitration threshold; the priority arbitration threshold can be adjusted as needed based on priority influencing factors; in this embodiment, priority influencing factors include at least the historical parameters of each domain (historical usage stability, number of errors, etc.), the current parameters of each domain (current load rate, network latency rate, etc.), and user feedback parameters (user impression score and experience, etc.), so as to adjust the priority arbitration threshold as needed based on the historical parameters, current parameters, and user feedback parameters of each domain, thereby further improving the disk write efficiency of the master domain and the data storage efficiency of the slave domain during power interruption;
[0087] 2) Compare the determined access priorities of each domain to the storage medium with the priority arbitration threshold to determine the relationship between the priority of each domain and the priority arbitration threshold;
[0088] 3) Based on the comparison results, the domains with priority higher than the priority arbitration threshold are classified as the first domain, and the domains with priority lower than the priority arbitration threshold are classified as the second domain. The first and second domains are then stored separately.
[0089] 4) When the power monitoring unit sends a power normal command, the hardware arbitration lockout unit maintains access permissions for all domains to the storage medium.
[0090] When the power monitoring unit sends a power interrupt command, the hardware arbitration locking unit opens the access permission of the first domain and closes the access permission of the second domain.
[0091] The hardware arbitration locking unit solves the problem of mutual exclusion of resources in multiple domains. The master domain arbitration mechanism is used to achieve exclusive and contention-free access control of the storage medium, eliminate the problem of concurrent conflicts in multiple domains, and solve the problem of storage device preemption when multiple operating systems are written to disk at the same time under the AMP architecture.
[0092] The subordinate domain includes at least a request submission module and a scheduling trigger module; among them,
[0093] The request submission module initiates a request to the master domain for the subordinate domain to access the storage medium;
[0094] The scheduling triggering module triggers access scheduling for each domain to the corresponding storage medium based on the determined access permissions. For example:
[0095] When the power monitoring unit sends a power-normal command, maintain access permissions for all domains to the storage medium.
[0096] When the power monitoring unit sends a power interruption command, it enables access to the first domain and disables access to the second domain.
[0097] In this embodiment, the master domain and the slave domain maintain cross-domain synchronization by using a memory-mapped data dump method, thereby achieving sub-second collaborative response performance and ensuring the real-time nature of data access.
[0098] When the power monitoring unit detects a power interruption, it sends interrupt commands to both the master control domain and the slave domain. Upon receiving the interrupt commands, the master control domain and the slave domain perform the following operations respectively:
[0099] The master control domain performs a rapid disk write operation;
[0100] The subordinate domain accesses the storage medium according to its current access permissions and maintains cross-domain synchronization with the master domain through memory-mapped data dumping.
[0101] The heterogeneous storage buffer has one end connected to both the master and slave domains, allowing direct memory access. The other end is connected to a hardware arbitration and locking unit. The heterogeneous storage buffer employs a physically address-isolated distributed cache structure.
[0102] This means that a physical address space with different memory space is statically allocated to the master domain and the slave domain for caching of the storage medium. In this way, there will be no interference between master and slave access, and each will process its own cached data and write it to disk, reducing the impact of interference and improving processing efficiency.
[0103] In this embodiment, the master domain and the slave domain always maintain cross-domain synchronization;
[0104] When the power monitoring unit sends a power interruption command, it maintains cross-domain synchronization between the master domain and the slave domain, records the interruption request, and delays the processing of the power interruption command.
[0105] When the power monitoring unit sends a power normalization command after the interruption ends, the power interrupt command is executed immediately.
[0106] The hardware arbitration locking unit is connected to both the heterogeneous storage buffer and the master control domain, with its other end connected to the storage medium. The master control domain, based on corresponding instructions sent by the power monitoring unit, controls the access permissions of each domain to the storage medium through the hardware arbitration locking unit. By implementing the hardware arbitration locking unit, the problem of mutual exclusion of resources across multiple domains is solved. The master control domain arbitration mechanism achieves exclusive, contention-free access control to the storage medium, eliminating multi-domain concurrency conflicts and resolving the storage device preemption problem when multiple operating systems are simultaneously written to disk in the AMP architecture.
[0107] [Second Embodiment]
[0108] The second embodiment of the present invention also mentions a control method for a fast disk-feeding system based on AMP architecture, comprising the following steps:
[0109] S100: Determine the access priority of each domain to the storage medium;
[0110] S200: The subordinate domain initiates a storage media access request to the master domain;
[0111] S300: The master domain determines the access permissions of each domain to the storage medium;
[0112] S400: When the power monitoring unit sends a power-normal command, maintain access permissions for all domains to the storage medium.
[0113] S500: When the power monitoring unit sends a power interruption command, it enables access to the first domain and disables access to the second domain.
[0114] S600: The master domain and slave domain maintain cross-domain synchronization through memory-mapped data dumping.
[0115] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.
Claims
1. A fast dump system based on AMP architecture, characterized in that: The system includes: A power monitoring unit is connected to the master control domain and the slave domain respectively to monitor the power operation status in real time and send corresponding instructions to the master control domain and the slave domain. The master control domain and the slave domain are connected at the other end to the heterogeneous storage buffer signal, and the master control domain and the slave domain maintain heterogeneous synchronization. A heterogeneous storage buffer, one end of which is signal-connected to the master domain and the slave domain respectively, the master domain and the slave domain are able to perform direct memory access to the heterogeneous storage buffer, and the other end of the heterogeneous storage buffer is signal-connected to the hardware arbitration locking unit. The hardware arbitration locking unit is connected to the heterogeneous storage buffer signal and the main control domain signal, and its other end is connected to the storage medium signal. The main control domain can control the access permissions of each domain to the storage medium through the hardware arbitration locking unit according to the corresponding instructions sent by the power monitoring unit.
2. The fast disk writing system based on AMP architecture according to claim 1, characterized in that: The master domain and the subordinate domain always maintain cross-domain synchronization; When the power monitoring unit sends a power interruption command, it maintains cross-domain synchronization between the master domain and the slave domain, records the interruption request, and delays the processing of the power interruption command. When the power monitoring unit sends a power normalization command after the interruption ends, the power interrupt command is executed immediately. The heterogeneous storage buffer adopts a distributed cache structure with physical address isolation.
3. The fast destaging system based on the AMP architecture according to claim 1, characterized in that: The main control domain includes at least a priority determination module and a global scheduling module; wherein... The priority determination module determines the access priority of each domain to the storage medium; The global scheduling module controls the access permissions of each domain to the storage medium according to the determined access priority.
4. The fast disk writing system based on AMP architecture according to claim 3, characterized in that: The priority determination module determines the access priority of each domain to the storage medium based on the access priority value of each domain. The access priority value of each domain is calculated according to the following formula: Y = aX1 + bX2 + cX3 + dX4 + eX5; In the formula, Y represents the access priority value of each domain to the storage medium; X1 represents the device performance score for each domain; X2 represents the current network latency rate for each domain; X3 represents the current load rate of each domain; X4 represents the historical stability score for each domain; X5 scores the user selection strategy for each domain; a, b, c, d, and e are the weight coefficients corresponding to X1, X2, X3, X4, and X5, respectively, and satisfy a > 0, d > 0, e > 0; b < 0, c < 0; The higher the access priority value of each domain to the storage medium, the higher the access priority of each domain to the storage medium. The smaller the access priority value of each domain to the storage medium, the lower the access priority of each domain to the storage medium.
5. A fast disk writing system based on AMP architecture according to claim 3, characterized in that: When the global scheduling module controls the access permissions of each domain to the storage medium according to the determined access priority, it includes: 1) Determine the priority arbitration threshold; 2) Compare the determined access priorities of each domain to the storage medium with the priority arbitration threshold; 3) Based on the comparison results, the domains with priority higher than the priority arbitration threshold are classified as the first domain, and the domains with priority lower than the priority arbitration threshold are classified as the second domain. The first and second domains are then stored separately. 4) When the power monitoring unit sends a power normal command, the hardware arbitration lockout unit maintains access permissions for all domains to the storage medium. When the power monitoring unit sends a power interrupt command, the hardware arbitration locking unit opens the access permission of the first domain and closes the access permission of the second domain.
6. The fast disk writing system based on AMP architecture according to claim 5, characterized in that: The priority arbitration threshold can be adjusted as needed based on priority influencing factors; the priority influencing factors include at least historical parameters of each domain, current parameters of each domain, and user feedback parameters.
7. A fast disk writing system based on AMP architecture according to claim 3, characterized in that: The subordinate domain includes at least a submission request module and a scheduling trigger module; wherein... The submission request module initiates an access request from the subordinate domain to the storage medium to the master domain; The scheduling triggering module triggers the access scheduling of each domain to the corresponding storage medium according to the determined access permissions.
8. The fast disk writing system based on AMP architecture according to claim 1, characterized in that: The master domain and slave domains maintain cross-domain synchronization using a memory-mapped data dumping method.
9. A fast disk writing system based on AMP architecture according to claim 1, characterized in that: When the power monitoring unit detects a power interruption, it sends interrupt commands to both the master control domain and the slave domain. Upon receiving the interrupt commands, the master control domain and the slave domain perform the following operations respectively: The main control domain performs a rapid disk write operation; The subordinate domain accesses the storage medium according to its current access permissions and maintains cross-domain synchronization with the master domain through a memory-mapped data dumping method.
10. A control method for a fast disk dropping system based on an AMP architecture according to any one of claims 1-9, characterized in that: Includes the following steps: S100: Determine the access priority of each domain to the storage medium; S200: The subordinate domain initiates a storage media access request to the master domain; S3 00: The master domain determines the access permissions of each domain to the storage medium; S400: When the power monitoring unit sends a power-normal command, maintain access permissions for all domains to the storage medium. S5 00: When the power monitoring unit sends a power interruption command, enable access to the first domain and disable access to the second domain; S600: The master domain and slave domain maintain cross-domain synchronization through memory-mapped data dumping.