Data transmission performance optimization circuit, demodulation device and digital isolator

Abstract

The invention relates to the technical field of isolated transmission, and discloses a data transmission performance optimization circuit, a demodulation device and a digital isolator, the demodulation device is suitable for generating a first demodulation signal and a second demodulation signal in the process of demodulating a differential modulation signal, and the data transmission performance optimization circuit comprises a detection unit, a processing unit and a processing unit, the detection unit is configured to detect at least one of the differential modulation signals so as to determine the carrier state of the differential modulation signals; and the signal adjusting unit is configured to adjust at least one of the first demodulation signal and the second demodulation signal according to the carrier state, so that the absolute value of the voltage difference value between the first demodulation signal and the second demodulation signal is reduced in the carrier state switching process of the differential modulation signal. According to the invention, the dynamic adjustment of the digital isolator on the PD index is realized, so that the performance optimization effect of the digital isolator is comprehensively improved, and the signal transmission performance is greatly improved.

Description

Technical Field

[0001] This application relates to the field of isolated transmission technology, and in particular to a data transmission performance optimization circuit, demodulation device, and digital isolator. Background Technology

[0002] Digital isolators are widely used in electronic devices and systems. Common Mode Transient Immunity (CMTI) and Propagation Delay (PD) are two key performance indicators for evaluating digital isolators. CMTI characterizes the isolator's ability to maintain signal stability in the face of transient interference, while PD characterizes its ability to transmit signals quickly and accurately. However, in related technologies, to reduce the impact of transient interference on signal transmission, the performance of the digital isolator in terms of PD is generally sacrificed to meet the requirements of CMTI. This results in lower signal transmission efficiency and affects signal transmission performance. Summary of the Invention

[0003] This application provides a data transmission performance optimization circuit, demodulation device, and digital isolator, which solves the technical problem of low signal transmission efficiency of current digital isolators, affecting signal transmission performance. During the carrier state switching process of differential modulation signal, by adjusting the absolute value of the voltage difference between the first demodulation signal and the second demodulation signal to reduce the voltage difference, the digital isolator can be dynamically adjusted in terms of PD index, thereby comprehensively improving the performance optimization effect of the digital isolator and greatly improving signal transmission performance.

[0004] To achieve the above objectives, the main technical solutions adopted in this application include:

[0005] In a first aspect, embodiments of this application provide a data transmission performance optimization circuit applied to a demodulation device, wherein the demodulation device is adapted to generate a first demodulated signal and a second demodulated signal during the demodulation of a differentially modulated signal, and the data transmission performance optimization circuit includes:

[0006] A detection unit configured to detect at least one of the differential modulation signals to determine the carrier state of the differential modulation signals;

[0007] A signal conditioning unit is configured to adjust at least one of the first demodulated signal and the second demodulated signal according to the carrier state, such that the absolute value of the voltage difference between the first demodulated signal and the second demodulated signal decreases during the carrier state switching of the differential modulation signal.

[0008] The data transmission performance optimization circuit proposed in this application detects at least one of the differential modulation signals through a detection unit to determine the carrier state of the differential modulation signal. Then, a signal conditioning unit adjusts at least one of the first demodulated signal and the second demodulated signal according to the carrier state, thereby reducing the absolute value of the voltage difference between the first and second demodulated signals. This allows for dynamic adjustment of the digital isolator's performance in terms of PD (Power Delay) during carrier state switching, ensuring the digital isolator performs well in both CMTI (Common Memory Interchange Tier) and PD metrics. Therefore, this application embodiment can respond promptly to the carrier state of the differential modulation signal, quickly reducing the absolute value of the voltage difference between the first and second demodulated signals, shortening the crossover time between the first and second demodulated signals, and thus significantly reducing transmission delay (PD) and optimizing the PD performance. Furthermore, the embodiments of this application only adjust the first demodulated signal and the second demodulated signal during the carrier state switching process of the differential modulation signal, without affecting the CMTI index during signal transmission. Therefore, the digital isolator can have both high anti-interference capability and low transmission delay during signal transmission, which significantly improves the performance of the digital isolator and is conducive to improving the reliability and efficiency of high-speed data communication.

[0009] Optionally, in some embodiments of this application, the signal conditioning unit is further configured to perform voltage reduction conditioning on the first demodulated signal and / or voltage increase conditioning on the second demodulated signal during the switching process of the differential modulation signal from a carrier-free state to a carrier-loaded state; and to perform voltage increase conditioning on the first demodulated signal and / or voltage reduction conditioning on the second demodulated signal during the switching process of the differential modulation signal from a carrier-loaded state to a carrier-free state.

[0010] Optionally, in some embodiments of this application, during the switching process of the differential modulation signal from a carrier-free state to a carrier-carried state, the reduction control of the absolute value of the voltage difference is completed within a first transmission delay time; during the switching process of the differential modulation signal from a carrier-free state to a carrier-carried state, the reduction control of the absolute value of the voltage difference is completed within a second transmission delay time.

[0011] Wherein, the first transmission delay time is the delay time of the first demodulated signal and the second demodulated signal in response to the differential modulation signal when switching from a carrier-free state to a carrier-enabled state, and the second transmission delay time is the delay time of the first demodulated signal and the second demodulated signal in response to the differential modulation signal when switching from a carrier-enabled state to a carrier-free state.

[0012] In this embodiment of the application, when the carrier state of the differential modulation signal is switched, the absolute value of the voltage difference between the first demodulated signal and the second demodulated signal is rapidly reduced by the signal conditioning unit, and the voltage of the demodulated signal can be dynamically controlled quickly within the corresponding first transmission delay time or second transmission delay time, thereby significantly reducing the transmission delay caused by the carrier state switching. As a result, the PD index is optimized when the differential modulation signal switches from a carrier-free state to a carrier-carried state, reducing the signal transmission delay and improving the signal transmission efficiency.

[0013] Optionally, in some embodiments of this application, during the process of the differential modulation signal switching from a carrier-free state to a carrier-enabled state, the duration for adjusting at least one of the first demodulated signal and the second demodulated signal is greater than or equal to the sum of the first transmission delay time and the first crossover time; during the process of the differential modulation signal switching from a carrier-enabled state to a carrier-free state, the duration for adjusting at least one of the first demodulated signal and the second demodulated signal is greater than or equal to the second transmission delay time.

[0014] Wherein, the first crossover time is the conventional crossover time during the switching process of the differential modulation signal from a carrierless state to a carrier-enabled state. The conventional crossover time is the time from when the first demodulated signal and the second demodulated signal respond to the differential modulation signal to when a crossover occurs during the switching from a carrierless state to a carrier-enabled state, without adjusting the first demodulated signal and the second demodulated signal.

[0015] Optionally, in some embodiments of this application, when the differential modulation signal is in a carrier-free state, and the first demodulated signal is greater than the second demodulated signal and the first demodulated signal and the second demodulated signal are in a stable state, the absolute value of the voltage difference between the first demodulated signal and the second demodulated signal is greater than a first preset voltage; when the differential modulation signal is in a carrier-carried state, and the first demodulated signal is less than the second demodulated signal and the first demodulated signal and the second demodulated signal are in a stable state, the absolute value of the voltage difference between the first demodulated signal and the second demodulated signal is greater than a second preset voltage.

[0016] In this embodiment of the application, when the differential modulation signal is in a carrier-free state and a carrier-carrier state, the voltage difference between the first demodulated signal and the second demodulated signal is kept at a large level, reducing the impact on the CMTI index during signal transmission. This enables the digital isolator to have both high anti-interference capability and low transmission delay during signal transmission.

[0017] Optionally, in some embodiments of this application, the demodulation device includes a first comparator, a first input terminal of the first comparator adapted to receive the first demodulated signal, a second input terminal of the first comparator adapted to receive the second demodulated signal, and the first comparator adapted to compare the first demodulated signal with the second demodulated signal to output a comparison signal. The signal conditioning unit is further configured to generate a first conditioning control signal based on the comparison signal during the switching process of the differential modulation signal from a carrier-enabled state to a carrier-free state, and to generate a second conditioning control signal based on the comparison signal during the switching process of the differential modulation signal from a carrier-free state to a carrier-enabled state.

[0018] In this embodiment, a first comparator compares the first demodulated signal with the second demodulated signal, and generates a corresponding adjustment control signal based on the comparison result during the carrier state switching process of the differential modulation signal. This enables the signal conditioning unit to adjust in response to the carrier state switching, thereby optimizing the PD index and improving signal transmission efficiency.

[0019] Optionally, in some embodiments of this application, the demodulation device includes a pre-amplification circuit and an envelope detection circuit. The pre-amplification circuit is adapted to pre-amplify the differential modulation signal and output a first amplified signal and a second amplified signal. The envelope detection circuit is adapted to detect the first amplified signal and the second amplified signal respectively to output a first demodulated signal and a second demodulated signal. The first adjustment control signal is used to adjust and control the pre-amplification circuit so that the absolute value of the voltage difference decreases during the switching of the differential modulation signal from a carrier state to a carrierless state. The second adjustment control signal is used to adjust and control the voltage at the first input terminal and / or the voltage at the second input terminal of the first comparator so that the absolute value of the voltage difference decreases during the switching of the differential modulation signal from a carrierless state to a carrier-enabled state.

[0020] The first adjustment control signal adjusts and controls the differential modulation signal in response to the switching process from a carrier-on state to a carrier-free state, and the second adjustment control signal adjusts and controls the differential modulation signal in response to the switching process from a carrier-free state to a carrier-on state, so that the voltage difference between the first demodulated signal and the second demodulated signal can be reduced rapidly, thereby optimizing the PD index during the carrier state switching process.

[0021] Optionally, in some embodiments of this application, when the second adjustment control signal is used to adjust the voltage at the second input terminal of the first comparator, the demodulation device further includes a first resistor and a first current source. The first end of the first resistor is connected to the second output terminal of the envelope detection circuit, the second end of the first resistor is connected to the second input terminal of the first comparator, the positive terminal of the first current source is connected to the second end of the first resistor, and the negative terminal of the first current source is connected to a reference ground. The second adjustment control signal is used to adjust the product value between the first resistor and the first current source to decrease.

[0022] This application embodiment utilizes a second adjustment control signal to adjust the product value between the first resistor and the first current source, thereby adjusting the voltage at the second input terminal of the first comparator. This effectively controls the voltage difference between the first demodulated signal and the second demodulated signal, optimizing the PD index when the differential modulation signal switches from a carrier-free state to a carrier-enabled state, thereby improving the signal transmission efficiency of the digital isolator.

[0023] Optionally, in some embodiments of this application, the amplitude of the first amplified signal is increased and / or the amplitude of the second amplified signal is decreased according to the first adjustment control signal, so as to realize the adjustment control of the pre-amplification circuit.

[0024] Optionally, in some embodiments of this application, the pre-amplification circuit includes a first MOSFET, a second MOSFET, a second resistor, and a third resistor. The source of the first MOSFET is connected to a reference power supply, the drain of the first MOSFET is connected to the drain of the second MOSFET, the source of the second MOSFET is connected to a reference ground through a second current source, the gate of the first MOSFET is connected to the reference power supply through a first capacitor, the gate of the first MOSFET is connected to a first terminal of the second resistor, the second terminal of the second resistor is connected to a first terminal of the third resistor and serves as a first output terminal of the pre-amplification circuit, and the second terminal of the third resistor is connected to the drain of the first MOSFET and serves as a second output terminal of the pre-amplification circuit. The first adjustment control signal is used to increase the ratio between the second resistor and the third resistor.

[0025] This application embodiment utilizes a first adjustment control signal to adjust the ratio between the second resistor and the third resistor, thereby adjusting the voltage difference between the first demodulated signal and the second demodulated signal. This optimizes the PD index during the switching process of the differential modulation signal from a carrier state to a carrier-free state, thereby improving the signal transmission efficiency of the digital isolator.

[0026] Optionally, in some embodiments of this application, the detection unit includes a second comparator, the detection unit generates a first signal based on one of the differential modulation signals, a first input terminal of the second comparator is adapted to receive the first signal, a second input terminal of the second comparator is adapted to receive a reference voltage value, and the second comparator compares the first signal with the reference voltage value to output a detection signal characterizing the carrier state of the differential modulation signal to the signal conditioning unit.

[0027] Optionally, in some embodiments of this application, the detection unit includes a second comparator, the detection unit generates a first signal characterizing the absolute value of the difference between the differential modulation signals according to the differential modulation signal, a first input terminal of the second comparator is adapted to receive the first signal, a second input terminal of the second comparator is adapted to receive a reference voltage value, and the second comparator compares the first signal with the reference voltage value to output a detection signal characterizing the carrier state of the differential modulation signal to the signal conditioning unit.

[0028] In this application embodiment, a first signal is used to characterize one of the differential modulation signals, or a first signal is used to characterize the absolute value of the difference between the differential modulation signals, so as to realize the detection of the carrier state of the differential modulation signal.

[0029] Optionally, in some embodiments of this application, the signal conditioning unit generates the first conditioning control signal and the second conditioning control signal based on the detection signal and the comparison signal, wherein the first conditioning control signal is generated based on the detection signal representing the moment when the differential modulation signal begins to enter the carrier-free state and the comparison signal representing the moment when the second demodulated signal begins to be less than the first demodulated signal, and the second conditioning control signal is generated based on the detection signal representing the transition moment when the differential modulation signal begins to enter the carrier-carrying state and the comparison signal representing the transition moment when the second demodulated signal begins to be greater than the first demodulated signal.

[0030] This application embodiment rapidly generates corresponding first and second adjustment control signals through signal logic processing, and ensures that the corresponding adjustment control signals are generated when the carrier state of the differential modulation signal switches, thereby quickly adjusting and reducing the voltage difference between the first and second demodulated signals to optimize the PD index. When the carrier state of the differential modulation signal does not switch, the generation of the adjustment control signals is canceled, thereby ensuring that the digital isolator has a high CMTI index in both carrier-on and carrier-off states, so that the digital isolator can take into account the performance of both CMTI and PD indexes.

[0031] Secondly, embodiments of this application provide a demodulation device, including the data transmission performance optimization circuit described in the above embodiments.

[0032] The demodulation device proposed in this application dynamically adjusts the voltage difference between the first demodulated signal and the second demodulated signal through the aforementioned data transmission performance optimization circuit. It can reduce the voltage difference in response to the carrier switching state of the differential modulation signal, thereby dynamically adjusting the performance of the digital isolator in terms of PD index. This allows the digital isolator to balance the performance of both CMTI and PD indexes, while also having high anti-interference capability and low transmission delay, significantly improving the performance of the digital isolator and contributing to improving the reliability and efficiency of high-speed data communication.

[0033] Thirdly, embodiments of this application provide a digital isolator, comprising:

[0034] A modulation device adapted to modulate an initial signal to generate a differentially modulated signal;

[0035] According to the demodulation apparatus described in the above embodiments, the demodulation apparatus is adapted to demodulate the differential modulation signal.

[0036] The digital isolator proposed in this application dynamically adjusts the voltage difference between the first demodulated signal and the second demodulated signal through the aforementioned demodulation device. It can reduce the voltage difference in response to the carrier switching state of the differential modulation signal, thereby dynamically adjusting the performance of the digital isolator in terms of PD index. This allows the digital isolator to balance the performance of both CMTI and PD indexes, while also having high anti-interference capability and low transmission delay, significantly improving the performance of the digital isolator and contributing to improving the reliability and efficiency of high-speed data communication. Attached Figure Description

[0037] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0038] Figure 1 This is a schematic diagram of the circuit structure of the receiving end in related technologies;

[0039] Figure 2 This is a schematic diagram of the signal waveform of the demodulated signal in the receiving end of a related technology;

[0040] Figure 3This is a schematic diagram of a data transmission performance optimization circuit proposed in one embodiment of this application;

[0041] Figure 4 A waveform diagram of the demodulated signal in one embodiment of this application is shown.

[0042] Figure 5 A waveform diagram of the demodulated signal in another embodiment of this application is provided;

[0043] Figure 6 A waveform diagram of the demodulated signal in another embodiment of this application is shown;

[0044] Figure 7(a) is a schematic diagram of the circuit structure of the demodulation device in one embodiment of this application;

[0045] Figure 7(b) is a schematic diagram of the circuit structure of the demodulation device in another embodiment of this application;

[0046] Figure 8 This is a schematic diagram illustrating the principle of generating adjustment control signals according to an embodiment of this application;

[0047] Figure 9 This is a schematic diagram of the circuit structure of the voltage regulation unit in one embodiment of this application;

[0048] Figure 10 This is a schematic diagram of the circuit structure of the voltage regulation unit in another embodiment of this application;

[0049] Figure 11 This is a schematic diagram of the circuit structure of the pre-amplifier circuit in one embodiment of this application;

[0050] Figure 12 This is a schematic diagram of the circuit structure of the demodulation device in yet another embodiment of this application;

[0051] Figure 13 This is a schematic diagram of the circuit structure of the detection unit and signal conditioning unit proposed in one embodiment of this application;

[0052] Figure 14 This is a schematic diagram of the signal waveform of a signal conditioning unit according to an embodiment of this application;

[0053] Figure 15 This is a schematic diagram of the structure of a digital isolator according to an embodiment of this application. Detailed Implementation

[0054] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0055] Common isolation techniques used in digital isolators include edge-modulated isolation communication and OOK-modulated isolation communication. These techniques achieve isolated signal transmission through different modulation and demodulation methods. OOK modulation, in particular, modulates and demodulates signals by controlling the presence or absence of a carrier signal; a carrier signal is present when the signal to be transmitted is high, and absent when the signal to be transmitted is low.

[0056] In related technologies, OOK-modulated digital isolators include a transmitter (TX) and a receiver (RX). TX transmits the differential signal to RX. After the differential signal arrives at RX, it needs to be decoded to reconstruct the input signal IN. For example... Figure 1 As shown, RX includes a common-mode transient immunity (CMTI) circuit, a pre-amplifier circuit, an envelope detector circuit, and a comparator circuit.

[0057] After the input signal IN is sent to TX, TX modulates the input signal IN using OOK modulation before it passes through the high-voltage isolation capacitor C. ISO1 and C ISO2 The signal is fed into the RX circuit and processed sequentially by the CMTI circuit, pre-amplification circuit, and envelope detection circuit within the RX circuit to obtain the envelope signal V. A and envelope signal V B1 And the envelope signal V B1 The signal V is obtained at node B after passing through a resistor input. B Signal V A and signal V B The signal is fed into the comparator circuit to obtain the output signal OUT, thereby restoring the input signal IN.

[0058] Common Mode Transient Immunity (CMTI) and Propagation Delay (PD) are two key metrics for evaluating the performance of digital isolators. CMTI refers to the isolator's resistance to common-mode transients such as electrostatic discharge (ESD) and electrical fast transients (EFT). It determines the isolator's ability to maintain signal stability in the face of transient interference. A higher CMTI indicates stronger interference immunity, thus reducing bit error rate and the risk of system failure. In high-speed data transmission, CMTI is particularly important because high-speed signals are more sensitive to interference and more easily affected by transient events. PD refers to the time required for a signal to travel from the input to the output of a digital isolator. It determines the isolator's ability to transmit signals quickly and accurately. A lower PD indicates higher signal transmission efficiency. In high-speed data communication, PD directly affects the overall system performance, especially in terms of data throughput and real-time performance. Lower propagation delay ensures fast and accurate signal transmission, thereby improving the overall system efficiency and response speed.

[0059] However, the design of digital isolators typically requires a trade-off between two metrics: CMTI and PD. Specifically, Figure 2 The signal waveforms at input nodes A and B of the comparator are shown, where signal V A This represents the signal at input node A, signal V. B1 This represents the envelope signal output by the envelope detector circuit, signal V. B This represents the signal at input node B. Before time t1, since the input signal IN is low, there is no carrier signal. Therefore, the signals INP and INN sent to RX are DC, and RX is in a static state. At this time, the voltage difference between input node A and input node B is V1. At time t1, the signal switches from a carrier-free state to a carrier-enabled state. From time t1 to the signal V... A and signal V B There is a first transmission delay time Tup between the start of the rise. Between time t1 and t2, since the input signal IN is high, a carrier signal is present, and RX is dynamic. Therefore, the signals INP and INN input to RX are differential square wave signals. The pre-amplifier circuit and envelope detector circuit operate normally. At this time, the voltage difference between input node A and input node B is V2. At time t2, the signal switches from a carrier-enabled state to a carrier-free state. From time t2 to the signal V... A and signal V BThere is a second transmission delay time, Tdown, between the moments when descent begins. For the CMTI (Common Mode Transmission Time Indicator), larger values ​​for V1 and V2 indicate better performance of the digital isolator in terms of CMTI, resulting in a lower probability of signal mis-switching at input nodes A and B during transient common-mode events. For the PD (Position Displacement) indicator, smaller values ​​for V1 and V2 indicate better performance of the digital isolator in terms of PD, resulting in faster signal transition between carrier and carrier-free signals at input nodes A and B, i.e., smaller T1 and T2.

[0060] To ensure signal transmission stability, related technologies generally sacrifice the performance of digital isolators in terms of PD (Power Delivery) to meet the requirements of CMTI (Comprehensive Memory Intensity Tolerance). This results in a trade-off between CMTI and PD, making it impossible to optimize both metrics simultaneously. Consequently, digital isolators cannot achieve both signal transmission stability and efficiency, thus affecting signal transmission performance.

[0061] According to an embodiment of this application, a data transmission performance optimization circuit 100 is provided, which can be applied to a demodulation device 10, such as... Figure 3 As shown, the demodulation device 10 is adapted to demodulate the differential modulation signal to generate a first demodulated signal and a second demodulated signal, and to generate a final demodulated signal based on the first demodulated signal and the second demodulated signal. The data transmission performance optimization circuit 100 includes a detection unit 110 and a signal conditioning unit 120, wherein the detection unit 110 is configured to detect at least one of the differential modulation signals INP and INN to determine the carrier state of the differential modulation signal; the signal conditioning unit 120 is configured to adjust at least one of the first demodulated signal and the second demodulated signal according to the carrier state so that the absolute value of the voltage difference between the first demodulated signal and the second demodulated signal decreases during the carrier state switching process of the differential modulation signal.

[0062] It should be noted that, Figure 3 The diagram shows a data transmission performance optimization circuit 100 applied within a demodulation unit 10 of a digital isolator. The digital isolator also includes a modulation unit 20 configured to modulate an initial signal to generate a differentially modulated signal. The modulation unit 20 is applied at the transmitting end (TX), and the demodulation unit 10 is applied at the receiving end (RX).

[0063] The data transmission performance optimization circuit 100 proposed in this application embodiment detects at least one of the differential modulation signals INP and INN through the detection unit 110 to determine the carrier state of the differential modulation signal, and then adjusts the first demodulated signal V according to the carrier state through the signal conditioning unit 120. A Second demodulated signal V BAt least one of them is adjusted so that the first demodulated signal V A Second demodulated signal V B The absolute value of the voltage difference between them decreases, thereby enabling dynamic adjustment of the digital isolator's performance in terms of PD (Power Distribution) during carrier state switching, allowing digital isolator 1 to achieve performance in both CMTI (Concurrent Module Indicator) and PD. Therefore, the embodiments of this application can respond promptly to the carrier state of the differential modulation signal and quickly adjust the first demodulated signal V. A With the second demodulated signal V B The absolute value of the voltage difference between them decreases, shortening the first demodulated signal V. A Second demodulated signal V B The time of crossover is reduced, thus significantly decreasing PD and optimizing PD performance. Furthermore, in this embodiment, the first demodulated signal V is only affected during the carrier state switching process of the differential modulation signal. A Second demodulated signal V B Adjustments will not affect the CMTI index during signal transmission. Therefore, the digital isolator can have both high anti-interference capability and low transmission delay during signal transmission, which significantly improves the performance of the digital isolator and is conducive to improving the reliability and efficiency of high-speed data communication.

[0064] In some embodiments of this application, the signal conditioning unit 120 is further configured to condition the first demodulated signal V during the switching process of the differential modulation signal from a carrier-free state to a carrier-loaded state. A Perform voltage reduction regulation and / or adjust the second demodulated signal V B Voltage increase regulation is performed to reduce the voltage difference within the first transmission delay time of the differential modulation signal. For example, Figures 4 to 6 As shown, the first transmission delay time Tup is the first demodulated signal V when switching from a carrier-free state to a carrier-enabled state. A Second demodulated signal V B The delay time in response to the differential modulation signal.

[0065] The signal conditioning unit 120 is also configured to condition the first demodulated signal V during the switching process of the differential modulation signal from a carrier-carrier state to a carrier-free state. A Perform voltage amplification regulation and / or adjust the second demodulated signal V B Voltage reduction regulation is performed to reduce the voltage difference within the second transmission delay time Tdown of the differential modulation signal. For example, Figures 4 to 6 As shown, the second transmission delay time Tdown is the time when the first demodulated signal V switches from a carrier-enabled state to a carrier-free state. A Second demodulated signal V BThe delay time is in response to the differential modulation signal. It should be noted that, in this embodiment, only the first demodulated signal V may be affected. A Voltage regulation can be performed, or only the second demodulated signal V can be regulated. B Voltage regulation can also be performed on the first demodulated signal V. A Second demodulated signal V B Simultaneously, voltage regulation is performed. Therefore, the embodiments of this application can significantly reduce the signal delay caused by carrier state switching through dynamic control of the demodulated signal, thereby optimizing the PD index when the differential modulation signal switches from a carrier-free state to a carrier-enabled state, reducing signal transmission delay, and improving signal transmission efficiency.

[0066] Furthermore, in some embodiments of this application, during the switching process of the differential modulation signal from a carrier-free state to a carrier-enabled state, the first demodulated signal V is... A Second demodulated signal V B At least one of them is adjusted for a duration greater than or equal to the sum of the first transmission delay time Tup and the first traversal time T1, wherein, as Figures 4 to 6 As shown, the first travel time T1 is the conventional travel time during the switching process of the differential modulation signal from a carrier-free state to a carrier-enabled state. This conventional travel time is the time taken when the first demodulated signal V is not adjusted. A Second demodulated signal V B The time from responding to the differentially modulated signal to the occurrence of a crossover.

[0067] During the switching process of the differential modulation signal from a carrier-on state to a carrier-free state, the first demodulated signal V A Second demodulated signal V B The duration of adjustment for at least one of them is greater than the second transmission delay time Tdown.

[0068] like Figure 4 As shown, in some embodiments of this application, only the second demodulated signal V may be demodulated. B The voltage is adjusted, where the red curve represents the first demodulated signal V. A The signal waveform, the blue curve represents the unregulated second demodulated signal V. B The green curve represents the regulated second demodulated signal V. B The signal waveform. Furthermore, in the no-carrier state, the carrier state is defined as 0, and in the carrier state, the carrier state is defined as 1.

[0069] Specifically, when the carrier state is 0, the first demodulated signal V A Second demodulated signal V BThe voltage difference is V1. With the carrier state at 1, the first demodulated signal V... A Second demodulated signal V B The voltage difference is V2.

[0070] In this embodiment of the application, when the differential modulation signal is in a carrier-free state, when the first demodulated signal V A Greater than the second demodulated signal V B And the first demodulated signal V A Second demodulated signal V B When in a stable state, the first demodulated signal V A With the second demodulated signal V B The voltage difference between them is greater than the first preset voltage; when the differential modulation signal is in a carrier state, when the first demodulated signal V A Less than the second demodulated signal V B And the first demodulated signal V A Second demodulated signal V B When in a stable state, the first demodulated signal V A With the second demodulated signal V B The absolute value of the voltage difference between the two signals is greater than the second preset voltage. Therefore, when the carrier state is normally 0 and normally 1, maintaining a large voltage difference between the first and second demodulated signals—that is, keeping V1 and V2 at high values—can maintain a high CMTI index. This allows the digital isolator to have both high anti-interference capability and low transmission delay during signal transmission.

[0071] When the differential modulation signal switches from a carrier-free state to a carrier-enabled state, i.e., when the carrier state switches from 0 to 1, the second demodulation signal V is adjusted. B The voltage increases rapidly until the first demodulated signal V A Second demodulated signal V B The voltage difference decreases from V1 to V3, a process that takes less than the first transmission delay time Tup. Then, after a period of T3, the first demodulated signal V... A Second demodulated signal V B The transmission delay changes from Tup+T1 to Tup+T3, thus greatly reducing the PD when the digital isolator switches from a carrier-free state to a carrier-enabled state.

[0072] When the differential modulation signal switches from a carrier-enabled state to a carrier-free state, i.e., when the carrier state switches from 1 to 0, the second demodulation signal V is adjusted. B The voltage decreases rapidly until the first demodulated signal V A Second demodulated signal V BThe voltage difference decreases from V2 to V4, a process that takes less than the second transmission delay time Tdown. Then, after a period of T4, the first demodulated signal V... A Second demodulated signal V B The transmission delay changes from Tdown+T2 to Tdown+T4, thus greatly reducing the PD when the digital isolator switches from a carrier-enabled state to a carrier-free state.

[0073] In some embodiments of this application, only the first demodulated signal V may be demodulated. A The voltage is adjusted. When the differential modulation signal switches from a carrier-free state to a carrier-enabled state, i.e., when the carrier state switches from 0 to 1, the first demodulation signal V is adjusted. A The voltage decreases rapidly until the first demodulated signal V A Second demodulated signal V B The voltage difference decreases from V1 to V3, a process that takes less than the first transmission delay time Tup. Then, after a period of T3, the first demodulated signal V... A Second demodulated signal V B When a crossover occurs, the overall transmission delay changes from the original Tup+T1 to Tup+T3, significantly reducing the transmission delay and also greatly reducing the PD when the digital isolator switches from a carrier-free state to a carrier-enabled state.

[0074] Similarly, when the differential modulation signal switches from a carrier-carrier state to a carrier-free state, i.e., when the carrier state switches from 1 to 0, the first demodulation signal V is adjusted. A The voltage increases rapidly until the first demodulated signal V A Second demodulated signal V B The voltage difference decreases from V2 to V4, a process that takes less than the second transmission delay time Tdown. Then, after a period of T4, the first demodulated signal V... A Second demodulated signal V B When a crossover occurs, the overall transmission delay changes from the original Tdown+T2 to Tdown+T4, significantly reducing the transmission delay and also greatly reducing the PD when the digital isolator switches from a carrier-enabled state to a carrier-free state.

[0075] like Figure 5 As shown, in some embodiments of this application, only the second demodulated signal V may be processed when the differential modulation signal switches from a carrier-free state to a carrier-enabled state. B The voltage is adjusted so that when the differential modulation signal switches from a carrier state to a carrier-free state, only the first demodulated signal V is affected. A The voltage is regulated, where the red curve represents the unregulated first demodulated signal V.A The signal waveform, the blue curve represents the unregulated second demodulated signal V. B The signal waveform, with the yellow curve representing the regulated first demodulated signal V. A The signal waveform, the green curve represents the regulated second demodulated signal V. B The signal waveform.

[0076] Specifically, when the differential modulation signal switches from a carrier-free state to a carrier-carrying state, that is, when the carrier state switches from 0 to 1, the second demodulation signal V is adjusted. B The voltage increases rapidly until the first demodulated signal V A Second demodulated signal V B The voltage difference decreases from V1 to V3, a process that takes less than the first transmission delay time Tup. Then, after a period of T3, the first demodulated signal V... A Second demodulated signal V B The transmission time between them is reduced, so the overall transmission delay changes from Tup+T1 to Tup+T3, which also greatly reduces the PD when the digital isolator switches from a carrier-free state to a carrier-enabled state.

[0077] When the differential modulation signal switches from a carrier-enabled state to a carrier-free state, i.e., when the carrier state switches from 1 to 0, the first demodulation signal V is adjusted. A The voltage increases rapidly until the first demodulated signal V A Second demodulated signal V B The voltage difference decreases from V2 to V4, a process that takes less than the second transmission delay time Tdown. Then, after a period of T4, the first demodulated signal V... A Second demodulated signal V B The transmission time changes from Tdown+T2 to Tdown+T4, which also greatly reduces the PD when the digital isolator switches from a carrier-enabled state to a carrier-free state.

[0078] like Figure 6 As shown, in some embodiments of this application, only the second demodulated signal V may be processed when the differential modulation signal switches from a carrier-free state to a carrier-enabled state. B The voltage is adjusted, and the first demodulated signal V is simultaneously adjusted when the differential modulation signal switches from a carrier state to a carrier-free state. A Second demodulated signal V B The voltage is regulated, where the red curve represents the unregulated first demodulated signal V. A The signal waveform, the blue curve represents the unregulated second demodulated signal V. B The signal waveform, with the yellow curve representing the regulated first demodulated signal V. AThe signal waveform, the green curve represents the regulated second demodulated signal V. B The signal waveform.

[0079] Specifically, when the differential modulation signal switches from a carrier-free state to a carrier-carrying state, that is, when the carrier state switches from 0 to 1, the second demodulation signal V is adjusted. B The voltage increases rapidly until the first demodulated signal V A Second demodulated signal V B The voltage difference decreases from V1 to V3, a process that takes less than the first transmission delay time Tup. Then, after a period of T3, the first demodulated signal V... A Second demodulated signal V B Crossing occurs between them, so the overall transmission delay changes from the original Tup+T1 to Tup+T3, which also greatly reduces the PD when the digital isolator switches from a carrier-free state to a carrier-enabled state.

[0080] When the differential modulation signal switches from a carrier-enabled state to a carrier-free state, i.e., when the carrier state switches from 1 to 0, the first demodulation signal V is adjusted. A The voltage increases rapidly, while simultaneously adjusting the second demodulated signal V. B The voltage decreases rapidly until the first demodulated signal V A Second demodulated signal V B The voltage difference decreases from V2 to V4, a process that takes less than the second transmission delay time Tdown. Then, after a period of T4, the first demodulated signal V... A Second demodulated signal V B The transmission time changes from Tdown+T2 to Tdown+T4, which also greatly reduces the PD when the digital isolator switches from a carrier-enabled state to a carrier-free state.

[0081] It should be noted that during the carrier state switching of the differential modulation signal, the first demodulated signal V... A Second demodulated signal V B The adjustment methods can be arbitrarily combined. The above description only illustrates some embodiments of the adjustment methods and is not intended to limit this application. For example, when the differential modulation signal switches from a carrier-free state to a carrier-enabled state, the first demodulated signal V is simultaneously... A Second demodulated signal V B The voltage is adjusted, and the first demodulated signal V is simultaneously adjusted when the differential modulation signal switches from a carrier state to a carrier-free state. A Second demodulated signal V B The voltage can be adjusted, etc. Please refer to the foregoing description for each adjustment method.

[0082] Therefore, the embodiments of this application can significantly reduce the transmission delay caused by carrier state switching by dynamically controlling the voltage of the demodulated signal, thereby optimizing the PD index when the differential modulation signal switches from a carrier-free state to a carrier-enabled state, reducing signal transmission delay and improving signal transmission efficiency.

[0083] In some embodiments of this application, as shown in Figures 7(a) and 7(b), the demodulation device 10 includes a first comparator 200, the first input of which is adapted to receive a first demodulated signal V. A The second input of the first comparator 200 is adapted to receive the second demodulated signal V. B The first comparator 200 is adapted to demodulate the first signal V. A With the second demodulated signal V B The comparison is performed to output a comparison signal. The output terminal of the first comparator 200 is connected to the input terminal of the signal conditioning unit 120, and it has an output node C. The comparison signal is sent to the signal conditioning unit 120 through the output node C.

[0084] In some embodiments of this application, the signal conditioning unit 120 is further configured to generate a first conditioning control signal S1 based on the comparison signal during the switching process of the differential modulation signal from a carrier state to a carrierless state, and to generate a second conditioning control signal S2 based on the comparison signal during the switching process of the differential modulation signal from a carrierless state to a carrier state.

[0085] In this embodiment, the first demodulated signal V is processed by the first comparator 200. A With the second demodulated signal V B The comparison is performed, and a corresponding adjustment control signal is generated based on the comparison result during the carrier state switching process of the differential modulation signal, so that the signal conditioning unit 120 can adjust in response to the carrier state switching, thereby optimizing the PD index and improving the signal transmission efficiency.

[0086] It should be noted that the first comparator 200 mentioned above can be a multiplexed comparator that directly generates the final demodulated signal in the signal conditioning unit 120, or it can be a comparator that is only used to output the comparison signal, with another comparator set in the signal conditioning unit 120 to generate the final demodulated signal.

[0087] Furthermore, the demodulation device 10 includes a pre-amplification circuit 300 and an envelope detection circuit 400. The pre-amplification circuit 300 is adapted to pre-amplify the differential modulation signal and output a first amplified signal and a second amplified signal. The envelope detection circuit 400 is adapted to detect the first amplified signal and the second amplified signal respectively to output a first demodulated signal V. A Second demodulated signal V BThe first adjustment control signal S1 is used to adjust and control the pre-amplifier circuit 300 so that the voltage difference decreases during the switching of the differential modulation signal from a carrier state to a carrier-free state. The second adjustment control signal S2 is used to adjust and control the voltage at the first input terminal and / or the voltage at the second input terminal of the first comparator 200 so that the absolute value of the voltage difference decreases during the switching of the differential modulation signal from a carrier-free state to a carrier state.

[0088] Therefore, in this embodiment, the first adjustment control signal S1 and the second adjustment control signal S2 respond to the switching process of the differential modulation signal between a carrier-free state and a carrier-loaded state. Specifically, the amplitude of the first amplified signal is increased and / or the amplitude of the second amplified signal is decreased according to the first adjustment control signal S1, thereby achieving adjustment control of the pre-amplification circuit 300. Alternatively, the voltage at the first input terminal and / or the voltage at the second input terminal of the first comparator 200 can be adjusted according to the second adjustment control signal S2. Both methods can adjust the voltage of the first demodulated signal V. A Second demodulated signal V B The voltage difference between them can be reduced quickly, thereby optimizing the PD index during carrier state switching.

[0089] Specifically, such as Figure 8 As shown, the detection module 110 detects the switching of the carrier state based on at least one of the differential modulation signals INP and INN. At the moment the carrier state switches from 1 to 0, the signal conditioning unit 120 generates a corresponding first conditioning control signal S1 to reduce the first demodulated signal V. A Second demodulated signal V B The voltage difference V2 between the two signals is such that, at the moment the carrier state switches from 0 to 1, the signal conditioning unit 120 generates a corresponding second conditioning control signal S2 to reduce the voltage difference V2 between the two signals. A Second demodulated signal V B The voltage difference V1 between them.

[0090] Furthermore, the demodulation device 10 also includes a voltage adjustment unit 500, as shown in FIG7(a). The voltage adjustment unit 500 can be connected to node A and node B respectively, i.e. Figure 10 As shown in Figure 7(b), node A is connected to a fourth resistor R12 and a third current source I12, and node B is connected to a first resistor R11 and a first current source I11. As shown in Figure 7(b), the voltage regulation unit 500 can also be connected between the envelope detector circuit 400 and node B, i.e., as shown in Figure 7(b). Figure 9 As shown, only node B is connected to a first resistor R11 and a first current source I11.

[0091] Specifically, in some embodiments of this application, such as Figure 9 As shown, when the second adjustment control signal S2 is used to adjust the voltage at the second input terminal of the first comparator 200, the voltage adjustment unit 500 includes a first resistor R11 and a first current source I11. The first end of the first resistor R11 is connected to the second output terminal of the envelope detector circuit 400, the second end of the first resistor R11 is connected to the second input terminal of the first comparator 200, and has an input node B. The positive terminal of the first current source I11 is connected to the second end of the first resistor R11, and the negative terminal of the first current source I11 is connected to the reference ground. The second adjustment control signal S2 is used to adjust the product value between the first resistor R11 and the first current source I11 to decrease.

[0092] Specifically, in Figure 9 In the illustrated embodiment, the first demodulated signal V A Second demodulated signal V B The voltage difference V1 between the two resistors is determined by the first resistor R11 and the first current source I11, i.e., V1 = R11 * I11. By adjusting the product between the first resistor R11 and the first current source I11 through the second adjustment control signal S2, the second demodulated signal V1 can be increased. B This reduces V1.

[0093] Therefore, in this embodiment, the second adjustment control signal S2 is used to adjust the product value between the first resistor R11 and the first current source I11, thereby adjusting the voltage at the second input terminal of the first comparator 200 and effectively controlling the first demodulated signal V. A Second demodulated signal V B The voltage difference between them improves the signal transmission efficiency of digital isolator 1.

[0094] exist Figure 10 In the illustrated embodiment, the voltage at the first input terminal and / or the voltage at the second input terminal of the first comparator 200 can be adjusted and controlled according to the second adjustment control signal S2. Specifically, the product value between the fourth resistor R12 and the third current source I12 can be increased by adjusting the second adjustment control signal S2 to increase the voltage at the first demodulated signal V. A Perform voltage reduction adjustment and / or adjust the product value between the first resistor R11 and the first current source I11 to reduce the second demodulated signal V. B The voltage is increased and adjusted to control the first demodulated signal V. A Second demodulated signal V B The voltage difference between them decreases. For the specific principle, please refer to the above embodiments, which will not be repeated here.

[0095] like Figure 11As shown, the pre-amplifier circuit 300 includes a first MOSFET Q1, a second MOSFET Q2, a second resistor R2, and a third resistor R3. The source of the first MOSFET Q1 is connected to the reference power supply VDD, the drain of the first MOSFET Q1 is connected to the drain of the second MOSFET Q2, the source of the second MOSFET Q2 is connected to the reference ground through a second current source I2, the gate of the first MOSFET Q1 is connected to the reference power supply VDD through a first capacitor, the gate of the first MOSFET Q1 is connected to the first end of the second resistor R2, the second end of the second resistor R2 is connected to the first end of the third resistor R3 and serves as the first output terminal OUT1 of the pre-amplifier circuit 300, and the second end of the third resistor R3 is connected to the drain of the first MOSFET Q1 and serves as the second output terminal OUT2 of the pre-amplifier circuit 300. The first adjustment control signal S1 is used to adjust the ratio between the second resistor R2 and the third resistor R3 to increase.

[0096] It should be noted that the pre-amplifier circuit 300 described above is only one embodiment of this application and is not intended to limit this application.

[0097] In some embodiments of this application, the first demodulated signal V A Second demodulated signal V B The voltage difference V2 between the two is mainly determined by the last stage of the pre-amplifier circuit 300. The second resistor R2 and the third resistor R3 are used to adjust the amplitude of the signal. Thus, when there is a carrier signal, the input nodes A and B of the first comparator 200 will generate a voltage difference V2. The magnitude of V2 is determined by the ratio between the second resistor R2 and the third resistor R3. Increasing the ratio between the second resistor R2 and the third resistor R3 will decrease V2.

[0098] Therefore, in this embodiment of the application, the ratio between the second resistor R2 and the third resistor R3 is adjusted by using the first adjustment control signal S1, thereby adjusting the first demodulated signal V. A Second demodulated signal V B The voltage difference between them is used to optimize the PD index when the differential modulation signal switches from a carrier state to a carrier-free state, thereby improving the signal transmission efficiency of digital isolator 1.

[0099] In other embodiments of this application, such as Figure 12As shown, in this embodiment, the demodulation device 10 further includes a driver 600. The input terminal of the driver 600 is connected to the output terminal of the first comparator 200 to drive the comparison signal output by the first comparator 200, and the driver 600 outputs the final demodulated signal. The signal conditioning unit 120 is further configured to generate a first conditioning control signal S1 based on the final demodulated signal when the differential modulation signal switches from a carrier-enabled state to a carrier-free state, and to generate a second conditioning control signal S2 based on the final demodulated signal when the differential modulation signal switches from a carrier-free state to a carrier-enabled state.

[0100] Therefore, in this embodiment, the signal conditioning unit 120 can adjust in response to the carrier state switching of the differential modulation signal, thereby optimizing the PD index and improving the signal transmission efficiency. Its adjustment principle is the same as that of the above embodiment, and will not be repeated here.

[0101] In some embodiments of this application, such as Figure 13 As shown, the detection unit 110 includes a second comparator 111. The detection unit 110 generates a first signal based on one of the differential modulation signals INP and INN. The first input terminal of the second comparator 111 is adapted to receive the first signal, and the second input terminal of the second comparator 111 is adapted to receive a reference voltage value V. ref1 The second comparator 111 compares the aforementioned first signal with the reference voltage value V. ref1 The signals are compared and a detection signal characterizing the carrier state of the differential modulation signal is output to the signal conditioning unit 120.

[0102] For example, in one embodiment, the first signal can be one of the differential modulation signals INP and INN. Accordingly, the carrier state of the differential modulation signal can be characterized by the envelope signal corresponding to the detection signal output by the second comparator 111. In another embodiment, the first signal can also be a signal characterizing the amplitude of one of the differential modulation signals INP and INN. For example, the first signal can be the envelope signal of one of the differential modulation signals INP and INN. Accordingly, the carrier state of the differential modulation signal can be characterized by the level of the detection signal output by the second comparator 111.

[0103] In other embodiments of this application, the first signal may also characterize the absolute value of the difference between the differential modulation signals |INP-INN|, that is, the detection unit 110 generates a first signal characterizing |INP-INN| based on the differential modulation signals INP and INN. The first input terminal of the second comparator 111 is adapted to receive the aforementioned first signal, and the second input terminal of the second comparator 111 is adapted to receive the reference voltage value V. ref1 The second comparator 111 compares the first signal with the reference voltage value V. ref1The signals are compared and a detection signal characterizing the carrier state of the differential modulation signal is output to the signal conditioning unit 120.

[0104] For example, in one embodiment, the first signal can be the absolute value of the difference between the differentially modulated signals |INP-INN|, and correspondingly, the carrier state of the differentially modulated signal can be characterized by the envelope signal of the detection signal output by the second comparator 111. In another embodiment, the first signal can also be the envelope signal of the absolute value of the difference between the differentially modulated signals |INP-INN|, and correspondingly, the carrier state of the differentially modulated signal can be characterized by the level of the detection signal output by the second comparator 111.

[0105] Furthermore, in some embodiments of this application, the signal conditioning unit 120 generates a first conditioning control signal S1 and a second conditioning control signal S2 based on the detection signal and the comparison signal, wherein the detection signal represents the time when the differential modulation signal begins to enter the carrier-free state and the comparison signal represents the second demodulated signal V. B Initially less than the first demodulated signal V A The first adjustment control signal S1 is generated at the specified time, and the transition time when the differential modulation signal begins to enter the carrier state is represented by the detection signal and the second demodulation signal V is represented by the comparison signal. B It starts to be greater than the first demodulated signal V A The second adjustment control signal S2 is generated at the transition moment.

[0106] Specifically, in some embodiments of this application, the signal conditioning unit 120 includes a first inverter 121, a second inverter 122, a first AND gate 123, and a second AND gate 124. The input terminal of the first inverter 121 is adapted to receive a detection signal and has an input node D. The first input terminal of the first AND gate 123 is connected to the output terminal of the first inverter 121, and the second input terminal of the first AND gate 123 is adapted to receive a comparison signal. The output terminal of the first AND gate 123 is used to output a first adjustment control signal S1. The input terminal of the second inverter 122 is adapted to receive the comparison signal, i.e., connected to... Figure 9 The output node C shown is used to receive the comparison signal. The first input terminal of the second AND gate 124 is connected to the output terminal of the second inverter 122. The second input terminal of the second AND gate 124 is adapted to receive the detection signal. The output terminal of the second AND gate 124 is used to output the second adjustment control signal S2.

[0107] The detection unit 110 compares the first signal with the reference voltage value V through the second comparator 111. ref1 The magnitude of the first signal is used to generate a detection signal. If the first signal is greater than V... ref1 If the second comparator 111 outputs a high level, it indicates that the differential modulation signal has switched from a carrier-free state to a carrier-enabled state. If the first signal is less than or equal to V...ref1 If the second comparator 111 outputs a low level, it indicates that the differential modulation signal has been detected switching from a carrier-enabled state to a carrier-free state. The detection signal can indicate the switching of the carrier state, thereby triggering subsequent signal conditioning logic.

[0108] It should be noted that the above-mentioned signal conditioning unit 120 can be implemented by various circuit structures. The above-mentioned signal conditioning unit 120 composed of the first inverter 121, the second inverter 122, the first AND gate 123 and the second AND gate 124 is only an example of a specific circuit structure and is not intended to limit this application.

[0109] Furthermore, when the second comparator 111 outputs a low level and the comparison signal is high, the first AND gate 123 outputs a high-level first adjustment control signal S1; when the second comparator 111 outputs a high level and the comparison signal is low, the second AND gate 124 outputs a high-level second adjustment control signal S2, thereby realizing the adjustment of the first demodulated signal V during the carrier state switching process. A Second demodulated signal V B Adjustment of the voltage difference between them.

[0110] Figure 14 The diagram illustrates the waveforms at output node C and input node D. When the differential modulation signals INP and INN switch from carrier-on to carrier-off, the signal at input node D switches from 1 to 0. Due to the transmission delay, output node C is still in a carrier-on state at this time. Therefore, the S1 signal can only be generated during the Ta time period to control V2 to decrease instantaneously, where Ta = Tdown + T4. When the differential modulation signals INP and INN switch from carrier-off to carrier-on, the comparator input node D jumps from 0 to 1. Due to the transmission delay, output node C is still in a carrier-off state at this time. Therefore, the S2 signal can only be generated during the Tb time period to control V1 to decrease instantaneously, where Tb ≥ Tup + T1. This ensures that the first control signal S1 and the second control signal S2 are generated instantaneously only during the carrier-off switching, effectively reducing the transmission delay. At other times, neither the first control signal S1 nor the second control signal S2 is generated, thus guaranteeing high CMTI characteristics.

[0111] Accordingly, such as Figure 15 As shown, this application embodiment provides a demodulation device 10, including a data transmission performance optimization circuit 100 as described in the above embodiment.

[0112] Further functional descriptions of the above modules and units are the same as those in the corresponding embodiments described above, and will not be repeated here.

[0113] The demodulation device 10 proposed in this application embodiment can reduce the voltage difference in response to the carrier switching state of the differential modulation signal, thereby dynamically adjusting the performance of the digital isolator in terms of PD index. This allows the digital isolator to balance the performance of both CMTI and PD indexes, while also having high anti-interference capability and low transmission delay, significantly improving the performance of the digital isolator and contributing to improving the reliability and efficiency of high-speed data communication.

[0114] Accordingly, such as Figure 15 As shown, this application provides a digital isolator 1, including a modulation device 20 and a demodulation device 10 according to the above embodiment. The modulation device 20 is adapted to modulate an initial signal to generate a differential modulation signal, and the demodulation device 10 is adapted to demodulate the differential modulation signal.

[0115] Further functional descriptions of the above modules and units are the same as those in the corresponding embodiments described above, and will not be repeated here.

[0116] Therefore, in this embodiment of the application, the demodulation device 10 can reduce the voltage difference in response to the carrier switching state of the differential modulation signal, thereby dynamically adjusting the performance of the digital isolator in terms of PD index. This allows the digital isolator 1 to balance the performance of both CMTI and PD indexes, while also having high anti-interference capability and low transmission delay, significantly improving the performance of the digital isolator 1 and contributing to the improvement of the reliability and efficiency of high-speed data communication.

[0117] Although embodiments of this application have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of this application, and all such modifications and variations fall within the scope defined by the appended claims.

[0118] For ease of description, the above devices are described separately by function as various units. Of course, in implementing this application, the functions of each unit can be implemented in one or more software and / or hardware.

[0119] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0120] The various embodiments in this specification are described in a progressive manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.

[0121] The above description is merely an embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of this application should be included within the scope of the claims of this application.

[0122] Although embodiments of this application have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of this application, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A data transmission performance optimization circuit, characterized by, The demodulation device is used in a demodulation apparatus, which is adapted to generate a first demodulated signal and a second demodulated signal during the demodulation of a differentially modulated signal. The data transmission performance optimization circuit includes: A detection unit configured to detect at least one of the differential modulation signals to determine the carrier state of the differential modulation signals; A signal conditioning unit is configured to adjust at least one of the first demodulated signal and the second demodulated signal according to the carrier state, such that the absolute value of the voltage difference between the first demodulated signal and the second demodulated signal decreases during the carrier state switching of the differential modulation signal.

2. The data transmission performance optimization circuit according to claim 1, characterized in that, The signal conditioning unit is further configured to, during the switching process of the differential modulation signal from a carrier-free state to a carrier-enabled state, perform voltage reduction conditioning on the first demodulated signal and / or voltage increase conditioning on the second demodulated signal; and during the switching process of the differential modulation signal from a carrier-enabled state to a carrier-free state, perform voltage increase conditioning on the first demodulated signal and / or voltage reduction conditioning on the second demodulated signal.

3. The data transmission performance optimization circuit according to claim 1, characterized in that, During the switching process of the differential modulation signal from a carrier-free state to a carrier-enabled state, the absolute value of the voltage difference is reduced within a first transmission delay time; during the switching process of the differential modulation signal from a carrier-free state to a carrier-enabled state, the absolute value of the voltage difference is reduced within a second transmission delay time. Wherein, the first transmission delay time is the delay time of the first demodulated signal and the second demodulated signal in response to the differential modulation signal when switching from a carrier-free state to a carrier-enabled state, and the second transmission delay time is the delay time of the first demodulated signal and the second demodulated signal in response to the differential modulation signal when switching from a carrier-enabled state to a carrier-free state.

4. The data transmission performance optimization circuit according to claim 3, characterized in that, During the process of the differential modulation signal switching from a carrier-free state to a carrier-enabled state, the duration for which at least one of the first demodulated signal and the second demodulated signal is adjusted is greater than or equal to the sum of the first transmission delay time and the first crossover time. During the process of the differential modulation signal switching from a carrier-enabled state to a carrier-free state, the duration for which at least one of the first demodulated signal and the second demodulated signal is adjusted is greater than or equal to the second transmission delay time. Wherein, the first crossover time is the conventional crossover time during the switching process of the differential modulation signal from a carrierless state to a carrier-enabled state. The conventional crossover time is the time from when the first demodulated signal and the second demodulated signal respond to the differential modulation signal to when a crossover occurs during the switching from a carrierless state to a carrier-enabled state, without adjusting the first demodulated signal and the second demodulated signal.

5. The data transmission performance optimization circuit according to any one of claims 1-4, characterized in that, When the differential modulation signal is in a carrier-free state, and when the first demodulated signal is greater than the second demodulated signal and the first demodulated signal and the second demodulated signal are in a stable state, the absolute value of the voltage difference between the first demodulated signal and the second demodulated signal is greater than the first preset voltage. When the differential modulation signal is in a carrier state, and when the first demodulated signal is less than the second demodulated signal and the first demodulated signal and the second demodulated signal are in a stable state, the absolute value of the voltage difference between the first demodulated signal and the second demodulated signal is greater than the second preset voltage.

6. The data transmission performance optimization circuit according to any one of claims 1-4, characterized in that, The demodulation device includes a first comparator, a first input terminal of which is adapted to receive the first demodulated signal, a second input terminal of which is adapted to receive the second demodulated signal, and the first comparator is adapted to compare the first demodulated signal with the second demodulated signal to output a comparison signal. The signal conditioning unit is further configured to generate a first conditioning control signal based on the comparison signal during the switching process of the differential modulation signal from a carrier-on-a-carrier state to a carrier-free state, and to generate a second conditioning control signal based on the comparison signal during the switching process of the differential modulation signal from a carrier-free state to a carrier-on-a-carrier state.

7. The data transmission performance optimization circuit according to claim 6, characterized in that, The demodulation device includes a pre-amplification circuit and an envelope detection circuit. The pre-amplification circuit is adapted to pre-amplify the differential modulation signal and output a first amplified signal and a second amplified signal. The envelope detection circuit is adapted to detect the first amplified signal and the second amplified signal respectively to output a first demodulated signal and a second demodulated signal. The first adjustment control signal is used to adjust and control the pre-amplification circuit so that the absolute value of the voltage difference decreases during the switching of the differential modulation signal from a carrier state to a carrier-free state. The second adjustment control signal is used to adjust and control the voltage at the first input terminal and / or the voltage at the second input terminal of the first comparator so that the absolute value of the voltage difference decreases during the switching of the differential modulation signal from a carrier-free state to a carrier state.

8. The data transmission performance optimization circuit according to claim 7, characterized in that, When the second adjustment control signal is used to adjust the voltage at the second input terminal of the first comparator... The demodulation device further includes a first resistor and a first current source. The first end of the first resistor is connected to the second output terminal of the envelope detection circuit, the second end of the first resistor is connected to the second input terminal of the first comparator, the positive terminal of the first current source is connected to the second end of the first resistor, and the negative terminal of the first current source is connected to a reference ground. The second adjustment control signal is used to adjust the product value between the first resistor and the first current source to decrease.

9. The data transmission performance optimization circuit according to claim 7, characterized in that, The amplitude of the first amplified signal is increased and / or the amplitude of the second amplified signal is decreased according to the first adjustment control signal, so as to realize the adjustment control of the pre-amplification circuit.

10. The data transmission performance optimization circuit according to claim 7 or 9, characterized in that, The pre-amplification circuit includes a first MOSFET, a second MOSFET, a second resistor, and a third resistor. The source of the first MOSFET is connected to a reference power supply, and the drain of the first MOSFET is connected to the drain of the second MOSFET. The source of the second MOSFET is connected to a reference ground through a second current source. The gate of the first MOSFET is connected to the reference power supply through a first capacitor. The gate of the first MOSFET is connected to a first terminal of the second resistor. The second terminal of the second resistor is connected to a first terminal of the third resistor and serves as the first output terminal of the pre-amplification circuit. The second terminal of the third resistor is connected to the drain of the first MOSFET and serves as the second output terminal of the pre-amplification circuit. The first adjustment control signal is used to increase the ratio between the second resistor and the third resistor.

11. The data transmission performance optimization circuit according to claim 6, characterized in that, The detection unit includes a second comparator. The detection unit generates a first signal based on one of the differential modulation signals. A first input terminal of the second comparator is adapted to receive the first signal, and a second input terminal of the second comparator is adapted to receive a reference voltage value. The second comparator compares the first signal with the reference voltage value to output a detection signal characterizing the carrier state of the differential modulation signal to the signal conditioning unit.

12. The data transmission performance optimization circuit according to claim 6, characterized in that, The detection unit includes a second comparator. The detection unit generates a first signal representing the absolute value of the difference between the differential modulation signals based on the differential modulation signal. A first input terminal of the second comparator is adapted to receive the first signal, and a second input terminal of the second comparator is adapted to receive a reference voltage value. The second comparator compares the first signal with the reference voltage value to output a detection signal representing the carrier state of the differential modulation signal to the signal conditioning unit.

13. The data transmission performance optimization circuit according to claim 11 or 12, characterized in that, The signal conditioning unit generates a first conditioning control signal and a second conditioning control signal based on the detection signal and the comparison signal. The first conditioning control signal is generated based on the detection signal representing the moment when the differential modulation signal begins to enter a carrier-free state and the comparison signal representing the moment when the second demodulated signal begins to be less than the first demodulated signal. The second conditioning control signal is generated based on the detection signal representing the transition moment when the differential modulation signal begins to enter a carrier-carrying state and the comparison signal representing the transition moment when the second demodulated signal begins to be greater than the first demodulated signal.

14. A demodulation device, characterized in that, Includes the data transmission performance optimization circuit according to any one of claims 1-13.

15. A digital isolator, characterized in that, include: A modulation device adapted to modulate an initial signal to generate a differentially modulated signal; The demodulation apparatus according to claim 14 is adapted to demodulate the differential modulation signal.

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