Signal processing method and device and computer readable storage medium

Abstract

The invention provides a signal processing method and device and a computer readable storage medium. The method is applied to a digital intermediate frequency module in a base station. The signal processing method comprises the following steps: generating a first frame header aligned with a time domain baseband signal according to a predetermined target processing duration; the target processing duration is the processing duration required for inputting a signal from a radio frequency input port in an uplink physical layer receiving link to outputting the signal from the digital intermediate frequency module; obtaining a target time domain baseband signal output by a digital intermediate frequency module according to the first frame header; and performing packing processing on the target time domain baseband signal to generate a data packet, and sending the data packet to a digital baseband module in the base station. According to the method, time delay adjustment can be executed under the condition that the duty ratio of the OFDM symbol is 1: 1 or not 1: 1, and various use requirements can be met.

Description

Technical Field

[0001] This disclosure relates to the field of communication technology, and more specifically, to a signal processing method, apparatus, and computer-readable storage medium. Background Technology

[0002] The uplink physical layer receive link in a communication system consists of a radio frequency (RF) tuner, an analog-to-digital converter (ADC), a digital intermediate frequency (IF) module, and a digital baseband module. The RF tuner converts the analog RF signal into an analog IF signal. This analog IF signal is then sampled by the ADC and output as a digital IF signal. Digital IF signal processing includes spectrum shifting, downsampling filtering, and finite impulse response (FIR) low-pass filtering. Spectrum shifting moves the useful spectrum from the ADC-sampled digital IF signal to the baseband. Downsampling filtering reduces the spectrum-shifted baseband signal from the ADC's high sampling rate to a suitable sampling rate. The FIR filter shapes the baseband signal to obtain a time-domain baseband signal, which is then transmitted to the digital baseband module. The digital baseband module processes the data for 5G mobile communication technology. The uplink physical layer processing is defined by the 5G protocol. For the digital baseband module, the time offset of the input time-domain baseband data affects the receiver's reception performance. Therefore, uplink delay adjustment is an indispensable processing step in the implementation of the uplink physical layer receive link. Current uplink delay adjustment methods only apply to OFDM symbols with a 1:1 duty cycle, and cannot be applied to OFDM symbols with non-1:1 duty cycles, thus failing to meet usage requirements. Summary of the Invention

[0003] This disclosure provides at least one signal processing method, apparatus, and computer-readable storage medium.

[0004] In a first aspect, embodiments of this disclosure provide a signal processing method applied to a digital intermediate frequency module in a base station; the signal processing method includes:

[0005] Based on a predetermined target processing duration, a first frame header is generated for alignment with the time-domain baseband signal; the target processing duration is the processing time required from the signal input to the RF input port in the uplink physical layer receive link to the output from the digital intermediate frequency module.

[0006] Based on the first frame header, obtain the target time-domain baseband signal output by the digital intermediate frequency module;

[0007] The target time-domain baseband signal is processed into packets to generate data packets, which are then sent to the digital baseband module in the base station.

[0008] Optionally, based on the first frame header, the target time-domain baseband signal output by the digital intermediate frequency module is obtained, including:

[0009] After enabling the cell, determine whether the first frame header has been detected;

[0010] The time-domain baseband signal received after detecting the first frame header is used as the target time-domain baseband signal and stored in the first buffer.

[0011] Optionally, the method also includes:

[0012] The time-domain baseband signal received before the first frame header is detected is discarded as noise.

[0013] Optionally, the target time-domain baseband signal is processed into packets to generate data packets, including:

[0014] Control the counter to count and generate a count value corresponding to each data packet;

[0015] Data packets are generated based on the identification word, count value, and target time-domain baseband signal in the first frame header.

[0016] Optionally, based on the identification word, count value, and target time-domain baseband signal, a data packet is generated, including:

[0017] Based on the data packet format required for baseband data processing input, the target time-domain baseband signal undergoes format conversion processing to obtain the format-converted target time-domain baseband signal; and

[0018] In the first time slot among multiple time slots in a 10ms frame, the count value corresponding to the first time slot is obtained, and the identification word, the count value corresponding to the first time slot, and the target time domain baseband signal to be sent in the first time slot after format conversion are assembled to generate the data packet corresponding to the first time slot.

[0019] For each time slot in a 10ms frame other than the first time slot, the corresponding count value of each other time slot and the target time domain baseband signal after format conversion to be sent in each other time slot are assembled to generate the data packet corresponding to each other time slot.

[0020] Optionally, the method further includes determining the target processing time in the following manner:

[0021] The control signal generator sends a test signal to the RF input port in a fixed time slot, and takes any air interface frame header position as the starting position to obtain the test time domain baseband signal output by the digital intermediate frequency module corresponding to the test signal;

[0022] The correlation peak value of the channel estimation is determined based on the test time-domain baseband signal, and the lag time of the test time-domain baseband signal relative to the air interface frame header is determined based on the correlation peak value.

[0023] The target processing time is determined based on the lag time.

[0024] Secondly, this disclosure also provides a signal processing method applied to a digital baseband module in a base station. The signal processing method includes:

[0025] The system acquires data packets sent by the digital intermediate frequency module in the base station and determines the data reception location based on whether the data packets carry the identification word of the first frame header. The first frame header is generated based on the target processing time. The target processing time is the processing time required for the signal to be input from the radio frequency input port in the uplink physical layer receive link and output from the digital intermediate frequency module.

[0026] Based on the data receiving position, the target time-domain baseband signal carried in the data packets received starting from the data receiving position is subjected to waveform recovery processing to obtain the target time-domain baseband signal after time delay adjustment.

[0027] Optionally, according to the data reception position, waveform recovery processing is performed on the target time-domain baseband signal carried in the data packets received starting from the data reception position, including:

[0028] According to the data receiving position, the target time domain baseband signal carried in the data packets received from the data receiving position will be stored in the circular buffer.

[0029] Based on the second frame header, which lags behind the first frame header, the valid data carried in the target time-domain baseband signal is recovered from the circular buffer to obtain the target time-domain baseband signal after time delay adjustment.

[0030] Optionally, the minimum depth of the circular buffer is such that the target time-domain baseband signal in different data packets with a 10ms frame header is written to the same address unit of the circular buffer.

[0031] Optionally, the data reception location can be determined based on the identification word in the first frame header carried in the data packet, including:

[0032] From the multiple received data packets, identify the target data packet that carries the identification word of the first frame header and carries a count value of the target value;

[0033] The position of the target data packet within multiple data packets is used as the data receiving position.

[0034] Optionally, the method also includes:

[0035] Send the delayed target time-domain baseband signal to the de-cyclic prefix module in the digital baseband module.

[0036] Thirdly, embodiments of this disclosure also provide a signal processing apparatus, including a memory, a transceiver, and a processor:

[0037] Memory is used to store computer programs; transceiver is used to send and receive data under the control of the processor; processor is used to read the computer programs from memory and perform the following operations:

[0038] Based on a predetermined target processing duration, a first frame header is generated for alignment with the time-domain baseband signal; the target processing duration is the processing time required from the signal input to the RF input port in the uplink physical layer receive link to the output from the digital intermediate frequency module.

[0039] Based on the first frame header, obtain the target time-domain baseband signal output by the digital intermediate frequency module;

[0040] The target time-domain baseband signal is processed into packets to generate data packets, which are then sent to the digital baseband module in the base station.

[0041] Optional, processor, specifically used for:

[0042] After enabling the cell, determine whether the first frame header has been detected;

[0043] The time-domain baseband signal received after detecting the first frame header is used as the target time-domain baseband signal and stored in the first buffer.

[0044] Optionally, the processor is also used for:

[0045] The time-domain baseband signal received before the first frame header is detected is discarded as noise.

[0046] Optionally, using the first frame header, the target time-domain baseband signal is packetized to generate a data packet, including:

[0047] Control the counter to count and generate a count value corresponding to each data packet;

[0048] Data packets are generated based on the identification word, count value, and target time-domain baseband signal in the first frame header.

[0049] Optionally, the processor is also used for:

[0050] Based on the data packet format required for baseband data processing input, the target time-domain baseband signal undergoes format conversion processing to obtain the format-converted target time-domain baseband signal; and

[0051] In the first time slot among multiple time slots in a 10ms frame, the count value corresponding to the first time slot is obtained, and the identification word, the count value corresponding to the first time slot, and the target time domain baseband signal to be sent in the first time slot after format conversion are assembled to generate the data packet corresponding to the first time slot.

[0052] For each time slot in a 10ms frame other than the first time slot, the corresponding count value of each other time slot and the target time domain baseband signal after format conversion to be sent in each other time slot are assembled to generate the data packet corresponding to each other time slot.

[0053] Optionally, the processor is also configured to: determine the target processing time in the following manner:

[0054] The control signal generator sends a test signal to the RF input port in a fixed time slot, and takes any air interface frame header position as the starting position to obtain the test time domain baseband signal output by the digital intermediate frequency module corresponding to the test signal;

[0055] The correlation peak value of the channel estimation is determined based on the test time-domain baseband signal, and the lag time of the test time-domain baseband signal relative to the air interface frame header is determined based on the correlation peak value.

[0056] Use the lag time as the target processing duration.

[0057] Fourthly, embodiments of this disclosure also provide a signal processing apparatus, including a memory, a transceiver, and a processor:

[0058] Memory is used to store computer programs; transceiver is used to send and receive data under the control of the processor; processor is used to read the computer programs from memory and perform the following operations:

[0059] The system acquires data packets sent by the digital intermediate frequency module in the base station and determines the data reception location based on whether the data packets carry the identification word of the first frame header. The first frame header is generated based on the target processing time. The target processing time is the processing time required for the signal to be input from the radio frequency input port in the uplink physical layer receive link and output from the digital intermediate frequency module.

[0060] Based on the data receiving position, the target time-domain baseband signal carried in the data packets received starting from the data receiving position is subjected to waveform recovery processing to obtain the target time-domain baseband signal after time delay adjustment.

[0061] Optionally, the processor is also used for:

[0062] According to the data receiving position, the target time domain baseband signal carried in the data packets received from the data receiving position will be stored in the circular buffer.

[0063] Based on the second frame header, which lags behind the first frame header, the valid data carried in the target time-domain baseband signal is recovered from the circular buffer to obtain the target time-domain baseband signal after time delay adjustment.

[0064] Optionally, the minimum depth of the circular buffer is such that the target time-domain baseband signal in different data packets with a 10ms frame header is written to the same address unit of the circular buffer.

[0065] Optionally, the processor is also used for:

[0066] From the multiple received data packets, identify the target data packet that carries the identification word of the first frame header and carries a count value of the target value;

[0067] The position of the target data packet within multiple data packets is used as the data receiving position.

[0068] Optionally, the processor is also used to: send a time-delay-adjusted target time-domain baseband signal to the de-cyclic prefix module in the digital baseband module.

[0069] Fifthly, embodiments of this disclosure also provide a signal processing apparatus applied to a digital intermediate frequency module in a base station; the signal processing apparatus includes:

[0070] The generation unit is used to generate a first frame header for alignment with the time-domain baseband signal according to a predetermined target processing duration; the target processing duration is the processing time required for the signal to be input from the RF input port in the uplink physical layer receive link and output from the digital intermediate frequency module.

[0071] The processing unit is used to acquire the target time-domain baseband signal output by the digital intermediate frequency module based on the first frame header; and to perform packet assembly processing on the target time-domain baseband signal to generate data packets.

[0072] The transmitting unit is used to send data packets to the digital baseband module in the base station.

[0073] Optionally, the generation unit, when acquiring the target time-domain baseband signal output by the digital intermediate frequency module based on the first frame header, is used for:

[0074] After enabling the cell, determine whether the first frame header has been detected;

[0075] The time-domain baseband signal received after detecting the first frame header is used as the target time-domain baseband signal and stored in the first buffer.

[0076] Optionally, the generation unit is also configured to: discard the time-domain baseband signal received before the detection of the first frame header as a noise signal.

[0077] Optionally, the processing unit, when performing packet assembly processing on the target time-domain baseband signal to generate data packets, is used for:

[0078] Control the counter to count and generate a count value corresponding to each data packet;

[0079] Data packets are generated based on the identification word, count value, and target time-domain baseband signal in the first frame header.

[0080] Optionally, when generating data packets based on the identification word, count value, and target time-domain baseband signal, the processing unit is used to:

[0081] Based on the data packet format required for baseband data processing input, the target time-domain baseband signal undergoes format conversion processing to obtain the format-converted target time-domain baseband signal; and

[0082] In the first time slot among multiple time slots in a 10ms frame, the count value corresponding to the first time slot is obtained, and the identification word, the count value corresponding to the first time slot, and the target time domain baseband signal to be sent in the first time slot after format conversion are assembled to generate the data packet corresponding to the first time slot.

[0083] For each time slot in a 10ms frame other than the first time slot, the corresponding count value of each other time slot and the target time domain baseband signal after format conversion to be sent in each other time slot are assembled to generate the data packet corresponding to each other time slot.

[0084] Optionally, the target processing time can be determined using the following method:

[0085] The control signal generator sends a test signal to the RF input port in a fixed time slot, and takes any air interface frame header position as the starting position to obtain the test time domain baseband signal output by the digital intermediate frequency module corresponding to the test signal;

[0086] The correlation peak value of the channel estimation is determined based on the test time-domain baseband signal, and the lag time of the test time-domain baseband signal relative to the air interface frame header is determined based on the correlation peak value.

[0087] The target processing time is determined based on the lag time.

[0088] Sixthly, embodiments of this disclosure also provide a signal processing apparatus applied to a digital baseband module in a base station, the signal processing apparatus comprising:

[0089] The determining unit is used to acquire data packets sent by the digital intermediate frequency module in the base station, and determine the data reception location based on whether the data packets carry the identification word of the first frame header; wherein, the first frame header is generated based on the target processing time; the target processing time is the processing time required for the signal to be input from the radio frequency input port in the uplink physical layer receiving link and output from the digital intermediate frequency module;

[0090] The processing unit is used to perform waveform recovery processing on the target time-domain baseband signal carried in the data packets received starting from the data receiving position, according to the data receiving position, to obtain the target time-domain baseband signal after time delay adjustment.

[0091] Optionally, the processing unit is specifically used to: store the target time-domain baseband signal carried in the data packets received from the data receiving position to a circular buffer according to the data receiving position;

[0092] Based on the second frame header, which lags behind the first frame header, the valid data carried in the target time-domain baseband signal is recovered from the circular buffer to obtain the target time-domain baseband signal after time delay adjustment.

[0093] Optionally, the minimum depth of the circular buffer is such that the target time-domain baseband signal in different data packets with a 10ms frame header is written to the same address unit of the circular buffer.

[0094] Optionally, the determining unit, when determining the data reception location based on the identification word in the first frame header carried in the data packet, is used for:

[0095] From the multiple received data packets, identify the target data packet that carries the identification word of the first frame header and carries a count value of the target value;

[0096] The position of the target data packet within multiple data packets is used as the data receiving position.

[0097] Optionally, a transmitting unit may also be included, for:

[0098] Send the delayed target time-domain baseband signal to the de-cyclic prefix module in the digital baseband module.

[0099] In a seventh aspect, embodiments of this disclosure also provide a base station, including the signal processing apparatus as described in the third aspect above, or any possible signal processing apparatus in the third aspect;

[0100] Alternatively, it may include a signal processing device as described in the fourth aspect above, or any of the possible signal processing devices in the fourth aspect;

[0101] Alternatively, it may include a signal processing device as described in the fifth aspect above, or any of the possible signal processing devices in the fifth aspect;

[0102] Alternatively, it may include any of the possible signal processing devices described in the sixth or third aspect above;

[0103] Eighthly, an optional implementation of this disclosure also provides a computer-readable storage medium storing a computer program that, when run, performs the steps of the first aspect or any possible implementation of the first aspect.

[0104] Alternatively, perform the steps of the second aspect described above, or any of the possible implementations of the second aspect.

[0105] In a ninth aspect, an optional implementation of this disclosure also provides a computer program product, the computer program product carrying program code, the program code including instructions that can be used to perform the steps as described in the first aspect above, or any possible implementation of the first aspect;

[0106] Alternatively, perform the steps of the second aspect described above, or any of the possible implementations of the second aspect.

[0107] It should be understood that the above general description and the following detailed description are merely exemplary and explanatory, and are not intended to limit the technical solutions of this disclosure.

[0108] The signal processing method provided in this embodiment involves a base station generating a first frame header for alignment with the time-domain baseband signal based on a target processing duration, and acquiring the target time-domain baseband signal output by the digital intermediate frequency module based on the first frame header. The target time-domain baseband signal is then processed into packets to generate data packets, which are then sent to the digital baseband module in the base station. In this process, the target processing duration is the processing time required from signal input at the RF input port in the uplink physical layer receive link to output from the digital intermediate frequency module. Generating the first frame header based on the target processing duration effectively eliminates the time offset between the 10ms frame header generated by the baseband module and the received time-domain data to a certain extent. Therefore, regardless of the data duty cycle of the OFDM symbol, the elimination of the time offset is unaffected, satisfying the requirement that the 10ms frame header and time-domain data can be aligned using the above method under various data duty cycles.

[0109] To make the above-mentioned objects, features and advantages of this disclosure more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0110] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings used in the embodiments will be briefly described below. These drawings are incorporated in and constitute a part of this specification. They illustrate embodiments conforming to this disclosure and, together with the specification, serve to explain the technical solutions of this disclosure. It should be understood that the following drawings only show some embodiments of this disclosure and should not be considered as limiting the scope. Those skilled in the art can obtain other related drawings based on these drawings without creative effort.

[0111] Figure 1 This disclosure illustrates specific examples of uplink physical layer receive links in 5G communication networks provided by some embodiments thereof;

[0112] Figure 2 A flowchart of a signal processing method provided by some embodiments of this disclosure is shown;

[0113] Figure 3 Examples of the relationship between the air interface 10ms frame header and the first frame header provided in some embodiments of this disclosure are shown;

[0114] Figure 4 A flowchart of another signal processing method provided by some embodiments of this disclosure is shown;

[0115] Figure 5 A schematic diagram of a signal processing apparatus provided in some embodiments of the present disclosure is shown;

[0116] Figure 6 A schematic diagram of another signal processing apparatus provided by some embodiments of the present disclosure is shown;

[0117] Figure 7 A schematic diagram of another signal processing apparatus provided by some embodiments of the present disclosure is shown;

[0118] Figure 8 A schematic diagram of another signal processing apparatus provided by some embodiments of the present disclosure is shown; Detailed Implementation

[0119] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. The components of the embodiments of this disclosure described and shown herein can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this disclosure is not intended to limit the scope of the claimed disclosure, but merely represents selected embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without inventive effort are within the scope of protection of this disclosure.

[0120] like Figure 1 As shown, a specific example of an uplink physical layer receive link in a 5G communication network is provided, which typically includes: a radio frequency tuner, an analog-to-digital converter (AD), a digital intermediate frequency module, and a digital baseband module.

[0121] The transmitting end sends an analog radio frequency (RF) signal containing Orthogonal Frequency Division Multiplexing (OFDM) symbols to the uplink physical layer receiving link via an antenna. The RF tuner converts the analog RF signal into an analog intermediate frequency (IF) signal. This analog IF signal is then sampled by an analog-to-digital converter (AD) to obtain a digital IF signal. After entering the digital IF module, the digital IF signal undergoes spectrum shifting, downsampling filtering, and FIR filtering to obtain the time-domain baseband signal. Upon receiving the time-domain baseband signal, the digital baseband module sequentially performs cyclic prefix removal (CP), phase compensation, Fast Fourier Transform (FFT), and subcarrier extraction to obtain the subcarriers in the time-domain baseband signal. These subcarriers are then sequentially transmitted to the Physical Uplink Shared Channel (PUSCH), Physical Uplink Control Channel (PUCCH), and Sounding Reference Signal (SRS) for processing. In addition, the time-domain baseband signal is also transmitted to the Physical Random Access Channel (PRACH) front-end processing, that is, the CP and PRACH front-end processing share the same input; after processing the time-domain baseband signal, the PRACH front-end processing sends the processing result to the PRACH back-end processing.

[0122] For digital baseband module processing, the input time-domain baseband data will have a certain time offset, which will affect the receiver's reception performance. If the deviation between the target position and the actual position of the OFDM symbol in the time-domain baseband data exceeds the length of the CP, the receiver will not be able to demodulate the received data. Therefore, in the implementation of the uplink physical layer receiving link, the adjustment of uplink delay is an indispensable processing step. Typically, the time-domain baseband data received by the digital baseband module is continuous, and the valid indicator of the time-domain baseband data is a constantly high level, meaning that the duty cycle of each OFDM symbol is 1:1. For this situation, a common delay adjustment method is to complete the process in the following three steps: Step 1, generate a 10ms air interface frame header; Step 2, capture the time-domain baseband data to the CP input based on the 10ms air interface frame header, and obtain the number of sampling points representing the positional deviation of the time-domain data relative to the 10ms air interface frame header by calculating the correlation peak of the channel estimation; Step 3, adjust the position of the 10ms frame header according to the number of deviation sampling points to align it with the data. After these three steps, uplink delay adjustment can be completed.

[0123] However, this uplink delay adjustment method requires that the time-domain baseband data processed by CP be continuous on each OFDM, i.e., the duty cycle of the data in each OFDM symbol is 1:1. In multi-bandwidth application scenarios (usually with a fixed subcarrier spacing and different sampling rates for different bandwidths), since the subcarrier spacing is the same, the duration of each OFDM symbol is the same for different bandwidths. Due to the different sampling rates, the number of effective sampling points for each OFDM symbol is different. Different bandwidths select the highest sampling rate as the reference working clock to support multi-bandwidth scenarios. At the highest sampling rate, the duty cycle of each OFDM symbol is 1:1. At a sampling rate lower than the highest sampling rate, the duty cycle of each OFDM symbol is not 1:1. When the duty cycle of OFDM symbol data is not 1:1, the above delay adjustment method will lead to the problem of mismatch between the 10ms frame header generated on the baseband side and the received time-domain data, thus affecting the final demodulation.

[0124] Furthermore, the current uplink delay adjustment method is only applicable to OFDM symbols with a duty cycle of 1:1. However, it cannot be applied to cases where the duty cycle is not 1:1, which limits the application of the current delay adjustment method and fails to meet the requirements.

[0125] Based on the above research, this disclosure provides a signal processing method that can solve the problem that the above time-domain adjustment method cannot be applied to OFDM symbols where the duty cycle is not 1:1.

[0126] The shortcomings of the above solutions are the result of the inventor's practical experience and careful research. Therefore, the discovery process of the above problems and the solutions proposed in this disclosure below should be considered as the inventor's contribution to this disclosure.

[0127] The technical solutions provided in this disclosure can be applied to a variety of systems. For example, applicable systems may include Long Term Evolution (LTE) systems, LTE Frequency Division Duplex (FDD) systems, LTE Time Division Duplex (TDD) systems, Long Term Evolution Advanced (LTE-A) systems, Universal Mobile Telecommunications System (UMTS), Worldwide Interoperability for Microwave Access (WiMAX) systems, 5G New Radio (NR) systems and their evolved communication systems, and 6G (sixth generation mobile communication technology) systems. These systems may include terminal equipment and network equipment. The systems may also include a core network component, such as the Evolved Packet Core (EPC) or the 5G Core Network (5GC).

[0128] To facilitate understanding of the technical solutions disclosed herein, the technical terms used in the embodiments of this disclosure will first be explained:

[0129] OFDM is a multi-carrier modulation technique, and an OFDM symbol is the basic unit for data transmission under this modulation technique. It involves dividing a high-speed data signal into multiple low-speed sub-data streams, and then modulating these sub-data streams onto multiple mutually orthogonal subcarriers for parallel transmission. Each OFDM symbol has a certain duration in the time domain and contains signals from multiple subcarriers. After being generated at the transmitting end, OFDM symbols are transmitted through a wireless channel and then received at the front end of the physical layer receiving link. This process mainly includes: first, performing serial-to-parallel conversion of the data, dividing the serial data into multiple parallel sub-data streams; then, modulating each sub-data stream; finally, converting the frequency-domain modulated signal into a time-domain signal using an inverse fast Fourier transform (IFFT) to form an OFDM symbol, and adding a cyclic prefix (CP) to the beginning of each OFDM symbol.

[0130] Cyclic Prefix (CP): This is a signal appended to the beginning of an OFDM symbol; it is a copy of the end of the OFDM symbol. The main function of the CP is to resist multipath fading and eliminate inter-symbol interference. By setting the length of the CP to be greater than the multipath delay spread, multipath signals can be effectively separated at the receiver, ensuring orthogonality between the subcarriers.

[0131] The air interface refers to the wireless communication interface between a mobile terminal (such as a mobile phone, IoT device, etc.) and a base station. It is a key part of a wireless communication system that enables data transmission and signaling interaction, transmitting information through a wireless channel in the air.

[0132] 10ms Frame Header: In some wireless communication systems (such as LTE and 5G), data transmission is organized in frames. The 10ms frame header indicates the beginning of a 10ms data frame. It is an important basis for the receiving end to correctly receive data.

[0133] A 10ms frame contains multiple OFDM symbols. For example, in an LTE system, a 10ms frame can be divided into multiple subframes, and each subframe contains a certain number of OFDM symbols. These OFDM symbols are arranged in a specific order within the frame and are used to transmit data and control information.

[0134] The 10ms frame header is used to indicate the beginning of the 10ms frame. Only by following the 10ms frame header can the OFDM symbol with CP be correctly received and subsequent operations such as CP removal and FFT be performed to recover the data.

[0135] In this embodiment of the invention, the term "and / or" describes the relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. The character " / " generally indicates that the preceding and following associated objects have an "or" relationship.

[0136] In the embodiments of this application, the term "multiple" refers to two or more, and other quantifiers are similar.

[0137] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0138] See Figure 2 The diagram shows a flowchart of a signal processing method provided in an embodiment of this disclosure. This signal processing method is applied to a digital intermediate frequency module in a base station. The method includes steps S201 to S202, wherein:

[0139] S201: Generate a first frame header for alignment with the time-domain baseband signal according to a predetermined target processing duration; the target processing duration is the processing time required from the signal input to the RF input port in the uplink physical layer receive link to the output from the digital intermediate frequency module.

[0140] In practice, the target processing time can be determined in the following ways:

[0141] The control signal generator sends a test signal to the RF input port in a fixed time slot of 10ms frame, and takes the 10ms frame header position of any air port as the starting position to obtain the test time domain baseband signal output by the digital intermediate frequency module corresponding to the test signal;

[0142] The correlation peak value of the channel estimation is determined based on the test time-domain baseband signal, and the lag time of the test time-domain baseband signal relative to the air interface frame header is determined based on the correlation peak value.

[0143] The target processing time is determined based on the lag time.

[0144] In practice, the base station generates a 10ms air interface header every 10ms, which is aligned with the second signal of the Global Positioning System (GPS).

[0145] The signal generator can be, for example, a dedicated signal generator used to calibrate the target processing duration, or any user equipment capable of emitting signals. The time reference of the signal generator uses the base station's 10ms air interface frame header. After synchronizing with the base station, the signal generator connects to the base station.

[0146] After connecting to the base station, the signal generator sends a PUSCH test signal to the RF input port of the uplink physical layer receive link in a fixed time slot. This test signal is then processed by the RF tuner, AD converter, and digital intermediate frequency module, and converted into a test time-domain baseband signal.

[0147] When acquiring the test time-domain baseband signal corresponding to the test signal output by the digital intermediate frequency module, starting from any air interface frame header position, for example, starting from the time when the base station generates any air interface 10ms frame header, the test time-domain baseband signal output from the digital intermediate frequency module after that time is acquired.

[0148] After obtaining the test time-domain baseband signal, correlation calculation can be performed based on the test time-domain baseband signal to obtain the correlation peak value of the channel estimation, and the lag time of the test time-domain baseband signal relative to the air interface frame header can be obtained based on the correlation peak value.

[0149] Specifically, a copy of the pilot signal known from the PUSCH is locally stored at the receiver of the time-domain baseband signal. This pilot signal is distributed within OFDM symbols, and its distribution follows certain rules and patterns in both the frequency and time domains of the OFDM system. The received digital baseband signal of the pilot is multiplied point-by-point with the local pilot signal, and the results are summed within a certain window length to obtain a correlation metric. This process is similar to sliding window correlation calculation, where the window slides across the received signal sequence, calculating a correlation value each time.

[0150] As the window is slid, a series of correlation values ​​will be obtained. When a significant peak appears among these values, it indicates that the position where the pilot signal and the local pilot signal in the digital baseband signal best match has been found. This peak position corresponds to the actual position of the pilot signal in the digital baseband signal.

[0151] Given the ideal position of the transmitting pilot signal within a 10ms frame, the positional deviation of the received digital baseband signal relative to the 10ms air interface frame can be calculated by comparing the actual found correlation peak position with the ideal position. For example, if the ideal pilot signal position is at the 2ms mark of the 10ms frame, and the actual found correlation peak position is at the 2.5ms mark, then the positional deviation is 0.5ms, which is the lag time of the tested time-domain baseband signal relative to the 10ms air interface frame header. This lag time can be determined as the target processing time.

[0152] The target processing time for different base stations is relatively similar. Therefore, once the target processing time is determined for a certain base station, it can be directly used as a parameter for generating the first frame header and applied to multiple base stations.

[0153] Meanwhile, when determining the target processing time, based on the above process, the lag time of the test time-domain baseband signal compared to the 10ms air interface frame header can be determined multiple times in a certain base station, and the average of the determined lag times can be calculated to obtain the target processing time. Alternatively, for each of the multiple base stations, the target processing time corresponding to each base station can be determined, and the target processing time determined for each base station can be applied to each base station. Or, the lag times determined for multiple base stations can be averaged, and the average value can be used as the target processing time corresponding to multiple base stations. The specific determination method is not limited in the embodiments of this disclosure.

[0154] Once the target processing time is determined, it can be configured as a constant parameter in each base station for use by the base station.

[0155] Specifically, during the enabling process, the base station can generate a first frame header for alignment with the time-domain baseband signal based on the target processing duration.

[0156] Here, since the 10ms air interface frame header is aligned with the GPS second signal, when generating the first frame header for alignment with the time-domain baseband signal based on the target processing duration, for example, the target second signal aligned with the first frame header can be determined first based on the second signal aligned with the 10ms air interface frame header and the aforementioned target processing duration, and then the first frame header with its rising edge aligned with the target second signal can be generated. Here, the first frame header is a 10ms frame header that lags behind the air interface.

[0157] like Figure 3 The diagram illustrates the relationship between the 10ms air interface frame header and the first frame header that lags behind the 10ms air interface frame header. The target processing time is T1.

[0158] S202: Based on the first frame header, obtain the target time-domain baseband signal output by the digital intermediate frequency module.

[0159] In practice, the first frame header is another 10ms frame header that lags behind the 10ms frame header of the air interface;

[0160] During cell enabling, the base station transmits synchronization signals and physical broadcast signals within the cell at regular intervals. When accessing the base station, the User Equipment (UE) uses these signals to perform synchronization and acquire system parameters, and then proceeds with the subsequent access process. After accessing the base station, the UE can send uplink signals. These uplink signals are processed by the radio frequency tuner, AD converter, and digital intermediate frequency module, and converted into a target time-domain baseband signal. This target time-domain baseband signal includes multiple OFDM symbols.

[0161] Specifically, when the digital intermediate frequency module obtains the target time-domain baseband signal output by the digital intermediate frequency module based on the first frame header, it can do so in the following way:

[0162] After enabling the cell, determine whether the first frame header has been detected;

[0163] The time-domain baseband signal received after detecting the first frame header is used as the target time-domain baseband signal and stored in the first buffer.

[0164] The time-domain baseband signal received before the first frame header is detected is discarded as noise.

[0165] This ensures that the target time-domain baseband signal is obtained based on the first frame header.

[0166] S203: Perform packet processing on the target time-domain baseband signal, generate data packets, and send the data packets to the digital baseband module in the base station.

[0167] In practice, the target time-domain baseband signal is packetized to send it to the digital baseband module according to the communication protocol between the digital intermediate frequency module and the digital baseband module.

[0168] Specifically, for example, the target time-domain baseband signal can be packetized and data packets can be generated using the following method:

[0169] Control the counter to count and generate a count value corresponding to each data packet;

[0170] Data packets are generated based on the identification word, count value, and target time-domain baseband signal in the first frame header.

[0171] In practice, a 10ms frame is divided into multiple subframes of equal length; each subframe can be further divided into multiple time slots; within a time slot, one or more OFDM symbols can be transmitted. The target time-domain baseband signal includes the aforementioned OFDM symbols.

[0172] In each of the multiple time slots, the counter generates a count value corresponding to each OFDM symbol in that time slot, and generates a data packet corresponding to that time slot based on the identification word in the first frame header, the count value, and the data to be transmitted in that time slot (target time domain baseband signal).

[0173] Specifically, based on the identification word, count value, and target time-domain baseband signal of the first frame header, the following method can be used, for example:

[0174] Based on the data packet format required for baseband data processing input, the target time-domain baseband signal undergoes format conversion processing to obtain the format-converted target time-domain baseband signal; and

[0175] In the first time slot among multiple time slots in a 10ms frame, the count value corresponding to the first time slot is obtained, and the identification word, the count value corresponding to the first time slot, and the target time domain baseband signal to be sent in the first time slot after format conversion are assembled to generate the data packet corresponding to the first time slot.

[0176] For each time slot in a 10ms frame other than the first time slot, the corresponding count value of each other time slot and the target time domain baseband signal after format conversion to be sent in each other time slot are assembled to generate the data packet corresponding to each other time slot.

[0177] In practical implementation, it is assumed that a 10ms frame includes N time slots. In the first OFDM symbol of the first time slot at the beginning of the 10ms frame, the counter starts counting from the target value. In the next OFDM symbol, the counter's count value increases by a preset value, which is, for example, 1, and a corresponding count value is generated. The target value is, for example, 0.

[0178] Furthermore, the digital intermediate frequency module reads the OFDM symbols to be transmitted in the first time slot from the buffer and processes them into the format required by the digital baseband module. Then, it assembles the identification word of the first frame header, the count value corresponding to each OFDM symbol in the first time slot, and the OFDM symbols to be transmitted in the first time slot into a packet to obtain the data packet for the first time slot. The counter is then reset.

[0179] In the first OFDM symbol of the second time slot, the counter starts counting from the target value. For the next OFDM symbol, the counter value increases by a preset value, such as 1, and generates a corresponding count value. The target value is, for example, 0. The digital intermediate frequency module also reads the OFDM symbols to be transmitted in the second time slot from the buffer and processes them into the format required by the digital baseband module. Then, the count value corresponding to each OFDM symbol in the second time slot is combined with the OFDM symbols to be transmitted in the first time slot to form a data packet for the second time slot. The counter is then reset.

[0180] In the first OFDM symbol of the third time slot, the counter starts counting from the target value. For the next OFDM symbol, the counter increments by a preset value, such as 1, and generates a corresponding count value. The target value is, for example, 0. The digital intermediate frequency module reads the OFDM symbols to be transmitted in the third time slot from the buffer and processes them into the format required by the digital baseband module. Then, the count value corresponding to the third time slot and the OFDM symbols to be transmitted in the first time slot are combined to form a data packet for the third time slot. The counter is then reset.

[0181] Repeat the above process.

[0182] In the first OFDM symbol of the Nth time slot, the counter starts counting from the target value. For the next OFDM symbol, the counter value increases by a preset value, such as 1, and generates a corresponding count value. The target value is, for example, 0. The digital intermediate frequency module reads the OFDM symbol to be transmitted in the Nth time slot from the buffer and processes the read OFDM symbol into the format required by the digital baseband module. Then, the count value corresponding to the Nth time slot and the OFDM symbol to be transmitted in the Nth time slot are combined to form a data packet for the Nth time slot.

[0183] At this point, the next 10ms frame will begin, the counter will be reset (e.g., cleared to zero), and then the above packet assembly process will be repeated.

[0184] In the above embodiments, the frame structure of the data packets corresponding to the second to the Nth time slots is similar to that of the data packets corresponding to the first time slot. However, the data packets corresponding to the second to the Nth time slots are not the data packets corresponding to the first frame header position. Therefore, the data packets corresponding to the second to the Nth time slots may also include non-first frame header identification words to distinguish between data packets at the first frame header position and non-first frame header position data packets, so as to facilitate the processing of the digital baseband module in the base station.

[0185] The non-first frame header position identifier can also be generated by customization.

[0186] The identification word in the first frame header and the location identification word outside the first frame header are carried in specific location fields in the data packet.

[0187] The signal processing method provided in this disclosure involves a base station generating a first frame header for alignment with the time-domain baseband signal based on a target processing duration, and acquiring the target time-domain baseband signal output by the digital intermediate frequency module based on the first frame header. The target time-domain baseband signal is then processed into packets to generate data packets, which are then sent to the digital baseband module in the base station. In this process, the target processing duration is the processing time required from signal input at the RF input port in the uplink physical layer receive link to output from the digital intermediate frequency module. Generating the first frame header based on the target processing duration effectively eliminates the time offset between the 10ms frame header generated by the baseband and the received time-domain data to a certain extent. Therefore, regardless of the data duty cycle of the OFDM symbol, the elimination of the time offset is unaffected, satisfying the requirement that the 10ms frame header and time-domain data can be aligned using the above method under various data duty cycles.

[0188] See Figure 4 As shown, this disclosure provides another signal processing method applied to a digital baseband module in a base station; the signal processing method includes:

[0189] S401: Obtain the data packet sent by the digital intermediate frequency module in the base station, and determine the data reception location based on whether the data packet carries the identification word of the first frame header; wherein, the first frame header is generated based on the target processing time; the target processing time is the processing time required for the signal to be input from the radio frequency input port in the uplink physical layer receiving link to be output from the digital intermediate frequency module.

[0190] In specific implementation, when determining the data receiving location, for example, the target data packet carrying the identification word of the first frame header and carrying a count value of the target value can be identified from multiple received data packets;

[0191] The position of the target data packet within multiple data packets is used as the data receiving position.

[0192] Specifically, after receiving a data packet from the digital intermediate frequency module, the digital baseband module parses the packet and reads information from a specific field. This field stores either the identifier of the first frame header or a non-first frame header identifier. If the information read from this specific field is the identifier of the first frame header, it means that the data packet is time-aligned with the first frame header. If the information read from this specific field is not the identifier of the first frame header, it means that the data packet is not time-aligned with the first frame header. The location of the data packet that is time-aligned with any first frame header is determined as the data reception location.

[0193] S402: According to the data receiving position, perform waveform recovery processing on the target time domain baseband signal carried in the data packet received starting from the data receiving position to obtain the target time domain baseband signal after time delay adjustment.

[0194] In practical implementation, when performing waveform recovery processing on the target time-domain baseband signal carried in the data packets received starting from the data reception position, to obtain the time-delay adjusted target time-domain baseband signal, the following method can be used, for example:

[0195] According to the data receiving position, the target time domain baseband signal carried in the data packets received from the data receiving position will be stored in the circular buffer.

[0196] Based on the second frame header, which lags behind the first frame header, the valid data carried in the target time-domain baseband signal is recovered from the circular buffer to obtain the target time-domain baseband signal after time delay adjustment.

[0197] In practice, after determining the data receiving location, data packets are received starting from that location. For each received data packet, the relevant data carried in the data packet is written into a circular buffer. The relevant data written into the circular buffer may include, for example, the target time-domain baseband signal carried in the data packet.

[0198] In practice, the time-domain baseband signal typically includes valid data identifiers, invalid data identifiers, valid data, and invalid data.

[0199] Invalid data refers to the data portion of the uplink time-domain baseband signal that does not contain valid information or has no practical function for the communication system. Invalid data may include padding data, synchronization signals, guard intervals, etc. Padding data is typically used to ensure the signal length meets specific format requirements or to buffer data during transmission. Synchronization signals are used to synchronize the time and frequency of the transmitter and receiver, ensuring correct data reception. Guard intervals are inserted between signals to prevent interference between adjacent signals.

[0200] Valid data refers to the data portion that actually contains user information or has practical significance for the communication system. For example, in voice communication, valid data includes encoded and modulated voice signals; in data communication, valid data can include various types of information such as text, images, and video.

[0201] Among them, the valid data identifier is used to indicate that a segment of data identified by the identifier is valid data; the invalid data identifier is used to indicate that a segment of data identified by the identifier is invalid data.

[0202] The aforementioned valid data, valid data identifier, invalid data identifier, and invalid data can all be written into the circular buffer.

[0203] To distinguish whether a data packet is time-aligned with the 10sm frame header, the identification word carried in each data packet to identify whether it is the first frame header or not can also be written into the circular buffer. When recovering valid data from the circular buffer, if the data stored in a certain address unit is found to include the identification word of the first frame header, then the recovery of valid data starts from that address unit.

[0204] Alternatively, instead of writing all data, including the identifier or non-identifier carried to indicate the first frame header, into the circular buffer, the circular buffer can be controlled so that the target time-domain baseband signal in different data packets that are time-aligned with the 10ms frame header is written to the same address unit of the circular buffer. For example, assuming that data packet 1 is time-aligned with the rising edge of the first 10ms frame header pulse, and data packet 2 is time-aligned with the rising edge of the second 10ms frame header pulse, then the minimum depth of the circular buffer is sufficient to write the relevant data in data packets 1 and 2 into the same address unit of the circular buffer.

[0205] Furthermore, since there is a certain time offset, i.e. jitter, during the process of data packets being sent from the digital intermediate frequency module to the data baseband module, in this embodiment of the present disclosure, the digital baseband module will also generate a second frame header that lags behind the first frame header. The second frame header is used to perform waveform recovery processing on the effective data carried in the target time domain baseband signal, thereby eliminating the time offset caused by the jitter.

[0206] The second frame header lags behind the first frame header, that is, the time corresponding to the pulse rising edge of the second frame header is later than the time corresponding to the pulse rising edge of the first frame header. The relationship between the two is similar to the relationship between the 10ms frame header and the first frame header of the air interface. The duration of the second frame header lagging behind the first frame header can be determined as needed, and this embodiment does not limit it.

[0207] Starting with writing the relevant data from each data packet into the loop buffer, the position of the first second frame header is detected as the starting position. The valid data carried in the target time domain baseband signal is read from the loop buffer, and the recovered valid data is used as the target time domain baseband signal after time delay adjustment to recover the waveform of the target time domain baseband signal. Then, the target time domain baseband signal can be passed to the de-cp processing module to perform de-cp processing.

[0208] The signal processing method provided in this embodiment determines the target processing time based on the processing time required from the signal input from the RF input port in the uplink physical layer receiving link to the output from the digital intermediate frequency module. When generating the first frame header based on the target processing time, the target processing time eliminates the time offset between the 10ms frame header generated by the baseband measurement and the received time domain data to a certain extent. Therefore, regardless of the data duty cycle of the OFDM symbol, the elimination of the time offset is not affected. This satisfies the requirement that the 10ms frame header and the time domain data can be aligned using the above method under various data duty cycles.

[0209] Those skilled in the art will understand that, in the above-described method of the specific implementation, the order in which each step is written does not imply a strict execution order and does not constitute any limitation on the implementation process. The specific execution order of each step should be determined by its function and possible internal logic.

[0210] Reference Figure 5 The diagram shown is a schematic of a signal processing device provided in an embodiment of this disclosure. The device can be deployed at a control terminal and may include: a memory 520 for storing computer programs; and a transceiver 530 for receiving and sending data under the control of a processor 510.

[0211] Among them, Figure 5 In this context, the bus architecture can include any number of interconnected buses and bridges, specifically linking various circuits together, represented by one or more processors (processor 510) and memory (memory 520). The bus architecture can also link various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and therefore will not be described further herein. The bus interface provides an interface. The transceiver 530 can be multiple elements, including transmitters and receivers, providing a unit for communicating with various other devices over transmission media, including wireless channels, wired channels, optical fibers, etc. The processor 510 is responsible for managing the bus architecture and general processing, and the memory 520 can store data used by the processor 510 during operation.

[0212] The processor 510 can be a central processing unit (CPU), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or a complex programmable logic device (CPLD). The processor can also adopt a multi-core architecture.

[0213] The processor 510 invokes a computer program stored in the memory 520 to execute the steps of any method provided in the embodiments of this disclosure according to the obtained executable instructions, for example:

[0214] Based on a predetermined target processing duration, a first frame header is generated for alignment with the time-domain baseband signal; the target processing duration is the processing time required from the signal input to the RF input port in the uplink physical layer receive link to the output from the digital intermediate frequency module.

[0215] Based on the first frame header, obtain the target time-domain baseband signal output by the digital intermediate frequency module;

[0216] The target time-domain baseband signal is processed into packets to generate data packets, which are then sent to the digital baseband module in the base station.

[0217] Optionally, the processor 510 is specifically used for:

[0218] After enabling the cell, determine whether the first frame header has been detected;

[0219] The time-domain baseband signal received after detecting the first frame header is used as the target time-domain baseband signal and stored in the first buffer.

[0220] Optionally, the processor 510 is also configured to: discard the time-domain baseband signal received before the detection of the first frame header as a noise signal.

[0221] Optionally, the processor 510 is specifically used to: perform packet assembly processing on the target time-domain baseband signal to generate data packets, including:

[0222] Control the counter to count and generate a count value corresponding to each data packet;

[0223] Data packets are generated based on the identification word, count value, and target time-domain baseband signal in the first frame header.

[0224] Optionally, the processor 510 is specifically used for:

[0225] Based on the data packet format required for baseband data processing input, the target time-domain baseband signal undergoes format conversion processing to obtain the format-converted target time-domain baseband signal; and

[0226] In the first time slot among multiple time slots in a 10ms frame, the count value corresponding to the first time slot is obtained, and the identification word, the count value corresponding to the first time slot, and the target time domain baseband signal to be sent in the first time slot after format conversion are assembled to generate the data packet corresponding to the first time slot.

[0227] For each time slot in a 10ms frame other than the first time slot, the corresponding count value of each other time slot and the target time domain baseband signal after format conversion to be sent in each other time slot are assembled to generate the data packet corresponding to each other time slot.

[0228] Processor 510 is also used to determine the target processing time in the following manner:

[0229] The control signal generator sends a test signal to the RF input port in a fixed time slot, and takes any air interface frame header position as the starting position to obtain the test time domain baseband signal output by the digital intermediate frequency module corresponding to the test signal;

[0230] The correlation peak value of the channel estimation is determined based on the test time-domain baseband signal, and the lag time of the test time-domain baseband signal relative to the air interface frame header is determined based on the correlation peak value.

[0231] The target processing time is determined based on the lag time.

[0232] Reference Figure 6 The diagram shown is a schematic of a signal processing device provided in an embodiment of this disclosure. The device can be deployed at a control terminal and may include: a memory 620 for storing computer programs; and a transceiver 630 for receiving and sending data under the control of a processor 610.

[0233] Among them, Figure 6In this context, the bus architecture can include any number of interconnected buses and bridges, specifically linking various circuits together, represented by one or more processors (processor 610) and memory (memory 620). The bus architecture can also link various other circuits, such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and therefore will not be described further herein. The bus interface provides an interface. The transceiver 630 can be multiple elements, including transmitters and receivers, providing a unit for communicating with various other devices over transmission media, including wireless channels, wired channels, optical fibers, etc. The processor 610 is responsible for managing the bus architecture and general processing, and the memory 620 can store data used by the processor 610 during operation.

[0234] The processor 610 can be a central processing unit (CPU), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or a complex programmable logic device (CPLD). The processor can also adopt a multi-core architecture.

[0235] The processor 610 invokes a computer program stored in the memory 620 to execute the steps of any method provided in the embodiments of this disclosure according to the obtained executable instructions, for example:

[0236] The system acquires data packets sent by the digital intermediate frequency module in the base station and determines the data reception location based on whether the data packets carry the identification word of the first frame header. The first frame header is generated based on the target processing time. The target processing time is the processing time required for the signal to be input from the radio frequency input port in the uplink physical layer receive link and output from the digital intermediate frequency module.

[0237] Based on the data receiving position, the target time-domain baseband signal carried in the data packets received starting from the data receiving position is subjected to waveform recovery processing to obtain the target time-domain baseband signal after time delay adjustment.

[0238] Optionally, the processor 610 is also used for:

[0239] According to the data receiving position, the target time domain baseband signal carried in the data packets received from the data receiving position will be stored in the circular buffer.

[0240] Based on the second frame header, which lags behind the first frame header, the valid data carried in the target time-domain baseband signal is recovered from the circular buffer to obtain the target time-domain baseband signal after time delay adjustment.

[0241] Optionally, the minimum depth of the circular buffer is such that the target time-domain baseband signal in different data packets with a 10ms frame header is written to the same address unit of the circular buffer.

[0242] Optionally, the processor 610 is also used for:

[0243] From the multiple received data packets, identify the target data packet that carries the identification word of the first frame header and carries a count value of the target value;

[0244] The position of the target data packet within multiple data packets is used as the data receiving position.

[0245] Optionally, the processor 610 is also configured to: send a time-delay-adjusted target time-domain baseband signal to the de-cyclic prefix module in the digital baseband module.

[0246] See Figure 7 As shown, this disclosure also provides a signal processing apparatus for use in a digital intermediate frequency module in a base station; the signal processing apparatus includes:

[0247] The generation unit 71 is used to generate a first frame header for alignment with the time-domain baseband signal according to a predetermined target processing duration; the target processing duration is the processing time required for the signal to be input from the RF input port in the uplink physical layer receive link and output from the digital intermediate frequency module.

[0248] Processing unit 72 is used to acquire the target time-domain baseband signal output by the digital intermediate frequency module according to the first frame header; and to perform packet assembly processing on the target time-domain baseband signal to generate data packets;

[0249] The transmitting unit 73 is used to send data packets to the digital baseband module in the base station.

[0250] Optionally, the generation unit 71, when acquiring the target time-domain baseband signal output by the digital intermediate frequency module based on the first frame header, is used for:

[0251] After enabling the cell, determine whether the first frame header has been detected;

[0252] The time-domain baseband signal received after detecting the first frame header is used as the target time-domain baseband signal and stored in the first buffer.

[0253] Optionally, the generation unit 71 is also configured to: discard the time-domain baseband signal received before the detection of the first frame header as a noise signal.

[0254] Optionally, the processing unit 72, when performing packet assembly processing on the target time-domain baseband signal to generate data packets, is used for:

[0255] Control the counter to count and generate a count value corresponding to each data packet;

[0256] Data packets are generated based on the identification word, count value, and target time-domain baseband signal in the first frame header.

[0257] Optionally, when generating a data packet based on the identification word, the count value, and the target time-domain baseband signal, the processing unit 72 is used to:

[0258] Based on the data packet format required for baseband data processing input, the target time-domain baseband signal undergoes format conversion processing to obtain the format-converted target time-domain baseband signal; and

[0259] In the first time slot among multiple time slots in a 10ms frame, the count value corresponding to the first time slot is obtained, and the identification word, the count value corresponding to the first time slot, and the target time domain baseband signal to be sent in the first time slot after format conversion are assembled to generate the data packet corresponding to the first time slot.

[0260] For each time slot in a 10ms frame other than the first time slot, the corresponding count value of each other time slot and the target time domain baseband signal after format conversion to be sent in each other time slot are assembled to generate the data packet corresponding to each other time slot.

[0261] Optionally, the target processing time can be determined using the following method:

[0262] The control signal generator sends a test signal to the RF input port in a fixed time slot, and takes any air interface frame header position as the starting position to obtain the test time domain baseband signal output by the digital intermediate frequency module corresponding to the test signal;

[0263] The correlation peak value of the channel estimation is determined based on the test time-domain baseband signal, and the lag time of the test time-domain baseband signal relative to the air interface frame header is determined based on the correlation peak value.

[0264] The target processing time is determined based on the lag time.

[0265] See Figure 8 As shown in the embodiments of this disclosure, another signal processing apparatus is also provided, applied to a digital baseband module in a base station. The signal processing apparatus includes:

[0266] The determining unit 81 is used to acquire the data packet sent by the digital intermediate frequency module in the base station, and determine the data reception location based on whether the data packet carries the identification word of the first frame header; wherein, the first frame header is generated based on the target processing time; the target processing time is the processing time required for the signal to be input from the radio frequency input port in the uplink physical layer receiving link and output from the digital intermediate frequency module;

[0267] The processing unit 82 is used to perform waveform recovery processing on the target time-domain baseband signal carried in the data packet received starting from the data receiving position, according to the data receiving position, to obtain the target time-domain baseband signal after time delay adjustment.

[0268] Optionally, the processing unit 82 is specifically used to: store the target time-domain baseband signal carried in the data packets received from the data receiving position to the circular buffer according to the data receiving position;

[0269] Based on the second frame header, which lags behind the first frame header, the valid data carried in the target time-domain baseband signal is recovered from the circular buffer to obtain the target time-domain baseband signal after time delay adjustment.

[0270] Optionally, the minimum depth of the circular buffer is such that the target time-domain baseband signal in different data packets with a 10ms frame header is written to the same address unit of the circular buffer.

[0271] Optionally, when determining the data reception location based on the identification word in the first frame header carried in the data packet, the determining unit 81 is used to:

[0272] From the multiple received data packets, identify the target data packet that carries the identification word of the first frame header and carries a count value of the target value;

[0273] The position of the target data packet within multiple data packets is used as the data receiving position.

[0274] Optionally, a transmitting unit 83 is also included, for:

[0275] Send the delayed target time-domain baseband signal to the de-cyclic prefix module in the digital baseband module.

[0276] It should be noted that the division of units in the embodiments of this application is illustrative and only represents one logical functional division. In actual implementation, other division methods may be used. Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated units described above can be implemented in hardware or as software functional units.

[0277] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a processor-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the methods of the various embodiments of this application.

[0278] This disclosure also provides a base station, including the signal processing apparatus of any embodiment of this disclosure.

[0279] This disclosure also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, performs the steps of the signal processing method described in the above method embodiments. The storage medium may be a volatile or non-volatile computer-readable storage medium.

[0280] This disclosure also provides a computer program product that carries program code. The instructions included in the program code can be used to execute the steps of the signal processing method in the above method embodiments. For details, please refer to the above method embodiments, which will not be repeated here.

[0281] The aforementioned computer program product can be implemented through hardware, software, or a combination thereof. In one optional embodiment, the computer program product is specifically embodied in a computer storage medium; in another optional embodiment, the computer program product is specifically embodied in a software product, such as a software development kit (SDK), etc.

[0282] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems and devices described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. In the several embodiments provided in this disclosure, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division; in actual implementation, there may be other division methods. Furthermore, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Another point is that the displayed or discussed mutual coupling or direct coupling or communication connection may be through some communication interfaces; the indirect coupling or communication connection of devices or units may be electrical, mechanical, or other forms.

[0283] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0284] In addition, the functional units in the various embodiments of this disclosure can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0285] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a processor-executable, non-volatile, computer-readable storage medium. Based on this understanding, the technical solution of this disclosure, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this disclosure. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0286] Finally, it should be noted that the above-described embodiments are merely specific implementations of this disclosure, used to illustrate the technical solutions of this disclosure, and not to limit it. The protection scope of this disclosure is not limited thereto. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the scope of the technology disclosed in this disclosure. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this disclosure, and should all be covered within the protection scope of this disclosure. Therefore, the protection scope of this disclosure should be determined by the protection scope of the claims.

Claims

1. A signal processing method, characterized in that, Digital intermediate frequency modules used in base stations; The signal processing method includes: Based on a predetermined target processing duration, a first frame header is generated for alignment with the time-domain baseband signal; the target processing duration is the processing time required from the signal being input from the RF input port in the uplink physical layer receive link to the signal being output from the digital intermediate frequency module. Based on the first frame header, obtain the target time-domain baseband signal output by the digital intermediate frequency module; The target time-domain baseband signal is processed into packets to generate data packets, which are then sent to the digital baseband module in the base station.

2. The method according to claim 1, characterized in that, The step of obtaining the target time-domain baseband signal output by the digital intermediate frequency module based on the first frame header includes: After the cell is enabled, determine whether the first frame header has been detected; The time-domain baseband signal received after detecting the first frame header is used as the target time-domain baseband signal and stored in the first buffer.

3. The method according to claim 2, characterized in that, The method further includes: The time-domain baseband signal received before the detection of the first frame header is discarded as noise.

4. The method according to any one of claims 1-3, characterized in that, The step of packetizing the target time-domain baseband signal to generate data packets includes: Control the counter to count and generate a count value corresponding to each data packet; The data packet is generated based on the identification word in the first frame header, the count value, and the target time-domain baseband signal.

5. The method according to claim 4, characterized in that, The step of generating the data packet based on the identification character, the count value, and the target time-domain baseband signal includes: Based on the data packet format required for baseband processing input, the target time-domain baseband signal undergoes format conversion processing to obtain the format-converted target time-domain baseband signal; and In the first time slot among multiple time slots in a 10ms frame, the count value corresponding to the first time slot is obtained, and the identification word, the count value corresponding to the first time slot, and the target time domain baseband signal to be sent in the first time slot after format conversion are assembled to generate the data packet corresponding to the first time slot. For each time slot in a 10ms frame other than the first time slot, the corresponding count value and the target time domain baseband signal to be transmitted in each other time slot are assembled to generate the data packet corresponding to each other time slot.

6. The method according to any one of claims 1-3, characterized in that, The method further includes determining the target processing time using the following method: The control signal generator sends a test signal to the RF input port in a fixed time slot, and takes any air interface frame header position as the starting position to obtain the test time domain baseband signal output by the digital intermediate frequency module corresponding to the test signal; The correlation peak value of the channel estimation is determined based on the test time-domain baseband signal, and the lag time of the test time-domain baseband signal relative to the air interface frame header is determined based on the correlation peak value. The target processing time is determined based on the lag time.

7. A signal processing method, characterized in that, The signal processing method, applied to a digital baseband module in a base station, includes: The data packet sent by the digital intermediate frequency module in the base station is acquired, and the data reception location is determined according to whether the data packet carries the identification word of the first frame header; wherein, the first frame header is generated based on the target processing time; the target processing time is the processing time required from the signal input port in the uplink physical layer receiving link to the output from the digital intermediate frequency module; According to the data receiving position, the target time-domain baseband signal carried in the data packet received starting from the data receiving position is subjected to waveform recovery processing to obtain the target time-domain baseband signal after time delay adjustment.

8. The method according to claim 7, characterized in that, The step of performing waveform recovery processing on the target time-domain baseband signal carried in the data packets received starting from the data receiving position, according to the data receiving position, includes: According to the data receiving position, the target time-domain baseband signal carried in the data packet received from the data receiving position is stored in the circular buffer. Based on the second frame header that lags behind the first frame header, the valid data carried in the target time-domain baseband signal is recovered from the circular buffer to obtain the time-delay adjusted target time-domain baseband signal.

9. The method according to claim 8, characterized in that, The minimum depth of the circular buffer is such that the target time-domain baseband signal in different data packets that are time-aligned with the 10ms frame header is written into the same address unit of the circular buffer.

10. The method according to any one of claims 7-9, characterized in that, Determining the data reception location based on the identification word in the first frame header carried in the data packet includes: From the multiple received data packets, identify the target data packet that carries the identification word of the first frame header and carries a count value of the target value; The position of the target data packet among the multiple data packets is taken as the data receiving position.

11. The method according to any one of claims 7-9, characterized in that, The method further includes: The time-delay adjusted target time-domain baseband signal is sent to the de-cyclic prefix module in the digital baseband module.

12. A signal processing apparatus, characterized in that, Includes memory, transceiver, and processor: A memory for storing computer programs; a transceiver for sending and receiving data under the control of the processor; and a processor for reading the computer programs from the memory and performing the following operations: Based on a predetermined target processing duration, a first frame header is generated for alignment with the time-domain baseband signal; the target processing duration is the processing time required from the signal input to the RF input port in the uplink physical layer receive link to the output from the digital intermediate frequency module. Based on the first frame header, obtain the target time-domain baseband signal output by the digital intermediate frequency module; The target time-domain baseband signal is processed into packets to generate data packets, which are then sent to the digital baseband module in the base station.

13. The signal processing apparatus according to claim 12, characterized in that, The processor is specifically used for: After the cell is enabled, determine whether the first frame header has been detected; The time-domain baseband signal received after detecting the first frame header is used as the target time-domain baseband signal and stored in the first buffer.

14. The signal processing apparatus according to claim 13, characterized in that, The processor is also used for: The time-domain baseband signal received before the detection of the first frame header is discarded as noise.

15. The signal processing apparatus according to any one of claims 12-14, characterized in that, The processor is specifically used for: Control the counter to count and generate a count value corresponding to each data packet; The data packet is generated based on the identification word in the first frame header, the count value, and the target time-domain baseband signal.

16. The signal processing apparatus according to claim 15, characterized in that, The processor is specifically used for: Based on the data packet format required by the data baseband processing input, the target time-domain baseband signal is subjected to format conversion processing to obtain the target time-domain baseband signal after format conversion processing. as well as In the first time slot among multiple time slots in a 10ms frame, the count value corresponding to the first time slot is obtained, and the identification word, the count value corresponding to the first time slot, and the target time domain baseband signal to be sent in the first time slot after format conversion are assembled to generate the data packet corresponding to the first time slot. For each time slot in a 10ms frame other than the first time slot, the corresponding count value and the target time domain baseband signal to be transmitted in each other time slot are assembled to generate the data packet corresponding to each other time slot.

17. The signal processing apparatus according to any one of claims 12-14, characterized in that, The processor is further configured to: determine the target processing time in the following manner: The control signal generator sends a test signal to the RF input port in a fixed time slot, and takes any air interface frame header position as the starting position to obtain the test time domain baseband signal output by the digital intermediate frequency module corresponding to the test signal; The correlation peak value of the channel estimation is determined based on the test time-domain baseband signal, and the lag time of the test time-domain baseband signal relative to the air interface frame header is determined based on the correlation peak value. The lag time is taken as the target processing time.

18. A signal processing apparatus, characterized in that, Includes memory, transceiver, and processor: A memory for storing computer programs; a transceiver for sending and receiving data under the control of the processor; and a processor for reading the computer programs from the memory and performing the following operations: The data packets sent by the digital intermediate frequency module in the base station are acquired, and the data reception location is determined based on whether the data packets carry the identification word of the first frame header; wherein, the first frame header is generated based on the target processing time; the target processing time is the processing time required from the signal input port in the uplink physical layer receiving link to the output from the digital intermediate frequency module; According to the data receiving position, the target time-domain baseband signal carried in the data packet received starting from the data receiving position is subjected to waveform recovery processing to obtain the target time-domain baseband signal after time delay adjustment.

19. The signal processing apparatus according to claim 18, characterized in that, The processor is specifically used for: According to the data receiving position, the target time-domain baseband signal carried in the data packet received from the data receiving position is stored in the circular buffer. Based on the second frame header that lags behind the first frame header, the valid data carried in the target time-domain baseband signal is recovered from the circular buffer to obtain the time-delay adjusted target time-domain baseband signal.

20. The signal processing apparatus according to claim 19, characterized in that, The minimum depth of the circular buffer is such that the target time-domain baseband signal in different data packets that are time-aligned with the 10ms frame header is written into the same address unit of the circular buffer.

21. The signal processing apparatus according to any one of claims 18-20, characterized in that, The processor is specifically used for: Determining the data reception location based on the identification word in the first frame header carried in the data packet includes: From the multiple received data packets, identify the target data packet that carries the identification word of the first frame header and carries a count value of the target value; The position of the target data packet among the multiple data packets is taken as the data receiving position.

22. The signal processing apparatus according to any one of claims 18-20, characterized in that, The processor is also used for: The time-delay adjusted target time-domain baseband signal is sent to the de-cyclic prefix module in the digital baseband module.

23. A signal processing apparatus, characterized in that, Digital intermediate frequency modules used in base stations; The signal processing device includes: The generation unit is used to generate a first frame header for alignment with the time-domain baseband signal according to a predetermined target processing duration; the target processing duration is the processing time required from the signal being input from the radio frequency input port in the uplink physical layer receive link to the signal being output from the digital intermediate frequency module. The processing unit is configured to acquire the target time-domain baseband signal output by the digital intermediate frequency module based on the first frame header; and to perform packet assembly processing on the target time-domain baseband signal to generate a data packet. A transmitting unit is used to transmit the data packet to the digital baseband module in the base station.

24. A signal processing apparatus, characterized in that, The signal processing device, used in a digital baseband module in a base station, includes: The determining unit is used to acquire data packets sent by the digital intermediate frequency module in the base station, and determine the data reception location based on whether the data packets carry an identification word of the first frame header; wherein, the first frame header is generated based on the target processing time; the target processing time is the processing time required from the signal being input from the radio frequency input port in the uplink physical layer receiving link to the signal being output from the digital intermediate frequency module; The processing unit is configured to perform waveform recovery processing on the target time-domain baseband signal carried in the data packet received starting from the data receiving position, according to the data receiving position, to obtain the target time-domain baseband signal after time delay adjustment.

25. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, which, when executed by a computer device, enables the computer device to perform the steps of the signal processing method as described in any one of claims 1-6, or the steps of the signal processing method as described in any one of claims 7-11.

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