On-chip polarized photoelectric detector of vertical PIN junction and manufacturing method of on-chip polarized photoelectric detector

Abstract

The on-chip polarized photoelectric detector comprises a substrate, the vertical PIN junction is arranged on the substrate, the vertical PIN junction comprises an InP layer, an InGaAs layer and a PdSe2 layer which are sequentially arranged from bottom to top, the InP layer is arranged on the substrate, the InGaAs layer is located in the middle of the upper surface of the InP layer, the InGaAs layer does not completely cover the upper surface of the InP layer, and the PdSe2 layer is located in the middle of the upper surface of the PdSe2 layer. A first electrode is arranged on the area, not covered by the InGaAs layer, of the InP layer, and a second electrode is arranged on the PdSe2 layer. The absorption characteristic of InGaAs in a short wave infrared band, the broadband spectrum response capability of PdSe2 and the optical anisotropy in a PdSe2 intrinsic plane are utilized, broadband spectrum detection from 1310 nm to 2200 nm and high polarization sensitivity are achieved, the responsivity of the device at 1310 nm reaches 2.59 A / W, the polarization extinction ratio at 1550 nm reaches up to 408.6, the preparation technology of the photoelectric detector is compatible with the III-V group semiconductor technology, and the photoelectric detector is suitable for large-scale production. The method is suitable for an on-chip integrated polarization detection system.

Description

Technical Field

[0001] This invention relates to the field of photoelectric detection technology, specifically to an on-chip polarization photodetector based on a PdSe2 / InGaAs / InP vertical PIN junction and its fabrication method. Background Technology

[0002] Polarization-sensitive photodetectors have important applications in fields such as fiber optic communication, spectral analysis, quantum communication, and polarization imaging. While traditional InP / In0.53Ga0.47As-based PIN photodetectors exhibit stable performance in communication bands (e.g., 1310 nm and 1550 nm), their cubic crystal structure and isotropic optical response mean they lack intrinsic polarization detection capability. To achieve polarization detection, external polarizers or integrated subwavelength gratings or other micro / nano structures are typically required. This introduces additional insertion loss, increases system complexity, reduces the signal-to-noise ratio, and generally results in a lower polarization extinction ratio.

[0003] Furthermore, due to the band gap (approximately 0.75 eV) of the In0.53Ga0.47As material, the spectral response range of traditional detectors cuts off at approximately 1700 nm, failing to cover longer short-wave infrared bands such as 1850 nm and 2200 nm. Simultaneously, their responsivity is limited by the theoretical limit of the unit quantum efficiency model (approximately 1.05 A / W at 1310 nm and approximately 1.25 A / W at 1550 nm), making it difficult to meet the high sensitivity requirements of high-speed, low-light detection.

[0004] In recent years, two-dimensional materials have attracted widespread attention due to their tunable band gaps and strong light-matter interactions. Among them, palladium diselenide (PdSe2) possesses a unique low-symmetry wrinkled pentagonal crystal structure, exhibiting significant in-plane optical anisotropy. Its band gap can be tuned within the range of 0–1.3 eV, covering a broad spectral range from mid-infrared to near-infrared, making it considered an ideal material for achieving intrinsically polarization-sensitive broadband detection. However, current heterojunction devices based on PdSe2 and three-dimensional semiconductors (such as Si, Ge, and InP) are mostly PN-type or Schottky-type, with narrow depletion regions and severe carrier recombination, resulting in large dark currents, low responsivity, and insufficient utilization of polarization sensitivity.

[0005] Therefore, developing a novel on-chip integrated photodetector structure that combines wide spectral response, high responsivity, and high polarization extinction ratio has become the key to breaking through current technological bottlenecks. Summary of the Invention

[0006] In view of this, the purpose of this invention is to overcome the shortcomings of the prior art and provide an on-chip polarization photodetector based on a PdSe2 / InGaAs / InP vertical PIN junction and its fabrication method. This invention utilizes the absorption characteristics of InGaAs in the short-wave infrared band and the broad spectral response of PdSe2, as well as the in-plane optical anisotropy of PdSe2, to achieve broad spectral detection and high polarization sensitivity from 1310 nm to 2200 nm. The device achieves a responsivity of 2.59 A / W at 1310 nm and a polarization extinction ratio as high as 408.6 at 1550 nm. The fabrication process of this photodetector is compatible with III-V semiconductor processes and is suitable for on-chip integrated polarization detection systems.

[0007] The present invention is implemented using the following scheme: an on-chip polarization photodetector with a vertical PIN junction: including a substrate, wherein a vertical PIN junction is disposed on the substrate, the vertical PIN junction including an InP layer, an InGaAs layer, and a PdSe2 layer disposed sequentially from bottom to top, the InP layer being disposed on the substrate, the InGaAs layer being located in the middle of the upper surface of the InP layer and not completely covering the upper surface of the InP layer, a first electrode being disposed on the area of ​​the InP layer not covered by the InGaAs layer, and a second electrode being disposed on the PdSe2 layer.

[0008] Furthermore, a passivation layer is disposed on the surface of the bonding sheet composed of the substrate, the InP layer, and the InGaAs layer. A groove communicating with the InGaAs layer is etched on the passivation layer. The PdSe2 layer covers the passivation layer of the bonding sheet composed of the substrate, the InP layer, and the InGaAs layer. The PdSe2 layer does not completely cover the passivation layer of the combination of the substrate and the InP layer. The PdSe2 layer covers the groove and is connected to the InGaAs layer.

[0009] Furthermore, a first electrode groove connected to the InP layer is etched on the passivation layer covered by the InP layer in the area not covered by the PdSe2 layer. The first electrode is photolithographically deposited in the first electrode groove and on the InP layer. The first electrode groove is an arc ring with a central angle greater than 180°. The InGaAs layer is located at the center of the first electrode groove, and the two ends of the first electrode groove extend outward.

[0010] Furthermore, the PdSe2 layer extends outward from between the two ends of the first electrode groove, and a protective layer covers the PdSe2 layer. A second electrode groove communicating with the PdSe2 layer is etched on the upper surface of the protective layer in the extended region of the PdSe2 layer. The second electrode is photolithographically deposited in the second electrode groove and on the PdSe2 layer.

[0011] Furthermore, the InP layer and the InGaAs layer are concentric cylindrical structures with different diameters, and the groove region on the InGaAs layer is a circular region with a smaller diameter than the InGaAs layer and concentric with the InGaAs layer.

[0012] Furthermore, the substrate is made of SiO2 / Si, the protective layer is made of SiO2, the passivation layer is made of Al2O3, and the first electrode and the second electrode are made of Ti / Ag.

[0013] A method for fabricating an on-chip polarization photodetector with a vertical pin junction includes the following steps: Step S1: The InGaAs / InP / SiO2 / Si bonded wafer is ultrasonically cleaned and then dried. Step S2: Passivation layer preparation and window opening: An Al2O3 layer is grown on the surface of the InGaAs / InP / SiO2 / Si substrate as a passivation layer using atomic layer deposition technology. Then, a circular pattern is photolithographically etched on the center of the upper surface of the InGaAs layer, and a circular area is etched using wet etching process to facilitate subsequent contact with the PdSe2 thin film.

[0014] Step S3: PdSe2 film transfer: Spin-coat a layer of PMMA adhesive onto the surface of the PdSe2 film, and peel off the PdSe2 layer evenly and completely using an etchant. Then, immerse the clean substrate prepared in step S2 below the liquid surface, align it with the floating film, and allow the film to adhere to the substrate under the surface tension of the water at an extremely slow speed. Finally, remove the PMMA adhesive.

[0015] Step S4: Define the effective area of ​​the thin film: Use PECVD deposition technology to deposit a layer of SiO2 as a protective layer on the surface of the PdSe2 thin film that has been transferred to the substrate. Then, use photolithography and ICP etching processes to pattern the PdSe2 thin film and define the effective photosensitive area. Finally, etch away the SiO2 layer and PdSe2 thin film outside the pattern.

[0016] Step S5: Photolithography is performed on the PdSe2 thin film and the InP layer to deposit metal electrodes. Photoresist is spin-coated onto the semi-finished device prepared in step S4, and the electrode pattern is created by laser direct writing. The SiO2 layer on the PdSe2 thin film is etched away using ICP etching technology, and the metal electrodes are deposited by electron beam evaporation to obtain an optoelectronic device with electrodes.

[0017] Furthermore, in step S1, the bonded sheet is placed in acetone solution, ethanol solution and deionized water for 10 min of ultrasonic cleaning and then dried.

[0018] Furthermore, in step S3, a 25% sodium hydroxide solution is used as the etchant. By precisely controlling the solution concentration, temperature (room temperature), and etching time, the PdSe2 layer is ensured to be uniformly and completely peeled off. In step S3, after the film floats on the solution surface, it is repeatedly washed with deionized water 10 times to thoroughly remove residual alkali metal ions and other contaminants.

[0019] Furthermore, in step S5, after the device completes the electron beam evaporation deposition of the metal electrode, excess photoresist and metal are removed with acetone, then soaked in alcohol, and finally dried using a spin coater to obtain the optoelectronic device with electrodes.

[0020] Compared with existing technologies, this invention has the following advantages: Utilizing the absorption characteristics of InGaAs in the short-wave infrared band and the broad spectral response of PdSe2, as well as the in-plane optical anisotropy of PdSe2, a broad spectral detection range from 1310 nm to 2200 nm and high polarization sensitivity are achieved. The device exhibits a responsivity of 2.59 A / W at 1310 nm and a polarization extinction ratio as high as 408.6 at 1550 nm. The fabrication process of this photodetector is compatible with III-V semiconductor processes and is suitable for on-chip integrated polarization detection systems. Attached Figure Description

[0021] Figure 1 This is a top view of the photodetector according to an embodiment of the present invention; Figure 2 This is a cross-sectional view of the photodetector according to an embodiment of the present invention. Figure 1 (AA) Figure 3 The absorption spectrum curves of the PdSe2 thin film and the PdSe2 / InGaAs / InP photodetector obtained in the embodiments of the present invention are shown. Figure 4 The current-voltage characteristic curve of the photodetector obtained in the embodiment of the present invention was tested under dark-light conditions; Figure 5 This is a normalized angle-resolved photocurrent polar coordinate diagram extracted and fitted by the photodetector obtained in the embodiment of the present invention under 1550 nm polarized light. Figure 6 The specific detectivity of the photodetector obtained in the embodiments of the present invention is the light irradiation of different optical powers at a bias voltage of -2 V and a wavelength of 1310 nm.

[0022] In the figure: 1-SiO2 / Si substrate; 2-n⁺-InP layer; 3-Al2O3 passivation layer; 4-Ti / Ag first electrode; 5-SiO2 protective layer; 6-PdSe2 thin film; 7-i-InGaAs layer; 8-Ti / Ag second electrode. Detailed Implementation

[0023] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0024] It should be noted that the following detailed descriptions are exemplary and intended to provide further explanation of this application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.

[0025] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0026] like Figures 1-2 As shown, an on-chip polarization photodetector with a vertical PIN junction includes a substrate on which a vertical PIN junction is disposed. The vertical PIN junction includes an InP layer, an InGaAs layer, and a PdSe2 layer disposed sequentially from bottom to top. The InP layer is disposed on the substrate. The InGaAs layer is located in the middle of the upper surface of the InP layer and does not completely cover the upper surface of the InP layer. A first electrode is disposed on the area of ​​the InP layer not covered by the InGaAs layer. A second electrode is disposed on the PdSe2 layer. A PdSe2 / InGaAs / InP PIN junction with a vertically integrated electric field is formed between the first electrode and the second electrode. The overall structure vertically heterogeneously integrates the highly anisotropic PdSe2 thin film with the mature III-V group InGaAs / InP PIN structure, making full use of the efficient intrinsic absorption of InGaAs in the short-wave infrared band (such as 1310 nm, 1550 nm) and the PdSe2 absorption in a wider spectral range (especially at 1850 nm, beyond the InGaAs cutoff wavelength of 1700 nm). The device exhibits a broad-spectrum absorption capability (2200 nm), while the inherent in-plane anisotropy of PdSe2 endows it with intrinsic polarization sensitivity. The strong built-in electric field provided by the vertical PIN structure, combined with the efficient carrier separation mechanism at the heterojunction interface, significantly improves the collection efficiency of photogenerated carriers and effectively suppresses dark current.

[0027] In this embodiment, a passivation layer is disposed on the surface of the bonding sheet composed of the substrate, the InP layer, and the InGaAs layer. A groove communicating with the InGaAs layer is etched on the passivation layer. The PdSe2 layer covers the passivation layer of the bonding sheet composed of the substrate, the InP layer, and the InGaAs layer. The PdSe2 layer does not completely cover the passivation layer of the combination of the substrate and the InP layer. The PdSe2 layer covers the groove and is connected to the InGaAs layer.

[0028] In this embodiment, a first electrode groove connected to the InP layer is etched on the area of ​​the passivation layer covered by the InP layer that is not covered by the PdSe2 layer. The first electrode is photolithographically deposited in the first electrode groove and on the InP layer. The first electrode groove is an arc ring with a central angle greater than 180°. The InGaAs layer is located at the center of the first electrode groove, and the two ends of the first electrode groove extend outward.

[0029] In this embodiment, the PdSe2 layer extends outward from between the two ends of the first electrode groove, and a protective layer covers the PdSe2 layer. The upper surface of the protective layer in the extended region of the PdSe2 layer is etched with a second electrode groove that communicates with the PdSe2 layer. The second electrode is photolithographically deposited in the second electrode groove and on the PdSe2 layer.

[0030] In this embodiment, the InP layer and the InGaAs layer are concentric cylindrical structures with different diameters. The groove region on the InGaAs layer is a circular region with a smaller diameter than the InGaAs layer and concentric with the InGaAs layer. The PdSe2 layer covers the circular region.

[0031] In this embodiment, the substrate is made of SiO2 / Si, the protective layer is made of SiO2, the passivation layer is made of Al2O3, the first electrode and the second electrode are made of Ti / Ag, the InP layer has a thickness of 200nm, the InGaAs layer has a thickness of 400nm, the PdSe2 layer has a thickness of 60nm, the Al2O3 layer has a thickness of 50nm, the SiO2 layer has a thickness of 20nm, the Ti thickness of the first electrode and the second electrode is 20nm, and the Ag thickness is 300nm.

[0032] In this embodiment, the polarization photodetector achieves a responsivity of 2.59 A / W under a -2 V bias and 1310 nm wavelength illumination, significantly exceeding the theoretical limit of traditional InGaAs PIN devices. At 1550 nm wavelength, the polarization extinction ratio reaches 408.6, nearly an order of magnitude higher than existing grating-based polarization detectors. The device's spectral response range covers 1310 nm to 2200 nm, successfully expanding the detection boundaries of traditional InGaAs detectors. This compact device eliminates the need for external polarization optics, providing an ideal solution for achieving high-performance, miniaturized on-chip integrated polarization detection systems.

[0033] A method for fabricating an on-chip polarization photodetector with a vertical pin junction includes the following steps: Step S1: The InGaAs / InP / SiO2 / Si bonded wafer is ultrasonically cleaned and then dried. Step S2: Passivation layer preparation and window opening: An Al2O3 layer is grown on the surface of the InGaAs / InP / SiO2 / Si substrate as a passivation layer using atomic layer deposition technology. Then, a circular pattern is photolithographically etched on the center of the upper surface of the InGaAs layer, and a circular area is etched using wet etching process to facilitate subsequent contact with the PdSe2 thin film.

[0034] Step S3: PdSe2 film transfer: Spin-coat a layer of PMMA adhesive onto the surface of the PdSe2 film, and peel off the PdSe2 layer evenly and completely using an etchant. Then, immerse the clean substrate prepared in step S2 below the liquid surface, align it with the floating film, and allow the film to adhere to the substrate under the surface tension of the water at an extremely slow speed. Finally, remove the PMMA adhesive.

[0035] Step S4: Define the effective area of ​​the thin film: Use PECVD deposition technology to deposit a layer of SiO2 as a protective layer on the surface of the PdSe2 thin film that has been transferred to the substrate. Then, use photolithography and ICP etching processes to pattern the PdSe2 thin film and define the effective photosensitive area. Finally, etch away the SiO2 layer and PdSe2 thin film outside the pattern.

[0036] Step S5: Photolithography is performed on the PdSe2 thin film and the InP layer to deposit metal electrodes. Photoresist is spin-coated onto the semi-finished device prepared in step S4, and the electrode pattern is created by laser direct writing. The SiO2 layer on the PdSe2 thin film is etched away using ICP etching technology, and the metal electrodes are deposited by electron beam evaporation to obtain an optoelectronic device with electrodes.

[0037] In this embodiment, in step S1, the bonded sheet is placed in acetone solution, ethanol solution and deionized water for 10 min of ultrasonic cleaning and then dried.

[0038] In this embodiment, in step S3, a 25% sodium hydroxide solution is used as the etchant. By precisely controlling the solution concentration, temperature (room temperature), and etching time, the PdSe2 layer is ensured to be uniformly and completely peeled off. In step S3, after the film floats on the solution surface, it is repeatedly washed with deionized water 10 times to thoroughly remove residual alkali metal ions and other contaminants.

[0039] In this embodiment, in step S5, after the device completes the electron beam evaporation deposition of the metal electrode, excess photoresist and metal are removed with acetone, then soaked in alcohol, and finally dried using a spin coater to obtain the optoelectronic device with electrodes.

[0040] like Figure 3 The figure shows the absorption spectrum curves of the PdSe2 thin film and the PdSe2 / InGaAs / InP photodetector obtained in this embodiment. It can be seen that InGaAs has intrinsic absorption capability in the short-wave infrared band (e.g., 1310 nm, 1550 nm), while PdSe2, due to its tunable bandgap (0~1.3 eV), exhibits strong absorption characteristics over a wider spectral range (especially in the mid-infrared bands such as 1850 nm, 2200 nm). The infrared absorption of PdSe2 improves the photoelectric performance of the device in the near-infrared region.

[0041] Figure 4 The current-voltage characteristic curve of the photodetector obtained in this embodiment was tested under dark-illuminated conditions. Under a bias voltage of -2 V and an optical power of 10 nW, the device achieved a responsivity of 2.59 A / W at 1310 nm.

[0042] Figure 5 This is a normalized angle-resolved photocurrent polar plot extracted and fitted by the photodetector obtained in this embodiment under 1550 nm polarized light. At 0 V bias, the device exhibits a polarization extinction ratio as high as 408.6.

[0043] Figure 6 The specific detectivity of the photodetector obtained in this embodiment is 2.1 × 10¹¹ Jones under different light power illumination at a bias voltage of -2 V and a wavelength of 1310 m. The device has low dark current and is suitable for high-sensitivity polarization detection scenarios.

[0044] Unless otherwise stated, if any of the technical solutions disclosed in this invention specify a numerical range, then the disclosed numerical range is a preferred numerical range. Anyone skilled in the art should understand that the preferred numerical range is merely one among many feasible numerical values ​​that has a more obvious or representative technical effect. Because there are many numerical values, it is impossible to list them all. Therefore, this invention discloses only some numerical values ​​to illustrate the technical solutions of this invention. Furthermore, the numerical values ​​listed above should not constitute a limitation on the scope of protection of this invention.

[0045] If the terms "first" or "second" are used in this document to specify components, those skilled in the art should know that the use of "first" or "second" is merely for the purpose of distinguishing components in description, and unless otherwise stated, the above terms have no special meaning.

[0046] If this invention discloses or relates to mutually fixedly connected components or structural parts, then, unless otherwise stated, a fixed connection can be understood as: a detachable fixed connection (e.g., using bolts or screws), or a non-detachable fixed connection (e.g., riveting, welding). Of course, mutually fixed connections can also be replaced by an integral structure (e.g., manufactured in one piece using a casting process) (except where it is obviously impossible to use an integral molding process).

[0047] Furthermore, the orientations or positional relationships used in any of the technical solutions disclosed in this invention above to indicate positional relationships, such as "longitudinal," "lateral," "up," "down," "front," "back," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," are based on the orientations or positional relationships shown in the accompanying drawings and are only for the convenience of describing this patent. They are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this patent. In addition, unless otherwise stated, the terms used to indicate shape in any of the technical solutions disclosed in this invention above include shapes that are similar to, close to, or approximate with it.

[0048] Any component provided by this invention can be assembled from multiple individual components or can be a single component manufactured by a one-piece molding process.

[0049] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them; although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications can still be made to the specific implementation of the present invention or equivalent substitutions can be made to some technical features without departing from the spirit of the technical solutions of the present invention, and all such modifications and substitutions should be covered within the scope of the technical solutions claimed in the present invention.

Claims

1. An on-chip polarization photodetector with a vertical pin junction, characterized in that: The device includes a substrate on which a vertical PIN junction is disposed. The vertical PIN junction includes an InP layer, an InGaAs layer, and a PdSe2 layer disposed sequentially from bottom to top. The InP layer is disposed on the substrate. The InGaAs layer is located in the middle of the upper surface of the InP layer and does not completely cover the upper surface of the InP layer. A first electrode is disposed on the area of ​​the InP layer not covered by the InGaAs layer. A second electrode is disposed on the PdSe2 layer.

2. The photodetector according to claim 1, characterized in that: A passivation layer is disposed on the surface of the bonded sheet composed of the substrate, the InP layer, and the InGaAs layer. A groove is etched on the passivation layer to connect with the InGaAs layer. The PdSe2 layer covers the passivation layer of the bonded sheet composed of the substrate, the InP layer, and the InGaAs layer. The PdSe2 layer does not completely cover the passivation layer of the combination of the substrate and the InP layer. The PdSe2 layer covers the groove and is connected to the InGaAs layer.

3. The photodetector according to claim 2, characterized in that: A first electrode groove connected to the InP layer is etched on the passivation layer covered by the InP layer in the area not covered by the PdSe2 layer. The first electrode is photolithographically deposited in the first electrode groove and on the InP layer. The first electrode groove is an arc ring with a central angle greater than 180°. The InGaAs layer is located at the center of the first electrode groove, and the two ends of the first electrode groove extend outward.

4. The photodetector according to claim 2, characterized in that: The PdSe2 layer extends outward from between the two ends of the first electrode groove. A protective layer covers the PdSe2 layer. A second electrode groove communicating with the PdSe2 layer is etched on the upper surface of the protective layer in the extended region of the PdSe2 layer. The second electrode is photolithographically deposited in the second electrode groove and on the PdSe2 layer.

5. The photodetector according to claim 2, characterized in that: The InP layer and the InGaAs layer are concentric cylindrical structures with different diameters. The groove region on the InGaAs layer is a circular region with a smaller diameter than the InGaAs layer and concentric with the InGaAs layer.

6. The photodetector according to claim 2, characterized in that: The substrate is made of SiO2 / Si, the protective layer is made of SiO2, the passivation layer is made of Al2O3, and the first electrode and the second electrode are made of Ti / Ag.

7. A method for fabricating an on-chip polarization photodetector with a vertical pin junction, employing the photodetector as described in any one of claims 2-5, characterized in that: Includes the following steps: Step S1: The InGaAs / InP / SiO2 / Si bonded wafer is ultrasonically cleaned and then dried. Step S2: Passivation layer preparation and window opening: An Al2O3 layer is grown on the surface of the InGaAs / InP / SiO2 / Si substrate as a passivation layer by atomic layer deposition technology. Then, a circular pattern is photolithographically etched on the middle of the upper surface of the InGaAs layer, and a circular area is etched by wet etching process to facilitate subsequent contact with the PdSe2 thin film. Step S3: PdSe2 film transfer: Spin-coat a layer of PMMA adhesive onto the surface of the PdSe2 film, and peel off the PdSe2 layer evenly and completely using an etchant. Then, immerse the clean substrate prepared in step S2 below the liquid surface, align it with the floating film, and allow the film to adhere to the substrate under the surface tension of the water at an extremely slow speed. Finally, remove the PMMA adhesive. Step S4: Define the effective area of ​​the thin film: Use PECVD deposition technology to deposit a layer of SiO2 as a protective layer on the surface of the PdSe2 thin film that has been transferred to the substrate. Then, use photolithography and ICP etching processes to pattern the PdSe2 thin film and define the effective photosensitive area. Finally, etch away the SiO2 layer and PdSe2 thin film outside the pattern. Step S5: Photolithography is performed on the PdSe2 thin film and the InP layer to deposit metal electrodes. Photoresist is spin-coated onto the semi-finished device prepared in step S4, and the electrode pattern is created by laser direct writing. The SiO2 layer on the PdSe2 thin film is etched away using ICP etching technology, and the metal electrodes are deposited by electron beam evaporation to obtain an optoelectronic device with electrodes.

8. The manufacturing method according to claim 7, characterized in that: In step S1, the bonded sheet is placed in acetone solution, ethanol solution and deionized water for 10 min of ultrasonic cleaning and then dried.

9. The manufacturing method according to claim 7, characterized in that: In step S3, a 25% sodium hydroxide solution is used as the etchant. By precisely controlling the solution concentration, temperature (room temperature), and etching time, the PdSe2 layer is ensured to be uniformly and completely peeled off. In step S3, after the film floats on the solution surface, it is repeatedly washed with deionized water 10 times to thoroughly remove residual alkali metal ions and other contaminants.

10. The manufacturing method according to claim 7, characterized in that: In step S5, after the device completes the electron beam evaporation deposition of metal electrodes, excess photoresist and metal are removed with acetone, then soaked in alcohol, and finally dried using a spin coater to obtain the optoelectronic device with electrodes.

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