Method for processing multiple mandatory assignment statements of line network signal, electronic equipment and medium
By recording the mapping relationship between net signals and top-level signal bits during the compilation phase and dynamically managing the forced assignment module during the simulation phase, the problem of wasted time and memory during net signal updates is solved, thus improving system performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- 成都融见软件科技有限公司
- Filing Date
- 2026-01-27
- Publication Date
- 2026-05-08
AI Technical Summary
In the current technology, the forced assignment statement processing of wire signals requires updating all connected wire signals in the entire design at the same time, which leads to a waste of time and memory space and reduces system performance.
By recording the mapping relationship between net signals and top-level signal bits during the compilation phase and dynamically managing the forced assignment module during the simulation phase, only valid forced assignment modules are updated, reducing useless calculations.
This greatly saves simulation memory space and compilation analysis time, thus improving system performance.
Smart Images
Figure CN121996701A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of digital simulation technology, and in particular to a method for processing multiple forced assignment statements for wireline signals, an electronic device, and a medium. Background Technology
[0002] Forced assignment statements are used to forcibly modify signal values during simulation, and any value driven by the system cannot affect the forcibly assigned signal value. Net signals are connected through module ports, and corresponding bits may exist in different net signals, but they should be considered the same bit and their changes should be consistent. In existing technologies, when a forced assignment statement for a net signal occurs, if there are connected net signals, forced assignment update statements need to be performed simultaneously on all connected net signals in the entire design. The effective range of forced assignment update statements needs to be maintained for each different net signal. In scenarios with numerous connected ports and many different connected net signals, this consumes a significant amount of time and memory, reducing system performance. Summary of the Invention
[0003] The purpose of this invention is to provide a method, electronic device, and medium for processing multiple forced assignment statements for wire network signals, which reduces the time and memory required and improves system performance.
[0004] According to a first aspect of the present invention, a method for processing multiple forced assignment statements for wire mesh signals is provided, comprising: Step S1, during the compilation phase: based on {A1,A2,...,A... n ,...,A N Determine the target wire network signal, A n This refers to the nth target object in the chip design code that is a net signal, where n ranges from 1 to N, and n represents the total number of target object forced assignment statements for net signals in the chip design code. The target net signal is defined as the net signal itself and the signals interconnected with it having more than one corresponding A. n And at least one corresponding A n The assigned value contains a wire mesh signal of a signal variable; Step S2, Obtain A n The corresponding target object's i-th signal bit W i n The corresponding top-level signal bit information T i n and W i n and T i n The mapping relationship is recorded in the relational database, where the value of i ranges from 1 to f(n), and f(n) is A. n The total number of corresponding target object bits; Step S3, for A n Configure for executing A n Forced assignment module B n ; Step S4: During the simulation phase, when the A of the target wire mesh signal... n When it occurs, acquire the A of the target wire network signal that is currently occurring. n Corresponding target B n And the corresponding target T in the relational database i n ; Step S5: Determine if target T exists in the dynamic database. i n With the current action acting on the target T i n If the mapping relationship of the forced assignment module exists, then proceed to step S6; otherwise, proceed to step S7. Step S6: If target T in the dynamic database i n The current corresponding forced assignment module is not the target B. n If so, delete the mapping relationship from the dynamic database and proceed to step S7; Step S7: Convert the A signal of the currently occurring target wire network signal n The corresponding T i n With target B n The mapping relationship is added to the dynamic database; Step S8, when the target wire network signal A n When the assigned value changes, obtain the A value of the target wire mesh signal that has changed. n Corresponding change B n And the corresponding changes T in the relational database i n and changes W i n If the change T i n The dynamic database contains the current change T that is currently acting on this change. i n The forced assignment module and is a variable B n Then based on the change B n For change B n The corresponding change W i n Perform a forced assignment update operation; otherwise, change B. n Do not perform a forced assignment update operation.
[0005] According to a second aspect of the present invention, an electronic device is provided, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being configured to perform the method described in the first aspect of the present invention.
[0006] According to a third aspect of the present invention, a computer-readable storage medium is provided, storing computer-executable instructions for performing the method described in the first aspect of the present invention.
[0007] Compared with existing technologies, this invention has significant advantages and beneficial effects. Through the above technical solution, the method, electronic device, and medium for processing multiple forced assignment statements for wire network signals provided by this invention achieve considerable technological advancement and practicality, and have broad industrial application value. It has at least the following beneficial effects: This invention records the mapping relationship between the active bits of each net signal and the top-level signal bits in a relational database. For each target object, a corresponding forced assignment module is set up for the net signal forced assignment statement. The target net signal is selected, and then the mapping relationship between the top-level signal and the forced assignment module is dynamically recorded in a dynamic database. By managing and maintaining the dynamic database, it is possible to distinguish whether the current forced assignment module is a valid module that needs to be updated before the forced assignment update action is executed. The dynamic database alone can replace the original method of storing valid data information in the target objects of each forced assignment statement, greatly saving simulation memory space, reducing analysis time during compilation, and improving system performance. Attached Figure Description
[0008] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0009] Figure 1 A flowchart illustrating the method for processing multiple forced assignment statements for wire mesh signals provided in an embodiment of the present invention. Detailed Implementation
[0010] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0011] This invention provides a method for processing multiple forced assignment statements for wire mesh signals, such as... Figure 1 As shown, it includes: Step S1, during the compilation phase: based on {A1,A2,...,A... n ,...,A N Determine the target wire network signal, A n This refers to the nth target object in the chip design code that is a net signal, where n ranges from 1 to N, and n represents the total number of target object forced assignment statements for net signals in the chip design code. The target net signal is defined as the net signal itself and the signals interconnected with it having more than one corresponding A. n And at least one corresponding A n The assigned value contains a wire network signal of a signal variable.
[0012] The target object is the left-hand side of the forced assignment expression, and the assignment content is the right-hand side of the forced assignment expression. Taking the forced assignment statement Force a[3] = b + c + d as an example, a[3] is the target object, b + c + d is the assignment content, and b, c, and d are the driving signals corresponding to the forced assignment statement. The target net signal is the net signal that can be optimized during the processing of multiple forced assignment statements of net signals.
[0013] Step S2, Obtain A n The corresponding target object's i-th signal bit W i n The corresponding top-level signal bit information T i n and W i n and T i n The mapping relationship is recorded in the relational database, where the value of i ranges from 1 to f(n), and f(n) is A. n The total number of bits involved in the corresponding target object.
[0014] It should be noted that the relational database is a pre-set database used to store the mapping relationship between the signal bits of the target object and the corresponding top-level signal, while the association database is initially empty. The digital simulation design is a hierarchical design, and the corresponding top-level signal bit can be obtained by searching upwards for the signal bit of each target object.
[0015] Step S3, for A n Configure for executing A n Forced assignment module B n .
[0016] It should be noted that steps S1-S3 are all operations performed during the compilation phase.
[0017] Step S4: During the simulation phase, when the A of the target wire mesh signal... n When it occurs, acquire the A of the target wire network signal that is currently occurring. n Corresponding target B n And the corresponding target T in the relational database i n .
[0018] It should be noted that digital simulation design may include one or more target net signals, and each target net signal corresponds to one or more A... n Each A n Corresponding to a B n Each A n Corresponding to one or more signal bits W i n Each W i n Corresponding to a T i n Therefore, each A n Corresponding to one or more T i n .
[0019] Step S5: Determine if target T exists in the dynamic database. i n With the current action acting on the target T i n If the mapping relationship of the forced assignment module exists, proceed to step S6; otherwise, proceed to step S7.
[0020] Among them, the dynamic database is a pre-configured database used to store T i n With the current action on this T i n The database of mapping relationships for the forced assignment module, it should be noted that T i n With the current action on this T i n The mapping relationship of the forced assignment module changes dynamically. In a digital simulation process, the same T... i n It may be driven by one or more force assignment modules, but can only be driven by one force assignment module at a time.
[0021] Step S6: If target T in the dynamic database i n The current corresponding forced assignment module is not the target B. n If so, delete the mapping relationship from the dynamic database and proceed to step S7.
[0022] It is understandable that if the target T in the dynamic database... i n The current corresponding forced assignment module is target B. n Then retain the target T currently stored in the dynamic database. i n With the current action acting on the target T i n The mapping relationship of the forced assignment module is sufficient; no updates are required.
[0023] Step S7: Convert the A signal of the currently occurring target wire network signal n The corresponding T i n With target B n The mapping relationship is added to the dynamic database.
[0024] Step S8, when the target wire network signal A n When the assigned value changes, obtain the A value of the target wire mesh signal that has changed. n Corresponding change B n And the corresponding changes T in the relational database i n and changes W i n If the change T i n The dynamic database contains the current change T that is currently acting on this change. i n The forced assignment module and is a variable B n Then based on the change B n For change B n The corresponding change W i n Perform a forced assignment update operation; otherwise, change B. n Do not perform a forced assignment update operation.
[0025] It should be noted that steps S4 through S8 are all operations performed during the simulation phase. Step S8 determines the change T... i n In the dynamic database, the corresponding pre-action applies to this change T. i n Is the forced assignment module a change for B? n Reduce the A of the target wire network signal n When the assigned value changes, the calculations that do not actually require a forced assignment update operation are reduced, thus reducing the execution of useless forced assignment update operations, reducing processing time, and improving system performance.
[0026] As one embodiment, in step S1, based on {A1,A2,...,A... n ,...,A N Determine the target wireline signal, including: Step S11: Search for A layer by layer through the ports to the top module. n The top-level signal of action, if A n If the assigned value contains a signal variable, then execute step S12. If A n If the assigned value is a constant, then step S13 is executed.
[0027] Step S12: Find A n The top-level signal setting updates the required flags.
[0028] Step S13: Find A n The number of forced assignments for the top-level signal is incremented by 1, and the initial number of forced assignments for each top-level signal is 0.
[0029] Step S14: If all A n If all processes are completed, proceed to step S15; otherwise, return to step S11.
[0030] Step S15: Determine the top-level signal that has been forcibly assigned more than once and has an update requirement flag set as the target top-level signal.
[0031] Step S16: Based on the top-level signal of each target, propagate downwards to A. n The corresponding wire mesh signal is determined as the target wire mesh signal.
[0032] It should be noted that steps S11-S16 acquire the target net signal at the signal granularity, rather than at the signal bit granularity. This will not affect the accuracy of the optimization process, and will save on the amount of data processing and the memory required for data processing.
[0033] As one embodiment, step S3 includes: Step S31, for A n Configure the corresponding forced assignment module B n .
[0034] Among them, A n Located in the process block, B n Set in the region outside of a procedural block. The region outside of a procedural block is similar to the region containing consecutive assignment statements; data in this region can change continuously until it stabilizes.
[0035] Step S32, B n Set to A nThe assignment contains a load of a signal variable, which will be B. n Set to A n Driven by.
[0036] Taking the forced assignment statement Force a[3] = b + c + d as an example, a forced assignment module is set up for this forced assignment statement. The forced assignment module is set as the load of b, c, and d. Changes in b, c, and d can drive the forced assignment module to run. The forced assignment module is set as the driver of signal a[3], which can drive the modification of the value of signal a[3].
[0037] Step S33, in B n Record A n The target object's scope and the assigned value.
[0038] Step S34, in B n Set up a state machine in B n The default state of the state machine in B is inactive. n Forced assignment update operations are not performed when the system is inactive.
[0039] As one embodiment, step S31 includes: Step S311, for each A n Set a corresponding index number.
[0040] Step S312, for each A n Set up a corresponding forced assignment module B n And for B n With A n Same index number.
[0041] It should be noted that each A n and the corresponding B n A has the same index number and is built based on the same index number. n and the corresponding B n The mapping relationship.
[0042] As one embodiment, step S4 includes: Step S41: During the simulation phase, when the A of the target wire mesh signal... n When it occurs, acquire the A of the target wire network signal that is currently occurring. n Corresponding target B n .
[0043] Specifically, it can obtain the A of the target wire network signal that is currently occurring. n B with the same corresponding index number n As target B n .
[0044] Step S42: Move target B n The state machine in the process is updated to an active state.
[0045] Step S43: Retrieve the A of the currently occurring target wire network signal from the relational database. n The corresponding W i n and T i n The mapping relationship is used to determine the A of the target wire network signal. n Corresponding target T i n .
[0046] As one embodiment, step S8 includes: Step S81, when the target wire network signal A n When the assigned value changes, obtain the A value of the target wire mesh signal that has changed. n Corresponding change B n And the corresponding changes T in the relational database i n .
[0047] Step S82, if change B n If the state machine in the process is inactive, then change B... n If the forced assignment update operation is not performed, and the state is active, then step S83 is executed.
[0048] It should be noted that in the prior art, once the driving signal changes, the calculation of the assignment content of the forced assignment statement will be triggered. After the calculation is completed, it is then determined whether the forced assignment statement is effective. However, many forced assignment statements are often ineffective, resulting in the assignment content calculation becoming a useless calculation. The embodiments of the present invention can effectively avoid the occurrence of useless calculations by using the state machine in the forced assignment module, thereby reducing processing time and improving system performance.
[0049] Step S83, if the change T i n The dynamic database contains the current change T that is currently acting on this change. i n The forced assignment module and is a variable B n If so, proceed to step S84; otherwise, change B. n Do not perform a forced assignment update operation.
[0050] It should be noted that by using records in the dynamic database, it is possible to further filter out forced assignment update operations that do not need to be executed at present, and only perform the corresponding calculations on the forced assignment statements that really need to be executed, thereby reducing processing time and improving system performance.
[0051] Step S84, Change B n Based on the corresponding assignment content, obtain the corresponding driving value, and then forcibly assign the corresponding driving value to the change B. n The corresponding change W i n End the process or return to step S81.
[0052] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.
[0053] It should be noted that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although the flowcharts describe the steps as sequential processes, many of these steps can be performed in parallel, concurrently, or simultaneously. Furthermore, the order of the steps can be rearranged. A process can be terminated when its operation is complete, but it may also have additional steps not included in the figures. A process can correspond to a method, function, procedure, subroutine, subroutine, etc.
[0054] This invention also provides an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being configured to perform the method described in this invention.
[0055] This invention also provides a computer-readable storage medium storing computer-executable instructions for performing the methods described in this invention.
[0056] This invention, through recording the mapping relationship between the active bits of each net signal and the top-level signal bits in a forced assignment statement in a relational database, sets a corresponding forced assignment module for each target object as a net signal forced assignment statement, selects the target net signal, and then dynamically records the mapping relationship between the top-level signal and the forced assignment module in a dynamic database. By managing and maintaining the dynamic database, it can distinguish whether the current forced assignment module is a valid module that needs to be updated before the forced assignment update action is executed. The dynamic database can replace the original method of storing each valid data information in the target objects of each forced assignment statement, greatly saving simulation memory space, reducing the analysis time during compilation, and improving system performance.
[0057] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.
Claims
1. A method for processing multiple forced assignment statements for wire mesh signals, characterized in that, include: Step S1, during the compilation phase: based on {A1,A2,...,A... n ,...,A N Determine the target wire network signal, A n This refers to the nth target object in the chip design code that is a net signal, where n ranges from 1 to N, and n represents the total number of target object forced assignment statements for net signals in the chip design code. The target net signal is defined as the net signal itself and the signals interconnected with it having more than one corresponding A. n And at least one corresponding A n The assigned value contains a wire mesh signal of a signal variable; Step S2, Obtain A n The corresponding target object's i-th signal bit W i n The corresponding top-level signal bit information T i n and W i n and T i n The mapping relationship is recorded in the relational database, where the value of i ranges from 1 to f(n), and f(n) is A. n The total number of corresponding target object bits; Step S3, for A n Configure for executing A n Forced assignment module B n ; Step S4: During the simulation phase, when the A of the target wire mesh signal... n When it occurs, acquire the A of the target wire network signal that is currently occurring. n Corresponding target B n And the corresponding target T in the relational database i n ; Step S5: Determine if target T exists in the dynamic database. i n With the current action acting on the target T i n If the mapping relationship of the forced assignment module exists, then proceed to step S6; otherwise, proceed to step S7. Step S6: If target T in the dynamic database i n The current corresponding forced assignment module is not the target B. n If so, delete the mapping relationship from the dynamic database and proceed to step S7; Step S7: Convert the A signal of the currently occurring target wire network signal n The corresponding T i n With target B n The mapping relationship is added to the dynamic database; Step S8, when the target wire network signal A n When the assigned value changes, obtain the A value of the target wire mesh signal that has changed. n Corresponding change B n And the corresponding changes T in the relational database i n and changes W i n If the change T i n The dynamic database contains the current change T that is currently acting on this change. i n The forced assignment module and is a variable B n Then based on the change B n For change B n The corresponding change W i n Perform a forced assignment update operation; otherwise, change B. n Do not perform a forced assignment update operation.
2. The method according to claim 1, characterized in that, In step S1, based on {A1,A2,...,A... n ,...,A N Determine the target wireline signal, including: Step S11: Search for A layer by layer through the ports to the top module. n The top-level signal of action, if A n If the assigned value contains a signal variable, then execute step S12. If A n If the assigned value is a constant, then proceed to step S13; Step S12: Find A n The top-level signal setting updates the required flags; Step S13: Find A n The number of forced assignments of the top-level signal is incremented by 1, and the number of forced assignments of each top-level signal is initially 0. Step S14: If all A n If all processes are completed, proceed to step S15; otherwise, return to step S11. Step S15: Determine the top-level signal that has been forcibly assigned more than once and has an update requirement flag set as the target top-level signal; Step S16: Based on the top-level signal of each target, propagate downwards to A. n The corresponding wire mesh signal is determined as the target wire mesh signal.
3. The method according to claim 1, characterized in that, Step S3 includes: Step S31, for A n Configure the corresponding forced assignment module B n ; Step S32, B n Set to A n The assignment contains a load of a signal variable, which will be B. n Set to A n Driven by; Step S33, in B n Record A n The target object's scope and the assigned value; Step S34, in B n Set up a state machine in B n The default state of the state machine in B is inactive. n Forced assignment update operations are not performed when the system is inactive.
4. The method according to claim 3, characterized in that, Step S4 includes: Step S41: During the simulation phase, when the A of the target wire mesh signal... n When it occurs, acquire the A of the target wire network signal that is currently occurring. n Corresponding target B n ; Step S42: Move target B n The state machine in the process is updated to an active state; Step S43: Retrieve the A of the currently occurring target wire network signal from the relational database. n The corresponding W i n and T i n The mapping relationship is used to determine the A of the target wire network signal. n Corresponding target T i n .
5. The method according to claim 4, characterized in that, Step S8 includes: Step S81, when the target wire network signal A n When the assigned value changes, obtain the A value of the target wire mesh signal that has changed. n Corresponding change B n And the corresponding changes T in the relational database i n and changes W i n ; Step S82, if change B n If the state machine in the process is inactive, then change B... n If the forced assignment update operation is not performed, and the state is active, then step S83 is executed. Step S83, if the change T i n The dynamic database contains the current change T that is currently acting on this change. i n The forced assignment module and is a variable B n If so, proceed to step S84; otherwise, change B. n Do not perform a forced assignment update operation; Step S84, Change B n Based on the corresponding assignment content, obtain the corresponding driving value, and then forcibly assign the corresponding driving value to the change B. n The corresponding change W i n End the process or return to step S81.
6. An electronic device, characterized in that, include: At least one processor; And, a memory communicatively connected to the at least one processor; The memory stores instructions that are executed by the at least one processor, the instructions being configured to perform the method of any one of claims 1-5.
7. A computer-readable storage medium, characterized in that, The device stores computer-executable instructions for performing the method of any one of claims 1-5.