MEMS differential capacitive z-axis accelerometer without cross-axis interference and preparation method of MEMS differential capacitive z-axis accelerometer

Abstract

The invention provides an MEMS differential capacitive z-axis accelerometer without cross-axis interference and a preparation method thereof, and relates to the technical field of sensors, the accelerometer adopts two (111) crystal orientation silicon wafers to be bonded to form a sandwich structure, the accelerometer comprises a first silicon wafer provided with a first fixed electrode and a first cavity, and a second silicon wafer provided with a second fixed electrode and a second cavity, and a movable mass block, an elastic beam, a second cavity, a movable electrode and a second fixed electrode are integrated in the second silicon wafer. The areas of the upper fixed electrode and the lower fixed electrode are both larger than the area of the middle movable electrode, so that the effective sensing area is constant, and cross axis interference is eliminated from the structure source. The preparation method combines key processes of deep reactive ion etching, TMAH anisotropic wet etching and gold-gold thermocompression bonding. The method has the advantages of high sensitivity, excellent linearity and strong common-mode rejection capability, and is suitable for the field of inertial measurement with strict requirements on precision and stability.

Description

Technical Field

[0001] This invention relates to the field of sensor technology, and more specifically, to a MEMS differential capacitive z-axis accelerometer without cross-axis interference and its fabrication method. Background Technology

[0002] Microelectromechanical systems (MEMS) accelerometers, as inertial sensors manufactured based on semiconductor micromachining technology, have become core devices in consumer electronics, automotive industry, Internet of Things, aerospace and other fields for measuring physical parameters such as acceleration, tilt angle and vibration due to their significant advantages such as small size, low cost, high reliability and suitability for mass production.

[0003] With the rapid development of drones, autonomous driving technology, and various portable smart devices, higher demands are being placed on the performance of micro inertial measurement units (IMUs). Among these, triaxial MEMS accelerometers capable of achieving three-dimensional inertial sensing are a key research focus. Z-axis accelerometers, which are used to sense acceleration perpendicular to the chip plane, have become an important research direction in the field of MEMS sensors due to their higher design and manufacturing difficulty and the fact that their performance directly determines the accuracy of three-dimensional measurements.

[0004] Currently, mainstream Z-axis MEMS accelerometers mainly adopt a "sandwich" structure or a torsion pendulum structure based on the principle of variable spacing capacitance detection of parallel plates.

[0005] Torsional pendulum Z-axis accelerometers have attracted attention due to their good compatibility with the manufacturing processes of in-plane accelerometers. However, this torsional pendulum structure based on a single mass block has inherent drawbacks: First, it has poor suppression of common-mode interference caused by environmental factors such as temperature changes; second, in terms of structural design, in order to improve the mechanical sensitivity of Z-axis acceleration detection, it is often necessary to sacrifice the performance in other directions, resulting in a simultaneous increase in its sensitivity to cross-interference in the X and Y axes, which seriously restricts its measurement accuracy in complex motion environments.

[0006] On the other hand, although the "sandwich" structure based on the principle of variable-gap capacitors of parallel plates can theoretically achieve higher displacement sensitivity, it still faces many challenges in practical applications: The problem of cross-axis interference is prominent: when the sensor is subjected to in-plane (X / Y axis) acceleration, the movable mass block will undergo in-plane displacement, which will change the effective facing area between it and the upper and lower fixed plates, thereby generating parasitic capacitance signals, which seriously interfere with the measurement accuracy of Z-axis acceleration.

[0007] Edge electric field effect introduces nonlinearity: The edge electric field of a parallel plate capacitor introduces significant nonlinear error, which limits the dynamic range and measurement linearity of the sensor.

[0008] Insufficient anti-interference capability: Traditional single-ended capacitor detection structures have limited ability to suppress common-mode interference (such as temperature drift and environmental noise), which affects the long-term stability and temperature stability of the sensor.

[0009] Therefore, there is an urgent need in this field for a Z-axis MEMS accelerometer solution that can fundamentally suppress cross-axis interference while possessing high sensitivity, high linearity, and excellent common-mode interference immunity. Summary of the Invention

[0010] This invention solves the key technical problem of low measurement accuracy and poor environmental adaptability of traditional Z-axis accelerometers by combining a unique "constant effective area" differential capacitor design with a vertical stacking bonding process.

[0011] This invention provides a MEMS differential capacitance z-axis accelerometer without cross-axis interference, comprising: The first silicon wafer has a first fixed electrode on its upper surface and a first cavity formed on its back side. The second silicon wafer is bonded to the first silicon wafer through a bonding layer; the interior of the second silicon wafer is provided with a movable mass block, a fixed frame surrounding the movable mass block, and an elastic beam connecting the movable mass block and the fixed frame; the movable mass block is capable of moving in a direction perpendicular to the plane of the second silicon wafer; the second silicon wafer is also provided with a second cavity for the movement of the movable mass block. The upper surface of the movable mass block is provided with a movable electrode, and the lower surface of the second silicon wafer is provided with a second fixed electrode. The first fixed electrode and the movable electrode are directly opposite each other, forming the first variable capacitor; The second fixed electrode and the movable electrode are directly opposite each other, forming a second variable capacitor; The first variable capacitor and the second variable capacitor form a differential capacitor pair.

[0012] In one possible implementation, the areas of both the first fixed electrode and the second fixed electrode are larger than the area of ​​the movable electrode.

[0013] In one possible implementation, the bonding layer is a metal bonding layer, which includes a first metal layer formed on the lower surface of the first silicon wafer, a second metal layer formed on the upper surface of the second silicon wafer, and an intermetallic compound layer formed by solid-state diffusion of the first metal layer and the second metal layer.

[0014] The second objective of this invention is to provide a method for fabricating a MEMS differential capacitance z-axis accelerometer, the method specifically comprising the following steps: S1. First silicon wafer fabrication step: A first silicon wafer is provided, a first fixed electrode is formed on its upper surface, and a first cavity is formed on its back side by micro-machining process; S2, Second silicon wafer fabrication steps: A second silicon wafer is provided, and a movable mass block, an elastic beam, and a second cavity are formed inside it through microfabrication technology; a movable electrode is formed on the upper surface of the movable mass block, and a second fixed electrode is formed on the lower surface of the second silicon wafer; S3. Bonding step: The back surface of the first silicon wafer is bonded to the upper surface of the second silicon wafer through a bonding layer.

[0015] In one possible implementation, the first silicon wafer fabrication step includes: S11. A first silicon wafer is provided, and a silicon oxide layer is prepared on both the upper and lower surfaces using a plasma-enhanced chemical vapor deposition method. S12. On the front side of the first silicon wafer, metal is deposited and patterned by magnetron sputtering to form the first fixed electrode, lead wire and pad. S13. A silicon nitride layer is deposited on the front side of the first silicon wafer for insulation protection, and a reactive ion etching process is used to expose the pads of the first fixed electrode. S14. The back side is deposited and patterned with metal by magnetron sputtering to form a first metal layer for bonding; S15. The silicon oxide layer at the groove is removed on the back side using reactive ion etching. S16 forms the first cavity on the back side of the first silicon wafer using a deep reactive ion etching process.

[0016] In one possible implementation, the second silicon wafer fabrication step includes: S21. A second silicon wafer is provided, and a silicon oxide layer is prepared on both the upper and lower surfaces using a plasma-enhanced chemical vapor deposition method. S22. On the front side of the second silicon wafer, the outlines of the elastic beam and the movable mass block and the initial trench are patterned and etched by reactive ion etching and deep reactive ion etching processes. S23. A silicon oxide thin film is deposited on the upper and lower surfaces of the second silicon wafer by a low-pressure chemical vapor deposition process; S24. The silicon oxide at the bottom of the initial trench is removed by reactive ion etching, and then the initial trench is further etched by deep reactive ion etching. S25. A gold layer is deposited and patterned on the front side of the second silicon wafer using a magnetron sputtering process to form movable electrodes, leads, pads, and a second metal layer; simultaneously, a gold layer is deposited and patterned on the back side of the second silicon wafer using a magnetron sputtering process to form a second fixed electrode, leads, and pads. S26. A silicon nitride layer is deposited on the back side of the second silicon wafer for insulating protection; S27. Perform anisotropic wet etching on the front side of the second silicon wafer, and lateral etching to form the second cavity, thereby releasing the movable mass block.

[0017] In one possible implementation, the anisotropic wet etching process used to form the second cavity employs TMAH etching solution.

[0018] In one possible implementation, the bonding step is specifically a gold-gold hot-press bonding process, wherein the bonding layer is formed by hot-press bonding a first metal layer formed on the back of the first silicon wafer and a second metal layer formed on the upper surface of the second silicon wafer to form a solid diffusion interface.

[0019] In one possible implementation, a via fabrication step is included after the bonding step: On the top layer of the bonded device, through-holes are formed by etching to expose the pads of the movable electrode; The pads of the second fixed electrode are exposed on the lower layer of the bonded device.

[0020] In one possible implementation, both the first silicon wafer and the second silicon wafer are (111) oriented silicon wafers.

[0021] Compared with the prior art, the present invention has the following beneficial effects: (1) By using the “constant effective area” design, the cross-axis interference is suppressed from the structural source. The innovative design of the upper plate area is always larger than the middle movable plate in motion, which ensures that the effective facing area of ​​the sensitive capacitor remains constant within the expected range of motion and cross-axis displacement, and achieves better inter-axis isolation than the traditional structure.

[0022] (2) Utilizing the variable-pitch differential detection principle, it combines high sensitivity with superior linearity. The high-sensitivity variable-pitch principle is combined with the differential structure. The differential output not only doubles the effective signal, but more importantly, the inherent nonlinear terms of the two variable-pitch capacitors cancel each other out when the difference is calculated, thereby achieving extremely high overall linearity over a wide range and reducing the dependence on complex linearization correction algorithms.

[0023] (3) A vertically stacked double-layer structure was adopted to achieve full differential detection under the premise of miniaturization. A complete differential sensing unit was constructed in a compact vertical space. This design successfully solved the traditional contradiction between high-precision differential detection and chip miniaturization. Attached Figure Description

[0024] Figure 1This is a schematic diagram of the planar layout structure of the main functional layers of a MEMS differential capacitive Z-axis accelerometer without cross-axis interference according to the present invention. Figure 2 This diagram illustrates the fabrication process of a MEMS differential capacitive Z-axis accelerometer without cross-axis interference. Detailed Implementation

[0025] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, specific embodiments of the present invention are described in detail below. It should be noted that the following embodiments are only used to illustrate the implementation methods and typical parameters of the present invention, and are not intended to limit the parameter range described in the present invention. Reasonable variations derived therefrom are still within the protection scope of the claims of the present invention.

[0026] It should be noted that the endpoints and any values ​​of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoint values ​​of the various ranges, the endpoint values ​​of the various ranges and individual point values, and individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed herein.

[0027] Unless otherwise defined, all terms, symbols, and other scientific terms used herein are intended to have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. In some instances, terms having a conventional meaning are defined herein for clarification or ease of reference, and such definitions should not be construed as indicating a significant difference from conventional understanding in the art. The technical methods described or referenced herein are generally well understood by those skilled in the art and employed by conventional methods. Unless otherwise stated, the use of commercially available kits, reagents, and instruments shall be performed according to the manufacturer's instructions and parameters.

[0028] This invention relates to a potentiometric micro / nano sensor based on MEMS silicon-based technology. A micro-truncated array structure is constructed on the surface of its sensing area, physically dividing the sensor's functional area into a detection zone and a self-cleaning zone. The detection zone is used to load specific sensitive materials for target analyte detection, while the self-cleaning zone is loaded with photocatalytic materials (such as TiO2) to achieve photocatalytic degradation of organic pollutants. This structure cleverly utilizes fluid dynamics principles to achieve an active anti-fouling mechanism of "zonal decontamination and synergistic effect": the upper surface of the truncated pyramids utilizes high shear force to form an "active defense zone," effectively inhibiting pollutant adsorption and ensuring detection accuracy; the lower surface of the truncated pyramids utilizes a low flow rate effect to form an "active purification zone," enriching and photocatalytically removing pollutants, achieving self-regeneration. The reference electrode adopts a multi-layered structure design, slowing down the loss rate of the salt matrix and significantly improving the reference electrode's lifespan. This invention, through a unique surface zoning design combined with micro / nano manufacturing processes and a multi-layered structure design, solves the key technical challenges of traditional potentiometric sensors, such as rapid signal drift and short online in-situ monitoring lifespan due to the susceptibility of the sensitive membrane to contamination and the short lifespan of the reference electrode.

[0029] This invention provides a MEMS differential capacitance z-axis accelerometer without cross-axis interference, comprising: The first silicon wafer has a first fixed electrode on its upper surface and a first cavity formed on its back side. The second silicon wafer is bonded to the first silicon wafer through a bonding layer; the interior of the second silicon wafer is provided with a movable mass block, a fixed frame surrounding the movable mass block, and an elastic beam connecting the movable mass block and the fixed frame; the movable mass block is capable of moving in a direction perpendicular to the plane of the second silicon wafer; the second silicon wafer is also provided with a second cavity for the movement of the movable mass block. The upper surface of the movable mass block is provided with a movable electrode, and the lower surface of the second silicon wafer is provided with a second fixed electrode. The first fixed electrode and the movable electrode are directly opposite each other, forming the first variable capacitor; The second fixed electrode and the movable electrode are directly opposite each other, forming a second variable capacitor; The first variable capacitor and the second variable capacitor form a differential capacitor pair.

[0030] In one possible implementation, the areas of both the first fixed electrode and the second fixed electrode are larger than the area of ​​the movable electrode.

[0031] In one possible implementation, the bonding layer is a metal bonding layer, which includes a first metal layer formed on the lower surface of the first silicon wafer, a second metal layer formed on the upper surface of the second silicon wafer, and an intermetallic compound layer formed by solid-state diffusion of the first metal layer and the second metal layer.

[0032] The second objective of this invention is to provide a method for fabricating a MEMS differential capacitance z-axis accelerometer, the method specifically comprising the following steps: S1. First silicon wafer fabrication step: A first silicon wafer is provided, a first fixed electrode is formed on its upper surface, and a first cavity is formed on its back side by micro-machining process; S2, Second silicon wafer fabrication steps: A second silicon wafer is provided, and a movable mass block, an elastic beam, and a second cavity are formed inside it through microfabrication technology; a movable electrode is formed on the upper surface of the movable mass block, and a second fixed electrode is formed on the lower surface of the second silicon wafer; S3. Bonding step: The back surface of the first silicon wafer is bonded to the upper surface of the second silicon wafer through a bonding layer.

[0033] In one possible implementation, the first silicon wafer fabrication step includes: S11. A first silicon wafer is provided, and a silicon oxide layer is prepared on both the upper and lower surfaces using a plasma-enhanced chemical vapor deposition method. S12. On the front side of the first silicon wafer, metal is deposited and patterned by magnetron sputtering to form the first fixed electrode, lead wire and pad. S13. A silicon nitride layer is deposited on the front side of the first silicon wafer for insulation protection, and a reactive ion etching process is used to expose the pads of the first fixed electrode. S14. The back side is deposited and patterned with metal by magnetron sputtering to form a first metal layer for bonding; S15. The silicon oxide layer at the groove is removed on the back side using reactive ion etching. S16 forms the first cavity on the back side of the first silicon wafer using a deep reactive ion etching process.

[0034] In one possible implementation, the second silicon wafer fabrication step includes: S21. A second silicon wafer is provided, and a silicon oxide layer is prepared on both the upper and lower surfaces using a plasma-enhanced chemical vapor deposition method. S22. On the front side of the second silicon wafer, the outlines of the elastic beam and the movable mass block and the initial trench are patterned and etched by reactive ion etching and deep reactive ion etching processes. S23. A silicon oxide thin film is deposited on the upper and lower surfaces of the second silicon wafer by a low-pressure chemical vapor deposition process; S24. The silicon oxide at the bottom of the initial trench is removed by reactive ion etching, and then the initial trench is further etched by deep reactive ion etching. S25. A gold layer is deposited and patterned on the front side of the second silicon wafer using a magnetron sputtering process to form movable electrodes, leads, pads, and a second metal layer; simultaneously, a gold layer is deposited and patterned on the back side of the second silicon wafer using a magnetron sputtering process to form a second fixed electrode, leads, and pads. S26. A silicon nitride layer is deposited on the back side of the second silicon wafer for insulating protection; S27. Perform anisotropic wet etching on the front side of the second silicon wafer, and lateral etching to form the second cavity, thereby releasing the movable mass block.

[0035] In one possible implementation, the anisotropic wet etching process used to form the second cavity employs TMAH etching solution.

[0036] In one possible implementation, the bonding step is specifically a gold-gold hot-press bonding process, wherein the bonding layer is formed by hot-press bonding a first metal layer formed on the back of the first silicon wafer and a second metal layer formed on the upper surface of the second silicon wafer to form a solid diffusion interface.

[0037] In one possible implementation, a via fabrication step is included after the bonding step: On the top layer of the bonded device, through-holes are formed by etching to expose the pads of the movable electrode; The pads of the second fixed electrode are exposed on the lower layer of the bonded device.

[0038] In one possible implementation, both the first silicon wafer and the second silicon wafer are (111) oriented silicon wafers.

[0039] The preparation method of the present invention is described below with reference to one specific embodiment.

[0040] S1. Select the first 4-inch double-sided polished and standard-cleaned 111 crystal orientation silicon wafer. After cleaning, the surface flatness of the silicon wafer is less than 0.1μm. Prepare 0.2μm of silicon oxide on both sides using plasma-enhanced chemical vapor deposition (PECVD). S2. Gold 200nm is deposited and patterned on the front side using magnetron sputtering to form the first fixed electrode plate, lead wire and pad. S3. A 400nm silicon nitride layer is deposited on the front side for insulation protection. The silicon nitride on the gold pads is etched using reactive ion etching process to expose the gold pads so that signals can be brought out. S4. The back side is deposited with 500nm gold using magnetron sputtering and patterned to form the first metal layer for bonding. S5. Reactive ion etching (RIE) is used on the back side to remove the 0.2μm thick silicon oxide at the groove opening; S6. The back side is formed by deep reactive ion etching (DRIE) to create a cavity with a thickness of 20μm; S7. Select a second 4-inch double-sided polished and standard-cleaned 111 crystal orientation silicon wafer. After cleaning, the surface flatness of the silicon wafer is less than 0.1μm. Prepare 0.2μm of silicon oxide on both sides using plasma-enhanced chemical vapor deposition (PECVD). S8. The front side uses ion etching (RIE) process to pattern the folded beam and mass block pattern, and then uses deep etching process to etch silicon to a depth of 10μm to form an etching groove, which is also the thickness of the folded beam and mass block. S9. A 0.4 μm silicon oxide thin film is deposited by low-pressure chemical vapor deposition (LPCVD). S10. The front side uses a high-alignment RIE process to remove the silicon oxide at the bottom of the etching tank, forming a sidewall protection for the etching tank. The side silicon of the tank wall is protected by a layer of silicon oxide. Then, a deep etching process is used to deepen the depth of the tank by 20μm (the thickness of the cavity). The deepened part is the exposed silicon without sidewall protection. S11. The front side uses magnetron sputtering to deposit 500nm of gold and pattern it to form movable electrodes, leads and pads, and a second metal layer; the back side uses magnetron sputtering to deposit 200nm of gold and pattern it to form a second fixed electrode, leads and pads. S12, 400nm silicon nitride is deposited on the back side for insulation protection; S13. With photoresist protecting the front side except for the etching tank, the wafer after the above treatment is placed in TMAH etching solution for 5 hours to form a hexagonal cavity. S14. The lower layer of the first silicon wafer and the upper layer of the second silicon wafer are bonded together with gold; S15. After bonding, perform photolithography to pattern vias (exposing the pads of the middle electrode plate). Use reactive ion etching to etch away the silicon nitride and silicon oxide in this area. Use deep reactive ion etching to etch silicon to create vias so that signals can be brought out. Use reactive ion etching on the back side to etch silicon nitride on the gold pads so that the gold pads can be exposed so that signals can be brought out.

[0041] A schematic diagram of the longitudinal structure of the MEMS differential capacitive Z-axis accelerometer without cross-axis interference obtained by the preparation method of steps S1-S15 of this invention is shown below. Figure 1 As shown. After dicing, wire bonding, and packaging, the accelerometer is ready for practical use. This accelerometer has significant advantages such as no cross-axis interference, high sensitivity, and high stability.

[0042] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A MEMS differential capacitive z-axis accelerometer without cross-axis interference, characterized in that, include: The first silicon wafer has a first fixed electrode on its upper surface and a first cavity formed on its back side. The second silicon wafer is bonded to the first silicon wafer through a bonding layer; the interior of the second silicon wafer is provided with a movable mass block, a fixed frame surrounding the movable mass block, and an elastic beam connecting the movable mass block and the fixed frame; the movable mass block is capable of moving in a direction perpendicular to the plane of the second silicon wafer; the second silicon wafer is also provided with a second cavity for the movement of the movable mass block. The upper surface of the movable mass block is provided with a movable electrode, and the lower surface of the second silicon wafer is provided with a second fixed electrode. The first fixed electrode and the movable electrode are directly opposite each other, forming the first variable capacitor; The second fixed electrode and the movable electrode are directly opposite each other, forming a second variable capacitor; The first variable capacitor and the second variable capacitor form a differential capacitor pair.

2. The MEMS differential capacitance z-axis accelerometer as described in claim 1, characterized in that, The areas of both the first fixed electrode and the second fixed electrode are larger than the area of ​​the movable electrode.

3. The MEMS differential capacitance z-axis accelerometer as described in claim 1, characterized in that, The bonding layer is a metal bonding layer, which includes a first metal layer formed on the lower surface of the first silicon wafer, a second metal layer formed on the upper surface of the second silicon wafer, and an intermetallic compound layer formed by solid-state diffusion of the first metal layer and the second metal layer.

4. A method for fabricating a MEMS differential capacitance z-axis accelerometer, characterized in that, The preparation method specifically includes the following steps: S1. First silicon wafer fabrication step: A first silicon wafer is provided, a first fixed electrode is formed on its upper surface, and a first cavity is formed on its back side by micro-machining process; S2, Second silicon wafer fabrication steps: A second silicon wafer is provided, and a movable mass block, an elastic beam, and a second cavity are formed inside it through microfabrication technology; a movable electrode is formed on the upper surface of the movable mass block, and a second fixed electrode is formed on the lower surface of the second silicon wafer; S3. Bonding step: The back surface of the first silicon wafer is bonded to the upper surface of the second silicon wafer through a bonding layer.

5. The preparation method according to claim 4, characterized in that, The first silicon wafer fabrication steps include: S11. A first silicon wafer is provided, and a silicon oxide layer is prepared on both the upper and lower surfaces using a plasma-enhanced chemical vapor deposition method. S12. On the front side of the first silicon wafer, metal is deposited and patterned by magnetron sputtering to form the first fixed electrode, lead wire and pad. S13. A silicon nitride layer is deposited on the front side of the first silicon wafer for insulation protection, and a reactive ion etching process is used to expose the pads of the first fixed electrode. S14. The back side is deposited and patterned with metal by magnetron sputtering to form a first metal layer for bonding; S15. The silicon oxide layer at the groove is removed on the back side using reactive ion etching. S16 forms the first cavity on the back side of the first silicon wafer using a deep reactive ion etching process.

6. The preparation method according to claim 4, characterized in that, The second silicon wafer fabrication step includes: S21. A second silicon wafer is provided, and a silicon oxide layer is prepared on both the upper and lower surfaces using a plasma-enhanced chemical vapor deposition method. S22. On the front side of the second silicon wafer, the outlines of the elastic beam and the movable mass block and the initial trench are patterned and etched by reactive ion etching and deep reactive ion etching processes. S23. A silicon oxide thin film is deposited on the upper and lower surfaces of the second silicon wafer by a low-pressure chemical vapor deposition process; S24. The silicon oxide at the bottom of the initial trench is removed by reactive ion etching, and then the initial trench is further etched by deep reactive ion etching. S25. A gold layer is deposited and patterned on the front side of the second silicon wafer using a magnetron sputtering process to form movable electrodes, leads, pads, and a second metal layer; simultaneously, a gold layer is deposited and patterned on the back side of the second silicon wafer using a magnetron sputtering process to form a second fixed electrode, leads, and pads. S26. A silicon nitride layer is deposited on the back side of the second silicon wafer for insulating protection; S27. Perform anisotropic wet etching on the front side of the second silicon wafer, and lateral etching to form the second cavity, thereby releasing the movable mass block.

7. The preparation method according to claim 6, characterized in that, The anisotropic wet etching process used to form the second cavity employs TMAH etching solution.

8. The preparation method according to claim 4, characterized in that, The bonding step is specifically a gold-gold hot-press bonding process, in which the bonding layer is formed by hot-press bonding a first metal layer formed on the back of the first silicon wafer and a second metal layer formed on the upper surface of the second silicon wafer to form a solid diffusion interface.

9. The preparation method according to claim 4, characterized in that, Following the bonding step, a through-hole fabrication step is also included: On the top layer of the bonded device, through-holes are formed by etching to expose the pads of the movable electrode; The pads of the second fixed electrode are exposed on the lower layer of the bonded device.

10. The preparation method according to claim 4, characterized in that, Both the first silicon wafer and the second silicon wafer are silicon wafers with (111) crystal orientation.

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