Cable fault accurate positioning system assisted by intelligent chip and cable

Abstract

The invention relates to the field of power cable fault monitoring, and discloses an intelligent chip-assisted cable fault accurate positioning system and a cable. The system comprises a test host and micro-control nodes distributed along the cable; the system is provided with a pulse receiving and transmitting module, a reference acquisition module, a centroid extraction module, a wave velocity calibration module, a dynamic windowing module and a positioning calculation module, and a micro-control node is pre-implanted in the cable. The system constructs a local physical baseline to obtain a centroid timestamp and calculate a real-time local wave velocity, intercepts reflected wave characteristics in combination with a dynamic integral time window, and synthesizes absolute position coordinates of a target. Absolute time synchronization errors among distributed nodes are eliminated by constructing a local physical baseline, and a dynamic windowing mechanism is utilized to adapt to wave velocity change and waveform dispersion caused by aging of a cable medium, so that the problem of feature extraction instability caused by a fixed window is solved, and the absolute precision of fault positioning is improved.

Description

Technical Field

[0001] This invention relates to the field of power cable fault monitoring, specifically to a smart chip-assisted cable fault precise location system and cable. Background Technology

[0002] Power cables are widely used in modern power grids. To achieve rapid fault diagnosis, the industry typically employs time-domain reflectometry or distributed monitoring nodes along the cable line. These existing technologies inject high-frequency test pulses into the cable ends. By monitoring the reflected waveform generated when the pulse signal encounters impedance abrupt changes during propagation within the cable, the time difference between the transmitted pulse and the reflected wave is recorded. Combined with the theoretical wave velocity of the cable medium, the relative distance to the fault point is calculated, thus achieving physical location of the fault.

[0003] Existing distributed monitoring schemes face limitations in practical applications due to errors in physical time synchronization. Each distributed monitoring node typically uses an independent local clock source. Due to inherent hardware characteristics, frequency offset and absolute time synchronization errors exist between nodes, causing a shift in the recording reference of pulse timestamps. Simultaneously, the environment of energized cables is subject to background electromagnetic noise and power frequency harmonic interference. High-frequency test pulses attenuate after long-distance transmission, and their reflected waveforms are easily affected by environmental noise, making it difficult for the system to accurately extract the transient voltage amplitude and pulse arrival time.

[0004] Existing positioning technologies largely rely on fixed waveform truncation windows and theoretical wave velocity reference values ​​in waveform feature extraction and distance calculation. During cable service, dielectric aging or moisture absorption causes dynamic changes in the internal electromagnetic wave propagation velocity, leading to dispersion and energy dissipation in the reflected waveform. Fixed waveform truncation windows cannot accommodate waveform broadening, resulting in incomplete energy envelopes of the captured reflected waves. This truncation error in the feature extraction process causes instability in the calculated reflected wave timestamps, ultimately compounding the errors caused by local wave velocity variations and translating into absolute positioning deviations during physical coordinate calculation. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a smart chip-assisted cable fault precise location system and cable. It solves the problems of absolute time synchronization errors caused by independent clock source frequency offsets between distributed nodes in existing cable fault location technologies, and susceptibility to background noise and power frequency harmonic interference in energized operating environments. Furthermore, aging or moisture in the cable medium can cause dynamic changes in internal wave velocity and dispersion of reflected waveforms, leading to instability in the extraction of reflected wave features within a fixed waveform capture window, and consequently, absolute positioning deviations during physical coordinate calculation.

[0006] To achieve the above objectives, the present invention provides the following technical solution: The first aspect of the present invention provides a smart chip-assisted cable fault precise location system, comprising a test host and microcontroller nodes distributed along the cable under test. The system includes: The pulse transceiver module, configured on the test host, injects high-frequency test pulses or high-frequency inspection pulses into the cable under test and establishes a carrier communication link. The reference acquisition module, configured inside the microcontroller node, constructs a local physical baseline based on a single local clock source by connecting the first high-frequency signal coupling terminal and the second high-frequency signal coupling terminal with a fixed physical distance, and performs waveform sequence acquisition to generate background discrete voltage sequences. The centroid extraction module performs waveform discrete integration on the background discrete voltage sequence, outputs the first centroid timestamp and the second centroid timestamp, and calls the dynamic integration time window parameter to extract the sequence when receiving the reflected wave, and outputs the centroid timestamp of the reflected wave. The wave velocity calibration module calculates the real-time local wave velocity using the time difference between the local physical baseline value and the first and second centroid timestamps. The dynamic windowing module substitutes the real-time local wave velocity into a preset mapping relationship to generate dynamic integration time window parameters for the centroid extraction module to call. The positioning and calculation module calculates the relative distance using the real-time local wave velocity and the difference between the timestamp of the reflected wave centroid and the first timestamp of the centroid. It then calls the absolute physical coordinates of the microcontroller node and the relative distance to synthesize and output the absolute position coordinates of the target feature point.

[0007] In the specific structure of the system, the pulse transceiver module includes a pulse generation circuit, a low-frequency carrier modem, a broadband impedance matching network, and a high-voltage isolation coupling device. When the cable under test is in a energized operating cycle, the pulse transceiver module utilizes the frequency-domain passive frequency divider network integrated within the broadband impedance matching network to connect the low-frequency carrier communication signal to the low-pass filter branch and the high-frequency inspection pulse to the high-pass filter branch. Within the time window for transmitting the high-frequency inspection pulse, the pulse transceiver module calculates the suspension time window based on the trigger start time, pulse width, channel relaxation time, and protection time of the high-frequency inspection pulse. During the suspension time window, the pulse transceiver module blocks low-frequency communication and implements suspension control; after the suspension time window ends, it resumes transmitting the low-frequency carrier communication signal.

[0008] The front-end circuit of the reference acquisition module integrates a passive high-pass and low-pass frequency divider network. This network separates the low-frequency communication branch and the high-frequency measurement branch from the broadband mixed signal acquired by the physical broadband coupling device. Upon receiving a synchronization command from the low-frequency communication branch, the reference acquisition module wakes up the dual-channel analog-to-digital converter. The module executes multi-cycle synchronous accumulation and averaging logic, using multiple continuously injected high-frequency inspection pulses within a single inspection cycle to acquire transient voltage amplitudes. These transient voltage amplitudes are then superimposed in phase according to a set equivalent time sampling interval resolution to cancel background noise. This process extracts the waveform envelope of the high-frequency inspection pulses and generates a background discrete voltage sequence.

[0009] The centroid extraction module has a noise floor wake-up threshold, which is set as a preset multiple of the root mean square of the background electromagnetic noise amplitude. When the voltage amplitude in the background discrete voltage sequence rises and crosses the noise floor wake-up threshold, the centroid extraction module determines that a pulse has arrived and opens the initial integration time window. The centroid extraction module uses the absolute value of the discrete voltage amplitude of the background discrete voltage sequence within the initial integration time window as a weighting parameter characterizing energy, and performs a weighted average calculation on the discrete time points within the time window to obtain the first and second centroid timestamps corresponding to the first and second high-frequency signal coupling ends at both ends of the forward-propagating electromagnetic wave crossing the local physical baseline.

[0010] The wave velocity calibration module extracts real-time local wave velocity sequences acquired within multiple historically set inspection cycles, and iteratively synthesizes a dielectric state baseline using a weighted moving average algorithm combined with a smoothing coefficient. The module then calculates the downward offset percentage of the real-time local wave velocity relative to the dielectric state baseline by dividing the difference between the dielectric state baseline value of the previous normal cycle and the real-time local wave velocity calculated in the current cycle by the dielectric state baseline value of the previous normal cycle. When the downward offset percentage is greater than or equal to a preset baseline tolerance threshold, the wave velocity calibration module determines that the cable under test has a risk of insulation degradation and generates a local insulation damage warning tag. The module encapsulates the local insulation damage warning tag into a ranging data packet and uploads it to the test host via a carrier communication link.

[0011] The dynamic windowing module performs dispersion adaptive mapping based on the real-time local wave velocity. When the real-time local wave velocity decreases, the dynamic windowing module retrieves the pre-stored reference time window width, reference wave velocity, and dispersion adjustment factor. The module calculates the dynamic integration time window parameters by exponentially scaling the ratio of the reference wave velocity to the real-time local wave velocity with the dispersion adjustment factor as the exponent, and multiplying the result by the reference time window width. This mapping relationship is used to increase the value of the dynamic integration time window parameters, ensuring that the integration time window covers the energy envelope of the reflected wave where the energy distribution becomes diffuse.

[0012] The dynamic windowing module executes anti-divergence locking logic through a comparator circuit. When the wave velocity calibration module outputs a local insulation damage warning tag, the dynamic windowing module determines that the real-time local wave velocity has entered the data fluctuation range and activates the anti-divergence locking mechanism. The dynamic windowing module pauses the dispersion adaptive mapping calculation process, retrieves the backed-up dynamic integration time window parameters from the previous period in which no local insulation damage warning tag was generated, which are locked in the internal backup storage space, and sends the backup parameters as the current output value to the centroid extraction module.

[0013] The centroid extraction module presets the reflected wave search interval based on the total length of the cable under test and the real-time local wave velocity. Within this search interval, the module monitors the voltage amplitude of the background discrete voltage sequence. When the voltage amplitude crosses the noise floor wake-up threshold again, the centroid extraction module uses this crossing time as the starting boundary for reflected wave integration. The module then uses the dynamic integration time window parameters output by the dynamic windowing module to perform discrete integration on the reflected wave signal to obtain the reflected wave centroid timestamp.

[0014] The positioning and calculation module calls the absolute physical coordinates of the microcontroller node's installation location, which are pre-stored in the microcontroller node's non-volatile memory. The module subtracts the timestamp of the reflected wave's centroid from the first centroid timestamp, multiplies the result by the real-time local wave velocity, and divides by two to calculate the relative distance. The module then linearly superimposes the absolute physical coordinates of the microcontroller node's installation location and the relative distance to calculate the absolute position coordinates of the target feature point. In early warning mode, the module encapsulates the absolute position coordinates of the target feature point carrying the local insulation damage warning tag into a positioning data packet and uploads it.

[0015] A second aspect of this invention provides a cable comprising, from the inside out, a conductor core, a cross-linked polyethylene insulation layer, an insulating shielding layer, a water-blocking buffer layer, a metal armor layer, and a corrosion-resistant outer sheath; microcontroller nodes are pre-embedded in the water-blocking buffer layer at fixed physical intervals along the cable axis, the microcontroller nodes being embedded between the outer side of the insulating shielding layer and the inner side of the metal armor layer; the exterior of the microcontroller nodes is conformally potted with epoxy resin or polyimide material; the microcontroller nodes integrate a reference acquisition module, a centroid extraction module, a wave velocity calibration module, a dynamic windowing module, and a positioning calculation module. The front end of the microcontroller node is connected to a broadband coupling device sleeved around the conductor core via a high-pass / low-pass frequency division network.

[0016] This invention provides a smart chip-assisted cable fault precise location system and cable. It has the following beneficial effects: 1. This invention constructs a local physical baseline by configuring a single local clock source within a microcontroller node and connecting a first high-frequency signal coupling terminal and a second high-frequency signal coupling terminal with a fixed physical distance. The real-time local wave velocity is directly calculated using the time difference between the incident wave passing through the two ends of the local physical baseline. This hardware-level structural design eliminates the absolute time synchronization error caused by the frequency offset of independent clock sources between distributed nodes, providing an accurate physical measurement benchmark for subsequent wave velocity calibration and positioning calculations.

[0017] 2. This invention implements low-frequency communication suspension control within the time window of the high-frequency inspection pulse transmission by a pulse transceiver module, and coordinates with a reference acquisition module to execute multi-cycle synchronous accumulation and averaging logic to perform in-phase superposition calculation of the transient voltage amplitude of continuously acquired high-frequency inspection pulses. This control logic and waveform processing method cancel out random background noise and power frequency harmonic interference in the live cable environment, avoids the impact of high-frequency signal energy across frequency bands on low-frequency carrier communication, and ensures reliable acquisition and extraction of waveform data under live cable operation conditions.

[0018] 3. This invention utilizes a dynamic windowing module to perform dispersion adaptive mapping based on real-time local wave velocity, generating dynamic integration time window parameters for the centroid extraction module to use as the calculation boundary for the reflected wave integral. When cable dielectric aging or moisture causes wave velocity reduction and waveform dispersion, the dynamically widened time window can completely cover the energy envelope of the reflected wave. Combined with the anti-divergence locking logic under the local insulation damage warning state, this solves the problem of unstable reflected wave feature extraction caused by using a fixed interception window, and eliminates system positioning deviation caused by changes in dielectric state. Attached Figure Description

[0019] Figure 1 This is a diagram illustrating the architecture of the intelligent chip-assisted cable fault precise location system of the present invention. Figure 2 This is a timing and logic structure diagram of the pulse transceiver module of the present invention; Figure 3 This is a diagram showing the internal structure and timing of the reference acquisition module of the present invention. Figure 4 This is the pre-analysis logic diagram of the centroid extraction module of the present invention; Figure 5 This is a flowchart of the logic processing of the wave velocity calibration module of the present invention; Figure 6 This is a diagram showing the logic control and mapping relationship of the dynamic windowing module of the present invention; Figure 7 This is a logic diagram of coordinate synthesis for the positioning calculation module of the present invention; Figure 8 This is a spatiotemporal distribution diagram of the internal propagation of the high-frequency pulse cable of the present invention; Figure 9 This is a state diagram of the local wave speed tracking and early warning triggering of the present invention.

[0020] Among them, 10 is the pulse transceiver module; 20 is the reference acquisition module; 30 is the wave velocity calibration module; 40 is the dynamic windowing module; 50 is the centroid extraction module; and 60 is the positioning calculation module. Detailed Implementation

[0021] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] See attached document Figure 1 , Figure 1 This is an architecture diagram of a smart chip-assisted cable fault precise location system according to an embodiment of the present invention. The present invention provides a smart chip-assisted cable fault precise location system, comprising: The pulse transceiver module 10 is configured on the test host end. It injects high-frequency test pulses into one end of the cable under test, establishes a carrier communication link with the micro-control node, and injects high-frequency inspection pulses into the cable and suspends low-frequency carrier communication during the cable's energized operation cycle using a frequency domain passive frequency division network and time division multiplexing logic. The reference acquisition module 20 is configured inside the microcontroller node. It uses a front-end high-pass and low-pass frequency division network to separate the low-frequency communication branch and the high-frequency measurement branch. Based on a single local clock source, it connects the first high-frequency signal coupling end and the second high-frequency signal coupling end with a fixed physical distance to construct a local physical baseline and perform equivalent time synchronization acquisition of waveform sequences. The wave velocity calibration module 30 calculates the local wave velocity using the time difference between the local physical baseline value and the first centroid timestamp and the second centroid timestamp. It constructs a medium state baseline based on the historical local wave velocity sequence and generates a local insulation damage warning label when the real-time calculated local wave velocity deviates downward beyond the baseline tolerance threshold. The dynamic windowing module 40 substitutes the local wave velocity calculated by the wave velocity calibration module 30 into the preset wave velocity dispersion mapping function to generate dynamic integration time window parameters, and locks the wave velocity dispersion mapping parameters of the previous normal cycle when a local insulation damage warning tag is received. The centroid extraction module 50 opens the initial integration time window when the signal triggers the noise floor wake-up threshold, performs waveform discrete integration with the discrete voltage sequence as weight, and outputs the first centroid timestamp and the second centroid timestamp. When receiving the impedance reflection wave, it calls the dynamic integration time window parameters output by the dynamic windowing module 40 to extract the sequence and outputs the centroid timestamp of the reflection wave. The positioning calculation module 60 calculates the relative distance on the micro-control node side using the difference between the local wave velocity and the centroid timestamp of the reflected wave and the first centroid timestamp. It then calls the pre-existing absolute physical coordinates inside the node and linearly superimposes them with the relative distance to output the absolute position coordinates of the target feature point. In the early warning mode, it directly outputs the absolute physical coordinates of the micro-control node carrying the early warning tag.

[0023] The following section will explain in detail the specific operating mechanism of this system for accurately locating cable faults and providing live warnings, based on the data flow and control relationships of each module within the system.

[0024] In a specific embodiment of the cable, a smart chip-assisted cable for precise fault location mainly consists of a conductor core, a cross-linked polyethylene insulation layer, an insulating shielding layer, a water-blocking buffer layer, a metal armor layer, and a corrosion-resistant outer sheath, wrapped sequentially from the inside out. Microcontroller nodes are pre-embedded into the cable along the cable axis at fixed physical intervals during the cable manufacturing process. To prevent thermal breakdown damage to electronic components caused by the cross-linked polyethylene insulation layer during high-temperature extrusion and cross-linking processes, the microcontroller nodes are specifically embedded in the water-blocking buffer layer between the outer side of the insulating shielding layer and the inner side of the metal armor layer. The water-blocking buffer layer containing the microcontroller nodes is a structure formed by wrapping semi-conductive tape or water-blocking expansion tape. This physical location avoids the high-temperature processing area while ensuring that the coupling elements inside the node form an effective high-frequency signal sensing path with the conductor core through electromagnetic coupling.

[0025] The microcontroller node is externally encapsulated with high-temperature resistant epoxy resin or polyimide to accommodate the mechanical stress of the cable during laying and bending. The underlying hardware structure of the microcontroller node is a flexible printed circuit board assembly containing a micro low-power processor, analog front-end circuitry, and a micro power management unit. Internally, the microcontroller node integrates the aforementioned reference acquisition module 20, wave velocity calibration module 30, dynamic windowing module 40, centroid extraction module 50, and positioning calculation module 60. The single local clock source within the microcontroller node is specifically a single quartz crystal oscillator or microelectromechanical system oscillator located externally to the micro low-power processor, providing a unique time reference for all data acquisition and computation within the node.

[0026] The first and second high-frequency signal coupling terminals inside the microcontroller node are specifically manifested as miniature broadband high-frequency current transformers or miniature surface-mount capacitor coupling electrodes. During manufacturing, these two coupling terminals are rigidly soldered or integrally formed at both ends of the same flexible printed circuit board, thereby solidifying the local physical baseline between them in the physical structure.

[0027] This integrated packaging design ensures an absolutely constant spatial distance, guaranteeing that the node can conform to the bending shape of the cable without changing the baseline length. The high-pass and low-pass frequency division network configured at the front end of the node is specifically a combination of passive duplexers or passive high-pass and low-pass filters composed of inductors and capacitors. This forcibly separates the broadband mixed signal obtained by the physical broadband coupling device into a high-frequency measurement branch at the megahertz level and a low-frequency communication branch at the kilohertz level in the physical circuit.

[0028] The microcontroller node obtains operating power from the power frequency electric field surrounding the cable through a power management unit and parasitic capacitance structure to maintain the operation of internal circuits and data interaction between various logic modules. The entire cable is divided into multiple discrete local monitoring sections through this internal hardware structure arrangement.

[0029] See attached document Figure 2 , Figure 2 This is a timing and logic diagram of a pulse transceiver module according to an embodiment of the present invention. The pulse transceiver module 10 is disposed at the end of the cable under test and is configured inside a substation switchgear or cable branch box. The hardware architecture of the pulse transceiver module 10 mainly consists of a pulse generation circuit, a low-frequency carrier modem, a broadband impedance matching network, and a high-voltage isolation coupling device.

[0030] When the cable under test is under power outage maintenance, the pulse generation circuit injects a high-frequency test pulse into one end of the cable. The high-frequency test pulse is a nanosecond-level square wave or a narrow Gaussian pulse, and the spectral energy of the high-frequency test pulse is concentrated in the range of 10 MHz to 100 MHz, ensuring that the electromagnetic wave has a waveform leading edge when propagating in the medium of the cable under test.

[0031] The low-frequency carrier modem establishes a carrier communication link between the test host and various microcontroller nodes distributed along the cable under test via physical cables. The carrier communication link operates in a low-frequency band below several hundred kilohertz, and receives ranging data and status codes transmitted back from each microcontroller node. The modulation and demodulation mechanism of the low-frequency power line carrier and the topology of the nanosecond pulse generation circuit can be configured by those skilled in the art according to the physical layer protocol. The modulation and demodulation mechanism of the low-frequency power line carrier and the nanosecond pulse generation circuit are well-known technologies in the field and will not be described in detail here.

[0032] When the cable under test is in a live operating cycle, the core carries power frequency high voltage and current. Under the condition of uninterrupted power supply, the dielectric state data inside the cable under test is acquired. The pulse transceiver module 10 uses a frequency domain passive frequency division network and time division multiplexing logic to inject high-frequency inspection pulses into the cable under test and implement channel avoidance control.

[0033] The broadband impedance matching network integrates a passive duplexer composed of inductive and capacitive elements. The passive duplexer has a cutoff frequency: 500 kHz for the low-pass filter branch and 5 MHz for the high-pass filter branch. The broadband impedance matching network connects the low-frequency carrier communication signal to the low-pass filter branch and the high-frequency inspection pulse to the high-pass filter branch. After frequency domain isolation between the low-frequency carrier communication signal and the high-frequency inspection pulse, they are injected into the cable under test via a high-voltage isolation coupling device. The high-voltage isolation coupling device is either a high-voltage coupling capacitor with a matching withstand voltage rating or a broadband high-frequency current transformer fitted externally to the cable under test.

[0034] Nanosecond-level high-frequency inspection pulses cause spectral leakage in broadband channels, and the transient trailing oscillation noise of the high-frequency inspection pulses interferes with the low-frequency channel, causing bit errors in carrier communication. The pulse transceiver module 10 suspends low-frequency carrier communication within the time window for sending the high-frequency inspection pulse. The test host generates a pulse injection command based on a preset inspection frequency, and calculates the suspension time window for blocking low-frequency communication before sending the pulse injection command. The calculation formula for the suspension time window is as follows: ; In the formula, This indicates the suspension time window for low-frequency carrier communication. The output format of the suspension time window is the period of low-level blocking signal of the internal communication control bus of the test host. Indicates the trigger start time of the high-frequency inspection pulse; Indicates the pulse width of the high-frequency inspection pulse; The channel relaxation time represents the decay of electromagnetic oscillations in the physical channel of the cable under test to the system noise floor level after being excited by a high-frequency inspection pulse. The channel relaxation time is obtained by high-frequency waveform attenuation test calibration of the cable under test during the power outage factory stage and is pre-stored in the test host. This indicates the active avoidance protection time before pulse injection. The active avoidance protection time is set to the time required for the low-frequency carrier modem to send a single complete data frame. This indicates the tailing protection time after the pulse energy decays. The tailing protection time is set to a fixed constant time margin.

[0035] The pulse transceiver module 10 reaches the suspend time window At the initial boundary, the pulse transceiver module 10 pulls low the transmit enable pin of the low-frequency carrier modem via a hardware interrupt, blocking the transmission of the low-frequency carrier communication signal. The pulse transceiver module 10 then completes the pause time window. After the end boundary, the pulse transceiver module 10 releases the transmit enable pin and resumes normal low-frequency carrier communication signal transmission. The time-domain interleaving avoidance, combined with the high-pass and low-pass isolation of the frequency-domain passive frequency divider network, eliminates the noise floor rise caused by broadband frequency band overlap. Under the condition of maintaining the normal power frequency operation of the cable under test, the pulse transceiver module 10 periodically excites the micro-control nodes distributed inside the cable under test to collect background state data.

[0036] See attached document Figure 3 , Figure 3 This is a diagram illustrating the internal structure and timing of a reference acquisition module according to an embodiment of the present invention. The reference acquisition module 20 is configured within a microcontroller node and is responsible for acquiring and digitizing the underlying physical signals. The front-end circuit of the reference acquisition module 20 integrates a high-pass / low-pass divider network. This network is connected to a physical broadband coupling device, which acquires the broadband mixed signal from around the cable core. The high-pass / low-pass divider network is constructed from a combination of inductors and capacitors, and physically separates the broadband mixed signal into a low-frequency communication branch with a center frequency below 500 kHz and a high-frequency measurement branch with a center frequency above 5 MHz.

[0037] In the high-frequency measurement branch of the reference acquisition module 20, the hardware architecture is based on a single local clock source. This single local clock source is a single quartz crystal oscillator configured within the microcontroller node, providing synchronized sampling clock pulses to the dual-channel analog-to-digital converter within the microcontroller node. The high-frequency measurement branch connects a first high-frequency signal coupling terminal and a second high-frequency signal coupling terminal with a fixed physical distance. The first and second high-frequency signal coupling terminals are integrally packaged at both ends of a flexible printed circuit board. The printed circuit board traces between the first and second high-frequency signal coupling terminals have a fixed physical distance, which the reference acquisition module 20 uses as the local physical baseline. The fixed length of the local physical baseline eliminates the absolute time synchronization error caused by the frequency offset of independent clock sources between distributed nodes.

[0038] When the cable is under power outage maintenance and receiving high-frequency test pulses, the reference acquisition module 20 uses a dual-channel analog-to-digital converter to perform equivalent-time synchronous acquisition of the high-frequency signals passing through the first and second high-frequency signal coupling terminals. The high-frequency test pulses are nanosecond-level pulses. The reference acquisition module 20 uses a delay line circuit to apply stepped delays to multiple consecutively arriving high-frequency test pulses. The reference acquisition module 20 reconstructs the high-frequency test pulses into a discrete waveform sequence under conditions lower than the Nyquist sampling rate. For the trigger control of the equivalent-time sampling and the specific design of the delay line circuit, those skilled in the art can make conventional selections and configurations based on the performance indicators of the microcontroller. Equivalent-time sampling technology is a well-known technology in this field and will not be elaborated further here.

[0039] When the cable is in a live operating cycle, the microcontroller node is in a dynamic electromagnetic noise environment. After receiving the synchronization command from the low-frequency communication branch, the reference acquisition module 20 wakes up the dual-channel analog-to-digital converter within the discrete time window of the inspection cycle. The reference acquisition module 20 acquires the background discrete voltage sequence of the inspection pulses output by the high-frequency measurement branch. To suppress the waveform distortion caused by power frequency harmonics and switching transient interference in the live cable, the reference acquisition module 20 executes multi-cycle synchronous accumulation and averaging hardware control logic at the microcontroller node level. The formula for generating the background discrete voltage sequence is as follows: ; In the formula, This indicates the first discrete voltage sequence of the background acquired and output by the reference acquisition module 20. Values ​​of discrete sampling points; This represents the total number of consecutive injection triggers of high-frequency inspection pulses within a single inspection cycle; This variable represents the triggering order of the current high-frequency inspection pulse. Indicates a dual-channel analog-to-digital converter in The transient voltage amplitude acquired at any given time; Indicates the first The hardware wake-up trigger time when the secondary high-frequency inspection pulse arrives at the first or second high-frequency signal coupling terminal; Indicates the discrete time point index number of the equivalent time sampling sequence; This indicates the equivalent time sampling interval resolution set in the equivalent time synchronous acquisition logic.

[0040] The reference acquisition module 20 uses multi-cycle synchronous accumulation and averaging logic to cancel randomly distributed background noise by superimposing multiple high-frequency inspection pulses in phase. In a energized operating environment, the reference acquisition module 20 extracts the waveform envelope of the high-frequency inspection pulses. After waveform reconstruction, the reference acquisition module 20 stores the background discrete voltage sequences corresponding to the first and second high-frequency signal coupling terminals in the internal static random access memory of the microcontroller node, awaiting retrieval by subsequent data processing modules.

[0041] See attached document Figure 4 , Figure 4 This is a pre-analysis logic diagram of a centroid extraction module according to an embodiment of the present invention. The centroid extraction module 50 is configured in a digital signal processor or field-programmable gate array inside a microcontroller node. The centroid extraction module 50 calls the background discrete voltage sequence stored in the reference acquisition module 20 to analyze the waveform characteristic time points. The centroid extraction module 50 performs pre-analysis and timestamp generation operations on the forward-propagating incident wave signal.

[0042] The centroid extraction module 50 is equipped with a noise floor wake-up threshold. This threshold is set to three to five times the root mean square (RMS) amplitude of the background electromagnetic noise acquired by the system in a pulse-free state. When the voltage amplitude in the background discrete voltage sequence corresponding to the first or second high-frequency signal coupling terminal rises and crosses the noise floor wake-up threshold, the centroid extraction module 50 determines that a high-frequency test pulse or high-frequency inspection pulse has arrived, and opens the initial integration time window. The initial integration time window's width is set to 1.5 to 2 times the pulse width of the high-frequency test pulse or high-frequency inspection pulse. The initial integration time window covers the main energy lobe region of the incident wave, preventing subsequent reflection noise caused by impedance discontinuities at the cable connector joints from being included in the time analysis calculation interval.

[0043] The centroid extraction module 50 uses a waveform centroid integral algorithm to find the equivalent center point of the pulse energy on the time axis. The centroid extraction module 50 uses the discrete voltage amplitudes in the background discrete voltage sequence as weight parameters to perform a weighted average of discrete time points within the initial integration time window. The mathematical formula for the waveform discrete integral executed by the centroid extraction module 50 is as follows: ; In the formula, This represents the waveform centroid timestamp calculated by the centroid extraction module 50; This indicates the total number of sampling points included within the initial integration time window; This represents the index number of the discrete time point within the initial integration time window; This indicates the physical moment when the initial integration time window is opened. The physical moment when the opening time is the initial time point when the voltage amplitude in the background discrete voltage sequence rises and crosses the noise floor wake-up threshold. This represents the discrete time interval resolution of the background discrete voltage sequence; Indicates the background discrete voltage sequence at index number Discrete voltage amplitude at the location; It represents the absolute value of the discrete voltage amplitude, which characterizes the energy weighting parameter of the electromagnetic wave at the corresponding discrete time point.

[0044] The accumulator circuit structure and instruction scheduling logic for performing digital integration operations inside a microcontroller can be conventionally programmed by those skilled in the art based on digital signal processing algorithms. The execution of digital integration operations inside a microcontroller is a well-known technology in this field and will not be described in detail here.

[0045] The centroid extraction module 50 calls the waveform discrete integration formula to perform discrete integration on the background discrete voltage sequence corresponding to the first high-frequency signal coupling end, and outputs the first centroid timestamp. Similarly, the centroid extraction module 50 performs discrete integration on the background discrete voltage sequence corresponding to the second high-frequency signal coupling end, and outputs the second centroid timestamp. The first and second centroid timestamps represent the physical times at which the forward-propagating electromagnetic wave crosses the two ends of the local physical baseline inside the microcontroller node.

[0046] During the inspection mode of the cable's energized operation cycle, the microcontroller node receives high-frequency inspection pulses. The centroid extraction module 50 calls the waveform discrete integration algorithm to process the background discrete voltage sequence under energized operation conditions. The centroid extraction module 50 outputs the first and second centroid timestamps under the background conditions, and combines them to generate a reference centroid timestamp sequence. The reference centroid timestamp sequence is stored in the internal register of the microcontroller node, providing input parameters for the subsequent wave velocity calibration module 30 to calculate the local wave velocity under the cable's operating conditions.

[0047] See attached document Figure 5 , Figure 5 This is a flowchart illustrating the logic processing of a wave velocity calibration module according to an embodiment of the present invention. The wave velocity calibration module 30 is configured within the computing unit of the microcontroller node. The wave velocity calibration module 30 retrieves the reference centroid timestamp sequence generated by the centroid extraction module 50 from the internal registers of the microcontroller node, and reads the preset local physical baseline value from the reference acquisition module 20. The wave velocity calibration module 30 calculates the real-time local wave velocity of the current cable segment using the time difference of the incident wave crossing the local physical baseline. The formula for calculating the real-time local wave velocity is as follows: ; In the formula, This indicates the real-time local wave velocity calculated by the wave velocity calibration module 30. This represents the local physical baseline value, which is the fixed physical distance between the first high-frequency signal coupling end and the second high-frequency signal coupling end. This represents the first centroid timestamp output by the centroid extraction module 50; This represents the second centroid timestamp output by the centroid extraction module 50. The wave velocity calibration module 30 obtains the propagation speed value of the electromagnetic wave in the corresponding cable section through the real-time local wave velocity calculation formula.

[0048] The wave velocity calibration module 30 constructs a dielectric state baseline in the non-volatile memory of the microcontroller node. The dielectric state baseline is synthesized from real-time local wave velocity sequences acquired over multiple historically defined inspection cycles using a weighted moving average algorithm. By maintaining the dielectric state baseline, the wave velocity calibration module 30 smooths out wave velocity disturbances caused by ambient temperature fluctuations or load current. After each inspection cycle, the wave velocity calibration module 30 updates the dielectric state baseline using the current real-time local wave velocity, according to the following formula: ; In the formula, Indicates the first The media status baseline value updated after each inspection cycle; Indicates the first Real-time local wave velocity calculated per inspection cycle; Indicates the first The baseline value of the media status stored in each inspection cycle; This represents the smoothing coefficient, which is set between 0.05 and 0.15.

[0049] The wave velocity calibration module 30 executes the dielectric damage early warning logic. When the cable insulation dielectric becomes damp or ages and deteriorates, the cable's equivalent relative permittivity increases. Since the physical mapping mechanism dictates that the real-time local wave velocity is inversely proportional to the square root of the cable's equivalent relative permittivity, an increase in the equivalent relative permittivity inevitably leads to a decrease in the real-time local wave velocity. The wave velocity calibration module 30 calculates the downward offset percentage of the real-time local wave velocity relative to the dielectric state baseline in real time. The formula for calculating the downward offset percentage is as follows: ; In the formula, This indicates the percentage of downward offset in the real-time local wave velocity. and The definition is consistent with the parameter definition in the aforementioned update formula.

[0050] Wave velocity calibration module 30 determines the downward offset amplitude ratio Is it greater than or equal to the preset baseline tolerance threshold? The baseline tolerance threshold is preset between one percent and three percent based on the variation curve of the dielectric loss tangent of the cable insulation material. When the downward offset percentage is greater than or equal to the baseline tolerance threshold, the wave velocity calibration module 30 determines that there is a risk of insulation degradation in the cable section where the current microcontroller node is located.

[0051] The wave velocity calibration module 30 generates a local insulation damage warning tag, and encapsulates the local insulation damage warning tag and the real-time local wave velocity value into a ranging data packet. The local insulation damage warning tag contains the physical identifier information of the current microcontroller node. The wave velocity calibration module 30 sends the encapsulated ranging data packet to the communication protocol stack of the microcontroller node, and the ranging data packet is transmitted back to the host of the system via a low-frequency carrier communication signal.

[0052] The code implementation of the weighted moving average algorithm in a microprocessor and the read / write addressing logic of non-volatile memory can be carried out by those skilled in the art according to embedded development specifications. The code implementation of the weighted moving average algorithm in a microprocessor and the read / write addressing logic of non-volatile memory are well known technologies in this field and will not be described in detail here.

[0053] See attached document Figure 6 , Figure 6 This is a logic control and mapping diagram of a dynamic windowing module according to an embodiment of the present invention. The dynamic windowing module 40 is configured in the logic control core of the microcontroller node. The dynamic windowing module 40 receives the real-time local wave velocity output by the wave velocity calibration module 30 and monitors in real time whether the wave velocity calibration module 30 generates a local insulation damage warning tag. The dynamic windowing module 40 adjusts the time window boundary used to intercept the reflected wave sequence according to the change in the real-time local wave velocity.

[0054] The dynamic windowing module 40 performs dispersion adaptive mapping. When electromagnetic waves propagate in the cable medium, the waveform broadening of the pulse signal is physically related to the propagation speed. When the real-time local wave velocity decreases due to increased dielectric polarization loss, the energy distribution of the reflected wave disperses along the time axis. The dynamic windowing module 40 adjusts the width of the integration time window according to the real-time local wave velocity, ensuring that the integration time window covers the energy envelope of the reflected wave. The calculation formula for the dynamic integration time window parameters is as follows: ; In the formula, This represents the parameters of the dynamic integral time window generated by the dynamic windowing module 40; This indicates the reference time window width, which is the pulse width reference value of the reflected wave of the cable under standard conditions. The reference time window width is pre-stored in the non-volatile memory of the microcontroller node. The reference wave velocity is the local wave velocity value calibrated during the initial installation phase of the cable. The reference wave velocity is also pre-stored in the non-volatile memory of the microcontroller node. This indicates the real-time local wave velocity output by the wave velocity calibration module 30 in the current cycle; This represents the dispersion adjustment factor, which is preset between 0.5 and 1.2 according to the dispersion curve corresponding to the cable model. The dynamic windowing module 40, through dispersion adaptive mapping, increases the value of the dynamic integration time window parameter when the real-time local wave velocity decreases and decreases the value of the dynamic integration time window parameter when the real-time local wave velocity increases.

[0055] The dynamic windowing module 40 executes anti-divergence locking logic. Under conditions of cable insulation degradation, the real-time local wave velocity fluctuates or changes abruptly. Continuing to execute the dispersion adaptive mapping would cause the dynamic integration time window parameter to exceed the preset range, resulting in instability in the centroid calculation of the reflected wave. The dynamic windowing module 40 monitors the status of the local insulation damage warning tag through a comparator circuit. When the wave velocity calibration module 30 outputs a local insulation damage warning tag, the dynamic windowing module 40 determines that the real-time local wave velocity has entered an unreliable range, and activates the anti-divergence locking mechanism.

[0056] After the anti-divergence locking mechanism is activated, the dynamic windowing module 40 pauses the dispersion adaptive mapping calculation process and locks the dynamic integration time window parameters generated in the previous normal inspection cycle as the current output value. The dynamic windowing module 40 has internal backup storage space, which backs up the current dynamic integration time window parameters at the end of each inspection cycle when no local insulation damage warning tag is generated. Once the local insulation damage warning tag is removed, the dynamic windowing module 40 releases the anti-divergence locking mechanism and resumes the dispersion adaptive mapping calculation based on the real-time local wave velocity.

[0057] The dynamic windowing module 40 sends the final determined dynamic integration time window parameters to the centroid extraction module 50. The centroid extraction module 50 uses the dynamic integration time window parameters to truncate and integrate the subsequently transmitted reflected wave discrete voltage sequence. Regarding the hardware mapping address of the spare storage space and the gate circuit implementation of the comparator circuit, those skilled in the art can perform conventional configuration according to logic design specifications. The spare storage space and comparator circuit are well-known technologies in the field and will not be described in detail here.

[0058] See attached document Figure 7 , Figure 7This is a coordinate synthesis logic diagram of a positioning solution module according to an embodiment of the present invention. The centroid extraction module 50 is configured inside the microcontroller node. After completing the centroid analysis of the forward-propagating incident wave, the centroid extraction module 50 performs post-interception and feature extraction of the reflected wave signal.

[0059] The centroid extraction module 50 presets the reflected wave search interval based on the total cable length and the real-time local wave velocity. The start time of the reflected wave search interval is set to the first centroid timestamp plus a preset pulse width avoidance time, and the end time of the reflected wave search interval is set to the first centroid timestamp plus twice the total cable length divided by the real-time local wave velocity.

[0060] The centroid extraction module 50 monitors the amplitude changes of the background discrete voltage sequence within the reflected wave search interval. When the voltage amplitude in the background discrete voltage sequence crosses the noise floor wake-up threshold again, the centroid extraction module 50 determines that a reflected wave signal has been received. The centroid extraction module 50 calls the dynamic integration time window parameters output by the dynamic windowing module 40, using the moment of crossing the noise floor wake-up threshold as the starting boundary for the reflected wave integration, and performs waveform discrete integration on the reflected wave signal. The formula for calculating the reflected wave centroid timestamp is as follows: ; In the formula, This represents the timestamp of the reflected wave centroid calculated by the centroid extraction module 50. This represents the total number of reflected wave sampling points determined by the dynamic integration time window parameters; Indicates the index number of the discrete time point within the integral region of the reflected wave; This indicates the physical moment when the reflected wave signal crosses the noise floor wake-up threshold; This represents the discrete time interval resolution of the background discrete voltage sequence; Indicates the background discrete voltage sequence at index number The discrete voltage amplitude at the point. The centroid extraction module 50 obtains the equivalent center position of the reflected wave energy on the time axis through waveform discrete integration.

[0061] The positioning and calculation module 60 is configured in the computing unit of the microcontroller node. The positioning and calculation module 60 obtains the first centroid timestamp and the reflected wave centroid timestamp output by the centroid extraction module 50 through the internal bus of the microcontroller node, and simultaneously obtains the real-time local wave velocity output by the wave velocity calibration module 30. The positioning and calculation module 60 calculates the physical distance of the target feature point relative to the microcontroller node through a time difference mapping relationship. The positioning and calculation module 60 calls the node mounting coordinates pre-stored in non-volatile memory to perform coordinate synthesis. The formula for synthesizing the absolute coordinates of the target feature point is as follows: ; In the formula, This represents the absolute physical coordinates of the target feature point on the cable path, calculated by the positioning solution module 60. This indicates the physical location coordinates of the current microcontroller node along the cable. Indicates the centroid timestamp of the reflected wave; This represents the first centroid timestamp generated when the incident wave passes through the first high-frequency signal coupling end; This indicates the real-time local wave velocity calculated by the wave velocity calibration module 30. The positioning calculation module 60 uses the real-time local wave velocity to eliminate positioning errors caused by medium aging.

[0062] The positioning and calculation module 60 encapsulates the calculated absolute physical coordinates of the target feature points, the local insulation damage warning tag, and the real-time local wave velocity into a positioning data packet. The positioning and calculation module 60 transmits the positioning data packet to a low-frequency carrier modem via the communication interface of the microcontroller node, and the positioning data packet is then uploaded to the test host via a power line carrier link. The calling logic of the floating-point arithmetic unit within the microcontroller and the shift operations for data packet formatting can be configured by those skilled in the art according to the instruction set architecture. The calling logic of the floating-point arithmetic unit and the data packet formatting are well-known technologies in the field and will not be described in detail here.

[0063] This system is described using a 10kV cross-linked polyethylene (XLPE) distribution cable as an example. The cable under test is set to a total length of 3000 meters, with microcontroller nodes embedded in the water-blocking buffer layer every 500 meters, for a total of 5 microcontroller nodes along the entire line. The absolute physical coordinates of the 5 microcontroller nodes are 500 meters, 1000 meters, 1500 meters, 2000 meters, and 2500 meters, numbered sequentially from the first to the fifth microcontroller node. The local physical baseline value within each microcontroller node is set to 0.5 meters. The reference wave velocity of the cable under factory conditions is calibrated to 160 meters per microsecond.

[0064] During the cable's operating cycle, localized water treeing occurred in the section between the third and fourth microcontroller nodes, with the center of the damage located at an absolute physical coordinate of 1650 meters. Moisture intrusion led to an increase in the equivalent relative permittivity of the insulation layer in this section.

[0065] The pulse transceiver module 10 periodically transmits high-frequency inspection pulses. The reference acquisition module 20 inside the third microcontroller node performs equivalent time synchronization acquisition. The centroid extraction module 50 measures the normal value of the time difference between the high-frequency inspection pulse crossing the local physical baseline as 3.125 nanoseconds. The wave velocity calibration module 30 calculates the real-time local wave velocity as 160 meters per microsecond, which coincides with the medium state baseline.

[0066] With insulation dampness at 1650 meters, the time difference between the high-frequency inspection pulse acquired by the third microcontroller node and the local physical baseline increased to 3.225 nanoseconds. The wave velocity calibration module 30 calculated that the real-time local wave velocity in the section where the third microcontroller node is located decreased to 155 meters per microsecond. The downward shift in wave velocity was 3.125%. This value exceeded the preset 2% baseline tolerance threshold, and the wave velocity calibration module 30 generated a local insulation damage warning tag.

[0067] When the dynamic windowing module 40 detects the generation of a local insulation damage warning tag, it activates an anti-divergence locking mechanism to lock the dynamic integration time window parameter used to intercept the reflected wave to 50 nanoseconds of the previous normal inspection cycle.

[0068] The aging point progresses to a breakdown state. The pulse transceiver module 10 sends a high-frequency test pulse. When the incident wave reaches the third microcontroller node, the centroid extraction module 50 generates the first centroid timestamp. The incident wave travels to 1650 meters and is reflected. When the reflected wave returns to the third microcontroller node, the centroid extraction module 50 calculates and generates the reflected wave centroid timestamp within a dynamic integration time window. The time difference between the first centroid timestamp and the reflected wave centroid timestamp is 1.935 microseconds.

[0069] The positioning and calculation module 60 calls the absolute physical coordinates of the third microcontroller node, 1500 meters, and substitutes them into the formula for synthesizing the absolute coordinates of the target feature point for calculation. The calculation process for the absolute position coordinates is 1500 plus 1.935 multiplied by 155 divided by 2, and the output absolute position coordinates of the target feature point are 1649.96 meters.

[0070] The experimental verification and effect comparison are explained below.

[0071] A 3000-meter cross-linked polyethylene cable model incorporating frequency-varying distributed parameters was established. A variable impedance module was connected at 1650 meters of the model to simulate insulation moisture absorption and breakdown.

[0072] See attached document Figure 8 , Figure 8 This is a spatiotemporal distribution diagram of the propagation of a high-frequency pulse within the cable. In the diagram, the X-axis represents the axial distance of the cable, the Y-axis represents time, and the Z-axis represents the voltage amplitude. After propagating to a distance of 1500 meters, the waveform amplitude of the high-frequency pulse shows a decaying trend, and the main lobe width widens. The signal-to-noise ratio of the reflected wave received at the first end by the single-ended time-domain reflectometry device is lower than the detection threshold. The third microcontroller node of this invention intercepts the forward-propagating signal at 1500 meters, completing the local feature extraction of the signal.

[0073] See attached document Figure 9 , Figure 9This is a status diagram of local wave velocity tracking and early warning triggering. The horizontal axis represents the number of days of simulation operation, and the vertical axis represents the wave velocity value. The solid line represents the real-time local wave velocity calculated by the wave velocity calibration module 30, and the dashed line represents the dielectric state baseline. At day 100, the model injects the moisture impedance parameter, and the solid line value decreases. At day 105, the difference between the solid and dashed lines reaches the baseline tolerance threshold, and the wave velocity calibration module 30 outputs a high-level logic level to trigger an early warning.

[0074] The absolute physical coordinates of the model fault were set to 1650 meters for distance measurement comparison.

[0075] The single-ended time-domain reflectometry method sets the global wave velocity to a constant of 160 m / microsecond. The pulse is emitted from the 0-meter end and reflected from 1650 meters, with a round-trip time difference of 20.875 microseconds. The calculated fault distance is 1670 meters. The ranging error is 20 meters. Uncompensated errors are caused by wave velocity shift due to localized moisture.

[0076] The positioning system of this invention calls upon a third microcontroller node located at 1500 meters. The wave velocity calibration module 30 calculates the real-time local wave velocity in the damaged section to be 155 meters per microsecond. The third microcontroller node measures the round-trip time difference of reflection to be 1.935 microseconds. The positioning calculation module 60 calculates and outputs the absolute position coordinates to be 1649.96 meters. The ranging error is 0.04 meters. The system possesses both live insulation warning and coordinate correction functions.

[0077] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A smart chip-assisted cable fault precise location system, comprising a test host and microcontroller nodes distributed along the cable under test, characterized in that the system... include: The pulse transceiver module injects high-frequency pulses into the cable under test and establishes a communication link. The reference acquisition module connects the first high-frequency signal coupling terminal and the second high-frequency signal coupling terminal with a fixed spacing to construct a local physical baseline, and acquires waveforms to generate a background discrete voltage sequence; The centroid extraction module integrates the background discrete voltage sequence and outputs the first and second centroid timestamps. It then calls the dynamic integration time window parameters to extract the centroid timestamps of the reflected waves from the sequence output. The wave velocity calibration module calculates the real-time local wave velocity using the time difference between the local physical baseline value and the first and second centroid timestamps. The dynamic windowing module generates dynamic integration time window parameters based on the real-time local wave velocity, which are then used by the centroid extraction module. The positioning and calculation module calculates the relative distance using the real-time local wave velocity and the difference between the centroid timestamp of the reflected wave and the first centroid timestamp, and synthesizes the absolute position coordinates of the target feature point with the absolute physical coordinates of the microcontroller node.

2. The intelligent chip-assisted cable fault precise location system according to claim 1, characterized in that, The pulse transceiver module includes a pulse generation circuit, a low-frequency carrier modem, a broadband impedance matching network, and a high-voltage isolation coupling device. When the cable under test is in a live operation cycle, the pulse transceiver module uses a frequency-domain passive frequency division network and time-division multiplexing logic to inject high-frequency inspection pulses into the cable under test and implement channel avoidance control. During the time window for sending high-frequency inspection pulses, it blocks low-frequency communication and implements suspension control. After passing the end boundary of the suspension time window, it resumes the transmission of low-frequency carrier communication signals.

3. The intelligent chip-assisted cable fault precise location system according to claim 1, characterized in that, The front-end circuit of the reference acquisition module integrates a high-pass and low-pass frequency divider network, which separates the low-frequency communication branch and the high-frequency measurement branch. After receiving the synchronization command from the low-frequency communication branch, the reference acquisition module wakes up the dual-channel analog-to-digital converter, executes multi-cycle synchronous accumulation and averaging logic, and uses the in-phase superposition of multiple high-frequency inspection pulses to cancel background noise, extract the waveform envelope of the high-frequency inspection pulse, and generate a background discrete voltage sequence.

4. The intelligent chip-assisted cable fault precise location system according to claim 1, characterized in that, The centroid extraction module is equipped with a noise floor wake-up threshold. When the voltage amplitude in the background discrete voltage sequence rises and crosses the noise floor wake-up threshold, the initial integration time window is opened. The centroid extraction module uses the absolute value of the discrete voltage amplitude in the background discrete voltage sequence as a weight parameter to perform a weighted average calculation on the discrete time points within the initial integration time window, and obtains the first centroid timestamp and the second centroid timestamp corresponding to the first high-frequency signal coupling end and the second high-frequency signal coupling end at both ends of the forward propagating electromagnetic wave passing through the local physical baseline.

5. The intelligent chip-assisted cable fault precise location system according to claim 1, characterized in that, The wave velocity calibration module extracts real-time local wave velocity sequences obtained within at least two historically set inspection cycles and synthesizes a medium state baseline using a weighted moving average algorithm. The wave velocity calibration module calculates the downward offset ratio of the real-time local wave velocity relative to the medium state baseline. When the downward offset ratio is greater than or equal to a preset baseline tolerance threshold, a local insulation damage warning tag is generated, and the local insulation damage warning tag is encapsulated in a ranging data packet and uploaded to the test host.

6. The intelligent chip-assisted cable fault precise location system according to claim 1, characterized in that, The dynamic windowing module performs dispersion adaptive mapping based on the real-time local wave velocity. When the real-time local wave velocity decreases, the dynamic windowing module performs proportional conversion based on the pre-stored reference time window width, reference wave velocity, and dispersion adjustment factor, and increases the value of the dynamic integral time window parameter so that the time window covers the reflected wave energy envelope where the energy distribution is diffused.

7. The intelligent chip-assisted cable fault precise location system according to claim 1, characterized in that, The dynamic windowing module executes the anti-divergence locking logic. When the wave velocity calibration module outputs a local insulation damage warning tag, the dynamic windowing module determines that the real-time local wave velocity has entered the unreliable range and starts the anti-divergence locking mechanism, suspends the dispersion adaptive mapping calculation process, and locks the dynamic integral time window parameters backed up in the previous period when no local insulation damage warning tag was generated as the current output value and sends them to the centroid extraction module.

8. The intelligent chip-assisted cable fault precise location system according to claim 1, characterized in that, The centroid extraction module presets the reflected wave search interval based on the total length of the cable under test and the real-time local wave velocity. When the voltage amplitude of the background discrete voltage sequence within the reflected wave search interval crosses the noise floor wake-up threshold again, the centroid extraction module uses the moment when it crosses the noise floor wake-up threshold as the starting boundary of the reflected wave integration and calls the dynamic integration time window parameters output by the dynamic windowing module to perform waveform discrete integration on the reflected wave signal to obtain the reflected wave centroid timestamp.

9. The intelligent chip-assisted cable fault precise location system according to claim 1, characterized in that, The positioning and calculation module calls the absolute physical coordinates of the microcontroller's installation location stored in the microcontroller's non-volatile memory. It then linearly superimposes the absolute physical coordinates of the microcontroller's installation location with the relative distance calculated using the reflected wave centroid timestamp, the first centroid timestamp, and the real-time local wave velocity. This results in the absolute position coordinates of the target feature point carrying the warning tag, which are output in the warning mode.

10. A cable, used in the intelligent chip-assisted cable fault precise location system according to any one of claims 1-9, characterized in that, It includes, from the inside out, a conductor core, a cross-linked polyethylene insulation layer, an insulation shielding layer, a water-blocking buffer layer, a metal armor layer, and a corrosion-resistant outer sheath; micro-control nodes are pre-embedded in the water-blocking buffer layer at fixed physical intervals along the cable axis, and the micro-control nodes are embedded between the outside of the insulation shielding layer and the inside of the metal armor layer; the outside of the micro-control nodes is conformally potted with epoxy resin or polyimide material; the micro-control nodes integrate a reference acquisition module, a centroid extraction module, a wave velocity calibration module, a dynamic windowing module, and a positioning calculation module.

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