Large-page memory processing method and device, storage medium and program product

Abstract

The embodiment of the invention provides a large-page memory processing method and device, a storage medium and a program product. In the large-page memory processing method, a mechanism for actively mapping a large page of a code segment is introduced into a missing page processing flow executed by a kernel. Based on the mechanism, after a kernel determines a target virtual page with page missing abnormity, if a target interval which corresponds to the target virtual page and meets a large page alignment condition is located in a virtual address space of a code segment and has a continuous available physical memory matched with the size of the large page, the target virtual page is subjected to page missing abnormity; if yes, the kernel allocates a large-page physical memory matched with the large-page size in the direct physical memory. The kernel can reconstruct the large-page mapping relation of the target area according to the large-page physical memory before returning to the user mode. On the basis, a large page mapping mechanism is moved forward from background asynchronous scanning to a link of actually accessing a code segment, so that the code segment can obtain large page mapping as soon as possible in a key access path, and the hit rate and instruction access efficiency of the iTLB are greatly improved.

Description

Technical Field

[0001] This application relates to the field of computer data processing technology, and in particular to a method, apparatus, storage medium, and program product for processing large page memory. Background Technology

[0002] Huge TextPages (THP) is a key performance optimization technique in the Linux kernel. It utilizes the transparent huge page (Huge TextPages, THP) mechanism to map the code segments of applications and their dynamic link libraries into contiguous large memory pages (typically 2MB or 1GB), thereby significantly reducing the missing rate of the Instruction Translation Lookaside Buffer (iTLB) and greatly improving the instruction fetching efficiency of the Central Processing Unit (CPU).

[0003] However, the existing code segment big page mapping process heavily relies on the kernel background thread khugepaged. This thread employs a periodic, on-demand traversal strategy, scanning the virtual memory areas (VMAs) of all processes within the system and attempting to merge consecutive small pages that meet certain criteria into big pages. This asynchronous merging mechanism is constrained by multiple factors, including system load, scheduling priority, and scan configuration. Especially in scenarios with high concurrency, multiple processes, and a large number of VMAs, khugepaged may take several hours to complete a full scan, resulting in significant unpredictability and delays in the effective time of code segment big page mapping.

[0004] In real-world production environments, many critical applications immediately enter a high-frequency code execution phase after startup, placing extremely high demands on iTLB hit rate and instruction execution speed in real time. Due to the delay in background merging, code segment big pages often fail to take effect in a timely manner during critical process periods, and hot code segments cannot quickly achieve big page mapping, thus failing to fully realize the performance value of the code segment big page mechanism. Therefore, a new solution is needed. Summary of the Invention

[0005] This application provides a method, apparatus, storage medium, and program product for processing large page memory, in order to improve the timeliness of code segment large page mapping.

[0006] This application provides a method for handling large page memory, applied to the kernel of an operating system, comprising: responding to a page fault exception triggered by the processor when executing a code segment of a target process; in a page fault handling process corresponding to the target process, determining a target virtual page in which the page fault exception occurred, the target virtual page being located in the virtual address space of the code segment; determining a target interval corresponding to the target virtual page, the target interval satisfying a large page alignment condition; if the target interval is located in the virtual address space and the physical memory has contiguous available physical memory adapted to the large page size, then allocating large page physical memory adapted to the large page size in the physical memory; before the processor returns to user mode, executing a large page mapping function to reconstruct the large page mapping relationship of the target interval based on the large page physical memory.

[0007] Optionally, before the processor returns to user mode, the huge page mapping function is executed, including: initializing the huge page mapping function and adding the huge page mapping function to the task callback list of the target process; scanning the task callback list in the kernel exit path after the page fault handling process is completed to determine the huge page mapping function to be executed, and executing the huge page mapping function.

[0008] Optionally, adding the big page mapping function to the task callback list of the target process includes: reading the value of the target configuration bit in the kernel parameters; if the value of the target configuration bit is a specified value, then determining to start the big page active mapping function of the code segment; and if the big page active mapping function of the code segment is started, adding the big page mapping function to the task callback list of the target process.

[0009] Optionally, the value of the target configuration bit is fixed during the startup phase of the operating system, or it is dynamically set through the kernel interface.

[0010] Optionally, a large page mapping function is executed to reconstruct the large page mapping relationship of the target interval based on the large page physical memory. This includes: during the execution of the large page mapping function, if the target virtual page is the first virtual page in the target interval, then establishing a mapping relationship between the target interval and the large page physical memory; or, if the target virtual page is not the first virtual page in the target interval, then determining the physical page corresponding to the read virtual page located before the target virtual page in the target interval, migrating the data in the physical page corresponding to the read virtual page to the large page physical memory, and establishing a mapping relationship between the target interval and the large page physical memory.

[0011] Optionally, it further includes: if the physical memory does not have contiguous available physical memory that matches the large page size, then allocate a corresponding target physical page for the target virtual page; add the target physical page to the scan list of the target background thread, so as to wait for the target background thread to defragment the physical memory and then asynchronously perform large page mapping on the physical pages allocated to the target range.

[0012] Optionally, it further includes: if the target interval partially overlaps with the virtual address space, then the target physical page is added to the scan list of the target background thread, so as to wait for the target background thread to defragment the physical memory and then asynchronously perform big page mapping on the physical pages allocated to the target interval.

[0013] Optionally, it further includes: if the target interval partially overlaps with the virtual address space, then add a rollback flag to the target interval, the rollback flag being used to: suppress the allocation of large page physical memory to the target interval when a page fault occurs in a virtual page located after the target virtual page in the target interval.

[0014] This application also provides an electronic device, including: a memory and a processor; the memory is used to store one or more computer instructions; the processor is used to execute the one or more computer instructions to perform the steps in the method provided in this application.

[0015] This application also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, can implement the steps in the method provided in this application.

[0016] This application also provides a computer program product, including: a computer program / instructions, which, when executed by a processor, can implement the steps in the method provided in this application.

[0017] In this embodiment, when a page fault is triggered during code segment execution, a mechanism for actively mapping large pages of the code segment is introduced into the page fault handling process executed by the kernel. Based on this mechanism, after the kernel determines the target virtual page where the page fault occurred, if the target region corresponding to the target virtual page that meets the large page alignment condition is located in the virtual address space of the code segment, and the physical memory has contiguous available physical memory adapted to the large page size, then large page physical memory adapted to the large page size is allocated in direct physical memory. The kernel can reconstruct the large page mapping relationship of the target region based on the large page physical memory before returning to user mode. Based on this, the large page mapping mechanism can be moved from background asynchronous scanning to the actual code segment access stage, and active mapping of large pages of the code segment is realized. On the one hand, it enables the code segment to obtain large page mapping as soon as possible in the critical access path, greatly improving the iTLB hit rate and instruction access efficiency; on the other hand, it reduces the dependence on the khugepaged background thread, thus effectively alleviating the performance bottleneck caused by waiting for the khugepaged background thread to integrate, and meeting the timeliness requirements of high concurrency and high response scenarios. Attached Figure Description

[0018] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 A flowchart illustrating a large page memory processing method provided for an exemplary embodiment of this application; Figure 2 A flowchart illustrating the process of actively mapping a code segment to a large page based on a task callback mechanism, as provided in an exemplary embodiment of this application; Figure 3 A schematic diagram illustrating asynchronous big page consolidation and active big page mapping with flexible selection of code segments provided for an exemplary embodiment of this application; Figure 4 A schematic diagram illustrating the coexistence of asynchronous big page integration and active big page mapping in code segments, provided for an exemplary embodiment of this application; Figure 5 A schematic diagram of the structure of an electronic device provided for an exemplary embodiment of this application. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0020] The terminology used in the embodiments of this invention is for the purpose of describing particular embodiments only and is not intended to limit the invention. The singular forms “a,” “the,” and “the” used in the embodiments of this invention and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. “Multiple” generally includes at least two, but does not exclude the inclusion of at least one. “A plurality” generally includes at least two, but does not exclude the inclusion of at least one.

[0021] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0022] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a product or system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a product or system. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the product or system that includes said element.

[0023] During memory management optimization, the khugepaged background process provides an asynchronous merging mechanism. This mechanism automatically merges suitable memory regions into transparent big pages through scanning, thereby reducing the number of page table entries and improving iTLB hit rate. Since khugepaged runs as a background service, memory merging is not instantaneous, and in some cases, memory access performance may not improve immediately in the short term. One approach to big-page mapping for code segments attempts to create a separate list of VMAs for the code segment to distinguish it from other anonymous page segments. khugepaged prioritizes processing the VMAs list for the code segment, ensuring that the process quickly improves performance by relying on code big pages. However, even in this approach, the background scanning and merging behavior of the khugepaged process is still affected by multiple factors such as overall system load, scheduling algorithms, and the khugepaged period settings, making it impossible to guarantee the real-time nature of code segment big-page mapping. Furthermore, from the user application's perspective, background priority merging is always a passively triggered behavior and cannot big-page code segments based on actual, immediate memory access needs. When an application accesses code segments frequently during startup or certain critical phases, the large pages of the code segments may not have been integrated in time, inevitably leading to performance bottlenecks.

[0024] To address the issue of delayed integration of large pages in code segments, this application provides a solution in some embodiments. The technical solutions provided by each embodiment of this application are described in detail below with reference to the accompanying drawings.

[0025] Figure 1 This is a flowchart illustrating a large page memory processing method provided in an exemplary embodiment of this application. The method may include, for example: Figure 1 The steps shown are as follows: Step 101: The operating system kernel response processor triggers a page fault when executing the code segment of the target process. In the page fault handling process of the target process, the target virtual page where the page fault occurred is determined. The target virtual page is located in the virtual address space of the code segment.

[0026] Step 102: Determine the target interval corresponding to the target virtual page, wherein the target interval satisfies the large page alignment condition.

[0027] Step 103: If the target interval is located in the virtual address space and the physical memory has contiguous available physical memory adapted to the large page size, then allocate large page physical memory adapted to the large page size in the physical memory.

[0028] Step 104: Before the processor returns to user mode, execute the large page mapping function to reconstruct the large page mapping relationship of the target interval based on the large page physical memory.

[0029] This application's embodiments apply to page fault scenarios involving code segments. A code segment refers to a memory region in a process's address space specifically used to store executable instructions. It typically originates from the program's main executable file and dynamic link libraries, such as the .text segment in ELF (Executable and Linkable Format). Code segments are generally read-only and executable, serving as the direct source for the CPU to fetch and execute instructions.

[0030] The operating system manages memory in pages, typically 4KB in size. In step 101, the virtual address space of the code segment refers to a contiguous range of virtual addresses allocated by the operating system to the code segment of the target process. If the code segment is larger than 4KB, its virtual address space will be divided into several contiguous 4KB virtual pages.

[0031] When the CPU executes the code segment of the target process in user mode, it can fetch the next machine instruction to be executed from memory based on the virtual address stored in the program counter (PC). The Memory Management Unit (MMU) then takes over. The MMU is responsible for translating virtual addresses into physical addresses, and its core mechanism is page table lookup. The page table is a data structure maintained by the operating system that records the mapping relationship between all virtual pages and physical pages of the process. A page table entry (PTE) is the smallest unit (i.e., each record) in the page table. Each PTE corresponds to a virtual page, which contains not only the corresponding physical frame number (PFN) but also a series of control flags, such as the present bit (P bit). After finding the corresponding PTE, the MMU checks the P bit; if P=1, it means that the virtual page has been mapped to physical memory, the MMU continues to complete the address translation, and the CPU accesses data or instructions normally. If P=0, it means that the virtual page is not currently mapped to physical memory.

[0032] During the virtual address to physical address translation process, if the MMU detects that the P bit of the PTE corresponding to a virtual page is 0, it will immediately abort the current address translation process and report a hardware exception, namely a page fault, to the CPU. Upon receiving the exception signal, the CPU will stop the instruction stream of the target process, save the execution context of the target process, and store the target virtual address that caused the page fault into a specific control register. Then, the CPU switches from user mode to kernel mode and automatically jumps to the entry address of the page fault handler pre-registered by the operating system kernel. Subsequently, the operating system kernel code will run in the kernel context of the target process. The kernel analyzes the fault address and process state to execute the specific page fault handling procedure.

[0033] In this embodiment, during the page fault handling process, the operating system kernel can determine the target virtual address that caused the page fault by reading the specific register, and determine the virtual page to which the target virtual address belongs in the virtual address space of the code segment as the target virtual page where the page fault occurred.

[0034] It should be noted that the kernel can execute the method provided in this embodiment in the page fault exception process of each virtual page, so as to attempt to actively map the code segment to a big page in each page fault exception process.

[0035] In step 102, the target interval refers to a virtual interval containing the target virtual page that satisfies the big page alignment condition. Satisfying the big page alignment condition means that the starting address of the virtual interval is a multiple of the big page size. For example, when the big page size is 2MB, the starting address of the virtual interval satisfying the big page alignment condition should be a multiple of 2MB. That is, the starting address A of the virtual interval should satisfy A(mod 2MB) = 0, and the starting address A can be 0, 2MB, 4MB, 6MB, etc. For the target virtual address V, the starting address A of the target interval that satisfies the big page alignment condition is calculated as: A = [V / 2MB] × 2MB, and the ending address is: B = A + 2MB. For example, if the target virtual address triggering the page fault is 3MB + 4KB, the target virtual space that satisfies the big page alignment condition should be the virtual space corresponding to 2MB - 4MB.

[0036] In step 103, the target interval being located within the virtual address space means that the target interval has not overflowed the virtual address space corresponding to the code segment and has not crossed the boundary between two virtual spaces with different attributes. In this step, the kernel can determine whether the target interval meets the big page allocation condition by judging whether the target interval is located within the virtual address space of the code segment. For example, suppose the virtual address space of the target process's code segment is 0-3MB. If the target virtual address corresponds to a target virtual space of 0-2MB, then the target interval is determined to be located within the virtual address space and meets the big page allocation condition. If the target virtual address corresponds to a target space of 2MB-4MB, then the target interval has overflowed the boundary of the virtual address space and therefore does not meet the big page allocation condition.

[0037] If the target range meets the conditions for large page allocation, the kernel can further determine whether there is contiguous available physical memory in physical memory that matches the large page size. If there is contiguous available physical memory in physical memory that matches the large page size, the kernel can allocate large page physical memory in that physical memory. For example, if the large page size is 2MB, and there is a contiguous 2MB of memory in physical memory, then this contiguous 2MB can be divided into a large page physical memory.

[0038] In other words, in the page fault handling process, if the target interval corresponding to the target virtual page meets the big page alignment condition, the target interval is located in the virtual address space, and the physical memory has contiguous available physical memory that matches the big page size, then big page physical memory can be allocated to the target interval in one go. This is beneficial for timely meeting the big page mapping requirements of the code segment without waiting for the background thread to perform big page mapping.

[0039] In step 104, the kernel can execute a large page mapping function before the CPU returns to user mode. This large page mapping function is a custom-developed kernel function used to reconstruct the large page mapping relationship of the target interval based on the physical memory of the pages. That is, based on this large page physical memory, the page table mapping relationship of the target interval is established or updated to replace the multiple smaller page table entries that originally corresponded to the target interval with a single large page table entry. For example, in a scenario where the large page size is 2MB and the page size is 4KB, a single high-level page table entry, such as the PMD (Page Middle Directory) entry in the x86_64 architecture, pointing to a contiguous 2MB physical address, can replace up to 512 page table entries that originally corresponded to the target interval.

[0040] After reconstructing the big page mapping for the target region, the kernel can flush the iTLB. Then, the kernel can restore the previously saved context and return to user mode, where the CPU can re-execute the instructions that triggered the page fault.

[0041] In this embodiment, when a page fault is triggered during code segment execution, a mechanism for actively mapping large pages of the code segment is introduced into the page fault handling process executed by the kernel. Based on this mechanism, after the kernel determines the target virtual page where the page fault occurred, if the target region corresponding to the target virtual page that meets the large page alignment condition is located in the virtual address space of the code segment, and the physical memory has contiguous available physical memory adapted to the large page size, then large page physical memory adapted to the large page size is allocated in direct physical memory. The kernel can reconstruct the large page mapping relationship of the target region based on the large page physical memory before returning to user mode. Based on this, the large page mapping mechanism can be moved from background asynchronous scanning to the actual code segment access stage, and active mapping of large pages of the code segment is realized. On the one hand, it enables the code segment to obtain large page mapping as soon as possible in the critical access path, which greatly improves the iTLB hit rate and instruction access efficiency; on the other hand, it reduces the dependence on the khugepaged background thread, thus effectively alleviating the performance bottleneck caused by waiting for the khugepaged background thread to integrate, and meeting the timeliness requirements of high concurrency and high response scenarios.

[0042] Specifically, in some scenarios, if a page fault is triggered during the first access to a code segment, the mechanism for large page mapping, based on the solution provided in this embodiment, can be moved from asynchronous background scanning to the critical node during the first access to the code segment. This allows for a one-time, proactive large page mapping of the code segment during the first access, reducing the number of interruptions triggered by page faults during subsequent accesses and further improving the timeliness of large page mapping to meet the high-frequency access requirements of subsequent stages. For example, in the x86_64 architecture, a 2MB large page can replace 512 4KB small pages. During the page fault process, rebuilding 512 lower-level page table entries (PTEs) into one higher-level page table entry (PMD) reduces iTLB entry consumption by 512 times. With the same TLB capacity, the CPU can cache more virtual address mappings, significantly improving the iTLB hit rate. Furthermore, maintaining 512 PTEs requires a complete 4KB physical page as a page table page, while a large page mapping typically only requires an 8-byte PMD entry. This timely code segment big page mapping facilitates the timely reclamation of large amounts of physical memory originally used to store page table structures, indirectly increasing the available data space.

[0043] In different page fault scenarios, the current physical mapping state of the target interval differs. For example, in some scenarios, the target virtual page that triggers the page fault is the first virtual page in the target interval. When the CPU executes code segments sequentially, if the first virtual page of the target interval triggers a page fault, it means that the target virtual page and the unread virtual pages following it in the target interval are usually also unallocated physical memory. That is, the entire target interval is in an unmapped state. In this case, the kernel can directly create a large page table entry in the page table to directly map the target interval to large page physical memory. That is, in some optional embodiments, during the execution of the large page mapping function, if the target virtual page is the first virtual page in the target interval, the kernel creates a large page table entry in the page table and writes the mapping relationship between the target interval and the large page physical memory into the large page table entry.

[0044] In other scenarios, the target virtual page that triggers the page fault is not the first virtual page in the target interval. That is, the read virtual pages preceding the target virtual page in the target interval are usually already allocated corresponding physical pages, and these physical pages store valid data. The kernel can completely migrate the data originally scattered across physical pages to the large page physical memory, replace the original small page table entries in the target interval with a large page table entry, and release the resources of these physical pages. Specifically, in some optional embodiments, if the target virtual page is not the first virtual page in the target interval, the physical pages corresponding to the read virtual pages preceding the target virtual page in the target interval are determined, and the data in the physical pages corresponding to the read virtual pages is migrated to the large page physical memory; and a large page table entry is created in the page table, and the mapping relationship between the target interval and the large page physical memory is written into the large page table entry.

[0045] Based on this implementation, the kernel can flexibly adapt to different scenarios with varying physical mapping states of the target range. When the CPU first accesses the target range and triggers a page fault, if the target range is in a state of unallocated physical memory, the kernel can allocate physical memory for all virtual pages in the target range by performing one physical memory allocation and one page table entry write. This not only solves the page fault problem for the target virtual page but also avoids potential page fault interruptions when accessing subsequent virtual pages in the target range, achieving theoretically minimal large page mapping latency. Secondly, provided that there is still sufficient physical memory space, actively preempting contiguous large page physical space ensures the timely establishment of large page mapping from the source, reducing the risk of subsequent excessive fragmentation of physical memory leading to the inability to execute large page mapping.

[0046] If the CPU fails to perform big page mapping when it first accesses the target region and triggers a page fault, it can continuously and actively attempt big page mapping during subsequent accesses to the target region. That is, the kernel can execute the method provided in this embodiment to determine whether there is contiguous available physical memory that matches the big page size each time a page fault is triggered. In this case, the virtual pages already read in the target region will be physically mapped one by one, resulting in some scattered physical pages. If the kernel determines that there is contiguous available physical memory that matches the big page size during the exception handling process for a non-first virtual page in the target region, it can migrate the data of the existing scattered physical pages and reconstruct the big page mapping relationship of the target region. Even if no big page physical memory is allocated when the target region first triggers a page fault, big page mapping can be performed on the code segment as early as possible if the conditions are met.

[0047] Based on the two implementation methods described above, regardless of the physical mapping state of the target interval, the kernel can complete the big page mapping of the code segment as early as possible, thereby meeting the need for high-frequency access to the code segment in subsequent stages.

[0048] In some alternative embodiments, the kernel may utilize a task callback mechanism to execute a page mapping function before the CPU returns to user mode. A task is a mechanism that ensures a specified kernel operation is executed within the target process context, allowing the specified kernel operation to be safely deferred until the "last moment" before the target process returns to user mode. The specified kernel operation can be a callback function. Exemplary examples will follow.

[0049] Optionally, in the page fault handling process corresponding to the target process, the kernel may initialize a huge page mapping function and add the huge page mapping function to the task_work linked list of the target process; in the kernel exit path after the page fault handling process is completed, the task_work linked list is scanned to determine the huge page mapping function to be executed and the huge page mapping function is executed.

[0050] The kernel exit path refers to the operational flow that the CPU must execute after the kernel has completed the page fault handling logic, before switching from kernel mode back to user mode. In the kernel exit path, the kernel can check if there are any pending tasks in the target process's `task_work` list. If there are, a pending task (i.e., a big page mapping function) exists, the big page mapping function is executed in the kernel context of the target process to merge the physical pages corresponding to the virtual address space of the code segment into big pages of physical memory. Once the big page mapping function has finished executing, the kernel can execute a privilege level switch instruction to switch the CPU from kernel mode back to user mode and resume execution of the target process.

[0051] In some embodiments, the kernel may execute tasks based on the task_work mechanism, such as... Figure 2 The large page active mapping process is shown below. Figure 2As shown, in step 201, after entering a page fault interrupt, the kernel can allocate contiguous physical pages for virtual pages that have not yet been mapped to physical addresses within the page fault interrupt handling flow. In step 202, the kernel can allocate a mapping information structure for the target process. This mapping information structure is used to store and manage information associated with big page mapping, such as the range of the virtual address space of the code segment, the addresses of the virtual pages contained in the virtual address space, and the addresses of the physical pages corresponding to the virtual pages, so that the big page mapping function can perform big page mapping operations according to the mapping information structure. In step 203, the kernel can initialize the big page mapping function and call `task_work_add()` to atomically add the big page mapping function to the `task_work` linked list of the target process as a callback. In step 204, when the kernel finishes executing the page fault exception handling flow in the context of the target process and is about to return to user mode through the kernel exit path, the code in the exit path will call `task_work_run()` to execute the callback. This function will traverse and execute all the pending callback functions in the linked list in turn. After execution, the linked list is cleared. In step 205, the `task_work_run()` function can call the big page function to perform big page mapping through the mapping information structure. Only after all tasks have been processed does the CPU officially switch back to user mode to continue executing the instructions of the target process.

[0052] Based on this implementation, the kernel can utilize the `task_work` mounting mechanism to proactively schedule the big page mapping function within the page fault handling process of the target process. This shifts the timing of transparent big page mapping for code segments to the page fault triggering stage. Compared to the traditional method of asynchronously executing big page mapping using a background `khugepaged` thread, this proactive mapping mechanism significantly improves the response speed and timeliness of big page mapping for code segments, enabling applications to promptly obtain the performance benefits of big page mapping when accessing hot code segments.

[0053] In some optional embodiments, the enabling or disabling of the code segment big page active mapping function can be flexibly controlled when the code segment big page function is enabled. Enabling the code segment big page function means that the operating system has enabled the code segment big page function, supporting the mapping of executable code portions of a program to big pages. In some embodiments, the enabling or disabling of the code segment big page active mapping function can be controlled by configuring kernel parameters. Optionally, a target configuration bit can be extended in the kernel parameters. This target configuration bit is used to control the enabling or disabling of the code segment big page active mapping function. If the value of the target configuration bit is a specified value, such as 1, it indicates that the code segment big page active mapping function is enabled; if the value of the target configuration bit is not a specified value, such as 0, it indicates that the code segment big page active mapping function is not enabled. The path of the target configuration bit in the kernel parameters can be: / sys / kernel / mm / transparent_hugepage / hugetext_enabled. In some optional embodiments, the value of this target configuration bit is fixed during the operating system startup phase, or it is dynamically set through the kernel interface. In some embodiments, user-mode applications can dynamically call kernel interfaces to write the value of the target configuration bit according to the actual code segment big page mapping requirements, thereby allowing user-mode applications to flexibly start or stop the code segment big page active mapping function, meet the big page mapping strategies in different scenarios, and take into account the requirements of access performance and stability.

[0054] In some optional embodiments, when the kernel adds the big page mapping function to the task callback list of the target process, it can read the value of the target configuration bit in the kernel parameters. If the target configuration value is a specified value, the kernel determines to start the big page active mapping function of the code segment. The kernel can add the big page mapping function to the task callback list of the target process when the big page active mapping function of the code segment is started.

[0055] Based on this implementation, the kernel can determine whether the big page mapping function of the code segment is enabled by reading the value configured for the target, thereby ensuring that the big page mapping operation of the code segment is controlled and conforms to the big page mapping strategy configured in user space.

[0056] In some optional embodiments, a fault-tolerant rollback mechanism can be added during the active big page mapping of code segments. That is, when the big page mapping conditions are not met, the process can be rolled back to the background thread integration scheme to ensure that big page mapping opportunities are not missed when the big page mapping conditions are not met.

[0057] As described in the foregoing embodiments, the conditions for directly executing big page mapping in the page fault process include: the target interval corresponding to the target virtual page that triggered the page fault is located in the virtual address space, and the physical memory has contiguous available physical memory adapted to the big page size. Conversely, if the target interval partially overlaps with the virtual address space, no active big page mapping is performed on the target interval. When the target interval partially overlaps with the virtual address space, a boundary overflow occurs in the target interval. That is, although the target virtual address that triggered the page fault is located in the target interval that meets the big page alignment conditions, the target interval exceeds the boundary of the code segment's virtual address space, and therefore the conditions for directly executing big page mapping are not met. In this case, the active attempt to perform big page mapping may not be performed in this page fault handling process, and instead, the process may fall back to the background thread integration scheme. Alternatively, if the physical memory does not have contiguous available physical memory adapted to the big page size, and the conditions for directly executing big page mapping are not met, the kernel may not perform an active attempt to perform big page mapping in this page fault handling process.

[0058] In this implementation, the kernel can allocate a corresponding target physical page for the target virtual page in physical memory and add the target physical page to the scan list of the target background thread. This allows the kernel to asynchronously perform big page mapping on the physical pages allocated to the target range after the target background thread has defragmented the physical memory. The target background thread can be a khugepaged thread used for big page mapping.

[0059] In this implementation, the `defrag` parameter in the kernel parameters can be configured to avoid the high latency and performance fluctuations caused by forced memory defragmentation when memory is insufficient, effectively improving stability in fragmented environments. When the kernel needs to allocate a large page, but there is no contiguous large page physical memory (e.g., 2MB) in current memory, the `defrag` parameter controls whether the kernel should attempt to defragment memory to create this large page. In this embodiment, the value of the `defrag` parameter can be set to: delay defragmentation. That is, when a large page is needed but the memory is not contiguous, the kernel will not immediately block the application to defragment, but will first allocate a small page to satisfy the request, and then attempt to defragment asynchronously in the background so that future large page allocation can succeed. In this scheme, when physical memory is fragmented and a contiguous large physical memory space (e.g., 2MB of physical space) cannot be created, the kernel will revert to the traditional page fault handling mode, allocating only a physical page (e.g., 4KB) for the target virtual page that is currently experiencing a page fault to resolve the current page fault. It waits for the target background thread to perform memory defragmentation to create a sufficiently large physical memory space before performing large page mapping on the physical page of the code segment.

[0060] Based on this fault-tolerant rollback mechanism, even if the conditions for large page mapping are not available at the moment a page fault occurs, the physical pages allocated in this page fault handling process will not miss subsequent large page mapping opportunities, thus balancing the real-time performance and robustness of large page mapping, provided that the large page active mapping function is enabled in the code segment.

[0061] It is worth noting that in some optional embodiments, if the target interval partially overlaps with the virtual address space of the code segment, the kernel can add a rollback flag to the target interval. This rollback flag is used to suppress the allocation of large page physical memory to the target interval when a page fault occurs in a virtual page located after the target virtual page within the target interval. In other words, in the page fault handling process triggered by the target virtual page, if the target interval cannot actively attempt large page mapping during the page fault process due to boundary overflow, the kernel can prevent subsequent page fault handling processes from attempting to actively map large pages to the target interval by adding a specific flag to the target interval.

[0062] Based on this implementation method, once it is determined that the target interval cannot be directly mapped due to boundary overflow, the number of active attempts to map the large page can be reduced based on the rollback flag of the target interval. This reduces the physical memory check operations and logical judgment operations required for active attempts to map the large page, effectively saving the overhead of the kernel's page fault handling process and improving the efficiency of page fault handling.

[0063] The following will combine Figure 3 as well as Figure 4 This section provides an illustrative example of a solution for the coexistence of active large-page mapping and asynchronous integration in code segments. For example... Figure 3 As shown, when the CPU triggers a page fault, the kernel can determine whether the page fault was caused by a code segment and whether the code segment is suitable for merging into a big page. For example, if the code segment size is greater than 2MB and the virtual address space of the code segment meets the address alignment requirements, then it can be determined that the code segment is suitable for merging into a big page. The kernel can determine whether the big page function of the code segment is enabled, that is, whether the big page mapping function of the code segment is enabled. If so, the kernel can further determine whether the active big page mapping function of the code segment is started by checking the value of the target configuration bit in the kernel parameters. If the active mapping function of the code segment is not started, the kernel can allocate physical pages to the VMA of the target code segment that triggered the page fault to resolve the page fault problem, and use an asynchronous merging scheme to perform big page mapping of the code segment through the background khugepaged thread. Figure 4 As shown, in the asynchronous consolidation scheme, the kernel can add the VMA of the target code segment to the background asynchronous consolidation queue. The khugepaged thread can periodically scan the VMA in the background asynchronous consolidation queue and consolidate VMAs that meet the conditions for large page size and address alignment into transparent large pages. Figure 3 As shown, if the code segment's active big page mapping function is enabled, the kernel can determine whether the physical memory meets the resource conditions for big page mapping, that is, whether the physical memory has physical resources that can accommodate the big page size. If the physical memory meets the resource conditions, the kernel can execute the code segment's active big page mapping process, which can be as follows: Figure 2 As shown. If physical memory does not meet resource requirements, the kernel can roll back to an asynchronous consolidation scheme based on a rollback mechanism. For example... Figure 4 As shown, the kernel can add the VMA of the target code segment to the background asynchronous consolidation queue, so that when the khugepaged thread performs memory defragmentation to obtain a sufficiently large amount of physical memory, the VMA that meets the address alignment conditions will be consolidated into a transparent big page, which will not be elaborated further.

[0064] It should be noted that the execution subject of each step of the method provided in the above embodiments can be the same device, or the method can be executed by different devices. For example, the execution subject of steps 101 to 104 can be device A; or the execution subject of steps 101 and 102 can be device A, and the execution subject of step 103 can be device B; and so on.

[0065] Furthermore, some processes described in the above embodiments and accompanying drawings include multiple operations appearing in a specific order. However, it should be clearly understood that these operations may not be executed in the order they appear herein, or they may be executed in parallel. The operation numbers, such as 101, 102, etc., are merely used to distinguish different operations and do not represent any execution order. Additionally, these processes may include more or fewer operations, and these operations may be executed sequentially or in parallel. It should be noted that the descriptions such as "first" and "second" in this document are used to distinguish different messages, devices, modules, etc., and do not represent a sequential order, nor do they limit "first" and "second" to different types.

[0066] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties. Furthermore, the collection, use and processing of the relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and corresponding operation entry points are provided for users to choose to authorize or refuse.

[0067] Figure 5 This application illustrates a schematic diagram of the structure of an electronic device provided in an exemplary embodiment, as shown below. Figure 5 As shown, the electronic device includes: a memory 501, a processor 502, and a communication component 503.

[0068] Memory 501 is used to store computer programs and can be configured to store various other data to support operation on the electronic device. Examples of this data include instructions for any application or method used to operate on the electronic device, data structures, contact data, phone book data, messages, pictures, videos, etc.

[0069] In some embodiments, the computer program stored in memory 501 may be the kernel program of an operating system. Processor 502, coupled to memory 501, is configured to execute the computer program in memory 501 to: respond to a page fault triggered while executing a code segment of a target process; in a page fault handling flow corresponding to the target process, determine the target virtual page where the page fault occurred, the target virtual page being located in the virtual address space of the code segment; determine a target interval corresponding to the target virtual page, the target interval satisfying a big page alignment condition; if the target interval is located in the virtual address space and the physical memory has contiguous available physical memory adapted to the big page size, allocate big page physical memory adapted to the big page size in the physical memory; and before returning to user mode, execute a big page mapping function to reconstruct the big page mapping relationship of the target interval based on the big page physical memory.

[0070] Optionally, before returning to user mode, the processor 502 executes the huge page mapping function, including: initializing the huge page mapping function and adding the huge page mapping function to the task callback list of the target process; and scanning the task callback list in the kernel exit path after the page fault handling process is completed to determine the huge page mapping function to be executed and execute the huge page mapping function.

[0071] Optionally, the processor 502 adds the big page mapping function to the task callback list of the target process by: reading the value of the target configuration bit in the kernel parameters; if the value of the target configuration bit is a specified value, determining to start the big page active mapping function of the code segment; and adding the big page mapping function to the task callback list of the target process when the big page active mapping function of the code segment is started.

[0072] Optionally, the value of the target configuration bit is fixed during the startup phase of the operating system, or it is dynamically set through the kernel interface.

[0073] Optionally, when the processor 502 executes the large page mapping function to reconstruct the large page mapping relationship of the target interval based on the large page physical memory, it includes: during the execution of the large page mapping function, if the target virtual page is the first virtual page in the target interval, then establishing a mapping relationship between the target interval and the large page physical memory; or, if the target virtual page is not the first virtual page in the target interval, then determining the physical page corresponding to the read virtual page located before the target virtual page in the target interval, migrating the data in the physical page corresponding to the read virtual page to the large page physical memory, and establishing a mapping relationship between the target interval and the large page physical memory.

[0074] Optionally, the processor 502 is further configured to: if the physical memory does not have contiguous available physical memory that matches the large page size, allocate a corresponding target physical page for the target virtual page; add the target physical page to the scan list of the target background thread, so as to wait for the target background thread to defragment the physical memory and then asynchronously perform large page mapping on the physical pages allocated to the target range.

[0075] Optionally, the processor 502 is further configured to: if the target range partially overlaps with the virtual address space, add the target physical page to the scan list of the target background thread, and wait for the target background thread to defragment the physical memory before asynchronously performing big page mapping on the physical pages allocated to the target range.

[0076] Optionally, the processor 502 is further configured to: if the target interval partially overlaps with the virtual address space, add a rollback flag to the target interval, wherein the rollback flag is configured to: suppress the allocation of large page physical memory to the target interval when a page fault occurs in a virtual page located after the target virtual page in the target interval.

[0077] Furthermore, such as Figure 5 As shown, the electronic device also includes other components such as a power supply component 504, a display component 505, and an audio component 506. Figure 5 The diagram only shows some components and does not mean that the electronic device includes only these components. Figure 5 The components shown. Figure 5 In this embodiment, the components within the dashed boxes are optional, not mandatory, and their specific requirements depend on the product form of the electronic device. The electronic device in this embodiment can be a terminal device such as a desktop computer, laptop computer, smartphone, or IoT device, or a server-side device such as a conventional server, cloud server, or server array. If the electronic device in this embodiment is a terminal device such as a desktop computer, laptop computer, or smartphone, it may include... Figure 5The components within the dashed box; if the electronic device in this embodiment is implemented as a conventional server, cloud server, or server array, etc., it may be omitted. Figure 5 The component within the dashed box.

[0078] The memory 501 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random-access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0079] The communication component 503 is configured to facilitate wired or wireless communication between the device containing the communication component and other devices. The device containing the communication component can access wireless networks based on communication standards, such as 2G (e.g., Global System for Mobile Communications (GSM)), 3G (e.g., Wideband Code Division Multiple Access (WCDMA), 4G (e.g., Long Term Evolution (LTE)), 4G+ (e.g., LTE-Advanced (LTE-A)), or 5G (5th Generation Mobile Communication Technology), or combinations thereof. In one exemplary embodiment, the communication component receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel.

[0080] The power supply component 504 is used to provide power to various components of the device in which it resides. The power supply component may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the device in which it resides.

[0081] The display component includes a screen, which may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen can be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors can sense not only the boundaries of the touch or swipe action but also the duration and pressure associated with the touch or swipe operation.

[0082] An audio component may be configured to output and / or input audio signals. For example, the audio component includes a microphone (MIC) configured to receive external audio signals when the device containing the audio component is in an operating mode, such as call mode, recording mode, or voice recognition mode. The received audio signals may be further stored in memory or transmitted via a communication component. In some embodiments, the audio component also includes a speaker for outputting audio signals.

[0083] In this embodiment, when a page fault is triggered during code segment execution, a mechanism for actively mapping large pages of the code segment is introduced into the page fault handling process executed by the kernel. Based on this mechanism, after the kernel determines the target virtual page where the page fault occurred, if the target region corresponding to the target virtual page that meets the large page alignment condition is located in the virtual address space of the code segment, and the physical memory has contiguous available physical memory adapted to the large page size, then large page physical memory adapted to the large page size is allocated in direct physical memory. The kernel can reconstruct the large page mapping relationship of the target region based on the large page physical memory before returning to user mode. Based on this, the large page mapping mechanism can be moved from background asynchronous scanning to the actual code segment access stage, and active mapping of large pages of the code segment is realized. On the one hand, it enables the code segment to obtain large page mapping as soon as possible in the critical access path, which greatly improves the iTLB hit rate and instruction access efficiency; on the other hand, it reduces the dependence on the khugepaged background thread, thus effectively alleviating the performance bottleneck caused by waiting for the khugepaged background thread to integrate, and meeting the timeliness requirements of high concurrency and high response scenarios.

[0084] Accordingly, embodiments of this application also provide a computer-readable storage medium storing a computer program, which, when executed by a processor, enables the processor to implement the steps in the above-described method embodiments. The computer-readable storage medium includes volatile or non-volatile components, or a combination thereof, and can be removable or non-removable. Examples of computer-readable storage media include, but are not limited to, phase-change random access memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random-access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), flash memory or other memory technologies, CD-ROM, Digital Video Disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transmission medium. Accordingly, this application also provides a computer program product, which includes a computer program or instructions that, when executed by a processor, cause the processor to implement the steps in the above method embodiments. It should be understood that each step or combination of steps in the above method flow can be implemented by the computer program or instructions. Furthermore, these computer programs or instructions can be applied to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device, enabling the processor of the general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing device to function as an apparatus for implementing the corresponding functions in the above method embodiments.

[0085] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, product, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, product, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, product, or apparatus that includes said element.

[0086] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A method for handling large page memory, characterized in that, The kernel used in operating systems includes: When a page fault is triggered by the response processor while executing a code segment of the target process, the target virtual page where the page fault occurred is determined in the page fault handling flow corresponding to the target process. The target virtual page is located in the virtual address space of the code segment. Determine the target interval corresponding to the target virtual page, wherein the target interval satisfies the large page alignment condition; If the target range is located in the virtual address space and the physical memory has contiguous available physical memory that is compatible with the large page size, then large page physical memory that is compatible with the large page size is allocated in the physical memory. Before the processor returns to user mode, a large page mapping function is executed to reconstruct the large page mapping relationship of the target interval based on the large page physical memory.

2. The method according to claim 1, characterized in that, Before the processor returns to user mode, the big page mapping function is executed, including: Initialize the big page mapping function and add the big page mapping function to the task callback list of the target process; In the kernel exit path after the page fault handling process is completed, the task callback list is scanned to determine the huge page mapping function to be executed, and the huge page mapping function is executed.

3. The method according to claim 2, characterized in that, Adding the big page mapping function to the task callback list of the target process includes: Read the value of the target configuration bit in the kernel parameters; If the target configuration is set to a specified value, then the large page active mapping function of the startup code segment is determined; When the big page active mapping function of the startup code segment is enabled, the big page mapping function is added to the task callback list of the target process.

4. The method according to claim 3, characterized in that, The value of the target configuration bit is either fixed during the startup phase of the operating system or dynamically set through the kernel interface.

5. The method according to any one of claims 1-4, characterized in that, Execute the large page mapping function to reconstruct the large page mapping relationship of the target interval based on the large page physical memory, including: During the execution of the large page mapping function, if the target virtual page is the first virtual page in the target interval, a large page table entry is created in the page table, and the mapping relationship between the target interval and the large page physical memory is written in the large page table entry. or, If the target virtual page is not the first virtual page in the target interval, then determine the physical page corresponding to the read virtual page located before the target virtual page in the target interval, and migrate the data in the physical page corresponding to the read virtual page to the large page physical memory; and, establish a large page table entry in the page table, and write the mapping relationship between the target interval and the large page physical memory in the large page table entry.

6. The method according to any one of claims 1-4, characterized in that, Also includes: If the target range partially overlaps with the virtual address space, or if the physical memory does not have contiguous available physical memory that matches the large page size, then a corresponding target physical page is allocated for the target virtual page; The target physical page is added to the scan list of the target background thread, so that after the target background thread defragments the physical memory, it asynchronously performs big page mapping on the physical pages allocated to the target range.

7. The method according to claim 6, characterized in that, Also includes: If the target interval partially overlaps with the virtual address space, a rollback flag is added to the target interval. The rollback flag is used to suppress the allocation of large page physical memory to the target interval when a page fault occurs in a virtual page located after the target virtual page in the target interval.

8. An electronic device, characterized in that, include: Memory and processor; The memory is used to store one or more computer instructions; The processor is configured to execute one or more computer instructions for performing the steps of the method according to any one of claims 1-7.

9. A computer-readable storage medium storing a computer program, characterized in that, When a computer program is executed by a processor, it is able to perform the steps of the method described in any one of claims 1-7.

10. A computer program product, characterized in that, include: A computer program / instruction that, when executed by a processor, enables the implementation of the steps in the method described in any one of claims 1-7.

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