Superconducting quantum computing system, method integrating gradient computation optimization module

Abstract

This invention discloses a superconducting quantum computing system and method integrating a gradient calculation optimization module, relating to the field of computer technology. The system includes a superconducting quantum processor integrating a gradient calculation optimization module and an instruction compilation module, and a control unit. The gradient calculation optimization module receives data computation tasks and transforms these tasks according to preset circuit decomposition rules, generating at least two target quantum circuits for gradient calculation. The instruction compilation module compiles the target quantum circuits into corresponding control instruction sequences. The control unit controls the superconducting quantum processor to execute each control instruction sequence sequentially, obtains corresponding measurement results, and determines the gradient values ​​of parameters in the data computation task based on these measurement results. By decomposing the data into commuting two-qubit gate components, the generated target quantum circuits consist only of native XY gates and single-qubit rotation gates supported by the superconducting quantum processor, reducing redundancy introduced by gate decomposition and obtaining accurate gradient values.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a superconducting quantum computing system and method with an integrated gradient calculation optimization module. Background Technology

[0002] In the era of medium-scale quantum computing with noise, the variational quantum algorithm is the mainstream technical path to achieve quantum advantage. This algorithm requires the collaborative work of classical computers and quantum processors to solve problems by iteratively optimizing the parameters in the quantum circuit. The key step in this process is calculating the gradient of the objective function with respect to the quantum circuit parameters. The efficiency and accuracy of this step directly determine the overall performance and practicality of the algorithm. Superconducting quantum computing systems are one of the important physical platforms for implementing these algorithms. On this platform, a class of two-qubit XY gates, representing the exchange interaction between qubits, has become a key native operation for constructing quantum circuits due to its ease of efficient implementation. However, when using such parameterized multi-qubit gates to construct variational quantum circuits, how to efficiently and accurately calculate their gradients on practical superconducting quantum processors has become a prominent engineering challenge. Currently, parameter translation rules, finite difference methods, and random perturbation methods are commonly used.

[0003] It is evident that how to output more accurate gradient values ​​on a superconducting quantum processor without introducing auxiliary qubits, significantly increasing the depth of the quantum circuit, and being insensitive to control noise is a problem that needs to be solved by those skilled in the art. Summary of the Invention

[0004] The purpose of this invention is to provide a superconducting quantum computing system and method with an integrated gradient calculation optimization module, which outputs more accurate gradient values ​​on a superconducting quantum processor without introducing auxiliary qubits, significantly increasing the depth of quantum circuits, or being sensitive to control noise.

[0005] To address the aforementioned technical problems, embodiments of the present invention provide a superconducting quantum computing system integrating a gradient calculation optimization module, comprising a superconducting quantum processor integrating a gradient calculation optimization module and an instruction compilation module, and a control unit, wherein...

[0006] The gradient calculation optimization module is used to receive data processing tasks and transform the data processing tasks according to preset circuit splitting rules to generate at least two target quantum circuits for gradient calculation.

[0007] The instruction compilation module is used to compile the target quantum circuit into corresponding control instruction sequences;

[0008] The control unit is used to control the superconducting quantum processor to execute each control instruction sequence in sequence and obtain the corresponding measurement results, so as to determine the gradient value of the parameters in the data operation task based on each measurement result.

[0009] Optionally, the data processing task is an initial quantum circuit containing a parameterized two-bit gate.

[0010] Optionally, the preset line splitting rule is to decompose the parameterized two-bit gate into at least two commuting two-bit gate components based on the commutation relationship of the parameterized two-bit gate.

[0011] Optional gradient calculation optimization module, including:

[0012] The decomposition submodule is used to decompose the data processing task into at least two commuting two-bit gate components based on a preset line splitting rule;

[0013] The parameter line generation unit is used to generate parameter shift sub-lines corresponding to the two-bit gate components according to the preset parameter shift rules.

[0014] Optional gradient calculation optimization module, including:

[0015] The quantum circuit generation submodule is used to replace the target quantum gate of the parameter translation sub-circuit according to the preset hardware circuit generation rules, so as to generate the target quantum circuit based on the target two-bit gate and the single-bit rotation gate.

[0016] Optional, the quantum circuit generation submodule includes:

[0017] The filtering unit is used to select a two-bit gate containing a preset fixed phase offset in the parameter shifting sub-circuit as the target quantum gate;

[0018] The quantum circuit generation unit is used to replace the target quantum gate with a target quantum circuit constructed by sequentially connecting a preset two-bit gate, a target two-bit gate, and a single-bit rotation gate based on a preset fixed angle, according to the hardware circuit generation rules.

[0019] Optionally, the parameterized two-bit gate is an XY gate; the XY gate is an exponential quantum gate with the parameter to be optimized as the angle and the sum of the first Pauli operator component and the second Pauli operator component as the generator.

[0020] Optional, the sub-modules can be broken down, including:

[0021] The decomposition unit is used to decompose the XY gate into a continuous product of two quantum gates with the first Pauli operator component and the second Pauli operator component as generators, so as to obtain the two-bit gate component.

[0022] Optionally, the target quantum circuit has four lines, and the corresponding control unit includes:

[0023] The gradient calculation unit is used to control the superconducting quantum processor to execute four control instruction sequences in sequence and obtain four corresponding measurement results, so as to determine the gradient value of the parameters in the data operation task based on the four measurement results.

[0024] Optional gradient computation unit, including:

[0025] The combined calculation unit is used to perform combined calculations on the four measurement results according to the preset gradient calculation equation, so as to output the gradient value of the XY gate parameter.

[0026] Secondly, the present invention provides a superconducting quantum computing method, comprising:

[0027] Receive data processing tasks and transform the data processing tasks according to preset circuit splitting rules to generate at least two target quantum circuits for calculating gradients.

[0028] The target quantum circuits are compiled into corresponding control instruction sequences;

[0029] The superconducting quantum processor is controlled to execute each control instruction sequence in sequence and obtain the corresponding measurement results, so as to determine the gradient value of the parameters in the data operation task based on each measurement result.

[0030] Optionally, in the process of generating at least two target quantum circuits for gradient calculation based on the transformation of the data computation task according to the preset circuit splitting rules, the process also includes:

[0031] Based on the preset line splitting rules, the data processing task is decomposed into at least two commuting two-bit gate components;

[0032] Generate parameter shift sub-circuits corresponding to the two-bit gate components according to the preset parameter shift rules.

[0033] Optionally, based on a preset circuit splitting rule and the transformation of the data computation task, at least two target quantum circuits for gradient calculation are generated, including:

[0034] The target quantum gate of the parameter translation sub-circuit is replaced according to the preset hardware circuit generation rules to generate the target quantum circuit based on the target two-bit gate and the single-bit rotation gate.

[0035] Optionally, the target quantum gate of the parameter-shifting sub-circuit is replaced according to a preset hardware circuit generation rule to generate a target quantum circuit based on a target two-qubit gate and a single-qubit rotation gate, including:

[0036] The target quantum gate is a two-bit gate containing a preset fixed phase offset in the parameter shift sub-circuit.

[0037] According to the hardware circuit generation rules, the target quantum gate is replaced with a target quantum circuit constructed by sequentially connecting a preset two-bit gate, a target two-bit gate, and a single-bit rotation gate based on a preset fixed angle.

[0038] Optionally, based on a preset line splitting rule, the data processing task is decomposed into at least two commuting two-bit gate components, including:

[0039] The XY gate is decomposed into a continuous product of two quantum gates with the first and second Pauli operators as generators, to obtain the two-bit gate component.

[0040] Optionally, there are four target quantum circuits. Correspondingly, the superconducting quantum processor is controlled to execute each control instruction sequence sequentially and acquire the corresponding measurement results. Based on these measurement results, the gradient values ​​of the parameters in the data processing task are determined, including:

[0041] The superconducting quantum processor is controlled to execute four control instruction sequences in sequence and obtain four corresponding measurement results, so as to determine the gradient values ​​of the parameters in the data operation task based on the four measurement results.

[0042] Optionally, the superconducting quantum processor is controlled to execute each control instruction sequence sequentially and acquire the corresponding measurement results, so as to determine the gradient values ​​of the parameters in the data computation task based on each measurement result, including:

[0043] The four measurement results are combined and calculated according to the preset gradient calculation equation to output the gradient value of the XY gate parameter.

[0044] Thirdly, the present invention provides an electronic device, comprising:

[0045] Memory, used to store computer programs;

[0046] A processor for executing computer programs to implement the aforementioned disclosed superconducting quantum computing method.

[0047] Fourthly, the present invention provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the aforementioned disclosed superconducting quantum computing method.

[0048] Fifthly, the present invention provides a computer program product, including a computer program / instructions that, when executed by a processor, implement the steps of the aforementioned disclosed superconducting quantum computing method.

[0049] As can be seen, the present invention provides a superconducting quantum computing system integrating a gradient calculation optimization module, comprising a superconducting quantum processor integrating a gradient calculation optimization module and an instruction compilation module, and a control unit. The gradient calculation optimization module is used to receive data computation tasks and, according to a preset circuit splitting rule, perform transformation processing on the data computation tasks to generate at least two target quantum circuits for calculating gradients. The instruction compilation module is used to compile the target quantum circuits into corresponding control instruction sequences. The control unit is used to control the superconducting quantum processor to execute each of the control instruction sequences sequentially and obtain corresponding measurement results to determine the gradient values ​​of the parameters in the data computation task based on each measurement result.

[0050] As can be seen from the above technical solution, the data computation task is transformed and decomposed into commuting two-qubit gate components by the gradient calculation optimization module. The final generated target quantum circuit consists only of native XY gates and single-qubit rotation gates supported by the superconducting quantum processor. Furthermore, all gates in the processed target quantum circuit are native gates, allowing the instruction compilation module to directly compile them into efficient control instruction sequences, avoiding a large number of redundant operations introduced by gate decomposition or mapping. Therefore, the depth of the final executed quantum circuit is strictly controlled and does not increase significantly with the problem size, thus reducing error accumulation caused by excessive circuit depth in noisy environments. Finally, the control unit schedules the quantum processor to execute and collect data sequentially, and the gradient value determination process, because the quantum processor can reliably execute the circuit, can obtain accurate gradient values, thereby improving the convergence accuracy and speed of the variable quantum algorithm. Attached Figure Description

[0051] To more clearly illustrate the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0052] Figure 1 A schematic diagram of a superconducting quantum computing system with an integrated gradient calculation optimization module is provided in an embodiment of the present invention.

[0053] Figure 2 A schematic diagram of a circuit replacement with a parameterized two-bit gate provided in an embodiment of the present invention;

[0054] Figure 3 This is a schematic diagram of the functional architecture of a superconducting quantum computing system provided in an embodiment of the present invention;

[0055] Figure 4 A flowchart of a superconducting quantum computing method provided in an embodiment of the present invention;

[0056] Figure 5 A flowchart of a specific superconducting quantum computing method provided in an embodiment of the present invention;

[0057] Figure 6 This is a diagram of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0058] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present invention.

[0059] The terms "comprising" and "having," and any variations thereof, in the specification and accompanying drawings of this invention are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may include steps or units not listed.

[0060] To enable those skilled in the art to better understand the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0061] In the era of medium-scale quantum computing with noise, the variational quantum algorithm is the mainstream technical path to achieve quantum advantage. This algorithm requires the collaborative work of classical computers and quantum processors to solve problems by iteratively optimizing the parameters in the quantum circuit. The key step in this process is calculating the gradient of the objective function with respect to the quantum circuit parameters. The efficiency and accuracy of this step directly determine the overall performance and practicality of the algorithm. Superconducting quantum computing systems are one of the important physical platforms for implementing these algorithms. On this platform, a class of two-qubit XY gates, representing the exchange interaction between qubits, has become a key native operation for constructing quantum circuits due to its ease of efficient implementation. However, when using such parameterized multi-qubit gates to construct variational quantum circuits, how to efficiently and accurately calculate their gradients on practical superconducting quantum processors has become a prominent engineering challenge. Currently, parameter translation rules, finite difference methods, and random perturbation methods are commonly used.

[0062] To this end, the present invention provides a superconducting quantum computing scheme with an integrated gradient calculation optimization module, which can output more accurate gradient values ​​on a superconducting quantum processor without introducing auxiliary qubits, significantly increasing the depth of quantum circuits, and being insensitive to control noise.

[0063] like Figure 1As shown, this invention provides a superconducting quantum computing system with an integrated gradient calculation optimization module, including a superconducting quantum processor 11 integrating a gradient calculation optimization module 111 and an instruction compilation module 112, and a control unit 12, wherein,

[0064] The gradient calculation optimization module 111 is used to receive data processing tasks and perform transformation processing on the data processing tasks according to preset circuit splitting rules to generate at least two target quantum circuits for calculating gradients.

[0065] The instruction compilation module 112 is used to compile the target quantum circuit into corresponding control instruction sequences;

[0066] The control unit 12 is used to control the superconducting quantum processor 11 to execute each control instruction sequence in sequence and obtain the corresponding measurement results, so as to determine the gradient value of the parameters in the data operation task based on each measurement result.

[0067] Understandably, the superconducting quantum processor 11 receives a data computation task, which is an initial quantum circuit containing a parameterized two-qubit gate, specifically an XY gate. The XY gate is an exponential quantum gate with the parameter to be optimized as the angle and the sum of the first and second Pauli operator components as the generator. Specifically, the gradient calculation optimization module 111 in the superconducting quantum processor 11 includes: a decomposition submodule, used to decompose the data computation task into at least two commuting two-qubit gate components based on a preset circuit decomposition rule; and a parameter circuit generation unit, used to generate parameter-shifted sub-circuits corresponding to the two-qubit gate components according to a preset parameter shifting rule. The decomposition submodule includes: a decomposition unit, used to decompose the XY gate into a continuous product of two quantum gates with the first and second Pauli operator components as generators, to obtain the two-qubit gate components.

[0068] Understandably, in superconducting computation, the XY gate, also known as the exponential quantum gate, is relevant: ,in, For the parameters to be optimized, matrix The eigenvalues ​​are 2, -2, 0, which do not satisfy the parameter translation rule. Therefore, the existing gradient calculation formula cannot be used directly. Thus, because the first Pauli operator component of the two-bit XY gate containing parameters... The second Pauli operator component Since it is commutative, the XY gate is decomposed into a continuous product of two quantum gates, yielding the two-qubit gate component: ,and , The eigenvalues ​​are 1 and -1. Therefore, the gradient calculation of the initial quantum circuit containing the XY gate is decomposed according to the preset circuit decomposition rules and applied to... , By performing a chain-like combination of gradients after parameter flattening, four quantum circuits are obtained. The preset circuit decomposition rule is to decompose a parameterized two-bit gate into at least two commuting two-bit gate components based on the commutation relation of the parameterized two-bit gate.

[0069] Furthermore, after decomposing the two-bit gate components, parameter shifting is performed on each component. For a parameterized gate G that meets the conditions, Furthermore, when the matrix g has only two eigenvalues, ±r, a parameter translation rule is used to obtain the corresponding parameter-translated self-circuit. The parameter translation rule used in this invention is... Therefore, for the first component gate of the present invention The parameters are shifted, and its generator is g1= Since the eigenvalues ​​r = ±1, two new parameter values ​​need to be constructed: and Thus, we obtain the gate after the two parameters have been translated: and Similarly, for the second component gate Parameter translation: its generator is g2= The eigenvalues ​​are also r=±1, and similarly, the construction parameters are... and This results in two translated doors: and According to the chain rule, the total gradient of the XY gate is a linear combination of the gradient contributions of the two component gates mentioned above. Therefore, it needs to be ( , ), ( , ), ( , ), ( , These four combinations each construct an independent quantum circuit. Each circuit consists of the original circuit excluding the target XY gate, and a pair of specific parameter translation gates that replace the XY gate (one from the...). Translation, one from the opposite The translations are constructed sequentially. At this point, the application steps of the parametric translation rules are complete, generating four intermediate parametric translation sub-routes, each containing elements of the form... or According to the principle of gradient calculation, the quantum gates require pairwise combinations of the above translation results. Specifically, any translation result of the first component gate is combined with any translation result of the second component gate to replace the original circuit. This process constructs a complete quantum circuit. It generates four different parameter-translated sub-circuits, which constitute all the measurement bases required to calculate the gradient. These gates are the input targets of the quantum circuit generation submodule. It is important to note that the generated circuit at this stage contains... and These are target quantum gates, which are not native gates directly supported in current superconducting quantum processors.

[0070] However, in a superconducting quantum processor, the target quantum gate is not part of the set of native quantum gate operations it supports. If such instructions are directly executed, the instruction compiler of the quantum control system will be unable to map them to the corresponding control pulse sequence. If a general quantum gate is forcibly used to approximate the implementation, it will increase the depth and complexity of the quantum circuit and introduce more noise. Therefore, the target quantum gate needs to be replaced with a target quantum circuit consisting only of the set of gates natively supported by the superconducting quantum processor.

[0071] Specifically, the gradient calculation optimization module 111 includes: a quantum circuit generation submodule, used to replace the target quantum gate of the parameter translation sub-circuit according to a preset hardware circuit generation rule, so as to generate a target quantum circuit based on a target two-qubit gate and a single-qubit rotation gate. Specifically, the quantum circuit generation submodule includes: a screening unit, used to select two-qubit gates containing a preset fixed phase offset in the parameter translation sub-circuit as target quantum gates; and a quantum circuit generation unit, used to replace the target quantum gates with target quantum circuits constructed by sequentially connecting a preset two-qubit gate, a target two-qubit gate, and a single-qubit rotation gate based on a preset fixed angle, according to the hardware circuit generation rule. It can be understood that the preset hardware circuit generation rule mapping relationship (which maps a type of non-native quantum gate generated by parameter translation one-to-one to a native quantum gate supported by the target superconducting quantum processor) is used to screen out... and The process involves replacing the gates with native quantum gates, and then sequentially connecting the native quantum gates, the target two-qubit gate, and the single-qubit rotation gate to construct the corresponding target quantum circuit. It's important to note that after the equivalent replacement, all two-qubit gate operations in the final generated target quantum circuit are native XY gates. The gates originally generated in the parameter translation step... In the replaced circuit, phase is manifested as the rotation angle of a native XY gate acting on a qubit becoming... ,like Figure 2 As shown, this numerical change is the result of a mathematical equivalent transformation, not an approximation. The specific derivation process is as follows: , ,but Next, you only need to... use This is represented by Pauli algebra. It can be implemented using a single-bit gate X. arrive The transformation, that is Therefore, the circuit generated by parameter translation can be represented by only XY gates and single-bit gates, which is very easy to implement in superconducting quantum computing experiments.

[0072] In this embodiment, to improve the executability and efficiency of the generated target quantum circuit on physical hardware, the instruction compilation module 112 integrates a hardware adaptation optimization submodule before execution of compilation. This submodule performs bit mapping and gate sequence optimization on the target quantum circuit based on a pre-stored hardware constraint description file. Specifically, the physical constraints of the superconducting quantum processor are dynamically described or periodically updated through a preset hardware constraint description file, including: using a graph structure to indicate which pairs of physical qubits support native two-qubit XY gate operations, i.e., there is a direct coupling link; and recording the target performance indicators of each physical qubit, such as coherence time (T1, T2), single-qubit gate fidelity, measurement fidelity, and two-qubit gate fidelity. Further, the optimization process is as follows: the hardware adaptation optimization submodule dynamically allocates the logical qubits (q0, q1) in the target quantum circuit to a group of physical qubits (Q3, Q5). The mapping algorithm aims to maximize the expected fidelity of the overall circuit. It maps logical bit pairs that require two-bit gate operations to physical bit pairs with native connections, avoiding the depth and error overhead caused by inserting extra gates to satisfy connectivity constraints. Under the premise of satisfying connectivity constraints, it further prioritizes physical bits with higher gate fidelity and longer coherence time to minimize operation errors. After determining the physical mapping, the gate operation sequence in the circuit is locally optimized: for multiple single-bit rotation gates that act continuously on the same physical bit and have no dependency, their equivalent rotation angles are calculated together and replaced with a single gate operation to reduce the number of gates. Under the premise of satisfying all quantum gate dependencies, based on the coherence time of each physical bit, the gate operations are moved forward as much as possible to shorten the total physical execution time of the circuit and reduce the error caused by dynamic decoherence. After completing the above optimization, the final quantum circuit description that is deeply adapted to the target hardware is obtained, which is then handed over to the instruction compilation module to compile into the underlying control instruction sequence. In this way, by introducing dynamic hardware adaptation optimization steps, and adapting to the physical topology, compilation failures caused by incompatibility between logic circuits and hardware are avoided; by optimizing bit mapping and scheduling, poor-performing hardware units are actively avoided, and circuit depth and runtime are minimized, thereby systematically reducing the impact of noise; it can automatically adapt to superconducting quantum processors of different specifications and connection topologies, improving the practicality and portability of the technology.

[0073] The instruction compilation module 112 receives the target quantum circuit (which is entirely composed of native gates) generated by the gradient calculation and optimization module 111. The module invokes a compiler for the superconducting quantum processor hardware to translate and optimize the quantum gates in each circuit into a specific sequence of low-level control instructions. This sequence sets the waveform, frequency, phase, and precise timing of the microwave pulses. Finally, the compiled control instruction sequence is output to the control unit for scheduling the superconducting quantum processor to execute.

[0074] Furthermore, the target quantum circuit has four lines. Correspondingly, the control unit includes a gradient calculation unit, used to control the superconducting quantum processor to sequentially execute four control instruction sequences and acquire four corresponding measurement results to determine the gradient values ​​of the parameters in the data computation task based on these four measurement results. Specifically, the gradient calculation unit includes a combination calculation unit, used to perform combination calculations on the four measurement results according to a preset gradient calculation equation to output the gradient values ​​of the XY gate parameters. It can be understood that to calculate the gradient of the XY gate, it is necessary to calculate the gradient of the two commuting component gates separately. and Apply the parametric translation rules separately. Each component gate requires two translation points. To calculate its gradient, a total of 2 × 2 = 4 different parameter combinations are generated based on permutations and combinations. Each combination corresponds to a unique quantum circuit, i.e., a target quantum circuit, used to obtain the expected value of the observable at that parameter point, thus generating 4 target quantum circuits. The control unit receives the compiled control instruction sequence of the 4 target quantum circuits sequentially from the instruction compilation module and puts it into the execution queue. The control unit sends control signals to the superconducting quantum processor, loading and executing each control instruction sequence in the queue sequentially. After each execution, the quantum processor measures the specified qubit and returns the measurement result (a set of classical bit strings) to the control unit. The control unit receives and records the original measurement result returned from each execution. By repeatedly executing the same circuit multiple times for statistical analysis, the control unit or the associated classical processor can calculate the expected value of the observable corresponding to that circuit, denoted as . ,in, i =1, 2, 3, 4. These four expected values ​​are temporarily stored for final calculation. (The process involves retrieving all four expected values.) , , , The gradient calculation unit in the control unit performs calculations according to a preset gradient calculation formula:

[0075] ;

[0076] in, Let be the gradient value of the parametric XY gate with respect to the parameter θ. This indicates that the corresponding parameter combination is The expected measurement value of the target route, This indicates that the corresponding parameter combination is The expected measurement value of the target route, This indicates that the corresponding parameter combination is The expected measurement value of the target route, This indicates that the corresponding parameter combination is The expected measurement value of the target line.

[0077] like Figure 3 The diagram shows the functional architecture of the superconducting quantum computing system of the present invention. The circuit generation module is the gradient calculation optimization module of the present invention, which is used to complete the decomposition, translation and replacement of quantum circuits. The quantum computer is the superconducting quantum processor of the present invention. The result combination module is part of the control unit of the present invention, which is used to perform gradient calculation functions. The CPU (Central Processing Unit) is the control unit that integrates the various modules of the present invention and is an internal physical implementation component.

[0078] As can be seen from the above technical solution, the data computation task is transformed and decomposed into commuting two-qubit gate components by the gradient calculation optimization module. The final generated target quantum circuit consists only of native XY gates and single-qubit rotation gates supported by the superconducting quantum processor. Furthermore, all gates in the processed target quantum circuit are native gates, allowing the instruction compilation module to directly compile them into efficient control instruction sequences, avoiding a large number of redundant operations introduced by gate decomposition or mapping. Therefore, the depth of the final executed quantum circuit is strictly controlled and does not increase significantly with the problem size, thus reducing error accumulation caused by excessive circuit depth in noisy environments. Finally, the control unit schedules the quantum processor to execute and collect data sequentially, and the gradient value determination process, because the quantum processor can reliably execute the circuit, can obtain accurate gradient values, thereby improving the convergence accuracy and speed of the variable quantum algorithm.

[0079] like Figure 4 As shown, the present invention also provides a superconducting quantum computing method, comprising:

[0080] Step S11: Receive the data processing task and perform transformation processing on the data processing task according to the preset circuit splitting rules to generate at least two target quantum circuits for calculating gradients.

[0081] In this embodiment, the data processing task is decomposed into at least two commuting double-bit gate components based on a preset line splitting rule; parameter shift sub-lines corresponding to the double-bit gate components are generated according to a preset parameter shifting rule. For example... Figure 5As shown, the data processing task involves an initial quantum circuit containing a parameterized two-qubit gate, which is an XY gate. Therefore, the XY gate is decomposed into a continuous product of two quantum gates generated by the first and second Pauli operator components, yielding two-qubit gate components. Based on a preset circuit decomposition rule, the parameterized two-qubit gate is decomposed into a continuous product of two quantum gates. After decomposition, a preset parameter translation rule needs to be applied to each two-qubit gate component to calculate its gradient contribution. According to the chain rule of gradient calculation, the total gradient of the XY gate requires the combination of all parameter combinations of the two components. Therefore, the two translation results of the first component are combined pairwise with the two translation results of the second component to generate four parameter-translated sub-circuits. Each sub-circuit is composed of the original circuit excluding the target XY gate, plus a pair of specific translated component gates.

[0082] In this embodiment, the target quantum gate of the parameter-shifting sub-circuit is replaced according to a preset hardware circuit generation rule to generate a target quantum circuit based on a target two-qubit gate and a single-qubit rotation gate. Specifically, a two-qubit gate containing a preset fixed phase offset in the parameter-shifting sub-circuit is used as the target quantum gate; the target quantum gate is replaced with a target quantum circuit constructed by sequentially connecting a preset two-qubit gate, the target two-qubit gate, and a single-qubit rotation gate based on a preset fixed angle, according to the hardware circuit generation rule. It can be understood that the target quantum gate needs to be equivalently replaced with a set of gates natively supported only by the superconducting quantum processor. In this embodiment, this is mainly a circuit composed of a two-qubit XY gate and a single-qubit rotation gate. To this end, the target quantum gate is mapped to a short sequence of preset hardware circuit generation rules, consisting of a native XY gate with fixed parameters, a native XY gate containing the original parameter θ, and a single-qubit rotation gate connected in sequence, to construct the target quantum circuit.

[0083] Step S12: Compile the target quantum circuits into corresponding control instruction sequences.

[0084] In this embodiment, a compiler for the superconducting quantum processor hardware is invoked to translate and optimize the quantum gates in each circuit into specific low-level control instruction sequences. These control instruction sequences set the waveform, frequency, phase, and precise timing of the microwave pulses. Finally, the compiled control instruction sequences are output to the control unit for scheduling the superconducting quantum processor to execute.

[0085] Step S13: Control the superconducting quantum processor to execute each control instruction sequence in sequence and obtain the corresponding measurement results, so as to determine the gradient value of the parameters in the data operation task based on each measurement result.

[0086] In this embodiment, the superconducting quantum processor is controlled to execute four control instruction sequences sequentially and acquire four corresponding measurement results. The gradient values ​​of the parameters in the data processing task are then determined based on these four measurement results. The four measurement results are combined and calculated according to a preset gradient calculation equation to output the gradient values ​​of the XY gate parameters. It can be understood that executing the control instruction sequence generates four corresponding measurement results, as described above. , , , Then according to Perform combined calculations and output the final gradient value.

[0087] Therefore, it is evident that in calculating the gradient of a two-qubit gate parameter in a variable quantum circuit, the obtained gradient value is less affected by operational accuracy and circuit noise, and no auxiliary qubits are required. Both the target two-qubit gate and the gradient calculation circuit are native gates in superconducting quantum computing, making them simple to implement and widely applicable.

[0088] Furthermore, embodiments of this application also disclose an electronic device, Figure 6 This is a structural diagram of an electronic device according to an exemplary embodiment. Figure 6 The content herein should not be construed as limiting the scope of this application. Specifically, the electronic device may include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 stores a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the superconducting quantum computing method disclosed in any of the foregoing embodiments. Furthermore, the electronic device in this embodiment may specifically be an electronic computer.

[0089] In this embodiment, the power supply 23 is used to provide operating voltage for various hardware devices on the electronic device; the communication interface 24 can create a data transmission channel between the electronic device and external devices, and the communication protocol it follows can be any communication protocol applicable to the technical solution of this application, and is not specifically limited here; the input / output interface 25 is used to acquire external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs, and is not specifically limited here.

[0090] In addition, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk or optical disk, etc. The resources stored thereon can include operating system 221, computer program 222, etc., and the storage method can be temporary storage or permanent storage.

[0091] The operating system 221 is used to manage and control the various hardware devices on the electronic device and the computer program 222, which may be Windows Server, Netware, Unix, Linux, etc. In addition to including a computer program capable of performing the superconducting quantum computing method executed by the electronic device as disclosed in any of the foregoing embodiments, the computer program 222 may further include a computer program capable of performing other specific tasks.

[0092] Furthermore, this application also discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, it implements the aforementioned disclosed superconducting quantum computing method. Specific steps of this method can be found in the corresponding content disclosed in the foregoing embodiments, and will not be repeated here.

[0093] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.

[0094] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0095] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0096] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0097] The technical solutions provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only intended to help understand the methods and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A superconducting quantum computing system integrating a gradient calculation optimization module, characterized in that, This includes a superconducting quantum processor integrating a gradient calculation optimization module and an instruction compilation module, and a control unit, among which, The gradient calculation optimization module is used to receive data operation tasks and perform transformation processing on the data operation tasks according to preset circuit splitting rules to generate at least two target quantum circuits for gradient calculation; wherein, the preset circuit splitting rules are to decompose the parameterized two-bit gate into at least two commuting two-bit gate components based on the commutation relationship of the parameterized two-bit gate, and the parameterized two-bit gate is an XY gate. The instruction compilation module is used to compile the target quantum circuits into corresponding control instruction sequences; The control unit is used to control the superconducting quantum processor to execute each of the control instruction sequences in sequence and obtain the corresponding measurement results, so as to determine the gradient value of the parameter in the data operation task based on each of the measurement results; wherein, the parameter in the data operation task is the XY gate parameter.

2. The superconducting quantum computing system with an integrated gradient calculation optimization module according to claim 1, characterized in that, The data processing task involves an initial quantum circuit containing a parameterized two-bit gate.

3. The superconducting quantum computing system with an integrated gradient calculation optimization module according to claim 1, characterized in that, The gradient calculation optimization module includes: The decomposition submodule is used to decompose the data processing task into at least two commuting two-bit gate components based on the preset line splitting rules. The parameter line generation unit is used to generate parameter shift sub-lines corresponding to the two-bit gate components according to preset parameter shift rules.

4. The superconducting quantum computing system with an integrated gradient calculation optimization module according to claim 3, characterized in that, The gradient calculation optimization module includes: The quantum circuit generation submodule is used to replace the target quantum gate of the parameter translation sub-circuit according to the preset hardware circuit generation rules, so as to generate the target quantum circuit based on the target two-bit gate and the single-bit rotation gate.

5. The superconducting quantum computing system with an integrated gradient calculation optimization module according to claim 4, characterized in that, The quantum circuit generation submodule includes: The filtering unit is used to select the two-bit gate containing a preset fixed phase offset in the parameter shifting sub-circuit as the target quantum gate; A quantum circuit generation unit is used to replace the target quantum gate with a target quantum circuit constructed by sequentially connecting a preset two-bit gate, a target two-bit gate, and a single-bit rotation gate based on a preset fixed angle, according to the hardware circuit generation rules.

6. The superconducting quantum computing system with an integrated gradient calculation optimization module according to claim 1, characterized in that, The parameterized two-bit gate is an XY gate; the XY gate is an exponential quantum gate with the parameter to be optimized as the angle and the sum of the first Pauli operator component and the second Pauli operator component as the generator.

7. The superconducting quantum computing system with an integrated gradient calculation optimization module according to claim 3, characterized in that, The disassembly submodule includes: The decomposition unit is used to decompose the XY gate into a continuous product of two quantum gates with the first Pauli operator component and the second Pauli operator component as generators, so as to obtain the two-bit gate component.

8. The superconducting quantum computing system with an integrated gradient calculation optimization module according to claim 1, characterized in that, The target quantum circuit consists of four lines; correspondingly, the control unit includes: The gradient calculation unit is used to control the superconducting quantum processor to execute the four control instruction sequences in sequence and obtain the corresponding four measurement results, so as to determine the gradient value of the parameter in the data operation task based on the four measurement results.

9. The superconducting quantum computing system with an integrated gradient calculation optimization module according to claim 8, characterized in that, The gradient calculation unit includes: The combined calculation unit is used to perform combined calculations on the four measurement results according to the preset gradient calculation equation, so as to output the gradient value of the XY gate parameter.

10. A superconducting quantum computing method, characterized in that, include: The system receives data computation tasks and performs transformation processing on the data computation tasks according to a preset circuit splitting rule to generate at least two target quantum circuits for calculating gradients; wherein, the preset circuit splitting rule is to decompose a parameterized two-bit gate into at least two commuting two-bit gate components based on the commutation relation of a parameterized two-bit gate, and the parameterized two-bit gate is an XY gate. The target quantum circuits are compiled into corresponding control instruction sequences; The superconducting quantum processor is controlled to execute each of the control instruction sequences in sequence and obtain the corresponding measurement results, so as to determine the gradient value of the parameter in the data operation task based on each of the measurement results; wherein, the parameter in the data operation task is the XY gate parameter.

11. The superconducting quantum computing method according to claim 10, characterized in that, The process of transforming the data computation task according to a preset circuit splitting rule to generate at least two target quantum circuits for gradient calculation also includes: The data processing task is decomposed into at least two commuting two-bit gate components based on a preset line splitting rule; Based on preset parameter shifting rules, parameter shifting sub-circuits are generated that correspond to the two-bit gate components respectively.

12. The superconducting quantum computing method according to claim 11, characterized in that, The data computation task is transformed according to a preset circuit splitting rule to generate at least two target quantum circuits for gradient calculation, including: The target quantum gate of the parameter translation sub-circuit is replaced according to the preset hardware circuit generation rules to generate a target quantum circuit based on a target two-bit gate and a single-bit rotation gate.

13. The superconducting quantum computing method according to claim 12, characterized in that, The step of replacing the target quantum gate of the parameter-shifting sub-circuit according to a preset hardware circuit generation rule to generate a target quantum circuit based on a target two-qubit gate and a single-qubit rotation gate includes: The target quantum gate is a two-bit gate containing a preset fixed phase offset in the parameter translation sub-circuit. According to the hardware circuit generation rules, the target quantum gate is replaced with a target quantum circuit constructed by sequentially connecting a preset two-bit gate, a target two-bit gate, and a single-bit rotation gate based on a preset fixed angle.

14. The superconducting quantum computing method according to claim 11, characterized in that, The process of decomposing the data processing task into at least two commuting two-bit gate components based on a preset line splitting rule includes: The XY gate is decomposed into a continuous product of two quantum gates with the first and second Pauli operators as generators, to obtain the two-bit gate component.

15. The superconducting quantum computing method according to claim 11, characterized in that, The target quantum circuit consists of four lines. Correspondingly, the superconducting quantum processor executes each control instruction sequence sequentially and acquires the corresponding measurement results. Based on these measurement results, the gradient values ​​of the parameters in the data processing task are determined, including: The superconducting quantum processor is controlled to execute the four control instruction sequences in sequence and obtain the corresponding four measurement results, so as to determine the gradient value of the parameters in the data operation task based on the four measurement results.

16. The superconducting quantum computing method according to claim 15, characterized in that, The superconducting quantum processor is controlled to execute each of the control instruction sequences sequentially and acquire corresponding measurement results, so as to determine the gradient values ​​of the parameters in the data processing task based on each of the measurement results, including: The four measurement results are combined and calculated according to the preset gradient calculation equation to output the gradient value of the XY gate parameter.

17. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the steps of the superconducting quantum computing method as described in any one of claims 10 to 16.

18. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the superconducting quantum computing method as described in any one of claims 10 to 16.

19. A computer program product comprising a computer program / instructions, characterized in that, When the computer program / instructions are executed by the processor, they implement the steps of the superconducting quantum computing method according to any one of claims 10 to 16.

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